CN1233036A - Pulse width modulation method for non-linear display in plate display screen with partitioned alternate scan - Google Patents

Abstract

The present invention relates to the field of video display technology. The new video plate display and driving technology adopts non-linear time chip correction, mixed time chip sequence data read-out and pixel driving technology, and all these results in convenient greyscale control, saving in memory space, improved video image quality and reduced overall cost.

Description

The non-linear demonstration pulse duration modulation method of flat pannel display screen with partitioned alternate sweep

The invention belongs to the video display technology field.The width modulation that video shows is saved storage space for the control of the quality, particularly gray scale of video image displayed, and it all is vital reducing the complete machine cost.Source video image in the past is that the system of display device designs at cathode ray tube (CRT), and vision signal is proofreaied and correct through γ, therefore carries out system that image shows for the display device with linear characteristic and need carry out anti-γ and proofread and correct.Therefore, to the image that shows with even timeslice,, on the image distortion will be arranged owing to proofread and correct without γ.

The open CN1122035A of Chinese patent application, (95105681.6) have reported the Texas ,Usa instrument incorporated company method that " is used to have the spatial light modulator of cutting apart reset addressing ".Display frame is divided into timeslice, each Frame is divided into bit plane, each bit plane has 1 Bit data of each pixel element of expression, and each bit plane has the one demonstration period corresponding with the plurality of sections timeslice, and the bit plane of high bit weighting shows more timeslice.Bit plane further is formatted into the group that resets, one group the reset group of the group that respectively resets corresponding to spatial light modulator.Demonstration time slice the group that resets of high bit makes data show demonstration with the form rather than the continuous shape of time of segmentation.At loading duration, a section time alignment that resets group and the corresponding bit plane of next group that resets.The demonstration time than low level is not cut apart, but time alignment is as far as possible avoided load conflict.Another of the said firm part Chinese patent application (95100608.8) has then been reported " linearization with video display system of spatial light modulator ".A kind of disposal system of digital display system is provided, and it receives through the corrected component of γ, the video input signals digitizing, and handle by anti-γ carry out linearization with remove all or part of γ proofread and correct before digitized data-switching to rgb space.

" electronic technology " in 1995 the 7th phases have been reported " γ proofreaies and correct and the color LED giant-screen ", and it thes contents are as follows:

The anti-γ of giant-screen proofreaies and correct.Large color screen always drives with digital signal, and the duty that gray scale is lighted with corresponding LED display dot is recently controlled, and its physics brightness is directly proportional with dutycycle like this, also promptly is directly proportional with controlled quentity controlled variable, is equivalent to γ=1, so the LED screen does not have the γ of kinescope _dNon-linear, this is very unfavorable on the contrary.Lack in the total system and due the vision lightness is transformed to this link of physics brightness.If with LED giant-screen and CRT and connect, the last light belt of CRT from black to white even variation, what see on LED screen is that the beginning lightness changes comparatively fast, slows down subsequently, very inhomogeneous.During the display image photo, nature very true to nature on CRT, but the serious distortion of gray scale on the LED screen, very unnatural, poor effect.So should manage to make the LED screen to have γ _dCharacteristic, we are referred to as anti-γ and proofread and correct.Two kinds of anti-gamma correction methods are arranged.

(1) the anti-γ of plug-in type proofreaies and correct

Fairly simple method is to insert before giving led drive circuit the signal of control gray scale that γ is counter to be proofreaied and correct.Because the high-speed real-time of vision signal is used look-up table usually.When particular hardware is implemented, FPGA (Field Programmable Gate Array) can be used, form can be on ROM, formed.The gray scale of supposing to establish signal source and led drive circuit is 16 grades, and table one promptly is the anti-form of proofreading and correct of γ.The anti-γ of plug-in type proofreaies and correct has method advantage simple, that realize easily, can obtain anti-preferably corrective action.The actual result of watching shows, proofreaies and correct through this anti-γ, and the LED screen dwindles greatly with the difference of CRT, sight significantly improves.But from table one also as can be seen, though look like 16 grades of gray scales, not 16 grades of actual effectively gray scales, 1/15 dutycycle of LED is corresponding to brightness value 4/15, so,, 4/15 vision lightness sudden change is arranged at low gray scale place though verisimilitude preferably will be arranged in other zones.

The anti-γ of table one proofreaies and correct 1

????in	????out	????in	????out
				????0 ????1 ????2 ????3 ????4 ????5 ????6 ????7	????0 ????0 ????0 ????1 ????1 ????2 ????2 ????3	????8 ????9 ????10 ????11 ????12 ????13 ????14 ????1?5	????4 ????5 ????6 ????7 ????9 ????11 ????13 ????15

(2) driving circuit is realized the γ characteristic

Though LED has 16 grades of brightness, in the dark, because the vision lightness has 4/15 sudden change, this is equivalent to have only 4 grades of gray scales, so the effect that the anti-γ of plug-in type proofreaies and correct still is restricted.A kind of solution is to increase original number of greyscale levels, for example be increased to 256 grades, but this depends on whether eikongen had 256 gray levels originally, and whether eikongen allows to the frequency of LED Data transmission, the characteristics of LED are, if can be when low duty ratio the control accuracy of dutycycle higher, just can realize bigger effective gray scale classification.For this reason, should revise led drive circuit, make original 1/15 minimum duty cycle become minimum 1/255, the original 16 grades of vision lightness of eikongen are fully realized.The correction form of this situation shown in the table two is the driving circuit schematic diagram shown in the figure one.Certainly capacity corresponding will be twice in the plug-in type of the volume ratio front of RAMA, RAMB, and each module all must have the correcting circuit of oneself, and can not be common.

The anti-γ of table two proofreaies and correct 2

????in	????out	????in	????out
				????0 ????1 ????2 ????3 ????4 ????5 ????6 ????7	????0 ????1 ????3 ????7 ????14 ????25 ????34 ????43	????8 ????9 ????10 ????11 ????12 ????13 ????14 ????15	????64 ????83 ????105 ????129 ????156 ????186 ????219 ????255

Dull and stereotyped video shows that the width modulation method can be divided into several schemes in concrete the application: scanning adds the method that latchs, pulsewidth counting modulator approach etc. as timeslice.Wherein the principle that timeslice scanning adds the method that latchs in the prior art is summarized as follows:

The image that dull and stereotyped video image display screen shows is made up of the PEL matrix with different grey-scale.Be to improve display brightness, to be that subregion is parallel carry out in scanning.Suppose that every domain scanning line number is N, a vertical interval is that then the time of every line scanning is TL=TS/N to Ts.Suppose that display gray scale progression is n, the timeslice of prior art scanning latch method is that TL is divided into n part equably, according to the gray shade scale m of reality, takes out from n timeslice that m is individual to be shown in turn, thereby reaches the purpose of gray-scale Control.The practical video eikongen is at the system design that is display device with CRT, and vision signal is proofreaied and correct through γ, therefore has the display device of linear characteristic to carry out system that image shows for apparatus and need carry out anti-γ and proofread and correct.The image that above-mentioned used even timeslice shows owing to proofread and correct without anti-γ, will have distortion on the image.If it is impossible extracting n non-linear value from n linear value, its result can only be that the gray level level reduces, and will certainly reduce the display quality of image like this.If will keep original gray level, need be divided into v timeslice to each timeslice more equably, promptly choose the value that anti-γ proofreaies and correct on n * v timeslice, making gray level is value no coincide point after quantizing of the anti-γ correction of n, could guarantee to meet n the gray level that anti-γ proofreaies and correct.Require frequency to improve v doubly like this.Display screen for M row must should send M data at the TL of delegation in the time, will show M row simultaneously.Suppose that the time of sending data is TM, show that the time of delegation is TD, then TL=TM * n * v * M+TD.Guarantee that display brightness promptly guarantees TD as far as possible near TL, then TM should try one's best little to be that frequency is high as far as possible, to be infeasible actually.Solution is to divide J district with the M row, supposes that the time of sending data is TM1, and each line time TL=TM1 * n * v * M/J+TD=(TM1/J) * n * v * M+TD can find out: TM=TM1/J, i.e. TM1=J * TM thus like this.Guarantee TD constant be brightness when constant, the frequency that meets the timeslice of n the gray level that anti-γ proofreaies and correct has reduced J times.But the image data memory size in each district is: N * M/J, and all district's concurrent workings simultaneously, therefore all use independently storer.And memory span should be N * M/J, existing storer monolithic capacity is far longer than this capacity, so the actual useful capacity of utilizing is but very little, adopts the number of the method storer to increase J doubly, cause the waste of a large amount of storage spaces, also increased cost significantly.

Non-linear timeslice bearing calibration in order to provide a kind of dull and stereotyped video to show is provided,, saves device cost to improve the utilization ratio of storer; Reduce the data transmission and processing time, reduce clock frequency.Guarantee image quality.The display driver technology of this novelty has very high using value, under the condition of displayed image in high quality, can significantly reduce cost.

Dull and stereotyped video of the present invention shows the pulse duration modulation method of subregion alternate sweep, adopts non-linear timeslice correction and incorporation time sheet correction sequence data to read and the pixel drive technology, it is characterized in that:

(1) display screen is divided into a subarea with some row, data to each subarea provide the non-linear timeslice that obtains through anti-γ correction equally, the Nonlinear Time Series in each subarea translation successively then overlaps mutual nothing, obtains the clock sequence that each district is mixed;

(2) in ROM, write certain content,, on the corresponding positions of ROM output, obtain required signal with complex time sequence logic by to the addressing of ROM uniform sequential;

(3) writing of image data memory is to write same internal memory by the many subareas of the video of CRT order, is to jump by the sequential partition of incorporation time sheet to carry out and read.

The present invention is the non-linear timeslice bearing calibration that a kind of novel dull and stereotyped video shows.It is divided into a subarea with display screen with some row, and then every row can be divided into J subarea.The data in J subarea write same storer in proper order by the CRT video.Data to each subarea all provide the timeslice that same anti-γ proofreaies and correct the back extraction, then with timeslice translation successively on time shaft in J subarea, make J the timeslice between the subarea not have coincide point on whole time shaft, we obtain an incorporation time sheet sequence like this.Carry out according to this time slice sequence that data are read and pixel driving, reading of data is by whole time shaft in sequence, but is not that sequence address is read to storer, reads but jump between each subarea data.

Key of the present invention is the mixing of J subarea timeslice.We are a base unit with the timeslice in each subarea, and they all are the timeslices that extracts after anti-γ proofreaies and correct, and identical rule is all arranged.For all timeslices that make J subarea do not have coincide point on whole time shaft, the starting point in each subarea is translation successively, therefore row and signal also translation successively on time shaft.Reading of image data memory data is to operate by the order of timeslice on time shaft.With n=16, the M row display screen of v=16 is an example, 16 of the timeslice that meets certain anti-γ corrected value on time shaft to right translation, the value of translation is calculated with the method for exhaustion by computing machine, if no coincide point, the starting point in this district is identified so, and the like, make the timeslice between district and the district not have coincide point on time shaft, the M row will be divided into 8 subareas like this.The timeslice that meets certain anti-γ corrected value is calculated through anti-γ updating formula, and 16 that draw after the correction are: 0,1,5,11,20,30,43,58,75,94,116,140,165,193,223,255, and the starting point in these 8 subareas is respectively: 0,16,56,72,128,144,184,200.16 of the timeslice of first subarea, first row are so: 0,1,5,11,20,30,43,58,75,94,116,140,165,193,223,255; 16 of the timeslice of second district first row be on the basis of the first subarea timeslice to the value of its starting point of right translation, i.e. translation 16,16 of the timeslice of such second subarea first row are: 16,17,210,27,36,46,59,74,91,110,132,156,181,209,239,271; Later each subarea and the like.To the next line in each subarea, timeslice is the one's own profession timeslice and adds 256.The order of the timeslice in all subareas on time shaft is like this: 0,1,5,11,16,17,20,21,27,30,36 ... till last gray level in last capable subarea of N, can from the waveform of Fig. 1, be clear that above-mentioned relation.The A section is the first timeslice relation of going among Fig. 1, and the B section is the timeslice relation (being actually the second line time sheet in first subarea and first timeslice of going in other subarea and the mixed relationship of the second line time sheet) of second row.From X, see, the A section from the order of image data memory reading of data is: read 0 of the first subarea a earlier, 1,5, forward to after the data of 11 correspondences and read 16 of the second subarea b, the data of 17 correspondences in the data of 20 correspondences that forward the first subarea a to, jump to 21 of the second subarea b again then afterwards ... up to running through last data.And the B section is 256 of second row of reading the first subarea a earlier from the order of image data memory reading of data, forward the data of 258 correspondences of reading the 8th subarea h first row after the data of 257 correspondences to, then in the data of first row, 259 correspondences that forward the 7th subarea to, be 260 of the 6th subarea f first row afterwards successively, 265 of 261, the four subarea d, first row of the first subarea a, second row ... the third line is identical therewith to the capable rule of N.Find out that thus image data memory is to read according to priority on whole time shaft, be not to read by the subarea but each subarea data are read, but the reading of the great-jump-forward between a kind of each subarea, each data will be read n time.So both made the M row be divided into J subarea, still available same big image data memory is adorned the data in J subarea, read the image data memory data with the mode of jumping, increase the effective rate of utilization of storer, therefore saved the image data memory space.

This incorporation time sheet and the pairing pictorial data of timeslice address all are to produce by the sequential addressing to ROM, we put into the good certain content of calculated in advance according to the situation of incorporation time sheet in ROM, just can produce the non-linear timeslice of mixing in each required district and the pairing row of this timeslice number, sub-area code (be used for to the image data memory addressing, can realize that the jump of pictorial data is read) by the uniform sequential addressing like this at the output terminal of ROM.

Accompanying drawing drawing of the present invention is described as follows:

Fig. 1 is the driving circuit figure in the documents

Fig. 2 is static display screen sequential chart

Fig. 3 is static display drive circuit figure

Fig. 4 is the scan screen sequential chart

Fig. 5 is scan screen driving circuit figure

We have successfully finished following two kinds of panel display screens based on above-mentioned thought, and effect is very good, in the following embodiments, will introduce content of the present invention in further detail.

Embodiment 1: complete static three primary colours panel display screen

With the complete static three primary colours panel display screen of proofreading and correct n=16 gray level (pick out non-linear 16 grades) through anti-γ from n * v=16 * 16=256 level is example, and the principle of subarea-scanning formula panel display screen similarly.The characteristics of complete static three primary colours panel display screen are at a time to put in order the screen image element all in beam split, and this has only several capable pixels luminous with respect to subarea-scanning formula panel display screen, and whole screen brightness meeting significantly improves.Because these characteristics of complete static screen, it is relatively independent just to require screen to go up each row pixel, and concurrent working do not have the problem of scanning, so control circuit is more relatively, but sequential logic is simple relatively, and design of the present invention and technical scheme embody to such an extent that also be easier to understand.We say something with a behavior unit independently earlier.

The every capable M=256 pixel of this display screen, be divided into J=8 subarea, be 32 pixels in every subarea, its driving circuit is seen Fig. 3 (static screen driving circuit figure), wherein 1 is base and address generator, 2 is the incorporation time sheet,, gray level, area code ROM (writes the time-scale of finishing in advance in 2, replace complicated sequential logic with the method for tabling look-up), 3 is image data memory RAM, 4 is the subarea code translator, 5,6,7 Wei be not red, green, blue data comparator, 8,9,10 are respectively red, green, blue data comparative result latch, 11,12,13 is red, green, blue driver, 14 is pixel.

1 is base and address generator, it produces 2 * 256 even timeslices, and we will select the non-homogeneous timeslice of proofreading and correct through anti-γ, and the position of timeslice is not arranged in order according to each district, but (static screen sequential chart) as shown in Figure 2 interted in each subarea.By timeslice a, the b in eight subareas among the figure, c, d, e, f, g, h as can be seen, the timeslice in each subarea all be previous subarea timeslice to right translation, and do not have coincide point on the time shaft.16 the non-homogeneous timeslices in each subarea have promptly been sent data, when data have been sent in a subarea, the h subarea has just begun to send data, so the time that full line shows in each is no more than 16 continuous non-homogeneous timeslices (i.e. 2 * 256 even timeslices) shared time twice.1 output is connected to 2, to its sequential addressing, then obtains gray level u in non-homogeneous timeslice signal s and pairing sub-area code q and this subarea from 2 output terminal.

2 is the incorporation time sheet, gray level, sub-area code ROM, be one of critical component of native system, for when 1 pair 2 sequential addressing, 2 can produce the eight districts non-homogeneous timeslice s alternately and the sub-area code q and the gray level u of its correspondence, and we will calculate non-homogeneous timeslice s that eight good districts replace and the sub-area code q and the gray level u of its correspondence writes in the relevant position of ROM, promptly the storage unit of corresponding non-linear incorporation time sheet is (as previously described: 0 in ROM, 1,5,11,16,17,20,21,27,30 ...) write s (), q (three), u (four), all the other positions all fill 0.Like this, when 1 pair 2 sequential addressing, 2 d0 output incorporation time sheet s, d1-d3 output area code q, d4-d7 exports the corresponding gray level u in this district.Thereby realized complicated eight districts sequential alternately.

Its concrete course of work is as follows:

(addressing is carried out, 2 output incorporation time sheet s, gray level u, area code q to 2 in 2 * 256-1) natural sequence address to produce 0-by 1.Wherein q offers 4 (image data memory) addressing, and taking-up needs the gray-scale value u of position pixel red, u is green, u is blue, delivers to 6,7,8 (red, green, blue data comparators) respectively and compares with the 2 gray level u that export; S and q offer 5 (subarea code translators), therefrom extract a, b, c, d, e, f, g, h and respectively distinguish the timeslice that latchs of oneself; U is 6,7, compares with pictorial data in 8, when u comparer output high level during less than data, otherwise output low level delivers to 9 with the data that are converted to, 10,11 (red, green, blue data comparative result latchs) latch with several timeslices in 5 these subareas that produce; Give 12,13 with data then, 14 (red, green, blue drivers) drive pixel and produce image.

Embodiment 2: subarea-scanning formula dual base color panel display screen

This display screen is for proofreading and correct the subarea-scanning formula dual base color panel display screen of n=16 gray level (pick out non-linear 16 grades) from n * v=16 * 16=256 level through anti-γ, different with the static state screen, it is with district of every N=16 behavior, the demonstration of image is that 16 row scan successively, so, brightness will be hanged down, and is used for indoor screen more.It is with basic scan unit of N=16 behavior, and circuit also is relatively independent, and we illustrate feature of the present invention with 16 behavior examples.Because there is the 16 row problem of scanning successively, so the static screen of situation wants complicated, but patent thought embodies more fully.

Equally, the capable M=256 row of a N=16 pixel is divided into eight subareas, and per 32 classify a subarea as.Its driving circuit is seen Fig. 5 (scan-type display drive circuit figure), 1 is base address generator (being a natural sequence counter), 2 is incorporation time sheet, field generator ROM, 3 is area code, gray level generator ROM, and 4 is image data memory RAM, and 5,6 are respectively red green data driver, 9 is the subarea code translator, 12 is line decoder, and 13 is line driver, and 14 is pixel block.

What wherein critical component one of was is 1 (base address generator), its actual three counter 1-1,1-2,1-3 of being divided into; Wherein 1-1 is used to produce data cell column address in the timeslice in subarea, its carry termination 1-2; Wherein 1-2 is a n * v=16 * 16=256 counter, produces 256 timeslices, and its output is used for carrying out addressing, generation district's non-linear timeslice alternately, its carry termination 1-3 to 2,3; Wherein 1-3 is used for counting is gone in scanning, the scanning because hocket in each subarea, after 16 row had been scanned in first subarea, last column work in each comfortable same was not finished in other subareas as yet, so have one to postpone row, finish last column scanning to guarantee the b-h subarea.When 1-3 reaches N+1=17, represent that promptly this field scan finishes, stop action, wait for the field blanking signal.

2,3 also is one of critical component, similar to a last embodiment, produces corresponding sequential by the sequential addressing to 2,3.A, b, c, d, e, f, g, h by Fig. 4 (scan-type display screen sequential chart) can find out, the timeslice in each subarea be previous subarea timeslice to right translation, 16 the non-homogeneous timeslices in each subarea have promptly been sent data line, like this when first line data in first subarea will send, the data in the 8th subarea just begin to transmit, when second line data was transmitted in first subarea, its first line data was continued to transmit in the 8th subarea.So need a capable converter handle capable relation, the capable signal in each subarea and field signal also be timeslice with the subarea to right translation, time shaft does not have coincide point yet.

Produce the incorporation time sheet s in above-mentioned 8 subareas, the capable signal r of mixing and the field signal p of mixing at this with 2.Corresponding address is 0,1,5,11,16,17,20,21,27,30,36 in ROM ... put into specific value in the storage unit of (identical), all fill 0, when sequential addressing, will produce specific sequential like this at other address locations with the incorporation time sheet.Concrete situation is as follows, in 0,1,5,11,16,17,20 of timeslice correspondence ... take out a D0=1 among the internal storage location D0-D7, that then export on D0 is exactly incorporation time sheet s; Take out four D1-D4, put into the row value t in the subarea, place of this timeslice correspondence; Taking out a D5 again, when each first gray level timeslice of going in each subarea, is 1 with this position, and this position of all the other timeslice corresponding units is 0, and then that D5 output is the line frequency r that mixes; Taking out a D6 again, is 1 with this position when the first gray level timeslice of first row in each subarea, and this position of all the other timeslice corresponding units is 0, and then that D6 output is the field frequency p that mixes.It is 0 that all unit are in addition all filled out as redundancy unit.

The content organizational form of 3 (area code, gray level generator ROM) and 2 similar is because the timeslice in each subarea all is 256 being cycle (seeing Fig. 4 scan-type display screen sequential chart), so the timeslice of mixing also is to be the cycle with 256.Pairing sub-area code q of each timeslice and gray level u are the cycle with 256 also like this.So only need 256 memory cells in 3.Unit with incorporation time sheet correspondence takes out the sub-area code that three (D0-D2) put into this timeslice correspondence, takes out four (D4-D7) and puts into this timeslice in this subarea corresponding gray scale level.All the other memory cells fill zero.Like this during sequential addressing output terminal just corresponding pairing sub-area code of incorporation time sheet and gray scale.

Receive 2 by 1 (0～17 * 256) natural sequence address that produces, wherein least-significant byte receives 3, when carrying out sequential addressing like this, 2,3 corresponding positions output incorporation time sheet s, row number (0～16) t that mixes line frequency r, mixing field frequency p, corresponding this subarea of timeslice, the sub-area code q of timeslice correspondence and the gray level u in corresponding this subarea.

Wherein q, t offer the addressing of pictorial data memory, and the gray-scale value u ' that selects the point that needs is red, and u ' is green, gives 5,6 (red, green comparers) respectively.Q, r, p offer 12 (line decoders), therefrom extract trip, field signal, s, r, p, q offer 9 (subarea code translators), and what therefrom extract a, b, c, d, e, f, each subarea of g, h oneself latchs timeslice (seeing Fig. 4,5 scan-type display screen figure).U in 3 be used for 5,6 (red, green comparers) in pictorial data compare.When u exports high level less than data, otherwise output low level.The data that are converted to are delivered to 7,8 (red, green latch), latch with 9 these subarea timeslices that produce, then data are given 10,11 (red, green driver), 13 (line drivers), signal with 12 (line decoders) produces horizontal scanning line, drives pixel block, ranks interaction generation image by 10,11.

Claims (2)

1, a kind of dull and stereotyped video shows the pulse duration modulation method of subregion alternate sweep, adopts non-linear timeslice correction and incorporation time sheet correction sequence data to read and the pixel drive technology, it is characterized in that:

(1) display screen is divided into a subarea with some row, data to each subarea provide the non-linear timeslice that obtains through anti-γ correction equally, the Nonlinear Time Series in each subarea translation successively then overlaps mutual nothing, obtains the clock sequence that each district is mixed;

(2) in ROM, write certain content,, on the corresponding positions of ROM output, obtain required signal with complex time sequence logic by to the addressing of ROM uniform sequential;

(3) writing of image data memory is to write same internal memory by the many subareas of the video of CRT order, is to jump by the sequential partition of incorporation time sheet to carry out and read.

2, according to the application in flat pannel display drives of the dull and stereotyped video display driver technology of claim 1.

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