CN1223156C - 用于交叉存取的无阻塞的数据包缓冲的方法与装置 - Google Patents

用于交叉存取的无阻塞的数据包缓冲的方法与装置 Download PDF

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Publication number
CN1223156C
CN1223156C CNB008149585A CN00814958A CN1223156C CN 1223156 C CN1223156 C CN 1223156C CN B008149585 A CNB008149585 A CN B008149585A CN 00814958 A CN00814958 A CN 00814958A CN 1223156 C CN1223156 C CN 1223156C
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China
Prior art keywords
address
memory
write
read
free list
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Expired - Fee Related
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CNB008149585A
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English (en)
Chinese (zh)
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CN1385015A (zh
Inventor
戴维·A·布朗
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Examine Vincent Zhi Cai Management Co
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Mosaid Technologies Inc
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Publication of CN1385015A publication Critical patent/CN1385015A/zh
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Publication of CN1223156C publication Critical patent/CN1223156C/zh
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/103—Packet switching elements characterised by the switching fabric construction using a shared central buffer; using a shared memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9036—Common buffer combined with individual queues
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9084—Reactions to storage capacity overflow
    • H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H04L49/1546—Non-blocking multistage, e.g. Clos using pipelined operation

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
CNB008149585A 1999-08-31 2000-08-21 用于交叉存取的无阻塞的数据包缓冲的方法与装置 Expired - Fee Related CN1223156C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/386,589 1999-08-31
US09/386,589 US6711170B1 (en) 1999-08-31 1999-08-31 Method and apparatus for an interleaved non-blocking packet buffer

Publications (2)

Publication Number Publication Date
CN1385015A CN1385015A (zh) 2002-12-11
CN1223156C true CN1223156C (zh) 2005-10-12

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CNB008149585A Expired - Fee Related CN1223156C (zh) 1999-08-31 2000-08-21 用于交叉存取的无阻塞的数据包缓冲的方法与装置

Country Status (7)

Country Link
US (1) US6711170B1 (enExample)
JP (1) JP4439154B2 (enExample)
CN (1) CN1223156C (enExample)
AU (1) AU6675700A (enExample)
CA (2) CA2284231A1 (enExample)
GB (1) GB2371443B (enExample)
WO (1) WO2001017178A1 (enExample)

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* Cited by examiner, † Cited by third party
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US6609113B1 (en) * 1999-05-03 2003-08-19 The Chase Manhattan Bank Method and system for processing internet payments using the electronic funds transfer network
US8571975B1 (en) 1999-11-24 2013-10-29 Jpmorgan Chase Bank, N.A. System and method for sending money via E-mail over the internet
US7007071B1 (en) 2000-07-24 2006-02-28 Mosaid Technologies, Inc. Method and apparatus for reducing pool starvation in a shared memory switch
US6973078B2 (en) * 2001-04-20 2005-12-06 Sun Microsystems, Inc. Method and apparatus for implementing low latency crossbar switches with integrated storage signals
CN1545658A (zh) * 2001-07-17 2004-11-10 �йȲ��� 具有双端口存储器仿真配置的交换结构
US6801964B1 (en) * 2001-10-25 2004-10-05 Novell, Inc. Methods and systems to fast fill media players
US6944728B2 (en) * 2002-12-23 2005-09-13 Intel Corporation Interleaving memory access
US7103729B2 (en) * 2002-12-26 2006-09-05 Intel Corporation Method and apparatus of memory management
EP1616415B1 (en) * 2003-04-22 2009-06-03 Agere Systems Inc. Method and apparatus for shared multi-bank memory
US7024544B2 (en) * 2003-06-24 2006-04-04 Via-Cyrix, Inc. Apparatus and method for accessing registers in a processor
US7515584B2 (en) 2003-09-19 2009-04-07 Infineon Technologies Ag Switching data packets in an ethernet switch
US7159049B2 (en) * 2003-10-31 2007-01-02 Lucent Technologies Inc. Memory management system including on access flow regulator for a data processing system
US7162551B2 (en) * 2003-10-31 2007-01-09 Lucent Technologies Inc. Memory management system having a linked list processor
US20060256793A1 (en) * 2005-05-13 2006-11-16 Freescale Semiconductor, Inc. Efficient multi-bank buffer management scheme for non-aligned data
JP2006323729A (ja) * 2005-05-20 2006-11-30 Hitachi Ltd マルチパス制御をする装置及びシステム
US7809009B2 (en) * 2006-02-21 2010-10-05 Cisco Technology, Inc. Pipelined packet switching and queuing architecture
WO2008099472A1 (ja) * 2007-02-14 2008-08-21 Fujitsu Limited データスイッチ方法及び回路
US8180978B1 (en) * 2008-06-16 2012-05-15 Wideband Semiconductors, Inc. Address locked loop
US9112727B2 (en) * 2012-08-22 2015-08-18 Broadcom Corporation Method and apparatus for probabilistic allocation in a switch packet buffer
CN107885667B (zh) * 2016-09-29 2022-02-11 北京忆恒创源科技股份有限公司 降低读命令处理延迟的方法与装置
US10168938B2 (en) * 2016-11-25 2019-01-01 Hughes Network Systems, Llc LDPC decoder design to significantly increase throughput in ASIC by utilizing pseudo two port memory structure
CN111813326B (zh) * 2019-04-12 2024-04-19 建兴储存科技(广州)有限公司 具多数据流写入的固态存储装置及其相关写入方法
US11972292B1 (en) * 2020-03-30 2024-04-30 XConn Technologies Holdings, Inc. Interconnect switch using multi-bank scheduling
CN115344517B (zh) * 2021-05-13 2025-10-17 大唐移动通信设备有限公司 一种数据交换方法、装置及存储介质
US11934318B2 (en) 2022-06-07 2024-03-19 XConn Technologies Holdings, Inc. Multi-host memory sharing
US11947483B2 (en) 2022-06-17 2024-04-02 XConn Technologies Holdings, Inc. Data flow management

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5161156A (en) * 1990-02-02 1992-11-03 International Business Machines Corporation Multiprocessing packet switching connection system having provision for error correction and recovery
EP0513519A1 (en) 1991-05-15 1992-11-19 International Business Machines Corporation Memory system for multiprocessor systems
JP3269273B2 (ja) 1994-09-02 2002-03-25 三菱電機株式会社 セル交換装置及びセル交換システム
GB9618131D0 (en) 1996-08-30 1996-10-09 Sgs Thomson Microelectronics Improvements in or relating to an ATM switch
US6222840B1 (en) * 1996-12-30 2001-04-24 Compaq Computer Corporation Method and system for performing concurrent read and write cycles in network switch
US6122274A (en) * 1997-11-16 2000-09-19 Sanjeev Kumar ATM switching system with decentralized pipeline control and plural memory modules for very high capacity data switching
US6137807A (en) * 1997-12-05 2000-10-24 Whittaker Corporation Dual bank queue memory and queue control system

Also Published As

Publication number Publication date
GB2371443A (en) 2002-07-24
JP2003508966A (ja) 2003-03-04
GB0205269D0 (en) 2002-04-17
CA2383458A1 (en) 2001-03-08
CA2284231A1 (en) 2001-02-28
CN1385015A (zh) 2002-12-11
AU6675700A (en) 2001-03-26
US6711170B1 (en) 2004-03-23
GB2371443B (en) 2004-02-11
CA2383458C (en) 2011-04-26
JP4439154B2 (ja) 2010-03-24
WO2001017178A1 (en) 2001-03-08

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Owner name: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

Free format text: FORMER NAME: MOSAID TECH INC

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Granted publication date: 20051012

Termination date: 20150821

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