CN1221270A - Modulation-demodulation device and method for orthogonal frequency division multiplex signal - Google Patents
Modulation-demodulation device and method for orthogonal frequency division multiplex signal Download PDFInfo
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Abstract
The invention relates to an OFDM signal modulation device transmitted by the OFDM modulation mode, especially relates to an OFDM signal modulation device for reproduction with high precision without affecting by adjacent sub carrier. The data signal including sub carrier signal for synchronization is processed by OFDM modulation mode (orthogonal frequency-division multiplex system) to generate OFDM signal modulation device of the modulation signal, when modulating transmission signal, carriers on both ends (positive or negative Nyquist frequency) in plural sub carriers of OFDM modulation frequency spectrum are distributed as reference carrier signal for clock reproduction.
Description
The present invention relates to the ofdm signal modulating device that sends with OFDM (Orthogonal Frequency Division Multiplex Orthodoxy Frequency Division Multiplex) modulation system, particularly relate to and not to be subjected to the influence of adjacent sub-carrier and to carry out the ofdm signal modulating device that high accuracy is reset.
The OFDM modulation demodulation system is to set up a plurality of (256～1024) subcarrier to come the digital modulation and demodulation system of transmission diagram picture signals and voice signal efficiently in a channel band.
In Fig. 7, represented its frequency spectrum.Each subcarrier is carried out QAM (quadrature amplitude modulation), the peak value of each frequency spectrum consistent with the zero point of the frequency spectrum of other subcarrier (quadrature).
At first, so come the transceiver of OFDM modulation demodulation system is described with reference to accompanying drawing.
So Fig. 8 is the existing general square frame pie graph of the transceiver of OFDM modulation demodulation system.
In Fig. 8, in transmitting system, the input serial data is provided for input circuit 81 and carries out parallel transformation, and becomes the information that each low speed symbol string be multiply by each subcarrier.Then, in order to be transformed to transmission time series, carry out IFFT by IFFT (inverse Fourier transform) circuit 82, by the guard interval adapter 83 additional guard intervals that are used for the multipath measure, then carry out the D/A conversion,, and become the base band time series through LPF 84.And then, carry out quadrature modulation by quadrature modulator 85, carry out frequency conversion by frequency changer 87, send to transmission line through sending part 88.The output signal of intermediate frequency generation circuit 86 and phase shift 90 ° signal offered quadrature modulator 85 respectively.
In receiving system, pass through the processing opposite and the playback received signal with transmitting system.
In Fig. 8, by the signal of acceptance division 89 receptions from the transport part, carry out frequency conversion by frequency changer 90, carry out demodulation through intermediate frequency amplifier 91 by quadrature demodulator 93, carry out conversion by A/D converter 95, handle by guard interval processor 96, decode, pass through output circuit 98 and the output of decoding by FFT (Fourier transform) QAM decoder 97.The output signal of intermediate frequency amplifier 91 offers intermediate frequency generation circuit 94 through carrier wave detecting circuit 92.The output signal of intermediate frequency generation circuit 94 and phase shift 90 ° signal offered quadrature modulator 93 respectively.
Wherein, the frequency spectrum of general OFDM subcarrier is with narrow equally spaced frequency configuration, with the such OFDM waveform of time shaft the time, major part is the waveform of white noise, in the demodulation side, be difficult to obtain effective frequency plot information, and be difficult to realize carrying out the playback of the needed reference carrier of demodulation.
Thus, in existing ofdm signal modulation-demodulation device, obtain with the method that roughly is divided into two kinds.
First method is such method: shown in the pie graph of the existing transmission frame of Fig. 6 like that, in the OFDM transmission symbol, the symbol of sampling clock information is only transmitted in definition, and decoder is decoded to the signal between the sampling clock information area that is sent, the sampling clock signal of resetting.
This mode has the advantage of carrying out the playback of sampling clock signal under the condition of the interference that is not subjected to adjacent sub-carrier fully.
But the symbol of transmission sampling clock signal when considering modulation efficiency, only obtains in every hundreds of symbol, and its result only obtains the sampling clock information that disperses.
Like this, when moving reception, when in sampling clock signal, having bigger beating (time fluctuation) composition, confounded demodulation action of ofdm signal by it, and existed demodulating error to become many shortcomings.
Second method is such method: the subcarrier of definition transmission sampling synchronizing frequency phase information in ofdm signal sends continuous sampling clock information.
But this mode is different with first mode and have such shortcoming: be subjected to the influence of adjacent sub-carrier, and the few sampling clock of error that is difficult to reset.
Like this, being suitable for the mode that the sampling clock of OFDM resets most is the system that is not subjected to the influence of adjacent sub-carrier and can obtains continuous sampling clock information.
As described above, it is difficult not being subjected to the influence of adjacent sub-carrier and obtaining continuous sampling clock signal.
Therefore, the purpose of this invention is to provide a kind of ofdm signal modulation-demodulation device, can not be subjected to the influence of adjacent sub-carrier and obtain continuous sampling clock signal.And, the purpose of this invention is to provide a kind of ofdm signal transceiver, the specific carriers of OFDM is set at the pilot signal carrier wave, thus, remain the synchronized relation of receiver side constant.
To achieve these goals, the ofdm signal modulating device is provided, it is carried out the ofdm signal demodulating equipment and the method thereof of demodulation, this ofdm signal modulating device handles to generate modulation signal comprising synchronous data-signal with sub-carrier signal by OFDM (Orthodoxy Frequency Division Multiplex) modulation system, it is characterized in that, when the modulation said transmission signal, the carrier wave (positive and negative nyquist frequency) at two ends is used as sampling clock playback reference carrier signal in a plurality of subcarriers of distribution OFDM modulation spectrum.Make above-mentioned sampling clock playback be higher than the modulation level of other transmission with subcarrier with the modulation level of reference carrier signal.
Like this, by above-mentioned formation, the interference of adjacent sub-carrier become 1/2nd (6dB), and, greater than other information carrier level 6dB, therefore, can improve beating of playback sampling clock, and improve the error rate of system than prior art.
These and other purpose, advantage and feature of the present invention will be in conjunction with the drawings to the description of embodiments of the invention and further specified.In these accompanying drawings:
Fig. 1 is the block diagram of first embodiment of ofdm signal modulation-demodulation device of the present invention;
Fig. 2 is the figure of the power spectrum of the expression first embodiment of the present invention;
Fig. 3 is the figure of configuration of the carrier wave of the expression first embodiment of the present invention;
Fig. 4 is the figure of expression 2 loop PLL circuit of the present invention;
Fig. 5 is the square frame pie graph of an embodiment of sampling clock playback circuitry of the present invention;
Fig. 6 is the figure of an example of the formation of the existing transmission frame of expression;
Fig. 7 is the figure of the frequency spectrum of the general ofdm signal of expression;
Fig. 8 is the block diagram of an example of existing ofdm signal modulation-demodulation device;
Fig. 9 is the block diagram of ofdm signal dispensing device of transmitter side of second embodiment of ofdm signal modulation-demodulation device of the present invention;
Figure 10 is the block diagram of ofdm signal receiving system of receiver side of second embodiment of ofdm signal modulation-demodulation device of the present invention;
Figure 11 be during the symbol of the expression second embodiment of the present invention with the figure of the relation of guard interval;
Figure 12 is the block diagram of the carrier wave extraction unit and the sampling synchronizing signal generating unit of the second embodiment of the present invention;
Figure 13 is the synchronizing signal of the expression second embodiment of the present invention and the figure of the relation during the symbol;
Figure 14 is the synchronizing signal of the expression second embodiment of the present invention and the figure of the relation during the symbol;
Figure 15 is the synchronizing signal of the expression second embodiment of the present invention and the figure of the relation during the symbol;
Figure 16 is the synchronizing signal of the expression second embodiment of the present invention and the figure of the relation during the symbol;
Figure 17 is the figure of example of the phase locking circuit of the expression second embodiment of the present invention;
Figure 18 is the output waveform figure of the phase locking circuit of the expression second embodiment of the present invention;
Figure 19 is the figure of another example of the phase locking circuit of the expression second embodiment of the present invention.
First embodiment
Come with reference to the accompanying drawings first embodiment of OFDM of the present invention (Orthogonal FrequencyDivision Multiplex Orthodoxy Frequency Division Multiplex) modulating apparatus is described.
Fig. 1 is the block diagram of first embodiment of ofdm signal modulation-demodulation device of the present invention.
In Fig. 1, in transmitting system, the input serial data is provided for input circuit 1 and carries out parallel transformation, and becomes the information that each low speed symbol string be multiply by each subcarrier.Then,, carry out IFFT,,, and become the base band time series then through D/A conversion and LPF4 by the guard interval adapter 3 additional guard intervals that are used for the multipath measure by IFFT (inverse Fourier transform) circuit 2 in order to be transformed to transmission time series.And then, carry out quadrature modulation by quadrature modulator 5, carry out frequency conversion by frequency changer 7, send to transmission line through sending part 8.The output signal of intermediate frequency generation circuit 6 and phase shift 90 ° signal offered quadrature modulator 5 respectively.
Fig. 2 is the figure of the power spectrum of expression OFDM of the present invention (Orthodoxy Frequency Division Multiplex) modulating and demodulating signal device first embodiment.
The basic style of OFDM of the present invention (Orthodoxy Frequency Division Multiplex) modulating and demodulating signal device is so following:
(1) center carrier frequencies 10.7MHz
(2) transmission band bandwidth 100Khz
(3) modulation system 256QAM
(4) use carrier number 257 ripples
(5) FFT size 512 points
(6) symbol period 2.6ms
The input circuit 1 of Fig. 1 receives the digital information data that should transmit, and adds error correcting code as required.4 signal level can be used as 24 powers promptly 16 level signal show.
In Fig. 1, for the carrier wave that should transmit information, definition is 16 grades on amplitude direction, and definition is 16 grades on angle direction.Like this, the mode of transmitting 16 * 16 256 values by the combination of amplitude and angle information is called 256QAM.
Fig. 3 represents the configuration of the carrier wave in the first embodiment of the present invention.
Wherein, the carrier wave of being set up in intermediate frequency is called the 0th carrier wave (zero carrier), on the OFDM modulation spectrum, the carrier wave on the 0th carrier wave right side call successively the 1st carrier wave, the 2nd carrier wave ..., the 128th carrier wave, the carrier wave in the 0th carrier wave left side call successively m1 carrier wave, m2 carrier wave ..., the m128 carrier wave.Wherein, m represents negative sign (-), and the m128 carrier wave is represented the-128 carrier waves.
In the carrier wave of this 257 ripple, use 248 ripples to transmit input information.
In remaining 9 ripples, use the reference carrier of 2 ripples as benchmark sampling clock playback carrier wave and OFDM demodulation.Other 7 ripples are used to receive the transmission of data calibration and other auxiliary signal.
In the present embodiment, distribute the 128th, two carrier waves of m128 are as the benchmark carrier wave of taking a sample.Each carrier wave of 248 ripples carries out the 256QAM modulation by the information of each 1 byte.The carrier wave of 2 pairs 248 ripples of IFFT (inverse Fourier transform) circuit carries out 256QAM modulation, and each output is exported as homophase, orthogonal component.
These output signals are passed through guard interval adapter 3, and are transformed to analog signal through D/A converter, LPF4, only pass through necessary band component from LPF.
The I composition of the analogue value, Q become sub-signal to be provided for quadrature modulator 5, and the output OFDM modulation signal.At last, ofdm modulation signal carries out frequency conversion by frequency changer 7 and becomes the frequency band that should transmit, and offers transmission electric wire (not shown) as sending part by sending part (linear amplifier) 8, sends.
An embodiment to the signal generating apparatus of the benchmark of apparatus of the present invention sampling carrier signal describes below.
In IFFT in the present embodiment (inverse Fourier transform) circuit (reference carrier signal distributor) 2, in the carrier signal of inserting from the position at the symmetrical two ends of the centered carrier that occupies frequency band as benchmark sampling carrier wave.
Use pilot signal synchronously for sampling the 128th carrier wave and m128 allocation of carriers.
When Modulation OFDM sent signal, the two ends carrier wave (positive and negative nyquist frequency) in a plurality of subcarriers of distribution OFDM modulation spectrum was used as the frequency plot information pilot frequency carrier wave that sampling clock is reset.
In IFFT (inverse Fourier transform) circuit 2, relevant with the signaling point configuration of pilot signal, the same phase constituent that the benchmark of the 128th carrier wave is begun data is set at predetermined value a to orthogonal component as 0 (zero).
The benchmark of m128 carrier wave begins data one side, with phase constituent as 0 (zero), orthogonal component is set at predetermined value-a.But predetermined value ± a is the modulation maximum level.Thus, provide and to make reset modulation level with reference carrier signal of sampling clock be higher than the OFDM modulating device of modulation of other data usefulness subcarrier.
That is, by such setting, as at the playback of base band homophase (I) signal of receiver side quadrature modulation amplitude, the amplitude of quadrature (Q) signal performance 0 (zero) with the time shaft waveform performance predetermined value a of reference carrier signal 2 times (6dB).
The following describes the action of ofdm signal demodulating equipment of receiving system of first embodiment of ofdm signal modulation-demodulation device of the present invention.
As shown in Figure 1, the transmission signal from transport unit reverts to intermediate-freuqncy signal by acceptance division 9 and frequency changer 10.
The output signal of frequency changer 10 offers intermediate frequency amplifier 11, amplifies thus, offers carrier wave detecting circuit 12 and quadrature demodulator 13.The output signal of carrier wave detecting circuit 12 offers intermediate frequency generation circuit 14.The signal that the output signal of intermediate frequency generation circuit 14 and phase shift are 90 ° offers quadrature demodulator 13 respectively.Carry out Phase synchronization by carrier wave detecting circuit 12, be demodulated into the baseband signal of homophase (I), quadrature (Q) by quadrature demodulator 13.
Wherein, the time shaft waveform of base band homophase (I) signal of the playback benchmark sampling carrier wave by 13 quadrature demodulations of quadrature demodulator is the amplitude of predetermined value a 2 times (6dB), and quadrature (Q) signal is the amplitude of 0 (zero).Like this, can be positively from other the data demodulates carrier separation benchmark sampling carrier wave that goes out to reset.
The I signal of this separation demodulation (base band homophase (I) signal of playback benchmark sampling carrier wave) is provided for following sampling clock playback circuitry 19, and sampling clock signal is output.
Then, the signal of the homophase of demodulation (I), quadrature (Q) passes through A/D converter 15, and is transformed to digital signal, through guard interval processor 16, FFT (QAM) decoder 17, output circuit 18, and obtains decoded output signal.
Fig. 2 is the figure of the power spectrum of the expression first embodiment of the present invention, and the transverse axis of Fig. 2 is a frequency, and the longitudinal axis is an amplitude.Among this Fig. 2 20 expression benchmark sampling carrier wave, as can be seen from the figure 2: benchmark sampling carrier wave 20 obtains being higher than the C/N ratio of other data demodulates carrier waves.
Sampling clock playback circuitry to the part of the receiver side of first embodiment that constitutes ofdm signal modulation-demodulation device of the present invention describes below.
Fig. 5 is the more detailed block diagram of an embodiment of the sampling clock playback circuitry 19 of the expression receiver side part that constitutes the first embodiment of the present invention.
By the I signal of I ripple synchronous detector 51 (quadrature demodulator 13 of Fig. 1) institute's demodulation by ± 128 carrier waves as centered carrier ± 128 carrier wave BPF (52), and give digital phase comparator 53, analogue phase comparator 56 respectively.
The output of digital phase comparator 53 offers variable frequency divider 55 by order loop filter 54, controls the frequency dividing ratio of variable frequency divider 55, carries out the original frequency Phase synchronization of sampling clock.
Thus, the time constant of loop filter 57 is set at low-down analog PLL action, Phase synchronization finishes.The sampling clock synchronization action is introduced initial phase in advance by digital section, satisfy simultaneously thus high-speed, high precision both.
Beat (time shaft error) to the playback sampling clock signal obtained describes below.At first, obtain theoretical minimum.Gap error A ε be following formula like this:
A ε=d (Asin2 π fa)/dtta formula 1
＝2πfa·ta
Wherein, A: signal amplitude, fa: signal frequency, ta: beat.
Can be as seen from the above equation: the most severe ta that beats be under signal amplitude fa condition with higher.
When using following formula in the present embodiment, draw from Simulation result, permit 8 gap error, for following formula like this:
ta≤0.004/2π·49kHz
≤ 13ns formula 2
Necessary signal to noise ratio to the reference carrier that satisfies above-mentioned jitter values is described below.
The square frame of having represented to constitute 2 PLL (phase-locked loop) circuit of a part of the present invention in Fig. 4 constitutes.The PLL circuit is by 44 formations of voltage-controlled oscillator (VCO) of No. 42,2 loop filters 43 of phase comparator that input signal provided and output playback clock.
From the input signal that is accompanied by noise (in the present embodiment by 2 PLL (phase-locked loop) circuit of Fig. 4, be the OFDM demodulated base band signal) only extract benchmark sampling carrier wave out, carry out under the situation of the less sampling clock playback of phase jitter, theoretic phase jitter is obtained like that by following formula:
δ φ
2=N
oBi/A
2Formula 3
Wherein, N
o: the input noise frequency spectrum
Bi: input noise frequency band
A
2: the signal power when not having noise
It is such that the signal to noise ratio α of input is expressed as following formula by definition:
α=A
2/ N
oBi formula 4
When representing phase jitter δ φ, obtain [formula 5] from above-mentioned [formula 3], [formula 4] with signal to noise ratio α.
δ φ=(α)
-0.5 Formula 5
Like this, when obtaining phase jitter δ φ and be the signal to noise ratio α of 13ns, obtain: α=62500 (96dB).In order to obtain the big like this signal to noise ratio α of 96dB, as can be seen: input noise frequency band Bi is diminished, perhaps, make signal power A2 become big from formula 4.
For input noise frequency band Bi is diminished, have two kinds of methods usually.
First method is: the BPF (band pass filter) that is used as centre frequency extracts the reference pilot carrier wave that the OFDM that imports PLL separates harmonic out, and input PLL.
In device of the present invention, occupying the bandwidth width is 100KHz, and centre frequency is 49KHz, and the Q of BPF is 200, and noise band Bi=245Hz sees the improvement of 53dB.
The noise band BL of the loop of 2 PLL circuit is determined by following formula 6 like that by the natural angular frequency ω n of loop filter, when not considering synchronizing characteristics,, obtain BL=3.3Hz by following formula 6 even natural angular frequency ω n=1 is extremely little, and Bi/BL=37dB does not satisfy the 96dB of 53+37=90dB and target.
BL=3/(4·2
1/2)·ωn
Wherein, ω n: the natural angular frequency of loop filter.
Under the situation of considering synchronizing characteristics, natural angular frequency ω n can be big as far as possible, and the value of 50dB degree is necessary.In the present invention, owing to the two ends that the reference pilot carrier wave are configured in the OFDM modulating wave, then the interference of other carrier wave is 1/2nd, and α improves 6dB.Owing to the modulation level of reference pilot carrier wave is improved 6dB, then sees the raising of the α value of 12dB altogether.Like this, the natural angular frequency ω n that reaches α=96dB is ω n=43, and is the value near 50, constitutes the system that satisfies synchronizing characteristics and bouncing characteristic simultaneously.
Second embodiment
Come second embodiment of ofdm signal modulation-demodulation device of the present invention (ofdm signal transceiver) is described below with reference to Fig. 9 to Figure 12.
Fig. 9 is the ofdm signal dispensing device of the transmitter side of the second embodiment of the present invention, and wherein, the numerical data that is sent is compressed audio frequency, vision signal.
The ofdm signal dispensing device, a plurality of carrier waves of orthogonal configuration, with each carrier transmission digital information independently, because carrier wave is a quadrature, then adjacent spectrum of carrier is zero on the frequency location of this carrier wave.
In order to make the carrier wave of this quadrature, and use the IFFT circuit engineering.If between as the time interval T between the window region among the IFFT, carry out by N the formed contrary DFT (discrete Fourier transform (DFT)) of plural number, just can generate ofdm signal, the each point of contrary DFT is equivalent to modulation signal output.Above-mentioned N is called as the cycle of IFFT and FFT, and detailed content description is in the コ ロ Na society distribution (issue date: on the 74th～75 page of " television can be compiled the holy work of modern well signal processing engineering " on May 20th, 1993).
The basic style of Fig. 9 and apparatus of the present invention shown in Figure 10 is so following:
(a) center carrier frequencies ... 100Mhz
(b) transmission carrier number ... 248 ripples
(c) modulation system ... 256QAM OFDM
(d) use carrier number ... 257 ripples
(e) transmission band bandwidth ... 100kHz, the service band bandwidth ... 99kHz
(f) transmission rate ... 750kbps
(g) guard interval ... 60.6 μ sec
As shown in Figure 9, for example, offer serial-parallel conversion circuit 102 through input terminal 101, carry out giving of error correcting code as required as the audio frequency of compressed information signal, the digital information signal of vision signal by coded system such as MPEG.
In this circuit 102, input signal is modulated as 256QAM and is arranged and export with signal.
This 256QAM modulation is such mode: define 16 grades for each carrier wave that should transmit information on amplitude direction, definition is 16 grades on angle direction, and 256 values of regulation 16 * 16 are transmitted.
In the present embodiment, in the carrier wave of 257 ripples, use 248 ripples transmission information, remaining 9 ripples use as the transmission of calibration and other auxiliary signal.
In serial-parallel conversion circuit 102, during a symbol in the numerical data of output 248 bytes, that is, export 248 groups of per 4 parallel datas in during a symbol.
The output signal of serial-parallel conversion circuit 102 offers IFFT, pilot signal generative circuit 103.This circuit 103 moves by the clock signal of being exported from clock generating circuit 110, for the carrier wave of 248 ripples, carries out 256QAM modulation, exports each output signal and as real number, imaginary number composition.
The IFFT circuit of life cycle N in IFFT, pilot signal generative circuit 103, the corresponding discrete frequency dot information of N discrete point in frequency (sampling point) in then during above-mentioned IFFT, pilot signal generative circuit 103 outputs and each significant character that sets by this IFFT circuit.
Nyquist frequency be equivalent among the IFFT of above-mentioned cycle N the sampling clock frequency 1/2, the information that pilot signal has as above-mentioned nyquist frequency is that nyquist frequency information is transmitted.Because this nyquist frequency is 1/2 of above-mentioned sampling clock frequency, just can be in receiving system, to above-mentioned nyquist frequency information decode, frequency multiplication, be used to sample position signalling (sampling clock signal) that fft circuit is moved and set up.
This nyquist frequency information is to apply certain level on the terminal by the N/2 frequency in the real part input terminal R (imaginary part input terminal I) of the IFFT of IFFT, pilot signal generative circuit 103 to obtain.
The output signal of these IFFT, pilot signal generative circuit 103 is provided for the follow-up guard interval initialization circuit 104 with RAM (random access memory) 104A, by this guard interval initialization circuit 104 by such guard interval gi that sets the predetermined interval of the multipath distortion that is used for alleviating transmission path shown in Figure 11.
Guard interval initialization circuit 104 moves by the clock signal of being exported from clock generating circuit 110, between window region before the decline in (ts during the significant character) between the window region that obtains from IFFT, pilot signal generative circuit 103 of configuration.
In order to set above-mentioned guard interval, when above-mentioned guard interval initialization circuit 104 read be taken among the RAM (4A) with it from the signal of IFFT, pilot signal generative circuit 103 time, if (equal gi and set during this period) reads during last during the significant character, just return the beginning during the significant character, read the data of ts during the significant character, send the signal of ta during beating.
Above-mentioned nyquist frequency information (pilot signal) is transmitted in guard interval, still, for keep and the IFFT window of front and back between the continuity of signal, in guard interval, there is the integral multiple wavelength in the pilot signal of being transmitted.
And, though the situation of using nyquist frequency to be used as pilot signal is illustrated,, according to the relation of sampling clock signal and simple integer ratio, not necessarily must be nyquist frequency, also can use in the frequency of being transmitted higher.
When considering the IFFT of cycle M, promptly dispose pilot signal on the M/4 frequency in 1/2 position of nyquist frequency, the carrier wave that sends by OFDM use from IFFT first to M/4 and from 3M/4 to M the signal of exporting.
Even the IFFT of life cycle M=2N like this, the output signal of the IFFT of equivalence in the time of also accessing the IFFT with life cycle N.Like this, can transmit and comprise guard interval and continuous pilot signal, simultaneously, this pilot signal be decoded, carry out 4 frequencys multiplication, thus, can access sampling clock signal.
If can decode to signal message between the window of FFT in addition, just can with make up by the resulting sampling clock signal of present embodiment, carry out the FFT computing of ofdm signal, carry out the decoding of ofdm signal.
Come describing during the symbol that sets by guard interval initialization circuit 104 below with reference to Figure 11.
At first, when the service band bandwidth is 99kHz, the cycle of IFFT, ts was so following during significant character frequency f s and the significant character when being N=256:
fs=99,000/256=387Hz
ts=1/fs=2586μsec
Wherein, when as remove the multipath distortion with interval guard interval during gi decision when being pilot signal 3 wavelength, by following such setting gi:
gi=(1/49,500)×3=60.6μsec
Ta and symbol frequency fa are respectively so following during the beating of this moment:
ta=ts+gi=2568+60.6=2646.6μsec
fa=1/ta=378Hz
The output signal of these guard interval initialization circuits 104 is provided for D/A converter 105, is transformed to analog signal at this, is only passed through necessary band component by follow-up LPF 106.
The real number of the analogue value, imaginary number output signal are provided for follow-up quadrature modulator 107, and, give output signal that this quadrature modulator 107 provides 10.7MHz intermediate frequency generation circuit 109 respectively and through the signal of 90 ° of phase-shift circuits 108, and the output OFDM signal.
This ofdm signal is the frequency band that should transmit by frequency changer 111 by frequency conversion, and offers follow-up sending part 112, sends by linear amplifier and the transmitting antenna that constitutes it.
10.7MHz the output signal of intermediate frequency generation circuit 109 is provided for clock generating circuit 110.In above-mentioned clock generating circuit 110, generate clock signal that drives above-mentioned IFFT, pilot signal generative circuit 103 and the clock signal that drives guard interval initialization circuit 104 according to the common clock signal that is provided by above-mentioned intermediate frequency generation circuit 109.
And, because the carrier wave of the parallel data of 248 groups 4+4 positions by 248 ripples transmit, 248 bytes during per 1 symbol in the transmission speed position of this device then.Like this, the transmission speed of per second is 750K position roughly.
Come with reference to the accompanying drawings describing respectively with the phase relation of synchronizing signal (pilot signal) during guard interval, the symbol.
In Figure 13, the synchronizing signal (pilot signal) of same phase place takes place during each symbol, the situation to the synchronizing signal that has integer wavelength in guard interval describes (being first example that the nonreversible continuous synchronization signal of polarity takes place) below.
Have same meaning during IFFT shown in Figure 13 and the significant character He during the IFFT, one of the latter end during the IFFT (right part) circulation is intact to become the signal of the guard interval G of this side (left part) during the IFFT.
In this embodiment, synchronous synchronizing signal (pilot signal) takes place during each IFFT, there is the integer ripple in synchronizing signal in the guard interval interval (pilot signal), therefore, recurs pilot signal in during a plurality of continuous symbols.
The situation of above-mentioned Figure 11 is that situation is identical with Figure 13, because there is the integer ripple in synchronizing signal (pilot signal) in the guard interval interval, therefore, recurs pilot signal in during a plurality of continuous symbols.
In Figure 14, the synchronizing signal (pilot signal) of same phase place takes place in during each symbol, the synchronizing signal that has the odd-multiple of half-wavelength in guard interval describes (being second example that the nonreversible continuous synchronization signal of polarity takes place) to this situation below.
Has same meaning during IFFT and the significant character He during the IFFT, the intact signal that becomes the guard interval of this side (left part) during the IFFT of 1/2 circulation of the latter end during the IFFT (right part).
In this embodiment, the synchronizing signal (pilot signal) of opposite polarity taking place during each IFFT, have the synchronizing signal of the odd-multiple of half-wavelength in the guard interval interval, therefore, recurs pilot signal in a plurality of continuous symbols interval (during the symbol).
In Figure 15, exist the situation of the odd-multiple of half-wavelength to describe to synchronizing signal in guard interval G.(being first example that the synchronizing signal of polarity inversion takes place).
In the case, in the starting point of guard interval, the polarity inversion of pilot signal, the phase place of the pilot signal during each symbol is a homophase.
That is, the corresponding terminal voltage of the frequency that synchronizing signal took place that the IFFT of frequeney division multiple (FDM) multiplexed signals takes place is certain in each symbol, produces synchronous synchronizing signal all the time.
Like this, when guard interval was the odd-multiple of half-wavelength, in the receiving system side, when making the polarity inversion of synchronizing signal in during each symbol, synchronizing signal was a continuous signal.
In the case, in phase locking circuit shown in Figure 17, can use the PLL circuit to carry out detecting of synchronizing signal.
In Figure 16, exist the situation of the even-multiple of half-wavelength to describe to synchronizing signal in guard interval (pilot signal).(being first example that the synchronizing signal of polarity inversion takes place).
As shown in Figure 16, when the synchronizing signal that exists in guard interval (pilot signal) is integral multiple (even-multiple of half-wavelength), identical with the situation of Figure 15, when exporting, obtain synchronous output in each symbol Semi-polarity counter-rotating when during each symbol, making the synchronizing signal counter-rotating.
In the case, can use such PLL circuit shown in Figure 17 to carry out detecting of synchronizing signal.
Figure 17 is the phase locking circuit of the synchronizing signal of counter-rotating in detecting during each symbol.
This phase locking circuit constitutes like this: insert by the イ Network ス Network signal shifter (166) that Le-シ Block OR is constituted in the VCO output of the PLL circuit that is made of phase comparator PD2 (162), Amp (amplifier 163), LPF (164), voltage-controlled oscillator (VCO) (165).
Phase comparator PD1 (161) constitutes the synchro detection circuit of the VCO of above-mentioned phase locking circuit output as input.The frequeney division multiple (FDM) multiplexed signals that comprises the synchronizing signal that is applied on the input terminal 160 be transfused to phase locking circuit and phase comparator PD1 (161) both.The PLL of this phase locking circuit for being constituted by phase comparator PD2 (162), amplifier (163), LPF (164), VCO (165), signal shifter (166).
Output according to the PD1 (161) of institute's synchronous detection, make the output counter-rotating of the VCO circuit (165) of PLL by signal shifter (166), and detected by above-mentioned synchro detection circuit in the synchronizing signal of each symbol Semi-polarity counter-rotating, for the VCO output of polarity inversion being provided for the phase comparator PD2 (162) that constitutes PLL, then the synchronizing signal of polarity inversion is carried out lock out action continuously.
Figure 18 is terminal B among Figure 17 and the output waveform of A.Output A is the synchronizing signal output waveform, and output B is the symbol sync signal that reverses and transmit at each symbol period (during the symbol) Semi-polarity.
Figure 19 is another embodiment with respect to Figure 17, and signal shifter 176 is inserted between phase comparator PD2 (172) and the amplifier (173).
When synchronizing signal is reversed, detect the polarity of its error signal of also reversing simultaneously, like this, the form of action and Figure 17 carry out in the same manner.Under any situation, synchronizing signal is reversed in each symbol period (during the symbol), and in order to detect the loop characteristics of its PLL that also reverses, VCO is nonreversible, and proceeds continuous action.Like this, can normally carry out the decoding of synchronizing signal.
Come second embodiment of receiving system of the present invention is described below with reference to Figure 10 and Figure 12.
The formation of receiving system is made of the circuit with the negative actuation of above-mentioned dispensing device.Acceptance division 120 to amplifying from the resulting signal from above-mentioned sending part 112 of the reception antenna that constitutes this acceptance division 120, and offers frequency changer 121 by high-frequency amplifier.
This output signal is provided for intermediate frequency amplifier circuit 122, from above-mentioned intermediate frequency amplifier circuit 122 as the received signal of predetermined level and export.
The output signal of intermediate frequency amplifier circuit 122 offers quadrature demodulator 123 respectively and carrier wave detects (carrier wave extraction) circuit 129.
Carrier wave detecting circuit 129 has the PLL circuit that is made of phase comparator shown in Figure 12 (multiplier) 141, LPF 142, VCO circuit 143,1/4 frequency dividing circuit 145, and the medium-frequency oscillator circuit 131 that this output signal is supplied with is circuit that phase error is less extracted centered carrier out.
In the present embodiment, the carrier wave of transmission information as the 378Hz of symbol frequency and disposed adjacent, and constitutes ofdm signal with each.The information carrier adjacent with centered carrier leaves 378Hz, and centered carrier is not subjected to the influence of neighbor information carrier wave to carry out transmission of Information, and uses the higher circuit of selectance.
In the present embodiment, use the PLL circuit to carry out the extraction of centered carrier, use with adjacent carrier frequencies at interval about 1/2 ± quartz (controlled) oscillator (VCXO) of 200Hz degree vibration is used as voltage-controlled oscillator (VCO) 143, and makes circuit operation.Employed LPF uses the cut-off frequency enough low with respect to 278Hz in the PLL circuit.
The output signal of this medium-frequency oscillator circuit 131 and offer the quadrature demodulator 123 with multiplier 140,141 respectively through the signal of 90 ° of phase-shift circuits 130 comes the output signal of real number, imaginary number (real part, imaginary part) is decoded.
This real part, imaginary part output signal are provided for LPF 124, the signal of the frequency band of necessity of being transmitted as ofdm signal information is passed through, carry out the sampling of the analog signal imported, output signal is offered A/D converter (sample circuit) 125, be transformed to digital signal.
In sampling synchronous signal generating circuit 132,, the analog output signal of quadrature demodulator 123 is provided for this circuit by coming sampling clock signal before the occurrence frequency multiplication with the synchronous PLL circuit of pilot signal phase.PLL to comprise during the guard interval between each sign field in the pilot signal transmitted as continuous signal carry out Phase synchronization, and obtain the pilot signal of demodulation.
In above-mentioned dispensing device, pilot signal, is carried out and the corresponding frequency multiplication of frequency ratio, and is obtained sampling clock signal for predetermined ratio of integers with respect to the sampling clock frequency setting.
Signal during the significant character of ts during guard interval treatment circuit 126 obtains with the arbitrary timing in the ta during beating from the signal that is transmitted, therefrom obtain signal during the less side's of influence the significant character of multipath distortion, and output signal is provided for FFT, QAM decoding circuit 127.
The symbol sync signal generation circuit 133 that is used to detect during the above-mentioned symbol detects during the above-mentioned symbol.
Follow-up FFT, QAM decoding circuit 127 are supplied to above-mentioned clock sync signal that obtains and symbol sync signal, carry out plural Fourier computing, obtain the real part of each frequency of output signal, the level of imaginary part signal (real part, imaginary part).
The real part of each frequency that obtains like this, imaginary part signal level and the comparing of fiducial value that be used to transmit real part, the imaginary part of each carrier wave that is transmitted with reference to exporting with the demodulation of carrier wave, obtain a digital information transmission with the quantification digital signal level that carrier wave transmitted, come digital information is decoded.
The output signal of this circuit 127 is exported through parallel serial conversion circuit 128.
Come carrier wave detecting circuit 129 and synchronous (sampling clock) signal generating circuit 132 of sampling are described below with reference to Figure 12.
The purpose of this circuit is: extract the pilot signal with certain level transmissions out, generate correct sampling (sampling clock) signal synchronously in view of the above.
At first, the VCO circuit 143 that constitutes carrier wave detecting circuit 129 is vibrated with the frequency as 4 times the 42.8MHz of intermediate frequency 10.4MHz.The output signal of VCO circuit 143 offers multiplier 140,141 through 1/4 frequency dividing circuit 144,145 respectively.
Come the output signal of the multiplier 141 of My World to be provided for LPF 142, take out the following composition of symbol frequency, its output signal control VCO circuit 143.
The loop that is made of multiplier 141, LPF 142, VCO circuit 143,1/4 frequency dividing circuit 145 constitutes the PLL circuit.
Apply for the input terminal of multiplier 140,141 and carried out the intermediate frequency amplifying signal, carry out quadrature decoder by this circuit, and obtain the output signal of real part and imaginary part.
Sampling synchronous signal generating circuit 132 is supplied to the real part output signal from quadrature demodulator 123, and detects the nyquist frequency composition that sends as pilot signal.
Supply with the output signal of VCO circuit 143 for frequency dividing ratio adjusted circuit (VCO circuit) 150, frequency dividing ratio is set at from 1/426 to 1/438.Multiplier 152 in the sampling synchronous signal generating circuit 132 is supplied to from the output signal of quadrature demodulator 123 and makes the signal of the signal of VCO circuit 150 through 1/2 frequency dividing circuit 151, carries out the action as phase comparator.
The output signal of multiplier 152 only makes the error signal relevant with FREQUENCY CONTROL pass through by the LPF circuit.Delay circuit 154 and add circuit 155 are to be used to decay the circuit of adjacent carrier composition, and the 387Hz that makes symbol frequency is as having the characteristic of decline.
In the PLL circuit that is constituted by VCO circuit (frequency dividing ratio adjusted circuit) 150, multiplier 152, LPF 153, make with the VCO output signal of the continuous pilot signal synchronised that in the real part output signal of the quadrature demodulator 123 of carrier wave extraction unit, is comprised and vibrate, and export as the sampling clock output signal of 99kHz.
In the above-described embodiments, to for the carrier wave that makes 257 ripples takes place the cycle use the situation of 256 IFFT to be described, come to use the example of 512 IFFT to describe as another embodiment below to the cycle.
Use in the embodiment of 512 IFFT in this in cycle, be not to use nyquist frequency to be used as pilot carrier frequency, and be to use this sampling clock signal and have the higher frequency of number of times of the relation of simple integer ratio.
Promptly, when considering the IFFT of cycle M, promptly dispose pilot signal on M/4 number the frequency in 1/2 position of nyquist frequency, the carrier wave that sends by OFDM use as among the IFFT from number one to M/4 number and signal from exporting for 3M/4 number to M number.
Even the IFFT of life cycle M=2N like this, the output signal of the IFFT of equivalence in the time of also obtaining the IFFT with life cycle N.Like this, can transmit and comprise guard interval and continuous pilot signal, simultaneously, this pilot signal be decoded, carry out 4 frequencys multiplication, can access sampling clock signal thus.
At this moment, in employed sampling synchronous signal generating circuit, the frequency of pilot signal is that 256 embodiment is identical with making above-mentioned cycle N, is 256 o'clock 2 times and the sampling clock frequency that drives FFT shown in Figure 10, QAM decoding circuit 127 becomes the cycle N of making.Like this, export the sampling clock signal of 2 times 198kHz.
Like this, this sampling synchronous signal generating circuit is compared with the foregoing description, is different in this: the frequency dividing ratio of frequency dividing ratio adjusted circuit 150 is 1/213～1/219, and, the frequency dividing ratio of 1/2 frequency dividing circuit 51 is 1/4, and formation in addition is identical with Figure 12, and omits its explanation.
As described above, the present invention constitutes like this: when modulated transmission signal, the carrier wave (positive and negative nyquist frequency) at the two ends in a plurality of subcarriers of distribution OFDM modulation spectrum is used as sampling clock playback carrier signal, and, because making transmission that the modulation level of this carrier wave is higher than other transmits with the modulation level of subcarrier, then can not be subjected to the influence of adjacent carrier, thus, can generate continuous sampling clock signal at a high speed, accurately at receiver side.And, can improve beating of playback sampling clock signal significantly than prior art, and improve the error rate of system, and can realize satisfying simultaneously the system of synchronizing characteristics and bouncing characteristic.
In device of the present invention, during the guard interval by with drive IFFT, sampling clock that the pilot signal generative circuit is identical is determined, during employed pilot signal is set to during guard interval in the sampling clock transmission of Information is continuous, and the frequency spectrum of the actual pilot signal of being transmitted is single.Like this, in receiving system, can decode to the pilot signal of not beating, and can be easily be set at the time relationship of IFFT circuit that in dispensing device, moves and the fft circuit that in receiving system, moves same, just can carry out the FFT action under the form of the signal that approaches to carry out the IFFT action, and can realize more accurate message transmission.
Phase synchronization mode of the present invention to continuous or be inverted in each symbol period (during the symbol) and the synchronous signal information that transmits, can normally be decoded to synchronizing information.Even this is because being accompanied by phase noise in move receiving etc. comes the time-division can to receive while revising it when synchronizing signal is decoded, therefore, can decode to clock sync signal, character position signal well.
Owing in the pilot signal of transmitting as information signal, inserting symbol synchronization information, just can before arriving, the time-division synchronizing signal decode to synchronizing signal, therefore, has such effect: even when the channel of video receiver switches, also can in the short time, carry out the decoding of frequency division multiplex signal.
Claims (10)
1. an ofdm signal modulating device handles to generate modulation signal comprising synchronous data-signal with sub-carrier signal by OFDM (Orthodoxy Frequency Division Multiplex) modulation system, it is characterized in that,
When the modulation said transmission signal, the carrier wave (positive and negative nyquist frequency) at two ends is used as sampling clock playback reference carrier signal in a plurality of subcarriers of distribution OFDM modulation spectrum.
2. ofdm signal modulating device according to claim 1 is characterized in that, makes above-mentioned sampling clock playback be higher than the modulation level of other transmission with subcarrier with the modulation level of reference carrier signal.
3. an ofdm signal modulator approach handles to generate modulation signal comprising synchronous data-signal with sub-carrier signal by OFDM (Orthodoxy Frequency Division Multiplex) modulation system, it is characterized in that,
When the modulation said transmission signal, the carrier wave (positive and negative nyquist frequency) at two ends is used as sampling clock playback reference carrier signal in a plurality of subcarriers of distribution OFDM modulation spectrum.
4. ofdm signal modulator approach according to claim 3 is characterized in that, makes above-mentioned sampling clock playback be higher than the modulation level of other transmission with subcarrier with the modulation level of reference carrier signal.
5. ofdm signal demodulating equipment, the signal of being modulated by the ofdm signal modulating device is provided thereon, above-mentioned ofdm signal modulating device handles to generate modulation signal comprising synchronous data-signal with sub-carrier signal by OFDM (Orthodoxy Frequency Division Multiplex) modulation system, when the modulation said transmission signal, the carrier wave (positive and negative nyquist frequency) at two ends is used as sampling clock playback reference carrier signal in a plurality of subcarriers of distribution OFDM modulation spectrum, it is characterized in that this ofdm signal demodulating equipment comprises:
The OFDM demodulating equipment carries out demodulation to above-mentioned ofdm modulation signal;
The sampling clock replay device is used to provide the playback by the demodulation of above-mentioned OFDM demodulating equipment institute to generate sampling clock signal with reference carrier signal.
6. ofdm signal demodulation method, the signal of being modulated by the ofdm signal modulator approach is carried out demodulation, above-mentioned ofdm signal modulator approach handles to generate modulation signal comprising synchronous data-signal with sub-carrier signal by OFDM (Orthodoxy Frequency Division Multiplex) modulation system, when the modulation said transmission signal, the carrier wave (positive and negative nyquist frequency) at two ends is used as sampling clock playback reference carrier signal in a plurality of subcarriers of distribution OFDM modulation spectrum, it is characterized in that this ofdm signal demodulation method comprises:
The OFDM demodulation step is carried out demodulation to above-mentioned ofdm modulation signal;
The sampling clock playback step provides the playback by the demodulation of above-mentioned OFDM demodulating equipment institute to generate sampling clock signal with reference carrier signal.
7. orthogonal frequency division multiplex signal dispensing device comprises:
IFFT, pilot signal generative circuit provide digital information signal, and produce the many-valued qam signal that comprises pilot signal and carry out Orthodoxy Frequency Division Multiplex;
The guard interval initialization circuit is given the guard interval of the above-mentioned many-valued qam signal of the interval additional predetermined interval that is used for repeating transmitting the significant character interval of above-mentioned significant character, generates between the sign field;
Clock generating circuit generates clock signal that drives above-mentioned IFFT, pilot signal generative circuit and the clock signal that drives above-mentioned guard interval initialization circuit,
Set above-mentioned guard interval, so that above-mentioned pilot signal in above-mentioned each guard interval, exist the integral multiple that is equivalent to one-period or the odd-multiple in 1/2 cycle during, and, set the pilot signal between above-mentioned each sign field, so that spread all between a plurality of above-mentioned sign fields, above-mentioned pilot signal becomes the state of continuous signal.
8. orthogonal frequency division multiplex signal receiving system, its orthogonal frequency division multiplex signal be the pilot signal that comprises synchronizing signal exist the integral multiple be equivalent to its one-period or the odd-multiple in 1/2 cycle during guard interval and then its a significant character interval as sending between a sign field, it is characterized in that, comprising:
Frequency changer is transformed to intermediate frequency to the orthogonal frequency division multiplex signal that receives;
The guard interval treatment circuit obtains the signal in the above-mentioned significant character interval that should decode from the signal between the above-mentioned sign field of the orthogonal frequency division multiplex signal exported by the said frequencies converter;
FFT, QAM decoding circuit are decoded to the output of above-mentioned guard interval treatment circuit;
Synchronous signal generating circuit according to the above-mentioned pilot signal of using the demodulation of phase locking circuit institute, generates clock signal that drives above-mentioned guard interval treatment circuit and the clock signal that drives above-mentioned FFT, QAM decoding circuit.
9. orthogonal frequency division multiplex signal dispensing device comprises:
IFFT, pilot signal generative circuit provide digital information signal, and produce the many-valued qam signal that comprises pilot signal and carry out Orthodoxy Frequency Division Multiplex;
The guard interval initialization circuit is given the guard interval of the above-mentioned many-valued qam signal of the interval additional predetermined interval that is used for repeating transmitting the significant character interval of above-mentioned significant character, generates between the sign field;
Set above-mentioned guard interval so that above-mentioned pilot signal in above-mentioned each guard interval, exist the integral multiple that is equivalent to one-period or the odd-multiple in 1/2 cycle during, become the state of continuous signal between an above-mentioned sign field;
And, set the pilot signal between above-mentioned each sign field, so that between continuous a plurality of above-mentioned sign field, pilot signal becomes the state in the polarity of the starting point counter-rotating continuous signal of each above-mentioned guard interval.
10. orthogonal frequency division multiplex signal receiving system, its orthogonal frequency division multiplex signal be the pilot signal that comprises synchronizing signal exist the integral multiple be equivalent to its one-period or the odd-multiple in 1/2 cycle during guard interval and then its a significant character interval as sending between a sign field, it is characterized in that, comprise;
Frequency changer is transformed to intermediate frequency to the orthogonal frequency division multiplex signal that receives;
The guard interval treatment circuit obtains the signal in the above-mentioned significant character interval that should decode from the signal between the above-mentioned sign field of the orthogonal frequency division multiplex signal exported by the said frequencies converter;
FFT, QAM decoding circuit are decoded to the output of above-mentioned guard interval treatment circuit;
Synchronous signal generating circuit generates clock signal,
In above-mentioned synchronous signal generating circuit, in between each above-mentioned sign field the input signal of the phase comparator of the phase locking circuit that is configured for the above-mentioned pilot signal that demodulation receives or the polarity of output signal are reversed, come the above-mentioned pilot signal of demodulation, according to the pilot signal of this demodulation, generate clock signal that drives above-mentioned guard interval treatment circuit and the clock signal that drives above-mentioned FFT, QAM decoding circuit.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP367316/1997 | 1997-12-25 | ||
| JP367316/97 | 1997-12-25 | ||
| JP9367316A JPH11196063A (en) | 1997-12-25 | 1997-12-25 | Ofdm modulation and demodulation device and its method |
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| Publication Number | Publication Date |
|---|---|
| CN1221270A true CN1221270A (en) | 1999-06-30 |
| CN1150703C CN1150703C (en) | 2004-05-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB98123383XA Expired - Fee Related CN1150703C (en) | 1997-12-25 | 1998-12-14 | Modulation-demodulation device and method for orthogonal frequency division multiplex signal |
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| JP (1) | JPH11196063A (en) |
| CN (1) | CN1150703C (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007016854A1 (en) * | 2005-08-08 | 2007-02-15 | Huawei Technologies Co., Ltd. | A signal modulation method based on orthogonal frequency division multiple and the apparatus thereof |
| CN103248470B (en) * | 2002-10-01 | 2017-03-01 | 微软技术许可有限责任公司 | Method and apparatus for the channel mapping of OFDM frequency hopping |
| CN114826862A (en) * | 2022-05-07 | 2022-07-29 | 苏州市江海通讯发展实业有限公司 | Universal narrow-band orthogonal modulation method suitable for low-power-consumption low-performance MCU |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100345329B1 (en) * | 1999-12-24 | 2002-07-24 | 삼성탈레스 주식회사 | Apparatus for sampling clock recovery in an OFDM receiver and method therof |
| CN101682316B (en) | 2007-05-25 | 2012-06-13 | 艾利森电话股份有限公司 | Method and apparatus for communicating with root-nyquist, self-transform pulse shapes |
-
1997
- 1997-12-25 JP JP9367316A patent/JPH11196063A/en active Pending
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1998
- 1998-12-14 CN CNB98123383XA patent/CN1150703C/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103248470B (en) * | 2002-10-01 | 2017-03-01 | 微软技术许可有限责任公司 | Method and apparatus for the channel mapping of OFDM frequency hopping |
| WO2007016854A1 (en) * | 2005-08-08 | 2007-02-15 | Huawei Technologies Co., Ltd. | A signal modulation method based on orthogonal frequency division multiple and the apparatus thereof |
| CN1913508B (en) * | 2005-08-08 | 2010-05-05 | 华为技术有限公司 | Signal modulation method based on orthogonal frequency division multiplex and its modulation device |
| CN114826862A (en) * | 2022-05-07 | 2022-07-29 | 苏州市江海通讯发展实业有限公司 | Universal narrow-band orthogonal modulation method suitable for low-power-consumption low-performance MCU |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH11196063A (en) | 1999-07-21 |
| CN1150703C (en) | 2004-05-19 |
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