CN1220881C - Method and device for detecting circuit board signal transmission quality - Google Patents

Method and device for detecting circuit board signal transmission quality Download PDF

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Publication number
CN1220881C
CN1220881C CN 03101660 CN03101660A CN1220881C CN 1220881 C CN1220881 C CN 1220881C CN 03101660 CN03101660 CN 03101660 CN 03101660 A CN03101660 A CN 03101660A CN 1220881 C CN1220881 C CN 1220881C
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signal
count value
test signal
output
transmission quality
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CN1430066A (en
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彭习之
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Via Technologies Inc
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Via Technologies Inc
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Abstract

The present invention relates to a method and a device for testing the quality of signal transmission on a circuit board. The signal transmission quality testing device directly arranged on a circuit board is used for responding a level change formed by signal reflection and an interference effect after an output test signal generated by a source unit is transferred to a destination unit through the circuit board. The level change is compared with a first reference level and a second reference level for obtaining a comparative result. Thus, the quality of the signal transmission provided by the circuit board is judged. In addition, the comparative result can also be used for deciding whether to automatically adjust the signal slew rate of the output test signal or not.

Description

The method and the device of testing circuit partitioned signal transmission quality
Technical field
The present invention relates to a kind of method and apparatus of detection signal transmission quality, refer to a kind of method and device that is applied to signal transmission quality on the testing circuit plate especially.
Background technology
For the various circuit arrangements in arbitrary system, it is made in the integration way of one chip, can reach the production cost and raising signal transmission fiduciary level that reduce this system beyond doubt really, therefore, (System on a Chip SoC) becomes following design main flow of looking forward to the prospect to system-on-a-chip already.
With regard to the development degree of present system combination design, still can't reach the target of above-mentioned SoC fully, therefore, system region is divided into different circuit module of several functions or chip, and be integrated in together with circuit board (CircuitBoard), make the platform of circuit board, be still the practices well of present system combination design as each circuit module or the transmission of chip chamber signal.
Because the characteristic of circuit board itself, include: whether the employed material kind of trace (trace) (being the path of signal transmission), trace length, track width, trace uniformity coefficient, trace signal to each other disturb, reach trace and turn or the like, the capital badly influences the quality of signal transmission, and and then have influence on the usefulness of system combination, therefore, detecting the signal transmitted waveform that each circuit module or chip produced and whether meet expection on the circuit board that comprises this trace, promptly is in order to judge one of key factor whether the system combination design can be successful.
With present existing system Integration Design flow process is example, normally will independently tested finish earlier and each circuit module or chip that quality determination is errorless, shipment is integrated with a circuit board before giving down-stream system manufacturer, afterwards, selected a certainly come source chip to export test signal to produce, and after detecting this output test signal and transfer to a specific purpose chip by artificial use external signal waveform measurement instrument via this trace, because of signal reflex and interference effect produce the severe degree of signal waveform change, confirm the signal transmission quality that this trace can provide.This kind to be manually to carry out the mode of input, for time and manpower, all is a burden greatly.Moreover in case when requiring to improve for the signal transmission quality of each circuit module or chip chamber, certainly will detect one by one for each circuit board that is integrated with each circuit module or chip, time that it is wasted and cost will be very huge.
For further specifying above-mentioned way to use external signal waveform measurement instrument to come testing circuit partitioned signal transmission quality, now cooperate Fig. 1 and Fig. 2 (a)~(c) describe, wherein, Fig. 1 is the signal transmission synoptic diagram of being located between each circuit unit of a circuit board 10.In Fig. 1, be provided with source chip 11 and purpose chip 12 on this circuit board 10 at least; Wherein, this comes source chip 11 to export test signal S1 in order to produce one, and transfers to this purpose chip 12 places via the trace 13 (for example, being a Copper Foil plain conductor) that this circuit board 10 is provided.
Because after this output test signal S1 transfers to these purpose chip 12 places, can during the level transition, (for example form the level variation phenomenon because of signal reflex and interference effect, form the signal superposition phenomenon), and this trace 13 forms a kind of circuit impedance for the signal transmission, so, in case the circuit transmission impedance matching that 13 of this traces can provide is very bad, when then detecting this output test signal S1, will find that its level variation that is produced can be fairly obvious during transition with outside signal waveform survey instrument.
See also Fig. 2 (a), its among Fig. 1 this come this output test signal S1 that source chip 11 produced still without this trace 13 to transfer to the preceding waveform synoptic diagram of this purpose chip 12.In Fig. 2 (a), when the level of this output test signal S1 waveform when being high than one first datum Hi, the side is considered as being in high level state, when being low as this level of exporting test signal S1 waveform than one second datum Lo, then is considered as being in low level state.In addition, indicate Tr1 and represent that this output test signal S1 waveform is in during the level transition.
See also Fig. 2 (b), its for this output test signal S1 among Fig. 1 through this trace 13 with the ideal waveform synoptic diagram after transferring to this purpose chip 12.Promptly, if this trace 13 forms a kind of desirable circuit impedance coupling for the signal transmission of this output test signal S1, be subjected to signal reflex and this output test signal S1 that interference effect influenced this moment, just the desirable signal superposition phenomenon shown in Fig. 2 (b) should appear in its Tr2 during the level transition.When in case this trace 13 forms a kind of bad circuit impedance coupling for signal transmission of this output test signal S1, then will be shown in Fig. 2 (c) among Fig. 1 this output test signal S1 through this trace 13 with the actual waveform synoptic diagram after transferring to this purpose chip 12.That is, be subjected to signal reflex and this output test signal S1 that interference effect influenced, Tr3 during the level transition, the change of its level will acutely change significantly; For example, when time t2, t4, be higher than this first datum Hi twice, and when time t1, t3, be lower than this second datum Lo twice.In brief, this kind result shows for circuit module or chip that desire is utilized this output test signal S1, will obscure easily in the interpretation of level, mistake, and and then may produce a series of misoperation.
Summary of the invention
One of purpose of the present invention is to provide a kind of method of testing circuit partitioned signal transmission quality, can be by the artificial external signal waveform measurement instrument that uses, can the waveform of the transmission signals on the circuit board be detected, judge the signal transmission quality of circuit board fast.
Another object of the present invention is to provide a kind of method of testing circuit partitioned signal transmission quality, can adjust the rate of change (slew rate) of output signal according to detected circuit board signal transmission quality information.
The invention discloses a kind of method of testing circuit partitioned signal transmission quality, comprise the following steps: to produce an output test signal, and transfer to a purpose assembly place via a trace (trace); And import one first datum, and carrying out one first level comparison program, and obtain one first count value with this output test signal of waveform generation change, judge the signal transmission quality of this trace in view of the above.
According to the above-mentioned conception of the present invention, wherein this output test signal can come source component to be produced by one.
According to the above-mentioned conception of the present invention, wherein this comes source component and this purpose assembly to be to be located at a chip that includes on the circuit board of this trace.
According to the above-mentioned conception of the present invention, wherein this first level comparison program is meant the level that compares this output test signal and the level size between this first datum.
According to the above-mentioned conception of the present invention, wherein this first count value changes the count value of the number of times that is higher than this first datum for the level of this output test signal of counting.
According to the above-mentioned conception of the present invention, wherein this method also comprises the following steps: the relatively size between this first count value and one first predetermined count value, with in this first count value during greater than this first predetermined count value, produce a rate of change (slew rate) and adjust signal, to adjust the signal rate of change of this output test signal.
According to the above-mentioned conception of the present invention, wherein this method also comprises the following steps: to import one second datum, carrying out one second level comparison program, and obtain one second count value, judge the signal transmission quality of this trace in view of the above with this output test signal of waveform generation change.
According to the above-mentioned conception of the present invention, wherein this second level comparison program is meant the level that compares this output test signal and the level size between this second datum.
According to the above-mentioned conception of the present invention, wherein this second count value changes the count value of the number of times that is lower than this second datum for the level of this output test signal of counting.
According to the above-mentioned conception of the present invention, wherein this method also comprises the following steps: the relatively size between this second count value and one second predetermined count value, with in this second count value during greater than this second predetermined count value, produce a rate of change and adjust signal, to adjust the signal rate of change of this output test signal.
The invention also discloses a kind of circuit board signal transmission quality pick-up unit, be located at the inside of coming source component with a core logic circuit and an output buffer, this device comprises: one first comparer, be electrically connected with the trace that is connected this output buffer and a purpose assembly, this first comparer is to export test signal in order to import one first datum and, and produces output one first comparison signal; Wherein, this output test signal system produced by this output buffer and its through this trace and after transferring to this purpose assembly, can cause waveform to change phenomenon because of signal reflex and interference effect; And one first counter, be electrically connected between this first comparer and this core logic circuit, this first counter is in order to input and mutually should first comparison signal, to finish the counting action and to produce output one first count value to this core logic circuit, judge the signal transmission quality of this trace for this core logic circuit.
According to the above-mentioned conception of the present invention, wherein this comes source component and this purpose assembly all to can be to be located at a chip that includes on the circuit board of this trace.
According to the above-mentioned conception of the present invention, wherein this first count value changes the count value of the number of times that is higher than this first datum for the level of this output test signal of counting.
According to the above-mentioned conception of the present invention, wherein also comprise: one second comparer, be electrically connected with this trace that is connected this output buffer and this purpose assembly, this second comparer is in order to importing one second datum and this output test signal, and one second comparison signal is exported in generation; And one second counter, be electrically connected between this second comparer and this core logic circuit, this second counter is in order to input and mutually should second comparison signal, to finish the counting action and to produce output one second count value to this core logic circuit, judge the signal transmission quality of this trace for this core logic circuit.
According to the above-mentioned conception of the present invention, wherein this second count value changes the count value of the number of times that is lower than this second datum for the level of this output test signal of counting.
According to the above-mentioned conception of the present invention, wherein this core logic circuit can comprise that a test signal produces circuit, in order to produce an original test signal to this output buffer, so that this output test signal of the corresponding generation of this output buffer.
According to the above-mentioned conception of the present invention, wherein this core logic circuit also comprises: one first and one second buffer, and it is with input and stores this first and second count value; An and judgment means, be electrically connected on this first and second buffer, this judgment means can be judged and the size between this first count value and one first predetermined count value relatively, or the size between this second count value and one second predetermined count value, judges the signal transmission quality of this trace in view of the above.
According to the above-mentioned conception of the present invention, wherein in this first count value greater than this first predetermined count value and/or this second count value during greater than this second predetermined count value, this judgment means more can produce output one rate of change (slew rate) and adjust signal to this output buffer, desires to export to the signal rate of change of this output test signal of this purpose assembly for this output buffer adjustment.
According to the above-mentioned conception of the present invention, wherein this output buffer comprises the output buffer of an adjustable signal rate of change, be electrically connected on this test signal and produce circuit, this judgment means and this trace, it is to adjust signal in order to import this original test signal and this rate of change, and mutually should the rate of change adjust signal, with the signal rate of change of this output test signal of adjusting institute's desire output.
The present invention can be able to more deep understanding by following accompanying drawing and detailed description.
Description of drawings
Fig. 1 is the signal transmission synoptic diagram of being located between each circuit unit of a circuit board;
Fig. 2 (a) among Fig. 1 this come this output test signal that source chip produces still without this trace to transfer to the waveform synoptic diagram before this purpose chip;
Fig. 2 (b) for this output test signal among Fig. 1 through this trace with the ideal waveform synoptic diagram after transferring to this purpose chip;
Fig. 2 (c) for this output test signal among Fig. 1 through this trace with the actual waveform synoptic diagram after transferring to this purpose chip;
Fig. 3 is the step exemplary plot of a preferable implementing procedure of the present invention;
Fig. 4 is the topology example figure of a preferable device for carrying out said of the present invention;
Wherein, description of reference numerals is as follows:
Among Fig. 1, Fig. 2 (a)~(c):
Circuit board 10 comes source chip 11
Purpose chip 12 traces 13
Output test signal S1
The first datum Hi, the second datum Lo
Tr1, Tr2, Tr3 during the level transition of output test signal S1
Among Fig. 3,4:
Come source chip 11 core logic circuits 111
Test signal output circuit 1111
First and second buffer 1112,1113
Judgment means 1114 output buffers 112
The output buffer 1121 of the adjustable signal rate of change
Input buffering 1122
Circuit board signal transmission quality pick-up unit 113
First and second comparer 1131,1132
First and second counter 1133,1134
Output test signal S1 original test signal S10
First and second comparison signal S2, S3
First and second count value S4, S5
First and second predetermined count value S6, S7
The rate of change is adjusted signal S8
The first datum Hi, the second datum Lo
Purpose chip 12 traces 13
Embodiment
Because existing way of signal transmission path being carried out the signal transmission quality detection with the signal waveform survey instrument, for time and manpower is a burden greatly, therefore, the present invention proposes a kind of circuit board signal transmission quality pick-up unit to be set directly on circuit board, and proposes a kind of method of testing circuit partitioned signal transmission quality.
At first, of the present invention one preferable implementation method is proposed.See also Fig. 3, it is the flow example figure of a preferable implementation method of the present invention, and its detailed step is as described below:
Step (a): beginning;
Step (b): produce an output test signal, and transfer to a purpose chip place via a trace (trace); Wherein, this output test signal can be produced by a circuit board signal transmission quality pick-up unit of being located in the source chip internal;
Step (c): import one first datum and this output test signal that causes the waveform generation change because of signal reflex and interference effect, carrying out one first level comparison program, and obtain one first count value;
Wherein, this first level comparison program is meant the level that compares this output test signal and the level size between this first datum, and this first count value is higher than the count value of the number of times of this first datum for the level variation of this output test signal of counting; Certainly, this first datum is in order to judge whether this output test signal is in the critical reference voltage of high level state;
Step (d): import one second datum and this output test signal that causes the waveform generation change because of signal reflex and interference effect, carrying out one second level comparison program, and obtain one second count value;
Wherein, this second level comparison program is meant the level that compares this output test signal and the level size between this second datum, and this second count value is lower than the count value of the number of times of this second datum for the level variation of this output test signal of counting; Certainly, this second datum is in order to judge whether this output test signal is in the critical reference voltage of low level state;
Step (e): relatively between this first count value and one first predetermined count value the size and/or this second count value and one second predetermined count value between size, learn with judgement whether the signal transmission quality of this trace good; And
Step (f): when this first count value greater than this first predetermined count value and/or this second count value during greater than this second predetermined count value, the signal transmission quality of representing this trace is not good, adjust signal so can consider to produce a rate of change, adjusting the signal rate of change of this output test signal, and repeat this step (b);
After the signal rate of change that changes this output test signal, can read this first or two count value once more, whether must further adjust the rate of change with decision; And
Step (g): finish.
Certainly, for understand enforcement notion of the present invention from another angle, see also Fig. 4, it is the topology example figure of a preferable device for carrying out said of the present invention, and please cooperate and consult Fig. 1~Fig. 3.
Disclosed in this invention one preferable way is with a circuit board signal transmission quality pick-up unit 113, directly is located at circuit module or chip internal (being that Fig. 1 and shown in Figure 4 this come in the source chip 11).Make this come source chip 11 to enter test pattern (test mode), so that 13 signal transmission qualities that can provide of this trace directly to be provided in this test pattern, thereby reduce manually to detect the required time, but and the result of respective detection and adjust variation of output signals rate (slew rate) automatically, to meet the actual transmissions characteristic of this trace 13.
Further and opinion, this circuit board signal transmission quality pick-up unit 113 shown in the present embodiment can be located at a core logic circuit 111 and an output buffer 112 this and come the inside of source chip 11; Wherein, this core logic circuit 111 can comprise that a test signal produces circuit 1111, and it is to be used for producing an original test signal S10 to export this output buffer 112 to after this comes source chip 11 to enter test pattern.In addition, be located at the output buffer 1121 of the adjustable signal rate of change in this output buffer 112, can corresponding original test signal S10 and produce and export test signal S1, and transfer to this purpose chip 12 places via this trace 13.
Moreover this device 113 can comprise: first and second comparer 1131,1132 and first and second counter 1133,1134; Wherein, this first and second comparer 1131,1132 all is electrically connected with this trace that is connected this output buffer 112 and this purpose chip 12, be subjected to signal reflex and this output test signal S1 that interference effect was influenced with input, and it is carried out level ratio with this first datum Hi, this second datum Lo of other input respectively, to produce output one first and second relatively count value S2, S3 respectively.Afterwards, to should first and second comparing count value S2, S3, this first and second counter 1133,1134 can be distinguished corresponding generation output one first and second count value S4, S5.
The preferably, this core logic circuit 111 also can comprise one first and one second buffer 1112,1113 and a judgment means 1114; Wherein, this first and second buffer 1112, the 1113rd, install this first and second count value S4 at 113 places in order to store from this, S5, and by this judgment means 1114 size between this first count value S4 and one first predetermined count value S6 (predeterminable) relatively in these judgment means 1114 inside, and/or the size between this second count value S5 and one second predetermined count value S7 (also predeterminable) relatively in these judgment means 1114 inside, can learn the actual transmissions characteristic of this trace 13 immediately, and needn't as existing way, also need just can learn the signal transmission quality of this trace 13 by the manual measurement means.After the scheduled period after producing test signal, also can read mode, read the count value of this first and second buffer 1112,1113, to know signal transmission quality by I/O.In addition, also can readable modus ponens counter implement and omit extra buffer, read for I/O.
For example, and see also shown in Fig. 2 (c), because of this output test signal S1 Tr3 during this transition, the change of its level clearly is higher than this first datum Hi twice when time t2, t4, and when time t1, t3, be lower than this second datum Lo twice, therefore, when time t2, t4, can make this first comparison signal S2 produce two count pulses, and 1133 pairs in this first counter should the first comparison signal S2, this first count value S4 can produce twice counting action, so should equal 2; On the other hand, when time t1, t3, produce two count pulses because of also making this second comparison signal S3, so this second counter 1134 also can be to should the second comparison signal S3 and produce twice counting and move, also, this second count value S5 should equal 2.
Suppose, this first and second predetermined count value S6, the S7 that default in these judgment means 1114 inside are set at 1 and 0 respectively, with the expression can allow or tolerate the signal mobility scale time, by this judgment means 1114 for the comparison between this first and second predetermined count value S6, S7 and this first and second count value S4, S5, can learn because of this first and second count value S4, S5 are higher than this first and second predetermined count value S6, S7 this moment, so judgement learns that the signal transmission quality that this trace 13 provided is not good.
Certainly, this judgment means 1114 also can corresponding comparison the result and determine whether to adjust the signal rate of change of this output test signal S1, for example, when find this first and second count value S4, S5 all/or one of them when this first and second predetermined count value S6, S7 occurring being higher than, the promptly essential signal rate of change that reduces this output test signal S1; Like this, this judgment means 1114 can produce output one rate of change and adjust signal S8 to the output buffer 1121 of this adjustable signal rate of change, desires to export to the signal rate of change of this output test signal S1 at these purpose chip 12 places with change.Wherein, about the output buffer 1121 of this adjustable signal rate of change, the actual practice that it adjusts the signal rate of change has been existing means, so no longer given unnecessary details at this.For example, this rate of change is adjusted signal S8 and be can be two control signal, by producing 00,01,10,11 to control the output test signal S1 that this output buffer 1121 produces four kinds of different rate of change of tool.
In sum, the present invention can have now for another example to be needed as the way by the manual measurement mode, and can be directly come source chip 11 by this with this circuit board signal transmission quality pick-up unit 13, just can automatically detect and learn 13 signal transmission qualities that can provide of this trace, and the result of respective detection determines whether adjusting the rate of change of output signal.

Claims (10)

1. the method for a testing circuit partitioned signal transmission quality is characterized in that, comprises the following steps:
Produce an output test signal, and transfer to a purpose assembly place via a trace; And
Import one first datum, carrying out one first level comparison program, and obtain one first count value, judge the signal transmission quality of this trace in view of the above with this output test signal of waveform generation change.
2. the method for testing circuit partitioned signal transmission quality as claimed in claim 1, it is characterized in that, this first level comparison program is meant the level that compares this output test signal and the level size between this first datum, and this first count value is higher than the count value of the number of times of this first datum for the level variation of this output test signal of counting.
3. the method for testing circuit partitioned signal transmission quality as claimed in claim 2 is characterized in that this method also comprises the following steps:
The size between this first count value and one first predetermined count value relatively is, to produce a rate of change and to adjust signal, to adjust the signal rate of change of this output test signal during greater than this first predetermined count value in this first count value.
4. the method for testing circuit partitioned signal transmission quality as claimed in claim 2 is characterized in that this method also comprises the following steps:
Import one second datum, carrying out one second level comparison program, and obtain one second count value, judge the signal transmission quality of this trace in view of the above with this output test signal of waveform generation change; Wherein, this second level comparison program is meant the level that compares this output test signal and the level size between this second datum, and this second count value is lower than the count value of the number of times of this second datum for the level variation of this output test signal of counting.
5. the method for testing circuit partitioned signal transmission quality as claimed in claim 4 is characterized in that this method also comprises the following steps:
The size between this second count value and one second predetermined count value relatively is, to produce a rate of change and to adjust signal, to adjust the signal rate of change of this output test signal during greater than this second predetermined count value in this second count value.
6. the device of a testing circuit partitioned signal transmission quality is located at the inside of coming source component with a core logic circuit and an output buffer, it is characterized in that this device comprises:
One first comparer is electrically connected with the trace that is connected this output buffer and a purpose assembly, and this first comparer is to export test signal in order to import one first datum and, and produces output one first comparison signal; Wherein, this output test signal system produced by this output buffer and its through this trace and after transferring to this purpose assembly, can cause waveform to change phenomenon because of signal reflex and interference effect; And
One first counter, be electrically connected between this first comparer and this core logic circuit, this first counter is in order to input and mutually should first comparison signal, to finish the counting action and to produce output one first count value to this core logic circuit, judge the signal transmission quality of this trace for this core logic circuit.
7. circuit board signal transmission quality pick-up unit as claimed in claim 6, it is characterized in that, this comes source component and this purpose assembly all to can be to be located at a chip that includes on the circuit board of this trace, and this first count value is higher than the count value of the number of times of this first datum for the level variation of this output test signal of counting.
8. circuit board signal transmission quality pick-up unit as claimed in claim 6 is characterized in that, also comprises:
One second comparer is electrically connected with this trace that is connected this output buffer and this purpose assembly, and this second comparer is in order to importing one second datum and this output test signal, and one second comparison signal is exported in generation; And
One second counter, be electrically connected between this second comparer and this core logic circuit, this second counter is in order to input and mutually should second comparison signal, to finish the counting action and to produce output one second count value to this core logic circuit, judge the signal transmission quality of this trace in view of the above for this core logic circuit; Wherein, this second count value changes the count value of the number of times that is lower than this second datum for the level of this output test signal of counting.
9. circuit board signal transmission quality pick-up unit as claimed in claim 8 is characterized in that this core logic circuit can comprise:
One test signal produces circuit, and it is in order to produce an original test signal to this output buffer, so that this output test signal of the corresponding generation of this output buffer;
One first and one second buffer, it is with input and stores this first and second count value; And
One judgment means, be electrically connected on this first and second buffer, this judgment means can be judged and the size between this first count value and one first predetermined count value relatively, or the size between this second count value and one second predetermined count value, judges the signal transmission quality of this trace in view of the above.
10. circuit board signal transmission quality pick-up unit as claimed in claim 9, it is characterized in that, when this first count value greater than this first predetermined count value or this second count value during greater than this second predetermined count value, this judgment means more can produce output one rate of change and adjust signal to this output buffer, desires to export to the signal rate of change of this output test signal of this purpose assembly for this output buffer adjustment; And, this output buffer comprises the output buffer of an adjustable signal rate of change, be electrically connected on this test signal and produce circuit, this judgment means and this trace, it is to adjust signal in order to import this original test signal and this rate of change, and mutually should the rate of change adjust signal, with the signal rate of change of this output test signal of adjusting institute's desire output.
CN 03101660 2003-01-13 2003-01-13 Method and device for detecting circuit board signal transmission quality Expired - Lifetime CN1220881C (en)

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CN 03101660 CN1220881C (en) 2003-01-13 2003-01-13 Method and device for detecting circuit board signal transmission quality

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Application Number Priority Date Filing Date Title
CN 03101660 CN1220881C (en) 2003-01-13 2003-01-13 Method and device for detecting circuit board signal transmission quality

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CN1220881C true CN1220881C (en) 2005-09-28

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CN103308843A (en) * 2012-03-09 2013-09-18 鸿富锦精密工业(深圳)有限公司 Chip with receiver test function and circuit board with receiver test function
CN105510804B (en) * 2015-12-31 2018-03-20 珠海市一微半导体有限公司 A kind of signal loop detection circuit and method
CN114705943A (en) * 2022-06-06 2022-07-05 苏州浪潮智能科技有限公司 Signal quality detection system, method and computer equipment

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