CN1218289C - Scanning drive circuit applied in panel display - Google Patents
Scanning drive circuit applied in panel display Download PDFInfo
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- CN1218289C CN1218289C CN 02150669 CN02150669A CN1218289C CN 1218289 C CN1218289 C CN 1218289C CN 02150669 CN02150669 CN 02150669 CN 02150669 A CN02150669 A CN 02150669A CN 1218289 C CN1218289 C CN 1218289C
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Abstract
The present invention relates to a scanning drive circuit applied in a panel display. The panel display comprises a principal matrix, and the scanning drive circuit comprises a first subcircuit and a second subcircuit, wherein the first subcircuit is used for receiving driving signals which are sent out by a first output end to a first scan line of a principal matrix after the special time, and the second subcircuit is electrically connected with the first subcircuit. After receiving the driving signal sent out by a second output end of the first subcircuit, the second subcircuit sends out the driving signal to a second scan line of the principal matrix after the special time. A unidirectional conducting component is electrically connected between the first output end and the second output end of the first subcircuit.
Description
Technical field
The present invention is a kind of scan drive circuit, refers to be applied in the scan drive circuit on the flat-panel screens especially.
Background technology
Along with the evolution of manufacturing technology, the semiconductor material material in the Thin Film Transistor-LCD (TFTLCD) converts the higher low temperature polycrystalline silicon of electronics mobility (being called for short LTPS-TFT) to by amorphous silicon (Amorphous Si) gradually.In other words, except original principal matrix, the former scan drive circuit that was arranged on the outside originally also can be integrated on the panel on the display pannel.And in common semiconductor fabrication-NMOS making, CMOS making are made with PMOS, because it is minimum usually that PMOS makes required light shield number and making step, therefore from large size panel considerations that need reduce cost, adopted the PMOS making to carry out the manufacturing of principal matrix and scan drive circuit on the panel mostly.
In addition, because panel size is increasing, monolateral scan drive circuit can't provide enough driving forces, and therefore, bilateral scan drive circuit framework has just been carried out out.See also Fig. 1, it is the synoptic diagram with panel of LCD structure of bilateral scan drive circuit, mainly be a vertical scanning driving circuit 11 respectively to be set, be used for respectively starting a plurality of thin film transistor (TFT)s on the same scan signal line from the both sides input drive signal in the both sides of principal matrix 10.Vertical scanning driving circuit 11 is connected and composed by a plurality of electronic circuits 111 respectively, and each electronic circuit 111 mainly comprises shift register 1111, buffer circuit 1112 and static discharge (being called for short ESD) holding circuit 1113.Wherein shift register 1111 is subjected to the control of clock pulse signal and sends drive signal, and the drive signal that buffer circuit 1112 then is used for being received adds all thin film transistor (TFT)s on the same scan signal line of high-power back startup.The Electrostatic Discharge holding circuit is used for the destruction that holding circuit is not subjected to static discharge and is caused.
From figure, can know and find out, shift register 1111 in the level electronic circuit of back is the promotions that are subjected to 1112 output drive signals of buffer circuit in the previous stage electronic circuit, so when two adjacent sweep traces in the principal matrix 10 produce short-circuit conditions because of making defective, buffer circuit 1112 needs to promote Duo one times thin film transistor (TFT) than original number, therefore causes driving force not enough and can't promote the shift register 1111 of back grade smoothly most probably.Therefore, the action of each sweep trace of sequential start that the vertical scanning driving circuit carried out will produce interruption and can't continue, and cause display normally to move, and be exploitation fundamental purpose of the present invention and how to improve this shortcoming.
Summary of the invention
The invention provides a kind of scan drive circuit that is applied on the flat-panel screens, this flat-panel screens comprises principal matrix, and this scan drive circuit comprises: the electronic circuit of a plurality of serial connections, each electronic circuit comprises first output terminal and second output terminal and to a sweep trace in should principal matrix, described each electronic circuit is used to receive drive signal, behind special time by first output terminal send this drive signal to this principal matrix to sweep trace that should electronic circuit, and send time electronic circuit of this drive signal to its next stage by this second output terminal, a described time electronic circuit is to a sweep trace in should principal matrix, after reception this drive signal by described second output terminal output, behind special time, send again this drive signal to this principal matrix to sweep trace that should a time electronic circuit, and be electrically connected unidirectional feed-through assembly between this first output terminal of described each electronic circuit and this second output terminal.
According to above-mentioned conception, in scan drive circuit of the present invention, this electronic circuit comprises: shift register is receiving this drive signal and is sending this drive signal again according to the control of clock pulse signal behind special time; And buffer circuit, be electrically connected a time electronic circuit of this shift register, this principal matrix and this electronic circuit, the drive signal that is used for being received adds and exports this principal matrix and this time electronic circuit to from this first output terminal and this second output terminal respectively after high-power, and this buffer circuit also comprises this unidirectional feed-through assembly.
According to above-mentioned conception, in scan drive circuit of the present invention, this electronic circuit also comprises: ESD protection circuit, be connected electrically in first output terminal of this electronic circuit, and be used to the destruction of avoiding integrated circuit caused by static discharge.
According to above-mentioned conception, in scan drive circuit of the present invention, this electronic circuit is to be made of a plurality of not gate serial connections.
According to above-mentioned conception, in scan drive circuit of the present invention, this unidirectional feed-through assembly comprises at least one not gate.
According to above-mentioned conception, in scan drive circuit of the present invention, this not gate is one of NMOS not gate, CMOS not gate or PMOS not gate.
According to above-mentioned conception, in scan drive circuit of the present invention, this second electronic circuit comprises: shift register, be connected electrically in this second output terminal of this first electronic circuit, be used to receive this first electronic circuit this second output terminal output this drive signal and behind this special time, send this drive signal again according to the control of clock pulse signal; And buffer circuit, being connected electrically in this shift register, this principal matrix and this second electronic circuit, the drive signal that is used for being received adds high-power back exports this principal matrix to from this first output terminal this second sweep trace.
According to above-mentioned conception, in scan drive circuit of the present invention, this second electronic circuit also comprises: ESD protection circuit, be connected electrically in first output terminal of this buffer circuit, and be used to the destruction of avoiding integrated circuit caused by static discharge.
According to above-mentioned conception, in scan drive circuit of the present invention, this buffer circuit is to be made of a plurality of not gate serial connections.
According to above-mentioned conception, in scan drive circuit of the present invention, this unidirectional feed-through assembly is one of NMOS not gate, CMOS not gate or PMOS not gate.
Description of drawings
Fig. 1 is the panel of LCD organigram with bilateral scan drive circuit.
Fig. 2 is a preferred embodiment circuit block diagram of the present invention.
Fig. 3 is the internal circuit synoptic diagram of this buffer circuit in the embodiments of the invention.
Fig. 4 is the circuit diagram of PMOS not gate.
Embodiment
Referring to accompanying drawing and the more deep understanding the present invention of detailed description.
See also Fig. 2, expression the present invention is the block diagram of the preferred embodiment circuit that shortcoming developed out of the above-mentioned custom circuit of improvement, only draw monolateral scan drive circuit structure among the figure, the structure of the scan drive circuit of another side there is no difference, so omit in this figure.Scan drive circuit of the present invention is to be made of a plurality of electronic circuits 21, each electronic circuit 21 mainly comprises three members, wherein shift register 211 receptions and breech lock are lived drive signal, send this drive signal again to buffer circuit 212 behind special time by the control of clock pulse signal CKV1, CKV2 and CKV3, buffer circuit 212 adds the drive signal that is received and exports shift register this principal matrix 20 and the next stage electronic circuit to from this first output terminal 2121 and this second output terminal 2122 respectively after high-power.Be connected 213 of Electrostatic Discharge holding circuits on first output terminal 2121 and be used for the destruction that holding circuit is not subjected to static discharge and is caused.
The principal character of present embodiment is that first output terminal 2121 of buffer circuit 212 and 2122 of this second output terminals are provided with unidirectional feed-through assembly 2123.Therefore, adjacent scanning lines 201 produces short circuit in principal matrix 20, when causing the load increase of first output terminal, 2121 required promotions, can't influence the driving force of 2122 output drive signals of second output terminal, therefore can not produce the shortcoming that can't promote back level shift register in the known approaches because of driving force is not enough smoothly.
See also Fig. 3 again, the internal circuit synoptic diagram of this buffer circuit 212 in the expression embodiment of the invention, buffer circuit 212 mainly are made of a plurality of not circuits serial connections, and therefore this unidirectional feed-through assembly 2123 is just directly with one or be connected in series a plurality of not circuits and realize.Therefore, do not needing to set up under the situation of any assembly, just can avoid in the principal matrix 20 adjacent scanning lines 201 to produce short circuits fully and may cause the normally influence of start the both sides scan drive circuit.
This not gate can be selected from one of NMOS not gate, CMOS not gate or PMOS not gate, mostly adopts under the situation of PMOS making at present large size panel, and using the PMOS not gate is the most probable practice.Fig. 4 represents the circuit diagram of PMOS not gate.
In sum, the present invention mainly is provided with for example unidirectional feed-through assembly of not circuit between first output terminal of buffer circuit and this second output terminal.So just can avoid fully owing to adjacent scanning lines short circuit in the principal matrix may cause the normally influence of start to the both sides scan drive circuit.The technology of the present invention can be widely used in as in the manufacturing and designing of flat display panels such as LCD, but the present invention is carried out any modification or improve not breaking away from claims of the present invention institute restricted portion by those skilled in the art.
Claims (7)
1. scan drive circuit that is applied in flat-panel screens, this flat-panel screens comprises principal matrix, this scan drive circuit comprises the electronic circuit of a plurality of serial connections, each electronic circuit comprises first output terminal and second output terminal, and to a sweep trace in should principal matrix, described each electronic circuit receives drive signal, behind special time by this first output terminal send this drive signal to this principal matrix to sweep trace that should electronic circuit, and send time electronic circuit of this drive signal to its next stage by this second output terminal, a described time electronic circuit is to a sweep trace in should principal matrix, after this drive signal that described second output terminal of reception is sent, behind special time, send again this drive signal to this principal matrix to sweep trace that should a time electronic circuit, be electrically connected unidirectional feed-through assembly between this first output terminal that it is characterized in that described each electronic circuit and this second output terminal.
2. scan drive circuit according to claim 1 is characterized in that this electronic circuit comprises:
Shift register is used to receive this drive signal and sends this drive signal again according to the control of clock pulse signal behind special time; And
Buffer circuit, be electrically connected a time electronic circuit of this shift register, this principal matrix and this electronic circuit, the drive signal that is used for being received adds and exports this principal matrix and this time electronic circuit to from first output terminal of this electronic circuit and this second output terminal respectively after high-power, and this buffer circuit also comprises this unidirectional feed-through assembly.
3. scan drive circuit according to claim 2 is characterized in that this electronic circuit also comprises: ESD protection circuit, be connected electrically in first output terminal of this electronic circuit, and be used to the destruction of avoiding integrated circuit caused by static discharge.
4. scan drive circuit according to claim 2 is characterized in that this buffer circuit is to be made of a plurality of not gate serial connections.
5. scan drive circuit according to claim 1 is characterized in that this unidirectional feed-through assembly comprises at least one not gate.
6. scan drive circuit according to claim 5 is characterized in that this not gate is one of NMOS not gate, CMOS not gate or PMOS not gate.
7. scan drive circuit according to claim 1 is characterized in that this unidirectional feed-through assembly is one of NMOS not gate, CMOS not gate or PMOS not gate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02150669 CN1218289C (en) | 2002-11-18 | 2002-11-18 | Scanning drive circuit applied in panel display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02150669 CN1218289C (en) | 2002-11-18 | 2002-11-18 | Scanning drive circuit applied in panel display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1416109A CN1416109A (en) | 2003-05-07 |
| CN1218289C true CN1218289C (en) | 2005-09-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02150669 Expired - Lifetime CN1218289C (en) | 2002-11-18 | 2002-11-18 | Scanning drive circuit applied in panel display |
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| Country | Link |
|---|---|
| CN (1) | CN1218289C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101546606B (en) * | 2008-03-24 | 2011-08-24 | 中华映管股份有限公司 | Shift register and display driver thereof |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7804475B2 (en) | 2006-02-09 | 2010-09-28 | Toppoly Optoelectronics Corp. | Systems for displaying images utilizing two clock signals |
| CN102222488B (en) * | 2011-06-27 | 2013-07-03 | 福建华映显示科技有限公司 | Amorphous silicon display device |
| CN103928002B (en) * | 2013-12-31 | 2016-06-15 | 厦门天马微电子有限公司 | A kind of gate driver circuit and indicating meter |
-
2002
- 2002-11-18 CN CN 02150669 patent/CN1218289C/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101546606B (en) * | 2008-03-24 | 2011-08-24 | 中华映管股份有限公司 | Shift register and display driver thereof |
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| Publication number | Publication date |
|---|---|
| CN1416109A (en) | 2003-05-07 |
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