CN1188982A - Semiconductor device and method for producing same - Google Patents
Semiconductor device and method for producing same Download PDFInfo
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- CN1188982A CN1188982A CN98100144A CN98100144A CN1188982A CN 1188982 A CN1188982 A CN 1188982A CN 98100144 A CN98100144 A CN 98100144A CN 98100144 A CN98100144 A CN 98100144A CN 1188982 A CN1188982 A CN 1188982A
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Abstract
The invention provides a manufacturing method of a semiconductor device, which comprises the following steps: a gate electrode with a middle insulation film is formed on a substrate; an insulation film is deposited on the substrate and the entire surface of the gate electrode; nitrogen ions are implanted into the insulation film at an angle; nitrogenous insulation film side walls are formed on the side faces of the gate electrode by etching the insulation film; impurity is added to the gate electrode and the substrate to form a source electrode and drain electrode diffusion zone; the gate electrode and the surfaces of the source electrode and drain electrode diffusion zone are exposed; titanium films are deposited on the gate electrode and the surfaces; the unreacted part of the titanium films is removed, thus forming titanium silicide layers on the source electrode and drain electrode diffusion zone and the gate electrode by means of self-alignment.
Description
The present invention relates to a kind of method of making semiconductor device and a kind of semiconductor device of producing of method thus, and relate in particular to the transistorized method of a kind of production MOS (metal-oxide semiconductor (MOS)), in the method, on source electrode, drain diffusion layer and gate electrode, form the silicide layer of one deck titanium in self aligned mode.
Recent years,, brought into use a kind of from the-silicide structural aimed at along with the raising of the integrated level of semiconductor device and size compression.Wherein, in MOS transistor, on the surface in silicon gate electrode and source drain district, form one deck silicide layer, thereby can reduce the resistance in gate electrode and source drain district.
Fig. 6 and Fig. 7 are the production technology sectional view in proper order for the MOS transistor with silicide structural;
At first, with reference to figure 6 (a), we can see, when form a polygate electrodes 3 on P-type silicon chip 1 after, and gate electrode 3 has an interlayer gate oxide film 2, then uses CVD technology and comes deposition oxide film 4 on whole area.
Then, thus this oxide 4 is carried out anisotropic etching forms oxide thin sidewalls 5 as shown in Fig. 6 (b) on the side of polygate electrodes 3.In addition, after ion is implanted n-type impurity, activate processing, thereby form source electrode and drain diffusion regions 6 as shown in Fig. 6 (c).
Then, make the top of source electrode and drain diffusion regions 6 and polygate electrodes 3 come out, sputter is carried out on whole surface, thus the titanium film 7 of deposition as shown in Fig. 7 (a).
Then, make at titanium film 7, react in source electrode and drain diffusion regions 6 and the silicon gate electrode 3, can form the silicide layer 8 of the titanium as shown in Fig. 7 (b) like this thereby heat-treat.
At last, use the mixed aqueous solution of ammonia and hydrogen peroxide that unreacted titanium layer 9 is carried out wet etching, thus on the surface region of source electrode and drain diffusion regions 6 and the top of silicon gate electrode 3 form silicide layer 8 from the-titanium aimed at.
Above-described be by on source electrode and drain diffusion regions and the top of gate electrode come the standard production technology of production MOS transistor with the silicide layer that forms titanium from-alignment so.Yet in the method, have a problem, the silicide of titanium is infiltrated on the oxide side walls 5 unconsciously, this can be directed at short circuit or electric leakage between drain diffusion regions and gate electrode.For head it off, the past has been tried out several method.
For example, in the open H8-55981 of Japanese unexamined patent as shown in Figure 8, disclose a kind of method of producing semiconductor device, wherein, after forming oxide side walls 5, come the n-type impurity of ion implantation such as phosphorus or arsenic from the direction of oblique letter head.Description according to past the method, because silicification reaction is suppressed on the oxidation film that comprises n-type impurity, thereby be difficult in the silicide of the titanium of growing on the oxide side walls 5, the feasible like this short circuit and the electric leakage that can prevent between source electrode and drain diffusion regions and gate electrode.
Equally, in Japanese unexamined patent publication H5-102074, as shown in Figure 9, disclose a kind of method of production MOS transistor, wherein on gate electrode sidewall, formed nitrogen film sidewall 15.According to the description of the method in past, because the silicification reaction on nitride film suppressed, thereby be difficult in the silicide of the titanium of growing on the oxide side walls 5, this makes and can prevent short circuit and electric leakage between source electrode and drain diffusion regions and the gate electrode.
In the method in the past shown in Fig. 8, has the effect of the silicification reaction that suppresses titanium really such as the n-type impurity of phosphorus or arsenic.Yet, true just as can be seen, promptly also on the top of n-type diffusion layer, form the silicide of titanium, so its effect not so desirable.
In addition, also have in such problem, promptly when when the direction of oblique arrow is gone into oxide side walls with n-type impurity value, this n-type impurity also can be introduced into source electrode and drain diffusion regions and gate electrode simultaneously.Owing to this reason, when people consider to form the PMOS device with P-type source electrode and drain electrode, can see that the dosage for the n-type impurity that can be used has certain limit.
Usually, it is with being approximately 1 to 5 * 10 that impurity is introduced pmos source and drain diffusion regions and gate electrode
15/ cm
-2The boron of magnitude or BF
2Carry out.Therefore, in order to guarantee that the formation of pmos source and drain diffusion regions is not impacted, be necessary with the dose limitation of the n-type impurity of implanted oxide side walls to the dosage that is about boron or boron fluoride 1/10 or still less.That is, be necessary its dose limitation approximately is being less than 1 * 10
14/ cm
-2To 5 * 10
14/ cm
-2This makes that the effect that obtains the inhibition silicification reaction is difficult more.
In the prior art, therefore, existence can't fully suppress the problem of silicification reaction.
In the example in the past shown in Fig. 9, on the gate electrode sidewall surface, form the nitride film sidewall.Yet, there is very strong chemical bond between the nitrogen of nitride film and the silicon owing to make, even therefore in silicification reaction, nitrogen does not play any positive role, thereby can't serve as the effect that suppresses silicification reaction.Therefore, in this art methods, there is a problem, promptly can't fully restrains silicification reaction.
An object of the present invention is to provide a kind of method of producing semiconductor device, thereby the silicide that can suppress titanium is sneaked into the dielectric film sidewall unconsciously, and also can prevent short circuit and electric leakage between source electrode and drain diffusion regions and gate electrode, the present invention also provides a kind of semiconductor device of making by the method.
To achieve these goals, the method according to production semiconductor device of the present invention comprises following steps:
1, on substrate, forms a gate electrode, have a gate insulating film between two parties betwixt;
2, deposition one deck dielectric film on the whole surface of substrate and on the gate electrode is implanted dielectric film with the nitrogen ion then at a certain angle;
Thereby 3, the etching dielectric film forms the insulative sidewall that comprises nitrogen on the sidewall of gate electrode;
4, impurity is introduced gate electrode and substrate, thereby formed source electrode and drain diffusion regions;
5, come out in surface gate electrode and source electrode and drain diffusion regions surface, on its whole surface, deposit titanium film, react thereby make between titanium film and gate electrode and source electrode and the drain diffusion regions; And
6, remove the non-reacted parts of titanium film, thereby on source electrode and drain diffusion regions and gate electrode, to form the silicide layer of titanium from the-mode of aiming at.
On the other hand, production method for semiconductor according to the present invention has following steps:
1, on silicon chip, forms silicon gate electrode, have gate insulating film therebetween;
2, deposition one deck dielectric film on the whole surface of silicon chip and silicon gate electrode is implanted dielectric film with the nitrogen ion then at a certain angle;
3, dielectric film is carried out anisotropic etching, thereby on the side of silicon gate electrode, form the insulative sidewall that comprises nitrogen;
4, impurity is introduced silicon gate and silicon chip, thereby formed source electrode and drain diffusion regions;
5, come out in silicon gate electrode surface and surface, source drain diffusion region, and on its whole surface deposition one deck titanium film, after this titanium film and silicon gate electrode and source electrode and drain diffusion interval are reacted by heat treatment; And
6, remove the non-reacted parts of titanium film, thereby on source electrode and drain diffusion regions and gate electrode, to form the silicide layer of titanium from the-mode of aiming at.
On the other hand, the method according to production semiconductor device of the present invention has following steps:
1, on substrate, forms a gate electrode, have a gate insulating film therebetween;
2, deposition one deck first dielectric film on the whole surface of substrate and on the gate electrode, etching first dielectric film then, thus on the side of gate electrode, form the first dielectric film sidewall;
3, impurity is introduced gate electrode and substrate, thereby formed source electrode and drain diffusion regions;
4, on whole surface the deposition one second dielectric film, then with nitrogen at a certain angle ion implant second dielectric film;
5, etching second dielectric film, thus the sidewall along first dielectric film forms one second insulative sidewall that includes nitrogen on the side surface of gate electrode;
6, come out in surface gate electrode and source electrode and leakage surface, diffusion region, deposition one deck titanium film makes between titanium film and gate electrode and source electrode and the drain diffusion regions by heat treatment to react then on its whole surface; And
7, remove the non-reacted parts of titanium film, thereby on source electrode and drain diffusion regions and gate electrode, to form the silicide layer of titanium from-alignment so.
In addition on the other hand, the method according to manufacturing semiconductor body of the present invention comprises following steps:
1, on silicon chip, forms a grid silicon electrode, have a gate insulating film in the middle of it;
2, depositing one deck first dielectric film on the whole surface of silicon chip and on the silicon gate electrode, then first dielectric film is carried out anisotropic etching, thereby on the side of silicon gate electrode, form first insulative sidewall;
3, impurity is introduced silicon gate electrode and silicon chip, thereby formed source electrode and drain diffusion regions;
4, deposition one deck second dielectric film on the whole surface thereon, then with nitrogen at a certain angle ion implant second dielectric film;
5, second dielectric film is carried out anisotropic etching, thereby described first insulative sidewall forms one second insulative sidewall that includes nitrogen in the upper edge, side of silicon gate electrode;
6, come out in silicon gate electrode surface and source electrode and drain diffusion regions surface, and on its whole surface, deposit a titanium film, titanium film and silicon gate electrode and source electrode and drain diffusion interval are reacted; And
7, remove the non-reacted parts of titanium film, thereby by using heat treatment on source electrode and drain diffusion regions and gate electrode, to form the silicide layer of one deck titanium from-alignment so.
The implant angle of nitrogen being implanted dielectric film is preferably in the scope of 40 to 50 degree.
Semiconductor of the present invention is to make according to above-mentioned production method.
According to the present invention, form a gate electrode and deposition one dielectric film on its whole surface.After this, at a certain angle nitrogen is implanted this dielectric film.Then, use anisotropic etching to come the etching dielectric film, thereby on the sidewall of gate electrode, form the dielectric film that contains nitrogen.Owing to this reason, when heat-treating, make and will react between titanium film, gate electrode and the source of covering whole surface and the drain diffusion regions, nitrogen is invaded and the contacted titanium film of dielectric film sidewall.Its result has suppressed the silicide of titanium and has sneaked into the dielectric film sidewall unconsciously, thereby can prevent short circuit and electric leakage between source electrode and drain diffusion regions and gate electrode.
Fig. 1 is the sectional view according to first embodiment of the method for manufacturing MOS transistor of the present invention;
Fig. 2 is the sectional view according to first embodiment of method of manufacturing MOS transistor of the present invention;
Fig. 3 is the sectional view according to second embodiment of the method for manufacturing MOS transistor of the present invention;
Fig. 4 is the sectional view according to second embodiment of the method for manufacturing MOS transistor of the present invention;
Fig. 5 is the sectional view according to second embodiment of the method for manufacturing MOS transistor of the present invention;
Fig. 6 is a sectional view of producing the standard production method of the MOS transistor with silicide structural;
Fig. 7 is a sectional view of producing the standard production method of the MOS transistor with silicide structural;
Fig. 8 is the sectional view of the method for production MOS transistor in the past;
Fig. 9 is the sectional view of the another kind of method of production MOS transistor in the past.
Embodiments of the invention are described below.Simultaneously with reference to corresponding accompanying drawing.Fig. 1 and Fig. 2 are the sectional view according to the main production step of the production MOS transistor of first embodiment of the invention.
At first, as shown in Fig. 1 (a), formation thickness is 150 to 300nm polygate electrodes 3 on P-type silicon chip 1, it has the thick middle gate oxide film (dielectric film) of 5-10nm, after this, use CVD technology or similar technology to come on its whole surface, to deposit 70 to the thick sull (dielectric film) 4 of 150nm.Then, implant nitrogen ion 51, thereby can give 1 * 10 in certain certain angle with 5 to 20KeV acceleration energy
15/ cm
-2Or bigger dosage.The scope of angle ion implant degree for from 40 spend to 50 the degree, and be preferably 45 the degree.When the acceleration energy that with 45 degree is angle usefulness 10KeV was implanted the nitrogen ion, the scope that enters was approximately 15nm, thereby guarantees only to implant oxidation film 4.
Then, oxidation film 4 is carried out anisotropic etching, thereby as shown in Fig. 1 (b), contain nitrogen oxide film sidewall 5 in the formation of the side of polygate electrodes 3.In addition, with 30 to the acceleration energy and 1 * 10 of 50KeV
15/ cm
-2To 5 * 10
15/ cm
2Dosage implant arsenic ion after, 950 to 1050 ℃ temperature, carry out the activation heat in 10 to 60 seconds and handle, thereby form n-type source electrode and the drain diffusion regions 6 shown in Fig. 1 (c).
Then, handle by fluoric-containing acid, the surface of source electrode and drain diffusion regions 6 and the top of silicon gate electrode 3 are exposed, use sputter, the thickness of deposition as shown in Fig. 2 (a) is 20 to 40nm titanium film 7 on its whole surface.Heat-treat then make titanium film 7 and source electrode and drain diffusion regions 6, and silicon gate electrode 3 between react, be 40 to arrive the silicide film 8 of the titanium of 80nm thereby form thickness as Fig. 2 (b) as shown in.
At last, for example, in the mixed solution of ammonia and hydrogen peroxide, immerse, thereby remove unreacted titanium film 9 by wet etching.Its result, as shown in Fig. 2 (c), the silicide layer 8 of titanium is formed on the top that reaches Si-gate 3 on the surf zone of source electrode and drain diffusion regions 6.
According to the present invention, after forming gate electrode 3, cover its whole surface with sull again, at a certain angle dielectric film is carried out the ion implantation of nitrogen.Then, this sull is carried out anisotropic etching, contain nitrogen oxide film sidewall 5 thereby on the side of gate electrode 3, form.Owing to this reason, when reacting between the titanium film 7 that uses heat treatment to make covering whole surface and gate electrode 3 and source electrode and the diffusion region 6, the titanium film 7 that the ammonia intrusion is contacted with oxidation film sidewall 5.Its result can suppress the silicide of titanium and sneak into sull sidewall 5, and can source electrode and drain diffusion layer 6 and gate electrode 3 between short circuit and electric leakage.
Also available nitride film replaces sull 4, and uses identical method to form nitrogenous oxide side walls.Equally in the case, as using the sull sidewall, also can obtain identical effect.
As mentioned above, an embodiment of semiconductor device of the present invention is included on the surface of silicon chip 1 insulated gate electrode film 2 is provided, forms the polysilicon film 3 with the gate insulating film 2 in the middle of on silicon chip 1, form insulative sidewall 5 at the silicide film 8 that forms titanium on the polysilicon film 3, around side 3 a of the silicide film 8 of insulated gate electrode film 2, polysilicon film 3 and titanium and be formed at source area on the silicon chip 1 and drain region 6 on form the silicide film 8 of titanium, and wherein include nitrogen 51 in the insulative sidewall 5.
Then, with reference to respective drawings second embodiment of the present invention is described.Fig. 3 is the sectional view of production according to the main production step of the MOS transistor of second embodiment of the invention to Fig. 5.
At first, shown in Fig. 3 (a), on P-type silicon chip 1, form 150 to the thick polygate electrodes 3 of 300nm, it has 5 to the thick middle oxidation film of grid 2 of 10nm, after this, come on its whole surface, to deposit 35 to thick first oxidation film (first dielectric film) 10 of 75nm with CVD technology or similar technology.Then, first oxidation film 10 is carried out multidirectional different in nature etching, thereby form the first oxide-film sidewall wall 11 on the side of polysilicon gate 3 as shown in Fig. 3 (b).
Then, thus implant arsenic ion with 30 to 50KeV acceleration energy and give 1 * 10
15/ cm
-2To 5 * 10
15/ cm
-2Dosage.After this, handle at 950 to 1050 ℃ of activation heats that carried out for 10 to 60 seconds, thus n-type source electrode and the drain diffusion regions 6 of formation as shown in Fig. 3 (c).
Then, use CVD method or similar approach on its whole surface, to deposit 35, and implant the nitrogen ion, thereby give 1 * 10 with 5 to 20KeV acceleration energy to thick second oxidation film (second dielectric film) 12 as shown in Fig. 4 (a) of 75nm
15/ cm
2A dosage.Implant angle be 40 spend to 50 the degree between, and be preferably 45 the degree.
When implanting the nitrogen ion with miter angle with the acceleration energy of 10Kev, deep scope is approximately 15nm, thereby can make implantation only enter second sull 12.
Then, second oxidation film 12 is carried out anisotropic etching, thereby on the side of polygate electrodes 3, form second oxide side walls 13 that contains nitrogen along the first oxidation film sidewall 11.
Then, by the processing of fluoric-containing acid, the surface of source electrode and drain diffusion regions 6 and the top surface of silicon gate electrode 3 are exposed, using and sputtering at the thickness that forms on its whole surface as Fig. 4 (c) shown in is 20 to arrive the titanium film 7 of 40nm.Heat-treating then, make to react between titanium film 7 and source electrode and drain diffusion regions 6 and the silicon gate electrode 3, is 40 to arrive the silicide layer 8 of the titanium of 80nm thereby form thickness as Fig. 5 (a) as shown in.
At last, in mixed solution, immerse, thereby can remove unreacted titanium film quarter by wet method such as ammonia and hydrogen peroxide.Its result, as shown in Fig. 5 (b), the silicide film 8 of titanium is formed on the top that reaches silicon gate electrode 3 on the surface region of source electrode and drain diffusion regions 6.
In this second bright embodiment, be that the activation heat that forms source electrode and drain diffusion regions handles owing to carried out purpose, then form the second nitrogenous oxidation film sidewall, thereby do not exist owing to activate the danger of the nitrogen outdiffusion caused, make the silicide that to strengthen suppressing titanium sneak into the effect of oxidation film sidewall thus.
As mentioned above, an insulated gate electrode film 2 that provides on the surface of silicon chip 1 is provided another embodiment of pass of the present invention conductor device, the polysilicon film with middle gate insulating film 23 that on substrate 1, forms, the silicide film 8 of the titanium that on polysilicon film 3, forms, around insulated gate electrode film 2, first insulative sidewall 11 that the side 3a of the silicide film 8 of polysilicon film 3 and titanium forms, and at the silicide film 8 that is formed at the titanium that forms on source area on the silicon chip 1 and the drain region 6, and wherein also form second insulative sidewall 13 to surround first insulative sidewall 11 and wherein to contain second insulative sidewall 13 of nitrogen.
According to the present invention, because behind deposition dielectric film on the whole surface, at a certain angle ion is implanted dielectric film, when using heat treatment to make to react between the titanium film of covering whole surface and source electrode and the drain diffusion regions, thereby form the silicide layer of titanium, because the carrying out that has the nitrogen by implanted dielectric film sidewall to cause from the nitrogenize in the titanium film, thereby the silicide that can suppress titanium is sneaked in the dielectric film sidewall, therefore, can prevent short circuit and electric leakage between source electrode and drain diffusion regions and gate electrode.
Claims (7)
1, a kind of method of producing semiconductor device is characterized in that comprising following steps:
(1). form a gate electrode on substrate, it has the gate insulating film of a centre;
(2). depositing one deck dielectric film on the whole surface of substrate and on the described gate electrode, at a certain angle the nitrogen ion is implanted described dielectric film then;
(3). the described dielectric film of etching, thus on the side of described gate electrode, form an insulative sidewall that comprises nitrogen;
(4). impurity is introduced described gate electrode and described substrate, thereby form source electrode and drain diffusion regions;
(5). described surface gate electrode and source electrode and drain diffusion regions surface are exposed, and deposition one deck titanium film reacts thereby make between described titanium film and described gate electrode and source electrode and the drain diffusion regions on its whole surface; And
(6). remove the non-reacted parts of described titanium film, thereby reaching on the gate electrode to form the Titanium silicide layer on described source electrode and the drain diffusion regions from an aligning mode.
2, a kind of method of making semiconductor device is characterized in that comprising following steps:
(1). form one deck silicon gate electrode on silicon chip, it has the gate insulating film in the middle of;
(2). depositing one deck dielectric film on the whole surface of described substrate and on the described silicon gate electrode, at a certain angle the nitrogen ion is implanted described dielectric film then;
(3). described dielectric film is carried out anisotropic etching, thereby on the side of described silicon gate electrode, form nitrogenous insulative sidewall;
(4). impurity is introduced described silicon gate electrode and described silicon chip, thereby form source electrode and drain diffusion regions;
(5). described silicon gate electrode surface and source electrode and drain diffusion regions surface are exposed, and on its whole surface, deposit titanium film, after this make described titanium film, reach between described silicon gate electrode and source electrode and the drain diffusion regions and react by heat treatment; And
(6) remove the non-reacted parts of described titanium film, thereby forming the Titanium silicide layer in mode on described source electrode and the drain diffusion regions and on the gate electrode from an aligning.
3, a kind of method of making semiconductor device is characterized in that comprising following steps:
(1). form a gate electrode on substrate, it has the gate insulating film in the middle of;
(2). deposition first dielectric film on described substrate and the whole surface of described gate electrode, described first dielectric film of etching then, thus on the side of described gate electrode, form the first dielectric film sidewall;
(3). impurity is introduced described gate electrode and substrate, thereby form source electrode and drain diffusion regions;
(4). deposition second dielectric film on whole surface, at a certain angle the nitrogen ion is implanted described second dielectric film then;
(5). described second dielectric film of etching, thus on the side of described gate electrode, form the second nitrogenous insulative sidewall along the described first dielectric film sidewall;
(6). described surface gate electrode and source electrode and drain diffusion regions surface are exposed, and on its whole surface, deposit one deck titanium film, make between described titanium film and described gate electrode and source electrode and the drain diffusion regions by heat treatment then to react; And
(7). remove the non-reacted parts of described titanium film, thereby forming the Titanium silicide layer in oneself mode surely on described source electrode and the drain diffusion regions and on the described canopy electrode.
4. the manufacture method of a semiconductor device is characterized in that comprising following steps:
(1). on substrate, form silicon electrode, have a gate insulating film in the middle of it;
(2). deposition first dielectric film on the whole surface of described silicon chip and described silicon gate electrode, carry out anisotropic etching to described first dielectric film then, thereby form first insulative sidewall on the side of described silicon gate electrode;
(3). impurity is introduced described gate electrode and silicon chip, thereby form source electrode and drain diffusion regions;
(4). deposition second dielectric film on its whole surface, ion is implanted described second dielectric film at a certain angle then;
(5). described second dielectric film is carried out anisotropic etching, thereby on the side of described silicon gate electrode, form the second nitrogenous insulative sidewall along the described first dielectric film sidewall;
(6). described surface gate electrode and source electrode and drain diffusion regions surface are exposed, and on its whole surface, deposit one deck titanium film, make between described titanium film and described gate electrode and source electrode and the drain diffusion regions by heat treatment then to react; And
(7). remove the non-reacted parts of described titanium film, thereby forming the Titanium silicide layer in mode on described source electrode and the drain diffusion regions and on the described gate electrode from an aligning.
5, semiconductor making method according to claim 1 is characterized in that being used for the implant angle that the nitrogen ion is implanted described dielectric film is spent between 50 degree 40.
6, a kind of semiconductor device is characterized in that comprising:
The insulated gate electrode film that on the silicon chip surface, forms;
The polysilicon membrane that on described silicon chip, forms with middle gate insulating film;
The Titanium silicide film that on described polysilicon film, forms;
The insulative sidewall that forms around the side of the silicide film of described insulated gate electrode film, described polysilicon film and described titanium; And
Be formed at the Titanium silicide film that forms respectively on source area on the described silicon chip and the drain region;
And contain nitrogen in the wherein said insulative sidewall.
7, a kind of semiconductor device is characterized in that comprising:
The insulated gate electrode film that on the surface of silicon chip, forms;
The polysilicon film that on described silicon chip, forms with middle gate insulating film;
The Titanium silicide film that on described polysilicon film, forms;
Around described gate insulating film, film formed first insulative sidewall of described polysilicon film and described Titanium silicide; And
Be formed at the Titanium silicide film that forms respectively on described on-chip source area and the drain region respectively;
And wherein second insulative sidewall also be shaped as surround in described first insulative sidewall and described second insulative sidewall nitrogenous.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN98100144A CN1188982A (en) | 1997-01-20 | 1998-01-20 | Semiconductor device and method for producing same |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7093/97 | 1997-01-20 | ||
| CN98100144A CN1188982A (en) | 1997-01-20 | 1998-01-20 | Semiconductor device and method for producing same |
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|---|---|
| CN1188982A true CN1188982A (en) | 1998-07-29 |
Family
ID=5215832
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|---|---|---|---|
| CN98100144A Pending CN1188982A (en) | 1997-01-20 | 1998-01-20 | Semiconductor device and method for producing same |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6919606B2 (en) | 2000-12-26 | 2005-07-19 | Kabushiki Kaisha Toshiba | Semiconductor device comprising an insulating mask formed on parts of a gate electrode and semiconductor layer crossing an active region |
| CN1303657C (en) * | 2003-12-29 | 2007-03-07 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing pMOS for titanium silicide preparing process window |
| CN1938812B (en) * | 2004-01-22 | 2010-11-03 | 艾克塞利斯技术公司 | Method of correction for wafer crystal cut error in semiconductor processing |
| CN101252086B (en) * | 2007-02-23 | 2011-04-13 | 富士通半导体股份有限公司 | Semiconductor device and method for manufacturing the same |
| WO2014005370A1 (en) * | 2012-07-03 | 2014-01-09 | 中国科学院微电子研究所 | Manufacturing method for semiconductor device |
| US8883584B2 (en) | 2012-07-03 | 2014-11-11 | Institute of Microelectronics, Chinese Academy of Sciences | Method of manufacturing semiconductor device with well etched spacer |
-
1998
- 1998-01-20 CN CN98100144A patent/CN1188982A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6919606B2 (en) | 2000-12-26 | 2005-07-19 | Kabushiki Kaisha Toshiba | Semiconductor device comprising an insulating mask formed on parts of a gate electrode and semiconductor layer crossing an active region |
| CN1303657C (en) * | 2003-12-29 | 2007-03-07 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing pMOS for titanium silicide preparing process window |
| CN1938812B (en) * | 2004-01-22 | 2010-11-03 | 艾克塞利斯技术公司 | Method of correction for wafer crystal cut error in semiconductor processing |
| CN101252086B (en) * | 2007-02-23 | 2011-04-13 | 富士通半导体股份有限公司 | Semiconductor device and method for manufacturing the same |
| WO2014005370A1 (en) * | 2012-07-03 | 2014-01-09 | 中国科学院微电子研究所 | Manufacturing method for semiconductor device |
| US8883584B2 (en) | 2012-07-03 | 2014-11-11 | Institute of Microelectronics, Chinese Academy of Sciences | Method of manufacturing semiconductor device with well etched spacer |
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