CN118475173A

CN118475173A - Display panel, preparation method thereof and display device

Info

Publication number: CN118475173A
Application number: CN202310125084.0A
Authority: CN
Inventors: 陈登云; 王纯阳; 宋尊庆; 屈财玉; 张慧娟; 刘政
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2023-02-07
Filing date: 2023-02-07
Publication date: 2024-08-09

Abstract

The application provides a display panel, a preparation method thereof and a display device. The display panel includes: a substrate; an anode layer located on one side of the substrate; the pixel defining layer is positioned on one side of the anode layer, which is far away from the substrate, and forms a pixel area and a non-pixel area, wherein the pixel area exposes a partial area of the anode layer; the light-emitting layer is positioned on one side of the exposed anode layer, which is far away from the substrate, and comprises a light-emitting material layer and a light-emitting functional layer, wherein the light-emitting material layer and the light-emitting functional layer are disconnected in a non-pixel area; the cathode layer is positioned on one side of the light-emitting layer, which is far away from the substrate, and a first distance and a second distance are arranged between the cathode layer and the substrate, wherein the first distance is smaller than the second distance, the first distance is the distance from the surface of the cathode layer, which is far away from the substrate, to the substrate in the non-pixel area, and the second distance is the distance from the surface of the cathode layer, which is far away from the substrate, to the substrate in the pixel area. The technical scheme of the application can avoid crosstalk between adjacent sub-pixels.

Description

Display panel, preparation method thereof and display device

Technical Field

The present application relates to display technologies, and in particular, to a display panel, a method for manufacturing the display panel, and a display device.

Background

In OLED (Organic Light-Emitting Diode) display technology, as display resolution increases, the distance between sub-pixels is getting closer, and under the condition of closer distance, crosstalk (cross talk) problem is easily generated between different sub-pixels.

Disclosure of Invention

The embodiment of the application provides a display panel, a preparation method thereof and a display device, which are used for solving the problems of the related technology, and the technical scheme is as follows:

in a first aspect, an embodiment of the present application provides a display panel, including:

A substrate;

An anode layer located on one side of the substrate;

The pixel defining layer is positioned on one side of the anode layer, which is far away from the substrate, and forms a pixel area and a non-pixel area, wherein the pixel area exposes a partial area of the anode layer;

The light-emitting layer is positioned on one side of the exposed anode layer, which is far away from the substrate, and comprises a light-emitting material layer and a light-emitting functional layer, wherein the light-emitting material layer and the light-emitting functional layer are disconnected in a non-pixel area;

the cathode layer is positioned on one side of the light-emitting layer, which is far away from the substrate, and a first distance and a second distance are arranged between the cathode layer and the substrate, wherein the first distance is smaller than the second distance, the first distance is the distance from the surface of the cathode layer, which is far away from the substrate, to the substrate in the non-pixel area, and the second distance is the distance from the surface of the cathode layer, which is far away from the substrate, to the substrate in the pixel area.

In a second aspect, an embodiment of the present application provides a display panel, including:

A substrate;

An anode layer located on one side of the substrate;

The light-emitting layer is positioned in the pixel area and the non-pixel area, and covers part of the area of the anode layer in the pixel area, and comprises a light-emitting material layer and a light-emitting functional layer;

a separation layer located on a side of the pixel defining layer away from the substrate;

The separation layer is provided with a plurality of separation units, and the separation units are of undercut structures and are used for disconnecting the luminous functional layer.

In a third aspect, an embodiment of the present application provides a method for manufacturing a display panel, which may be used to manufacture the display panel provided in the first aspect of the embodiment of the present application, where the method includes:

forming an anode layer on one side of a substrate;

forming a pixel defining layer on one side of the anode layer, so that the pixel defining layer forms a pixel region and a non-pixel region; the pixel region exposes a partial region of the anode layer;

forming a light emitting function layer in the pixel region and the non-pixel region;

Removing the part of the luminous functional layer, which is positioned in the non-pixel area, by utilizing laser so as to disconnect the luminous functional layer in the non-pixel area;

Forming a cathode layer on one side of the light-emitting functional layer, which is not removed in the pixel region, away from the substrate and the non-pixel region, so that a first distance between the cathode layer and the substrate is smaller than a second distance; the first distance is the distance from the surface of the cathode layer on the side of the non-pixel region away from the substrate to the substrate, and the second distance is the distance from the surface of the cathode layer on the side of the pixel region away from the substrate to the substrate.

In a fourth aspect, an embodiment of the present application provides a method for manufacturing a display panel, which may be used to manufacture the display panel provided in the second aspect of the embodiment of the present application, where the method includes:

forming an anode layer on one side of a substrate;

Forming a plurality of partition units with undercut structures on one side of the pixel defining layer away from the substrate, forming a partition layer based on the plurality of partition units;

Forming a light emitting functional layer having a disconnection portion on a side of the exposed anode layer away from the substrate and a side of the separation layer away from the substrate;

a cathode layer is formed on a side of the light-emitting functional layer remote from the substrate.

In a fifth aspect, an embodiment of the present application provides a display apparatus, including: the display panel provided in the first aspect of the embodiment of the application or the display panel provided in the second aspect of the embodiment of the application.

The advantages or beneficial effects in the technical scheme at least comprise:

According to the technical scheme, the transverse flow of electrons or holes between two adjacent sub-pixels can be blocked, and when a certain sub-pixel is lighted, the adjacent sub-pixel is not lighted, so that crosstalk (such as color mixing) between the adjacent sub-pixels is not generated, and the display effect can be improved.

The foregoing summary is for the purpose of the specification only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present application will become apparent by reference to the drawings and the following detailed description.

Drawings

In the drawings, the same reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily drawn to scale. It is appreciated that these drawings depict only some embodiments according to the disclosure and are not therefore to be considered limiting of its scope.

Fig. 1 is a schematic cross-sectional view of a first display panel according to an embodiment of the present application;

FIG. 2 is a schematic cross-sectional view of a second substrate according to an embodiment of the present application;

FIG. 3 is a schematic cross-sectional view of a second display panel according to an embodiment of the present application;

FIG. 4 is a schematic cross-sectional view of a third display panel according to an embodiment of the present application;

FIG. 5 is a schematic cross-sectional view of a fourth display panel according to an embodiment of the present application;

FIG. 6 is a schematic cross-sectional view of a fifth display panel according to an embodiment of the present application;

fig. 7 is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the present application;

FIG. 8 is a schematic diagram of a sacrificial layer according to an embodiment of the present application;

fig. 9 to 13 are schematic views of the preparation of a sacrificial layer according to an embodiment of the present application;

FIG. 14 is a schematic diagram of laser front scanning in an embodiment of the present application;

FIG. 15 is a schematic diagram of laser backside scanning in accordance with an embodiment of the present application;

FIG. 16 is a cross-sectional microscopic view of a first display panel according to an embodiment of the present application;

FIG. 17 is a schematic flow chart of another method for manufacturing a display panel according to an embodiment of the present application;

FIG. 18 is a schematic diagram of the micro-topography of an undercut structure in an embodiment of the present application.

Detailed Description

Hereinafter, only certain exemplary embodiments are briefly described. As will be recognized by those of skill in the pertinent art, the described embodiments may be modified in various different ways without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.

The present inventors have found in the study that, in general, an OLED display panel includes a bottom-up anode layer, a light-emitting functional layer, a cathode layer, and other film structures, where the light-emitting functional layer includes a hole injection layer, a hole transport layer, and other film layers, when one subpixel is excited to light, a part of holes injected from the anode layer reach a monitored subpixel through the hole transport layer, that is, parasitic current generated in the hole transport layer causes the monitored subpixel to be excited to light, thereby causing color mixing between adjacent subpixels and deteriorating the overall display effect.

Aiming at the problems, the application provides a technical scheme which can cut off the connection of adjacent sub-pixels on the light-emitting functional layer so as to avoid color mixing caused by hole transmission of the light-emitting functional layer.

The following describes the technical scheme of the present application and how the technical scheme of the present application solves the above technical problems in detail with specific embodiments.

Referring to fig. 1, an embodiment of the present application provides a display panel 100 including: a substrate, an anode layer 120, a pixel defining layer (Pixel Definition Layer, PDL) 130, a light emitting layer, and a cathode layer 150. Wherein the anode layer 120 may be located at one side of the substrate; the pixel defining layer 130 may be located at a side of the anode layer 120 away from the substrate, the pixel defining layer 130 forming a pixel region and a non-pixel region, the pixel region may expose a partial region of the anode layer 120; a light emitting layer, which may be located at a side of the exposed anode layer 120 away from the substrate, may include a light emitting material layer 141 and a light emitting functional layer 142, the light emitting material layer 141 and the light emitting functional layer 142 being disconnected in a non-pixel region; the cathode layer 150 may be located at a side of the light emitting layer away from the substrate, and the cathode layer 150 and the substrate may have a first distance and a second distance therebetween, the first distance may be less than the second distance, the first distance may be a distance from a surface of the cathode layer 150 at a side of the non-pixel region away from the substrate to the substrate, the second distance may be a distance from a surface of the cathode layer 150 at a side of the pixel region away from the substrate to the substrate, and the first distance and the second distance may be distances in a vertical direction as shown in fig. 1.

In one example, referring to fig. 1, the substrates may include a first substrate 111 and a second substrate 112, the second substrate 112 may be located at one side of the first substrate 111, and the anode layer 120 may be located at one side of the second substrate 112 remote from the first substrate 111. In another example, the substrate may include the first substrate 111 or the second substrate 112, and the anode layer 120 may be located at one side of the first substrate 111 or one side of the second substrate 112.

The material of the first substrate 111 may be a rigid material such as glass, quartz, or the like, and the second substrate 112 may be a single-layer structure or a stacked-layer structure. When the second substrate 112 is of a single-layer structure, the material of the second substrate 112 may be a flexible material such as PI (Polyimide), PDMS (Polydimethylsiloxane). When the second substrate 112 has a stacked structure, the second substrate 112 may be formed by alternately arranging flexible material layers and inorganic material layers (which may serve as barrier layers).

Referring to fig. 1, the anode layer 120 may include a plurality of anode cells, each corresponding to one sub-pixel. The anode layer 120 may have a single-layer structure or a stacked structure, and when the anode layer 120 has a single-layer structure, the material of the anode layer 120 may be ITO (indium tin oxide), and when the anode layer 120 has a stacked structure, the anode layer 120 may have a stacked structure of ITO/Ag/ITO (indium tin oxide/silver/indium tin oxide), and the structure and material of the anode layer 120 are not limited in the embodiment of the present application.

The pixel defining layer 130 includes a plurality of opening regions, each of which may be a pixel region of one sub-pixel, each of which may expose a partial region of one anode unit, and the light emitting layer may be disposed in the pixel region and contact the exposed anode unit. The region between two adjacent pixel regions may be regarded as a non-pixel region.

In the light emitting layer, the light emitting material layer 141 may be distributed in each pixel region, the light emitting material layer 141 of each pixel region includes a light emitting material of one color, and may form a sub-pixel of one color, and the light emitting material layer 141 of each pixel region may form sub-pixels of a plurality of colors, such as a red sub-pixel (a sub-pixel capable of emitting red light), a green sub-pixel (a sub-pixel capable of emitting green light), and a blue sub-pixel (a sub-pixel capable of emitting blue light).

In the light emitting layer, the light emitting functional layer 142 may include at least one film layer of an electron injection layer (Electron Inject Layer, EIL), an electron transport layer (Electron Transport Layer, ETL), an electron blocking layer (Electron Blocking Layer, EBL), a hole injection layer (Hole Inject Layer, HIL), a hole transport layer (Hole Transport Layer, HTL), and a hole blocking layer (Hole Blocking Layer, HBL) for improving the performance of the light emitting layer. The above-mentioned film layers included in the light emitting functional layer 142 may be located at both sides of the light emitting material layer 141, wherein the electron injection layer, the electron transport layer, and the hole blocking layer may be located between the light emitting material layer 141 and the cathode layer 150, the hole blocking layer, the electron transport layer, and the electron injection layer may be sequentially disposed in a direction from the light emitting material layer 141 to the cathode layer 150, the hole injection layer, the hole transport layer, and the electron blocking layer may be located between the light emitting material layer 142 and the anode layer 120, and the electron blocking layer, the hole transport layer, and the hole injection layer may be sequentially disposed in a direction from the light emitting material layer 142 to the anode layer 120. The display panel 100 may further include some film layers that may improve the light transmission effect, such as a light extraction layer, which may be located on a side of the cathode layer 150 away from the substrate.

In the display panel 100 provided by the embodiment of the application, the light-emitting functional layer 142 is disconnected in the non-pixel area, so that the light-emitting functional layers 142 of two adjacent sub-pixels are disconnected, and the lateral flow of electrons or holes can be prevented, and when a certain sub-pixel is lighted, the adjacent sub-pixel is not lighted, so that crosstalk (such as color mixing) between the adjacent sub-pixels is not generated, and the display effect can be improved.

In an alternative implementation, as shown in fig. 2, the display panel provided in the embodiment of the present application may further include a heat absorbing layer 160, where the heat absorbing layer 160 may be located between the cathode layer 150 and the pixel defining layer 130 in the non-pixel area, and the heat absorbing layer 160 may absorb energy of laser during the preparation stage, so as to vaporize the light emitting functional layer in the non-pixel area, so as to achieve the purpose of removing the light emitting functional layer in the non-pixel area, and the specific principle thereof will be further described in the following embodiments.

In an alternative embodiment, the cathode layer 150 and the heat sink layer 160 may be connected, in which case the heat sink layer 160 may function as an auxiliary electrode.

The material of the heat absorbing layer 160 may include metal, and suitable metal may be selected according to the type of laser used in the preparation stage to prepare the heat absorbing layer 160, for example, when the laser used is ultraviolet laser, the material of the heat absorbing layer 160 may be Cu (copper), and the absorption rate of Cu to ultraviolet laser is 70% -80%, so that the absorption effect is better.

In an alternative implementation, as shown in fig. 3 and fig. 4, the display panel 100 provided by the embodiment of the present application may further include: a driving circuit layer and a heat insulating layer 180. Wherein the driving circuit layer may be located between the substrate and the anode layer 120, the driving circuit layer may include a plurality of transistor structures, for example, thin film transistors, such as the structures in the dashed boxes in fig. 3 and 4, only two transistor structures T1 and T2 being shown in fig. 3 and 4 as an example; the insulating layer 180 may be located between the substrate and the driving circuit layer, and the insulating layer 180 may include a plurality of insulating units, only two of which are shown in fig. 3 and 4 as an example.

The first orthographic projection of the channel region of the transistor structure is within the range of the second orthographic projection of a corresponding one of the heat insulation units, the first orthographic projection of the channel region being the orthographic projection of the channel region on the substrate, and the second orthographic projection of the heat insulation unit being the orthographic projection of the heat insulation unit on the substrate. In the example of fig. 3, the transistor structure T1 is projected in front of the substrate as a whole, the insulating unit on the left is within the range of the front projection of the substrate, so that the first front projection of the channel region of the transistor structure T1 is ensured to be within the second front projection range of the insulating unit on the left, the transistor structure T2 is projected in front of the substrate as a whole, and the insulating unit on the right is within the range of the front projection of the substrate, so that the first front projection of the channel region of the transistor structure T2 is ensured to be within the second front projection range of the insulating unit on the right.

The first orthographic projection of the channel region of the transistor structure is in the range of the second orthographic projection of a corresponding heat insulation unit, so that the heat insulation unit can shield the channel region of the transistor structure in the vertical direction shown in fig. 3, and in the preparation stage, if a laser source is arranged on the other side of the substrate (i.e. the side where the driving circuit layer is not arranged), the heat insulation unit can protect the transistor structure when the display panel is irradiated upwards along the vertical direction shown in fig. 3 and 4, so that the heat of the laser cannot be transmitted to the channel region of the transistor structure, the influence of the heat of the laser on the threshold voltage of the transistor structure can be avoided, and the influence on the display effect can be avoided.

The heat insulating layer 180 may have a structure of nano-micropores, and the nano-micropores may be filled with a light shielding agent to achieve the effect of shielding heat radiation, and the specific type of the light shielding agent may be determined according to the type of the laser to be shielded, for example, when the laser to be shielded is infrared laser, the light shielding agent filled in the nano-micropores may be an infrared light shielding agent. The material of the nanopore may be SiO ₂ (silica).

Referring to the examples of fig. 1 and 2, the display panel may also include a driving circuit layer without providing a heat insulating layer.

In one embodiment, referring to the example of fig. 1 to 4, the display panel 100 may further include a Buffer layer (Buffer) 190, the Buffer layer 190 may be located between the substrate and the driving circuit layer, and, referring to the example of fig. 3, in case the display panel 100 includes the heat insulating layer 180, the heat insulating layer 180 may be located between the substrate and the Buffer layer 190, and the Buffer layer 190 may cover each heat insulating unit in the heat insulating layer 180.

In one embodiment, referring to the examples of fig. 1 to 4, the driving circuit layer may include: the active layer 171, the first gate insulating layer 172, the first gate layer 173, the second gate insulating layer 174, the second gate layer 175, the interlayer dielectric layer (INTERLAYER DIELECTRIC, ILD) 176, and the source and drain electrode layer 177, the first gate layer 173 may form a gate of each transistor structure, and the source and drain electrode layer 177 may form a source and a drain of each transistor structure.

The active layer 171 and the first gate insulating layer may be both located at a side of the buffer layer 190 away from the substrate, the first gate insulating layer 172 may cover the active layer 171, the first gate layer 173 and the second gate insulating layer 174 may be both located at a side of the first gate insulating layer 172 away from the substrate, the second gate insulating layer 174 may cover the first gate layer 173, the second gate layer 175 and the interlayer dielectric layer 176 may be both located at a side of the second gate insulating layer 174 away from the substrate, an orthographic projection of the second gate layer 175 at the substrate may coincide with an orthographic projection of at least a portion of the first gate layer 173 at the substrate, so that at least a portion of the second gate layer 175 and the first gate layer 173 may form a capacitor, the interlayer dielectric layer 176 may cover the second gate layer 175, the source drain electrode layer 177 may be located at a side of the interlayer dielectric layer 176 away from the substrate, and the source drain electrode layer 177 may be connected to the active layer 171 through a via hole.

In one embodiment, referring to the example of fig. 1 to 3, the display panel 100 may further include a planarization layer (Planarization Layer, PLN) layer 1100, the planarization layer 1100 may be located between the driving circuit layer and the pixel defining layer 130, and between the driving circuit layer and the anode layer 120, and the planarization layer 1100 may cover a partial region of the driving circuit layer, such as a partial region of the inter-layer dielectric layer 176 and the source drain electrode layer 177.

In one embodiment, referring to the examples of fig. 1 to 3, the display panel 100 may further include an encapsulation layer 1120, for example, a TFE (Thin-Film Encapsulation, thin film encapsulation technology) layer, and the encapsulation layer 1120 may be located at a side of the cathode layer 150 remote from the substrate.

Based on the same technical concept, referring to fig. 5 and 6, an embodiment of the present application further provides a display panel 500 including: a substrate, an anode layer 520, a pixel defining layer 530, a light emitting layer (not shown in fig. 5 and 6), and a separation layer 540. Wherein the anode layer 520 may be located at one side of the substrate; the pixel defining layer 530 may be located at a side of the anode layer 520 away from the substrate, the pixel defining layer 530 forming a pixel region and a non-pixel region, and the pixel region may expose a partial region of the anode layer 520; the light emitting layer may be located in a pixel region and a non-pixel region, a partial region of the anode layer 520 is covered in the pixel region, the light emitting layer may include a light emitting material layer 551 and a light emitting function layer 552, the light emitting material layer 551 may be located in the pixel region, and the light emitting function layer 552 may be located in the pixel region and the non-pixel region; the separation layer 540 may be located at a side of the pixel defining layer 530 away from the substrate, and the separation layer 540 may have a plurality of separation units, which may be undercut structures, and may be used to turn off the light emitting functional layer.

The spacer layer 540 may be a spacer (PS) and the undercut structure may be a structure having a bottom dimension less than a top dimension, such as the inverted trapezoidal structure shown in fig. 5 and 6 or other shaped structure.

In one example, referring to fig. 5 and 6, the substrate may include a first substrate 511 and a second substrate 512, the structures and materials of the first substrate 511 and the second substrate 512 may refer to the descriptions of the first substrate 111 and the second substrate 112, and the structures, materials, and the like of the anode layer 520, the pixel defining layer 530, and the light emitting layer may refer to the related descriptions of the anode layer 120, the pixel defining layer 130, and the light emitting layer, which are not repeated herein.

According to the display panel provided by the embodiment of the application, the separation unit is arranged, so that the light-emitting functional layers can be disconnected, and then the light-emitting functional layers of two adjacent sub-pixels are disconnected, the transverse flow of electrons or holes can be prevented, and when a certain sub-pixel is lighted, the adjacent sub-pixel is not lighted, so that crosstalk (such as color mixing) between the adjacent sub-pixels is not generated, and the display effect can be improved.

The pixel defining layer 530 may include a plurality of defining units, which may be portions between adjacent opening regions in the pixel defining layer 530, and the defining units may be non-undercut structures (as shown in fig. 5) or undercut structures (as shown in fig. 6), where the defining units may further disconnect the light emitting functional layers that are originally continuously distributed when the defining units are undercut structures, so as to enhance the effect of disconnection.

In an alternative embodiment, the light emitting functional layer 552 may include a first light emitting functional portion 5521 and a second light emitting functional portion 5522, the first light emitting functional portion 5521 may be located at a pixel region, for example, at a side of the exposed anode layer 520 remote from the substrate, the second light emitting functional portion 5522 may be located at a non-pixel region, for example, at a side of the separation layer 540 remote from the substrate, and the first light emitting functional portion 5521 may be separated from the second light emitting functional portion 5522, such that the first light emitting functional portion 5521 and the second light emitting functional portion 5522 may be disconnected.

In an alternative embodiment, the undercut structure (including the undercut structure of the separation layer 540 and/or the undercut structure of the pixel defining layer 530) is made of photoresist, and the undercut structure is formed by etching the photoresist during the preparation stage of the display panel, so that the process is simpler.

The display panel 500 may further include a cathode layer (not shown in fig. 5 and 6) that may be positioned on a side of the light emitting layer away from the substrate to cover the light emitting layer.

In one embodiment, the display panel 500 may further include a Buffer layer (Buffer) 560, and the Buffer layer 560 may be located between the substrate and the anode layer 520.

In one embodiment, the display panel 500 may further include a driving circuit layer, which may be located between the buffer layer 560 and the anode layer 520, and the driving circuit layer may include a plurality of transistor structures, such as thin film transistors, as shown in fig. 5 and 6 in the dashed line boxes, and only two transistor structures T1 and T2 are shown in fig. 5 and 6 as an example.

Referring to the examples of fig. 5 and 6, the driving circuit layer may include: the active layer 571, the first Gate insulating layer 572, the first Gate layer 573, the second Gate insulating layer 574, the second Gate layer 575, the interlayer dielectric layer (INTERLAYER DIELECTRIC, ILD) 576, and the source and drain electrode layer 577, the first Gate layer 573 may form a Gate of each transistor structure, and the source and drain electrode layer 577 may form a source S and a drain D of each transistor structure. The specific structures of the active layer 571, the first gate insulating layer 572, the first gate layer 573, the second gate insulating layer 574, the second gate layer 575, the interlayer dielectric layer 576 and the source drain electrode layer 577 can be referred to in fig. 5 and 6, and the description of the active layer 171, the first gate insulating layer 172, the first gate layer 173, the second gate insulating layer 174, the second gate layer 175, the interlayer dielectric layer 176 and the source drain electrode layer 177 described above will not be repeated here.

In one embodiment, referring to the example of fig. 5, the display panel 500 may further include a planarization layer 580, and the planarization layer 580 may be located between the driving circuit layer and the pixel defining layer 530 and between the driving circuit layer and the anode layer 520, and the planarization layer 580 may cover a partial region of the driving circuit layer, for example, a partial region of the inter-layer dielectric layer 576 and the source drain electrode layer 577.

In one embodiment, the display panel 500 may further include an encapsulation layer (not shown in fig. 5 and 6), such as a TFE layer, which may be located on a side of the cathode layer remote from the substrate.

Based on the same technical concept, the embodiment of the present application further provides a method for manufacturing a display panel, which may be used to manufacture the display panel 100 described above, as shown in fig. 7, and the method may include the following steps S701-S705:

s701, an anode layer is formed on one side of the substrate.

S702, forming a pixel defining layer on one side of the anode layer, so that the pixel defining layer forms a pixel region and a non-pixel region.

The pixel region may expose a partial region of the anode layer.

S703, a light emitting functional layer is formed in the pixel region and the non-pixel region.

The light emitting material layer may be formed in the pixel region.

S704, removing the portion of the light emitting functional layer located in the non-pixel region by laser light, and disconnecting the light emitting functional layer in the non-pixel region.

S705, forming a cathode layer on a side of the light emitting function layer, which is not removed in the pixel region, away from the substrate and the non-pixel region, such that a first distance between the cathode layer and the substrate is smaller than a second distance.

The first distance may be a distance from a surface of the cathode layer on a side of the non-pixel region away from the substrate to the substrate, and the second distance may be a distance from a surface of the cathode layer on a side of the pixel region away from the substrate to the substrate.

In an alternative embodiment, referring to fig. 3 and 4, in the above step S701, forming an anode layer on one side of a substrate may include: forming a heat insulation layer 180 having a plurality of heat insulation units at one side of a substrate; forming a driving circuit layer having a plurality of transistor structures on a side of the insulating layer 180 remote from the substrate such that a first orthographic projection of a channel region of each transistor structure is within a range of a second orthographic projection of a corresponding one of the insulating units; an anode layer 120 is formed on a side of the driving circuit layer remote from the substrate. Wherein the first orthographic projection of the channel region is an orthographic projection of the channel region on the substrate, and the second orthographic projection of the insulating unit is an orthographic projection of the insulating unit on the substrate.

In one example, referring to fig. 3 and 4, in preparing the insulating layer 180 and the driving circuit layer, the transistor structure of the driving circuit layer may be orthographic projected on the substrate within the range of orthographic projection of the corresponding insulating unit on the substrate.

In one example, each of the heat insulating units in the heat insulating layer 180 may have a structure of nano-micro holes, which may be filled with a light shielding agent to achieve the effect of shielding heat radiation, and the heat insulating units of this structure may be prepared in advance, and a plurality of heat insulating units prepared in advance may be disposed at one side of the substrate when the heat insulating layer 180 is formed, so that the heat insulating layer 180 may be formed.

In one example, referring to fig. 3 and 4, when a driving circuit layer including a plurality of transistor structures is formed on a side of the insulating layer 180 remote from the substrate, a buffer layer 190 is formed on a side of the insulating layer 180 remote from the substrate; forming an active layer 171 and a first gate insulating layer 172 on a side of the buffer layer 190 remote from the substrate such that the first gate insulating layer 172 covers the active layer 171; forming a first gate layer 173 and a second gate insulating layer 174 on one side of the first gate insulating layer 172 such that the second gate insulating layer 174 covers the first gate layer 173, and such that the first gate layer 173 forms a gate of each transistor structure; forming a second gate layer 175 and an interlayer dielectric layer 176 on a side of the second gate insulating layer 174 away from the substrate, such that the interlayer dielectric layer 176 covers the second gate layer 175, and such that the orthographic projection of the second gate layer 175 on the substrate coincides with the orthographic projection of a portion of the first gate layer 173 on the substrate, thereby enabling the second gate layer 175 and a portion of the first gate layer 173 to form a capacitor; a source-drain electrode layer 177 is formed on a side of the interlayer dielectric layer 176 remote from the substrate, such that the source-drain electrode layer 177 forms the source and drain of each transistor structure. In another example, referring to fig. 1 and 2, a buffer layer 190 may be formed on one side of a substrate, and each of the film layers in the driving circuit layer may be formed on a side of the buffer layer 190 remote from the substrate.

In one example, referring to fig. 1 to 4, when the anode layer 120 is formed on a side of the driving circuit layer remote from the substrate, the anode layer 120 may be formed on a side of the source-drain electrode layer 177 remote from the substrate, so that the drains in the anode layer 120 and the source-drain electrode layer 177 are connected.

Referring to the example of fig. 1 to 4, a planarization layer 1100 may be further formed on a side of the interlayer dielectric layer 176 remote from the substrate such that the planarization layer 1100 exposes a partial region of the source drain electrode layer 177, and further an anode layer 120 having a plurality of anode units may be formed on a side of the source drain electrode layer 177 remote from the substrate and a side of the planarization layer 1100 remote from the substrate such that each anode unit covers one drain electrode portion exposed and a partial region of the planarization layer 1100.

In the step S702, when the pixel defining layer 130 is formed on one side of the anode layer 120, a plurality of opening regions may be formed in the pixel defining layer 130, so that each opening region exposes a partial region of one anode unit, the region where each opening region is located may be used as a pixel region of one sub-pixel, and a light emitting layer may be formed in the pixel region, so that the light emitting layer contacts the exposed anode unit. The region between two adjacent pixel regions may be a non-pixel region, and the light emitting function layer 142 may be formed in the non-pixel region.

In an alternative embodiment, as shown in fig. 8, in the above step S703, forming a light emitting function layer in a pixel region and a non-pixel region may include: forming a sacrificial layer 801 in a non-pixel region; the light emitting function layer 142 is formed on the side of the sacrifice layer 801 away from the substrate and the pixel region, so that the light emitting function layer 142 is connected to the sacrifice layer 801. Correspondingly, in the step S704, removing the portion of the light emitting functional layer located in the non-pixel region by using the laser may include: the sacrificial layer 801 is scanned with laser light, and the sacrificial layer and the portion of the light-emitting functional layer 142 located in the non-pixel region are removed based on the laser energy absorbed by the sacrificial layer and the force of the laser light on the sacrificial layer.

In one example, the principle of forming the sacrificial layer 801 in the non-pixel region may be as shown in fig. 9 to 13. Referring to fig. 9, a Photoresist (PR) 802 may be formed in a pixel region and a non-pixel region where the pixel defining layer 130 is formed, and the photoresist may expose a surface of the anode layer 120 in the pixel region; referring to fig. 10, a Mask (Mask) may be placed on a side of the photoresist 802 away from the substrate, such that the Mask covers the photoresist in the pixel region, exposing the photoresist in the non-pixel region, further removing the photoresist 802 in the non-pixel region through exposure, development, and other processes, and retaining the photoresist in the pixel region, as shown in fig. 11; referring to fig. 12, a sacrificial layer 801 may be formed on a side of the photoresist 802 away from the substrate and a side of the pixel defining layer 130 away from the substrate, and the sacrificial layer 801 may be located in a pixel region and a non-pixel region, and further the sacrificial layer 801 in the pixel region may be etched to remove the sacrificial layer 801 in the pixel region, leaving the sacrificial layer in the non-pixel region as shown in fig. 13. And photoresist in the pixel region can be removed to form a light-emitting layer, a cathode layer, a packaging layer and the like.

The above arrangement of the photoresist 802 can play a role in protecting the anode layer 120, specifically, if no photoresist exists in the process of etching the sacrificial layer 801 in the pixel region, the sacrificial layer 801 can be directly contacted with the anode layer 120, over etching can possibly occur on the sacrificial layer 801, the anode layer 120 can be damaged during over etching, and the light emitting effect is affected.

The material of the sacrificial layer 802 may be metal, and in a practical scenario the material of the sacrificial layer may be selected according to the type of laser, for example Mo (molybdenum), ti (titanium) or Al (aluminum) may be selected for infrared lasers to form the sacrificial layer. As shown in fig. 13, the thickness of the sacrificial layer 702 remaining in the non-pixel region may be 10 to 100nm (nanometers), for example, 30nm, and the sacrificial layer is more easily removed under laser irradiation.

The arrangement of the sacrificial layer can solve the problem that the light-emitting functional layer cannot be directly removed by laser in certain wavelength ranges. The light-emitting functional layer generally absorbs only laser light in a specific wavelength range, for example, only laser light in a range of 300-380nm, which belongs to the wavelength range of ultraviolet laser light, and when PI material is included in the substrate, since the wavelength range in which PI can absorb is in the wavelength range of ultraviolet laser light, i.e., PI can absorb part of the ultraviolet laser light, the PI material is easily damaged by using ultraviolet laser light although the light-emitting functional layer can be removed, and thus laser light in other wavelength ranges, for example, infrared laser light, may be used in some practical situations.

Taking infrared laser as an example, the luminous functional layer can not absorb the infrared laser, so that the sacrificial layer capable of absorbing the infrared laser can be arranged, on one hand, the energy of the high-power infrared laser can be absorbed by the sacrificial layer, the temperature of the sacrificial layer is increased, the sacrificial layer is melted or gasified, when the temperature of the sacrificial layer is increased, the temperature of the luminous functional layer is also increased, therefore, the luminous functional layer can be melted or gasified, on the other hand, the infrared laser can apply acting force to the sacrificial layer, the acting force can remove the sacrificial layer, and the luminous functional layer can be removed while the sacrificial layer is removed due to the fact that the luminous functional layer is contacted with the sacrificial layer, and the luminous functional layer contacted with the sacrificial layer can be removed under the combined action of the two aspects.

In another alternative embodiment, as shown in fig. 3, in the above step S703, forming a light emitting function layer in a pixel region and a non-pixel region may include: forming a heat absorbing layer 160 in the non-pixel region, wherein the heat absorbing layer 160 can be used for absorbing the energy of the laser; the light emitting function layer 142 is formed at a side of the heat sink layer 160 remote from the substrate and the pixel region. The process of preparing the heat sink layer 160 may be the process of preparing the sacrificial layer shown in fig. 9 to 13, i.e., the heat sink layer 160 may be formed on the basis of photoresist.

Correspondingly, in the step S704, the portion of the light emitting functional layer located in the non-pixel region is removed by laser, including: the heat sink layer 160 is scanned with laser light, and a portion of the light emitting functional layer 142 located in the non-pixel region is removed based on the laser energy absorbed by the heat sink layer 160. For example, the energy of the laser can raise the temperature of the heat absorption layer, the temperature of the light emitting functional layer can also raise, and then the light emitting functional layer can be melted or vaporized, so that the effect of removing the light emitting functional layer in the non-pixel area can be realized, particles (particles) can not be generated, the heat absorption layer can be reserved while the light emitting functional layer in the non-pixel area is removed, and the finally prepared display panel can comprise the heat absorption layer.

The laser used in the embodiment of the application can be infrared laser or ultraviolet laser, for example, when the sacrificial layer needs to be scanned, the infrared laser can be used, and when the heat absorption layer needs to be scanned, the infrared laser can be used, and the ultraviolet laser can be used.

The laser scanning in the embodiments of the present application may be front scanning or back scanning. In the front scanning manner, the laser source for emitting laser may be disposed on the side, away from the substrate, of the pixel defining layer 130 shown in fig. 14, that is, the light emitting side, and the front scanning may be an overall scanning, as shown in fig. 14, in which a mask may be disposed to block the pixel region, and the front scanning may also be a partial scanning, and may be directly positioned to the non-pixel region for scanning; in the back scanning mode, the laser source may be disposed on the other side of the substrate (the side where the film layers such as the anode layer 120 and the light emitting layer are not disposed) as shown in fig. 15, the back scanning may be an integral scanning, the heat insulating layer 180 as shown in fig. 15 may be disposed to block the channel region of the transistor, the mask plate may be disposed to block the pixel region during the integral scanning, the back scanning may be a partial scanning, the scanning may be performed by directly positioning to the non-pixel region, and the heat insulating layer 180 or the mask plate may not be disposed during the partial scanning.

The specific mode of laser scanning can be determined according to the wavelength range of laser, for example, when ultraviolet laser is used, a front scanning mode is needed to reduce damage to PI materials, and when infrared laser is used, a front scanning mode or a back scanning mode can be used.

In an alternative embodiment, where a sacrificial layer is provided, the laser may be an infrared laser, the laser scanning being either front-side scanning or back-side scanning.

In another alternative embodiment, in the case of providing the heat absorbing layer, the laser may be an infrared laser or an ultraviolet laser, and the scanning manner of the infrared laser may be front scanning or back scanning, and the scanning manner of the ultraviolet laser may be front scanning.

In order to avoid the occurrence of the phenomenon, referring to fig. 14 and fig. 15, the front surface of the display panel may be downward (Facedown), that is, the light-emitting functional layer 142 is closer to the ground, and the substrate is further away from the ground, so that the particles generated during the laser scanning process may fall down freely, thereby avoiding the occurrence of the display failure caused by falling down in the display area. After the light-emitting functional layer was removed by laser, the microscopic morphology is shown in fig. 16.

Referring to the examples of fig. 1 to 4, the above-described preparation method 600 may further include: an encapsulation layer 1130 is formed on the side of the cathode layer 150 remote from the substrate to prevent ingress of water and oxygen.

Based on the same technical concept, the embodiment of the present application further provides a method for manufacturing a display panel, which may be used to manufacture the display panel 500 described above, as shown in fig. 17, and the method may include the following steps S1701-S1705:

s1701, an anode layer is formed on one side of the substrate.

At S1702, a pixel defining layer is formed on one side of the anode layer, such that the pixel defining layer forms a pixel region and a non-pixel region.

The pixel region may expose a partial region of the anode layer;

s1703, a plurality of partition units having an undercut structure are formed on a side of the pixel defining layer away from the substrate, and a partition layer is formed based on the plurality of partition units.

S1704, forming a light emitting function layer having a disconnected portion on a side of the exposed anode layer away from the substrate and a side of the separation layer away from the substrate.

For example, the first light emitting function portion may be formed on the exposed anode layer on the side away from the substrate, and the second light emitting function portion may be formed on the separator layer on the side away from the substrate, so that the first light emitting function portion is separated from the second light emitting function portion.

The embodiment of the application can also form a luminescent material layer in the pixel area.

S1705, a cathode layer is formed on the side of the light emitting functional layer away from the substrate.

In an alternative embodiment, referring to the example of fig. 5 and 6, in the above step S1701, forming an anode layer on one side of a substrate may include: a driving circuit layer having a plurality of transistor structures is formed on one side of the substrate 510, and an anode layer 520 is formed on the side of the driving circuit layer remote from the substrate. For example, the buffer layer 560 may be formed at one side of the substrate; forming an active layer 571 and a first gate insulating layer 572 on a side of the buffer layer 560 away from the substrate such that the first gate insulating layer 572 covers the active layer 571; forming a first Gate layer 573 and a second Gate insulating layer 574 on one side of the first Gate insulating layer 572, such that the second Gate insulating layer 574 covers the first Gate layer 573, and such that the first Gate layer 573 forms a Gate of each transistor structure; forming a second gate layer 575 and an interlayer dielectric layer 576 on a side of the second gate insulating layer 574 remote from the substrate, such that the interlayer dielectric layer 576 covers the second gate layer 575, such that a front projection of the second gate layer 575 on the substrate coincides with a front projection of a portion of the first gate layer 573 on the substrate, thereby enabling the second gate layer 575 and a portion of the first gate layer 573 to form a capacitance; a source-drain electrode layer 577 is formed on a side of the interlayer dielectric layer 576 remote from the substrate such that the source-drain electrode layer 577 forms the source and drain of each transistor structure.

In one example, when the anode layer 520 is formed on a side of the driving circuit layer away from the substrate, the anode layer 520 may be formed on a side of the source drain electrode layer 577 away from the substrate, so that the drains in the anode layer 520 and the source drain electrode layer 577 are connected.

Referring to the example of fig. 5 and 6, a planarization layer 580 may be further formed on a side of the interlayer dielectric layer 576 remote from the substrate such that the planarization layer 580 exposes a partial region of the source drain electrode layer 577, and further an anode layer 520 having a plurality of anode units may be formed on a side of the source drain electrode layer 577 remote from the substrate and a side of the planarization layer 580 remote from the substrate such that each anode unit covers one of the exposed drain electrode portion and a partial region of the planarization layer 580.

In the step S1702, when forming the pixel defining layer on one side of the anode layer, a plurality of opening regions may be formed in the pixel defining layer, so that each opening region exposes a partial region of one anode unit, and the region where each opening region is located may be used as a pixel region of one sub-pixel, and a light emitting layer may be formed in the pixel region, so that the light emitting layer contacts the exposed anode unit. The region between two adjacent pixel regions may be a non-pixel region, and a light emitting functional layer may be formed in the non-pixel region.

The separation unit formed in step S1703 may be a spacer, the undercut structure may be a structure with a bottom edge smaller than a top edge, for example, an inverted trapezoid structure shown in fig. 5 or a structure with other shapes, and when the light emitting functional layer is formed on the exposed surface of the inverted trapezoid, the light emitting functional layer is formed on the exposed surface of the inverted trapezoid due to the shorter bottom edge and longer top edge, and the connection between the top edge and the bottom edge is broken, so that the light emitting functional layer in the pixel area and the light emitting functional layer in the non-pixel area are separated, and further the light emitting functional layers in the two adjacent pixel areas are separated, thereby avoiding the lateral flow of electrons or holes.

The undercut structure (including the undercut structure of the spacer layer and/or the undercut structure of the pixel defining layer) may be made of photoresist, and in the above step S1703, the photoresist may be etched to form the undercut structure, so that the process is simpler. The undercut structure may be a single layer structure or a multi-layer structure.

In the above step S1702, a pixel defining layer having a plurality of defining units may be formed on one side of the anode layer, and the defining units may be portions between adjacent opening regions in the pixel defining layer, and referring to the example of fig. 6, the defining units may be undercut structures, which may further separate the originally continuously distributed light emitting functional layers to block the lateral flow of electrons or holes. The material defining the cell may be a photoresist. Fig. 18 shows a microscopic schematic view of the partition unit and the definition unit as an undercut structure, and EL is a light emitting layer in fig. 18.

In one example, the preparation method 1700 may further include: an encapsulation layer is formed on a side of the cathode layer remote from the substrate to prevent intrusion of water and oxygen.

Based on the same technical concept, the embodiment of the application also provides a display device, which can comprise any one of the display panels. The display device can be an OLED display device, and the product form of the display device can be any one of a display, a digital photo frame, a mobile phone or a tablet personal computer.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

In the description of this specification, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the description of the present specification, the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present application.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The term "and/or" as used herein includes all or any element and all combination of one or more of the associated listed items.

It should be understood that the steps, measures, schemes of the various operations, methods, flows that have been discussed in the present application may be alternated, altered, combined or deleted. Further, other steps, means, or steps in a process having various operations, methods, or procedures discussed herein may be alternated, altered, rearranged, disassembled, combined, or eliminated. Further, steps, measures, schemes in the prior art with various operations, methods, flows disclosed in the present application may also be alternated, altered, rearranged, decomposed, combined, or deleted.

The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that various changes and substitutions are possible within the scope of the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.

Claims

1. A display panel, comprising:

A substrate;

An anode layer located on one side of the substrate;

A pixel defining layer located at one side of the anode layer far from the substrate to form a pixel region and a non-pixel region, wherein the pixel region exposes a partial region of the anode layer;

The light-emitting layer is positioned on one side of the exposed anode layer, which is far away from the substrate, and comprises a light-emitting material layer and a light-emitting functional layer, wherein the light-emitting material layer and the light-emitting functional layer are disconnected in the non-pixel area;

The cathode layer is positioned on one side of the light-emitting layer, which is far away from the substrate, a first distance and a second distance are arranged between the cathode layer and the substrate, the first distance is smaller than the second distance, the first distance is the distance from the surface of the cathode layer, which is far away from the substrate, of the non-pixel area to the substrate, and the second distance is the distance from the surface of the cathode layer, which is far away from the substrate, of the pixel area to the substrate.

2. The display panel of claim 1, further comprising:

and a heat sink layer located between the cathode layer and the pixel defining layer in the non-pixel region.

3. The display panel of claim 2, wherein the cathode layer and the heat sink layer are connected, and wherein the material of the heat sink layer comprises a metal.

4. A display panel according to any one of claims 1-3, further comprising:

a drive circuit layer located between the substrate and the anode layer, comprising a plurality of transistor structures;

The heat insulation layer is positioned between the substrate and the driving circuit layer and comprises a plurality of heat insulation units;

the first orthographic projection of the channel region of the transistor structure is within the range of the second orthographic projection of a corresponding one of the heat insulation units, the first orthographic projection of the channel region is the orthographic projection of the channel region on the substrate, and the second orthographic projection of the heat insulation unit is the orthographic projection of the heat insulation unit on the substrate.

5. A display panel, comprising:

A substrate;

An anode layer located on one side of the substrate;

a separation layer located on a side of the pixel defining layer remote from the substrate;

6. The display panel of claim 5, wherein the pixel defining layer comprises a plurality of defining cells, the defining cells being undercut structures.

7. The display panel according to claim 5, wherein the light emitting function layer includes:

A first light emitting function part located at a side of the exposed anode layer away from the substrate;

A second light-emitting function portion located on a side of the separation layer away from the substrate;

The first light emitting function portion is separated from the second light emitting function portion.

8. The display panel according to any one of claims 5-7, wherein the undercut structure is made of photoresist.

9. A method for manufacturing a display panel according to any one of claims 1 to 4, comprising:

forming an anode layer on one side of a substrate;

forming a pixel defining layer on one side of the anode layer, such that the pixel defining layer forms a pixel region and a non-pixel region; the pixel region exposes a partial region of the anode layer;

removing the part of the light-emitting functional layer, which is positioned in the non-pixel area, by utilizing laser so as to disconnect the light-emitting functional layer in the non-pixel area;

Forming a cathode layer on one side of the light emitting functional layer, which is not removed in the pixel region, away from the substrate and the non-pixel region, such that a first distance between the cathode layer and the substrate is smaller than a second distance; the first distance is a distance from the cathode layer to the substrate on a side surface of the non-pixel region, which is far away from the substrate, and the second distance is a distance from the cathode layer to the substrate on a side surface of the pixel region, which is far away from the substrate.

10. The method of manufacturing a display panel according to claim 9, wherein forming a light emitting functional layer in the pixel region and the non-pixel region comprises:

forming a sacrificial layer in the non-pixel region;

forming the light-emitting functional layer on one side of the sacrificial layer far away from the substrate and the pixel region, so that the light-emitting functional layer is connected with the sacrificial layer;

The removing, with a laser, a portion of the light emitting functional layer located in the non-pixel region includes:

And scanning the sacrificial layer by using the laser, and removing the sacrificial layer and the part of the luminous functional layer, which is positioned in the non-pixel area, based on the laser energy absorbed by the sacrificial layer and the acting force of the laser on the sacrificial layer.

11. The method for manufacturing a display panel according to claim 10, wherein the laser is an infrared laser;

The scanning mode of the laser is front scanning or back scanning.

12. The method of manufacturing a display panel according to claim 9, wherein forming a light emitting functional layer in the pixel region and the non-pixel region comprises:

forming a heat absorbing layer in the non-pixel region; the heat absorption layer is used for absorbing the energy of the laser;

forming the light emitting function layer on one side of the heat absorbing layer away from the substrate and the pixel region;

And scanning the heat absorption layer by using the laser, and removing the part of the luminous functional layer, which is positioned in the non-pixel area, based on the laser energy absorbed by the heat absorption layer.

13. The method for manufacturing a display panel according to claim 12, wherein the laser is an infrared laser or an ultraviolet laser;

The scanning mode of the infrared laser is front scanning or back scanning, and the scanning mode of the ultraviolet laser is front scanning.

14. The method of manufacturing a display panel according to any one of claims 10 to 13, further comprising:

During the scanning, the front surface of the display panel is made to face downward.

15. The method of any one of claims 9 to 13, wherein forming an anode layer on one side of a substrate comprises:

Forming a heat insulating layer having a plurality of heat insulating units on one side of the substrate;

Forming a driving circuit layer with a plurality of transistor structures on one side of the heat insulation layer far away from the substrate, so that the first orthographic projection of a channel region of each transistor structure is in the range of the second orthographic projection of a corresponding heat insulation unit; the first orthographic projection of the channel region is orthographic projection of the channel region on the substrate, and the second orthographic projection of the heat insulation unit is orthographic projection of the heat insulation unit on the substrate;

The anode layer is formed on a side of the driving circuit layer away from the substrate.

16. A method for manufacturing a display panel, characterized in that it is used for manufacturing the display panel according to any one of claims 5 to 8, the method comprising:

forming an anode layer on one side of a substrate;

Forming a plurality of partition units with undercut structures on a side of the pixel defining layer away from the substrate, forming a partition layer based on the plurality of partition units;

And forming a cathode layer on one side of the light-emitting functional layer, which is far away from the substrate.

17. A display device, comprising: the display panel of any one of claims 1-4, or the display panel of any one of claims 5-8.