CN118431389A - Packaging structure of light-emitting diode and preparation method thereof - Google Patents

Packaging structure of light-emitting diode and preparation method thereof Download PDF

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Publication number
CN118431389A
CN118431389A CN202410521956.XA CN202410521956A CN118431389A CN 118431389 A CN118431389 A CN 118431389A CN 202410521956 A CN202410521956 A CN 202410521956A CN 118431389 A CN118431389 A CN 118431389A
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China
Prior art keywords
bonding wire
chip
bracket
layer
plate
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CN202410521956.XA
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Chinese (zh)
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董川
胡勋涛
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Zhuhai Huahui Zhizao Semiconductor Co ltd
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Zhuhai Huahui Zhizao Semiconductor Co ltd
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Priority to CN202410521956.XA priority Critical patent/CN118431389A/en
Publication of CN118431389A publication Critical patent/CN118431389A/en
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Abstract

The present disclosure provides a packaging structure of a light emitting diode and a preparation method thereof, which belong to the technical field of photoelectron manufacturing. The package structure includes: the chip is provided with a first surface and a second surface which are opposite, the first surface of the chip is positioned on the bearing surface of the bracket, the first end of the bonding wire is connected with the second surface, and at least part of the peripheral wall of the second end of the bonding wire is connected with the bearing surface of the bracket. The embodiment of the disclosure can solve the problem that the joint of the bonding wire and the bracket in the packaging structure is easy to break.

Description

Packaging structure of light-emitting diode and preparation method thereof
Technical Field
The disclosure relates to the technical field of photoelectron manufacturing, in particular to a packaging structure of a light emitting diode and a preparation method thereof.
Background
The light emitting Diode (LIGHT EMITTING Diode, which is called as LED for short) is used as a new product with great influence in the photoelectron industry, and has the characteristics of small volume, long service life, rich and colorful colors, low energy consumption and the like. In packaging a light emitting diode, it is generally necessary to weld and fix the light emitting diode on a support, and connect an n-electrode and a p-electrode of the light emitting diode with a negative electrode and a positive electrode on the support, respectively.
For the light emitting diode with a positive structure or a vertical structure, at least part of the electrodes of the light emitting diode are positioned on the surface of the light emitting diode far away from the bracket, and a bonding wire is required to be arranged between the light emitting diode and the bracket, so that the electrodes on the surface of the light emitting diode far away from the bracket can be connected with the positive electrode or the negative electrode of the bracket. Meanwhile, protective glue is coated on the surface of the support, and the light-emitting diode and the bonding wire are covered by the protective glue so as to protect the bonding wire and the light-emitting diode.
However, the light emitting diode generates heat during use, which causes the protective adhesive to expand with the rise of temperature; and after the LED stops working, the protective adhesive contracts along with the temperature reduction. The expansion and contraction of the protective adhesive can have a pulling effect on the bonding wire, and the bonding wire and the connecting part of the bracket are easily disconnected under extreme conditions, so that the problem of disconnection of the light-emitting diode is caused.
Disclosure of Invention
The embodiment of the disclosure provides a packaging structure of a light-emitting diode and a preparation method thereof, which can solve the problem that a joint of a bonding wire and a bracket in the packaging structure is easy to break. The technical scheme is as follows:
In one aspect, an embodiment of the present disclosure provides a package structure of a light emitting diode, the package structure including: the chip is provided with a first surface and a second surface which are opposite to each other, the first surface of the chip is positioned on the bearing surface of the bracket, the first end of the bonding wire is connected with the second surface, and at least part of the peripheral wall of the second end of the bonding wire is connected with the bearing surface of the bracket.
Optionally, the axial length of the portion of the peripheral wall of the second end of the bonding wire connected to the bearing surface of the bracket is 20 μm to 130 μm.
Optionally, the bracket comprises a support plate, the surface of the support plate is provided with a containing groove, the chip is positioned in the containing groove, and the first surface of the chip is positioned on the bottom of the containing groove; the packaging structure further comprises protective glue, and the protective glue is filled in the accommodating groove.
Optionally, a maximum distance from the bottom of the accommodating groove on the bonding wire is smaller than or equal to a groove depth of the accommodating groove.
Optionally, the protective glue comprises at least one of silica gel and epoxy resin.
Optionally, the support plate includes at least one of a bismaleimide triazine resin plate, an epoxy glass fiber plate, an alumina plate, an aluminum nitride plate, a ceramic plate, a metal aluminum base material plate, a polycyclohexamethylene terephthalate resin plate, a polyphthalamide plate, and an epoxy molding compound plate.
Optionally, the bonding wire comprises a metal wire.
The embodiment of the disclosure provides a preparation method of a packaging structure of a light emitting diode, which comprises the following steps: providing a chip, a bracket and a bonding wire, wherein the chip is provided with a first surface and a second surface which are opposite; fixing the first surface of the chip on the bearing surface of the bracket; and fixing the first end of the bonding wire on the second surface, and fixing at least part of the peripheral wall of the second end of the bonding wire on the bearing surface of the bracket.
Optionally, fixing at least part of the peripheral wall of the second end of the bonding wire on the bearing surface of the bracket includes: and attaching at least part of the peripheral wall of the second end of the bonding wire to the bearing surface of the bracket, and controlling the axial length of the part of the peripheral wall, which is connected with the bearing surface of the bracket, of the second end of the bonding wire to be 20-130 mu m.
Optionally, the bracket comprises a support plate, the surface of the support plate is provided with a containing groove, the chip is positioned in the containing groove, and the first surface of the chip is positioned on the bottom of the containing groove; fixing the first end of the bonding wire on the second surface, and after fixing at least part of the peripheral wall of the second end of the bonding wire on the bearing surface of the bracket, further comprising: and filling protective glue in the accommodating cavity, so that the chip and the bonding wires are covered by the protective glue.
The technical scheme provided by the embodiment of the disclosure has the beneficial effects that at least:
The packaging structure of the light emitting diode provided by the embodiment of the disclosure comprises a support, a chip and a bonding wire, wherein the first surface of the chip is positioned on the bearing surface of the support, the first end of the bonding wire is connected with the second surface of the chip, and the second end of the bonding wire is connected with the bearing surface of the support. Wherein at least a portion of the peripheral wall of the second end of the bond wire is connected to the bearing surface of the bracket. This changes the connection between the bonding wire and the bearing surface from the original point contact between the end of the bonding wire and the bearing surface to the line contact between the outer peripheral wall of the bonding wire and the bearing surface. Thus, the contact area between the bonding wire and the carrying surface is improved. Therefore, even if the temperature of the LED changes due to heating or cooling in the use process, the protective adhesive expands with heat and contracts with cold to pull the bonding wire. Because the area that bonding wire and loading face link to each other is bigger for the bonding wire also is difficult to break because of pulling and the junction with the support, thereby promotes the connection reliability of bonding wire and support, improves the problem that emitting diode opens circuit.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic diagram of a package structure of a light emitting diode according to the related art;
fig. 2 is a schematic diagram of a package structure of another light emitting diode provided in the related art;
Fig. 3 is a schematic diagram of a bond wire disconnection of a package structure provided by an embodiment of the present disclosure;
fig. 4 is a schematic diagram of a package structure of a light emitting diode according to an embodiment of the disclosure;
fig. 5 is a cross-sectional view of a package structure of a light emitting diode provided in an embodiment of the present disclosure;
Fig. 6 is a schematic structural diagram of a light emitting diode according to an embodiment of the present disclosure;
fig. 7 is a flowchart of a method for manufacturing a package structure according to an embodiment of the present disclosure;
FIG. 8 is a state diagram of the fabrication of a package structure provided by an embodiment of the present disclosure;
fig. 9 is a preparation state diagram of a package structure according to an embodiment of the present disclosure.
The various labels in the figures are described below:
10. A chip;
20. a substrate; 21. an epitaxial layer; 22. an electrode; 23. a passivation layer; 24. a groove; 25. a bonding pad;
30. a bracket; 31. a support plate; 32. a receiving groove;
40. A bonding wire;
50. and (5) protecting glue.
Detailed Description
For the purposes of clarity, technical solutions and advantages of the present disclosure, the following further details the embodiments of the present disclosure with reference to the accompanying drawings.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," "third," and the like in the description and in the claims, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, is intended to mean that elements or items that are present in front of "comprising" or "comprising" are included in the word "comprising" or "comprising", and equivalents thereof, without excluding other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", "top", "bottom" and the like are used only to indicate relative positional relationships, which may be changed accordingly when the absolute position of the object to be described is changed.
Fig. 1 is a schematic diagram of a package structure of a light emitting diode according to the related art. Fig. 1 illustrates a package structure of a front-mounted light emitting diode, which includes a chip 10 of the front-mounted structure, a bracket 30, and two bonding wires 40.
The support 30 is plate-shaped, the chip 10 is located on a bearing surface of the support 30, the n-electrode 22 and the p-electrode 22 of the chip 10 are both located on a surface of the chip 10 far away from the support 30, the first ends of the two bonding wires 40 are respectively connected with the n-electrode 22 and the p-electrode 22, and the second ends of the two bonding wires 40 are respectively connected with an anode and a cathode located on the bearing surface of the support 30, so that an external power source can be transmitted to the chip 10 through the support 30 and the bonding wires 40, and the chip 10 can be electrified.
Fig. 2 is a schematic diagram of another package structure of a light emitting diode according to the related art. Fig. 2 illustrates a package structure of a vertical light emitting diode, which includes a chip 10 of a vertical structure, a bracket 30, and a bonding wire 40.
The support 30 is plate-shaped, the chip 10 is located on a bearing surface of the support 30, the n-electrode 22 of the chip 10 is located on a surface of the chip 10 close to the support 30, and the n-electrode 22 is directly connected with a negative electrode on the bearing surface of the support 30. The p-electrodes 22 of the chip 10 are all located on the surface of the chip 10 far away from the support 30, the first ends of the bonding wires 40 are connected with the p-electrodes 22, and the second ends of the bonding wires 40 are connected with the positive electrodes located on the bearing surface of the support 30, so that an external power supply can be transmitted to the chip 10 through the support 30 and the bonding wires 40, and the chip 10 is electrified.
As shown in fig. 1 and 2, a protective adhesive 50 is coated on the bearing surface of the bracket 30, and the protective adhesive 50 covers the chip 10 and the bonding wires 40 to protect the chip 10 and the bonding wires 40.
Since the chip 10 heats up during use, the protective adhesive 50 expands with the rise of temperature; and after the led stops operating, the protective paste 50 contracts with a decrease in temperature. The expansion and contraction of the protective glue 50 will have a pulling effect on the bond wire 40.
Fig. 3 is a schematic illustration of a package structure with bond wires 40 broken away, according to an embodiment of the present disclosure. As shown in fig. 3, the connection between the bonding wire 40 and the bracket 30 is easily broken in an extreme case, thereby causing a problem of the disconnection of the chip 10.
To this end, embodiments of the present disclosure provide a package structure of a light emitting diode. Fig. 4 is a schematic diagram of a package structure of a light emitting diode according to an embodiment of the disclosure. As shown in fig. 4, the package structure includes: chip 10, mount 30, and bond wire 40.
Fig. 5 is a cross-sectional view of a package structure of a light emitting diode according to an embodiment of the present disclosure. Fig. 5 is a cross-sectional view taken along the AA section line in fig. 4.
As shown in fig. 4 and 5, the chip 10 has a first surface and a second surface opposite to each other, the first surface of the chip 10 is located on the carrying surface of the support 30, the first end of the bonding wire 40 is connected to the second surface, and at least a part of the peripheral wall of the second end of the bonding wire 40 is connected to the carrying surface of the support 30.
The package structure of the light emitting diode provided in the embodiments of the present disclosure includes a support 30, a chip 10 and a bonding wire 40, wherein a first surface of the chip 10 is located on a bearing surface of the support 30, a first end of the bonding wire 40 is connected with a second surface of the chip 10, and a second end of the bonding wire 40 is connected with the bearing surface of the support 30. Wherein at least a portion of the peripheral wall of the second end of the bond wire 40 is connected to the bearing surface of the bracket 30. This changes the connection between the bonding wire 40 and the bearing surface from the original point contact between the end of the bonding wire 40 and the bearing surface to the line contact between the outer peripheral wall of the bonding wire 40 and the bearing surface. Thus, the contact area between the bonding wire 40 and the carrying surface is increased. Thus, even if the temperature of the led changes due to heat generation or cooling during use, the protective adhesive 50 expands with heat and contracts with cold to pull the bonding wire 40. Because the connecting area between the bonding wire 40 and the bearing surface is larger, the bonding wire 40 is not easily disconnected from the connecting part of the bracket 30 due to pulling, so that the connection reliability of the bonding wire 40 and the bracket 30 is improved, and the problem of disconnection of the light emitting diode is solved.
Alternatively, as shown in fig. 5, the axial length L of the portion of the peripheral wall of the second end of the bonding wire 40 that is connected to the bearing surface of the bracket 30 is 20 μm to 130 μm.
Wherein, the part of the peripheral wall of the second end of the bonding wire 40 refers to the side wall of the bonding wire 40, and since the part of the bonding wire 40 facing the bearing surface contacts the bearing surface when the bonding wire 40 is connected to the bearing surface of the bracket 30, at least part of the peripheral wall of the bonding wire 40 is connected to the bearing surface.
In the above implementation manner, by setting the axial length of the second end of the bonding wire 40 connected to the bearing surface within the above range, it is ensured that the bonding wire 40 has a sufficiently long peripheral wall capable of being connected to the bearing surface of the bracket 30, so that the bonding wire 40 is ensured to be connected to the bracket 30 more reliably, and the bonding wire 40 is prevented from being easily released from the bracket 30.
Illustratively, the axial length of the portion of the peripheral wall of the second end of the bond wire 40 that is connected to the bearing surface of the bracket 30 is 100 μm.
Alternatively, the second end of the bonding wire 40 may have a plate shape, and the width of the second end of the bonding wire 40 is greater than the diameter of the bonding wire 40. When the second end of the bonding wire 40 is connected with the bearing surface of the bracket 30, surface contact is formed between the bonding wire 40 and the bearing surface, so that the connection reliability between the bonding wire 40 and the bearing surface is further improved.
Optionally, the peripheral wall of the second end of the bond wire 40 has sharp corners. Correspondingly, the surface of the positive electrode or the negative electrode connected with the bonding wire 40 on the bearing surface of the bracket 30 is provided with a groove 24, and when the second end of the bonding wire 40 is connected with the bearing surface, the sharp angle is positioned in the groove 24, so that the bonding wire 40 is prevented from easily loosening from the bearing surface due to the mutual restriction of the sharp angle and the groove 24.
Alternatively, as shown in fig. 4 and 5, the bracket 30 includes a support plate 31, a surface of the support plate 31 has a receiving groove 32, the chip 10 is located in the receiving groove 32, and a first surface of the chip 10 is located on a bottom of the receiving groove 32.
As shown in fig. 5, the package structure further includes a protective paste 50, and the protective paste 50 is filled in the accommodating groove 32.
In the embodiment of the disclosure, the support 30 is set as the support plate 31, and the accommodating groove 32 is set on the surface of the support plate 31, so that the chip 10 is placed in the accommodating groove 32, and a certain protection effect is achieved on the chip 10. Meanwhile, the containing groove 32 is filled with the protective glue 50, so that the consumption of the protective glue 50 can be limited, more protective glue 50 is avoided in the process of preparing the packaging structure, and the cost is reduced.
And, the protective glue 50 is disposed in the accommodating groove 32, and under the limitation of the groove wall of the accommodating groove 32, the protective glue 50 can be prevented from being deformed greatly, so that the protective glue 50 is prevented from generating a large pulling force on the bonding wire 40 due to a large thermal expansion amplitude.
Optionally, the maximum distance on the bond wire 40 from the bottom of the receiving groove 32 is less than or equal to the groove depth of the receiving groove 32.
Wherein, the maximum distance of the bonding wire 40 from the bottom of the accommodating groove 32 refers to the distance from the top end of the bonding wire 40 to the bottom of the accommodating groove 32. Thus, after the protective paste 50 is filled in the accommodating groove 32, the protective paste 50 can be ensured to completely cover the bonding wires 40, and the bonding wires 40 can be fully protected.
Optionally, the protective paste 50 includes at least one of a silicone gel and an epoxy resin.
Illustratively, the protective gel 50 may be a silicone gel that is light transmissive and has a relatively low coefficient of thermal expansion. Not only can the purpose of transmitting light emitted by the chip 10 be satisfied, but also the deformation degree of the thermal expansion of the protective adhesive 50 can be reduced, and the bonding wire 40 is prevented from being subjected to larger pulling force.
Alternatively, the support plate 31 includes at least one of a bismaleimide triazine resin plate, an epoxy glass fiber plate, an alumina plate, an aluminum nitride plate, a ceramic plate, a metal aluminum base material plate, a polycyclohexamethylene terephthalate resin plate, a polyphthalamide plate, and an epoxy molding compound plate.
The supporting plate 31 made of the material is hard and durable in texture and is not easy to deform by heating, so that the protective glue 50 filled in the accommodating groove 32 is prevented from deforming to a large extent, a large pulling force is generated on the bonding wire 40, and the reliability of the supporting plate 31 is improved.
Optionally, the bond wire 40 comprises a metal wire.
Illustratively, the bonding wire 40 may be made of at least one of gold, silver, and an alloy material. Gold and silver have good electrical conductivity to facilitate conduction of electrical current delivered to the carrier 30 to the chip 10.
Fig. 6 is a schematic structural diagram of a light emitting diode according to an embodiment of the present disclosure. As shown in fig. 6, the chip 10 may include a substrate 20, an epitaxial layer 21, an electrode 22, a passivation layer 23, and a pad 25, the epitaxial layer 21 being on a surface of the substrate 20, the electrode 22 being on a surface of the epitaxial layer 21 remote from the substrate 20, the passivation layer 23 being on a surface of the epitaxial layer 21 remote from the substrate 20, and covering the electrode 22. The passivation layer 23 has a via hole exposing the electrode 22, and a pad 25 is located on a surface of the passivation layer 23 remote from the substrate 20 and connected to the electrode 22 through the via hole.
Illustratively, the substrate 20 is a sapphire substrate 20. The transmittance of the sapphire substrate 20 is relatively high, i.e., the substrate 20 is a transparent substrate 20. And the sapphire material is hard and has stable chemical characteristics, so that the light-emitting diode has good light-emitting effect and stability.
In the embodiment of the present disclosure, the epitaxial layer 21 includes a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer sequentially stacked on the substrate 20, and the surface of the second semiconductor layer has a groove 24 exposing the first semiconductor layer.
In an embodiment of the present disclosure, one of the first semiconductor layer and the second semiconductor layer is a p-type layer, and the other of the first semiconductor layer and the second semiconductor layer is an n-type layer.
Illustratively, the first semiconductor layer is an n-type layer and the second semiconductor layer is a p-type layer.
Alternatively, the first semiconductor layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer may be 0.5 μm to 3 μm.
Alternatively, the multiple quantum well layer includes an InGaN quantum well layer and a GaN quantum barrier layer alternately grown. Wherein the multiple quantum well layer may include an InGaN quantum well layer and a GaN quantum barrier layer of 3 to 8 periods alternately stacked.
As an example, in the embodiments of the present disclosure, the multiple quantum well layer includes 5 periods of InGaN quantum well layers and GaN quantum barrier layers alternately stacked.
Alternatively, the thickness of the multiple quantum well layer may be 150nm to 200nm.
Optionally, the second semiconductor layer is a p-type GaN layer doped with magnesium. The thickness of the p-type GaN layer may be 0.5 μm to 3 μm.
Optionally, the surface of the second semiconductor layer has a recess 24 exposing the first semiconductor layer, a portion of the electrode 22 being located within the recess 24 and another portion of the electrode 22 being located on the surface of the second semiconductor layer.
Wherein there are two pads 25, one pad 25 being connected to the electrode 22 located in the recess 24 and the other pad 25 being connected to the electrode 22 located on the second semiconductor layer.
Optionally, a transparent conductive layer may also be provided on the surface of the second semiconductor layer, with the electrode 22 being located on the transparent conductive layer.
The transparent conductive layer may be an Indium Tin Oxide (ITO) layer or an Indium zinc Oxide (Indium Zinc Oxide, IZO) layer.
Illustratively, the transparent conductive layer is an ITO layer, and the ITO layer may be formed on the surface of the second semiconductor layer by sputtering.
Illustratively, the transparent conductive layer has a thickness of 100 angstroms to 300 angstroms.
Alternatively, the passivation layer 23 may be a silicon oxide layer.
Illustratively, the silicon oxide layer has a thickness of 4000 angstroms to 6000 angstroms.
Alternatively, the passivation layer 23 may be a distributed bragg reflector (Distributed Bragg Reflector, DBR for short) layer.
Wherein the DBR layer can be formed to include a plurality of SiO 2 layers and TiO 2 layers alternately stacked periodically.
Illustratively, the number of periods of the DBR layer may be between 20 and 50. For example, the number of periods of the DBR layer is 20.
The thickness of the SiO 2 layer in the DBR layer may be 800 to 1200 angstroms, and the thickness of the TiO 2 layer may be 500 to 900 angstroms.
The DBR layer serves to reflect light emitted from the multiple quantum well layer toward the DBR layer to the substrate 20 in addition to the passivation effect, thereby improving the light extraction effect.
Alternatively, the electrode 22 may include a Cr layer, an Al layer, a Ti layer, an Al layer, a Cr layer, a Pt layer, and a Ti layer stacked in this order, and the thickness of each metal layer is 30 angstroms, 2000 angstroms, 1000 angstroms, 10000 angstroms, 1000 angstroms, 2000 angstroms, 500 angstroms, 2000 angstroms, and 500 angstroms in this order.
Alternatively, the pad 25 may be a rectangular block, which can increase the area to facilitate electrical conduction. And on the surface of the passivation layer 23, two pads 25 are spaced apart.
The pad 25 may be, for example, an Al layer, a Ti layer, and an Au layer, which are sequentially stacked.
Wherein the Al layer has a thickness of 8000 to 12000 angstroms, the Ti layer has a thickness of 100 to 1500 angstroms, and the Au layer has a thickness of 2000 to 5000 angstroms.
For example, the Al layer has a thickness of 10000 angstroms, the Ti layer has a thickness of 800 angstroms, and the Au layer has a thickness of 3000 angstroms.
Fig. 7 is a flowchart of a method for manufacturing a package structure according to an embodiment of the present disclosure. As shown in fig. 7, the preparation method includes:
Step 101: a chip 10, a carrier 30 and bond wires 40 are provided.
As shown in fig. 5, the chip 10 has opposite first and second surfaces.
Step 102: the first surface of the chip 10 is fixed to the carrying surface of the holder 30.
Step 103: the first end of the bonding wire 40 is fixed to the second surface, and at least part of the peripheral wall of the second end of the bonding wire 40 is fixed to the bearing surface of the bracket 30.
The packaging structure prepared by the preparation method comprises a support 30, a chip 10 and a bonding wire 40, wherein the first surface of the chip 10 is positioned on the bearing surface of the support 30, the first end of the bonding wire 40 is connected with the second surface of the chip 10, and the second end of the bonding wire 40 is connected with the bearing surface of the support 30. Wherein at least a portion of the peripheral wall of the second end of the bond wire 40 is connected to the bearing surface of the bracket 30. This changes the connection between the bonding wire 40 and the bearing surface from the original point contact between the end of the bonding wire 40 and the bearing surface to the line contact between the outer peripheral wall of the bonding wire 40 and the bearing surface. Thus, the contact area between the bonding wire 40 and the carrying surface is increased. Thus, even if the temperature of the led changes due to heat generation or cooling during use, the protective adhesive 50 expands with heat and contracts with cold to pull the bonding wire 40. Because the connecting area between the bonding wire 40 and the bearing surface is larger, the bonding wire 40 is not easily disconnected from the connecting part of the bracket 30 due to pulling, so that the connection reliability of the bonding wire 40 and the bracket 30 is improved, and the problem of disconnection of the light emitting diode is solved.
The method for manufacturing the chip 10 in step 101 may include the following steps:
in a first step, an epitaxial layer 21 is formed on a substrate 20.
Wherein the epitaxial layer 21 includes a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer sequentially stacked on the substrate 20.
Illustratively, the substrate 20 is a sapphire substrate 20. The transmittance of the sapphire substrate 20 is relatively high, i.e., the substrate 20 is a transparent substrate 20. And the sapphire material is hard and has stable chemical characteristics, so that the light-emitting diode has good light-emitting effect and stability.
In an embodiment of the present disclosure, one of the first semiconductor layer and the second semiconductor layer is a p-type layer, and the other of the first semiconductor layer and the second semiconductor layer is an n-type layer.
Illustratively, the first semiconductor layer is an n-type layer and the second semiconductor layer is a p-type layer.
Alternatively, the first semiconductor layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer may be 0.5 μm to 3 μm.
Alternatively, the multiple quantum well layer includes an InGaN quantum well layer and a GaN quantum barrier layer alternately grown. Wherein the multiple quantum well layer may include an InGaN quantum well layer and a GaN quantum barrier layer of 3 to 8 periods alternately stacked.
As an example, in the embodiments of the present disclosure, the multiple quantum well layer includes 5 periods of InGaN quantum well layers and GaN quantum barrier layers alternately stacked.
Alternatively, the thickness of the multiple quantum well layer may be 150nm to 200nm.
Optionally, the second semiconductor layer is a p-type GaN layer doped with magnesium. The thickness of the p-type GaN layer may be 0.5 μm to 3 μm.
In the second step, a recess 24 exposing the first semiconductor layer is etched on the surface of the second semiconductor layer by means of photolithography.
Third, a transparent conductive layer is formed on the surface of the second semiconductor layer remote from the substrate 20.
Wherein the transparent conductive layer may be an ITO layer or an IZO layer.
Illustratively, the transparent conductive layer is an ITO layer, and the ITO layer may be formed on the surface of the second semiconductor layer by sputtering.
Illustratively, the transparent conductive layer has a thickness of 100 angstroms to 300 angstroms.
Fourth, the electrode 22 is evaporated on the surface of the transparent conductive layer away from the substrate 20 and the bottom of the groove 24.
The electrode 22 may include a Cr layer, an Al layer, a Ti layer, an Al layer, a Cr layer, a Pt layer, and a Ti layer stacked in this order, and each metal layer has a thickness of 30 angstroms, 2000 angstroms, 1000 angstroms, 10000 angstroms, 1000 angstroms, 2000 angstroms, 500 angstroms, 2000 angstroms, and 500 angstroms in this order.
Fifth, a passivation layer 23 is formed in the second semiconductor layer and the groove 24 such that the passivation layer 23 covers the electrode 22.
Wherein the passivation layer 23 has a via hole exposing the electrode 22.
Wherein the passivation layer 23 may be a distributed bragg mirror layer.
Alternatively, the DBR layer can be formed to include a plurality of SiO 2 layers and TiO 2 layers alternately stacked periodically.
Illustratively, the number of periods of the DBR layer may be between 20 and 50. For example, the number of periods of the DBR layer is 202.
The thickness of the SiO 2 layer in the DBR layer may be 800 to 1200 angstroms, and the thickness of the TiO 2 layer may be 500 to 900 angstroms.
In a sixth step, pads 25 are formed on the surface of the passivation layer 23 remote from the epitaxial layer 21.
Wherein the pads 25 are connected to the electrodes 22 by vias.
Alternatively, the pad 25 may be a rectangular block, which can increase the area to facilitate electrical conduction. And on the surface of the passivation layer 23, two pads 25 are spaced apart.
The pad 25 may be, for example, an Al layer, a Ti layer, and an Au layer, which are sequentially stacked.
Wherein the Al layer has a thickness of 8000 to 12000 angstroms, the Ti layer has a thickness of 100 to 1500 angstroms, and the Au layer has a thickness of 2000 to 5000 angstroms.
For example, the Al layer has a thickness of 10000 angstroms, the Ti layer has a thickness of 800 angstroms, and the Au layer has a thickness of 3000 angstroms.
As shown in fig. 8, step 102 may include: the chip 10 is bonded on the support 30.
The bonding medium can be die bond glue or different materials such as solder paste.
As shown in fig. 9, step 103 may include the following steps:
first, the bonding wire 40 is electrically connected to the chip 10 by soldering the bonding wire 40 with a bonding apparatus such as a wire bonder.
And in the second step, at least part of the peripheral wall of the second end of the bonding wire 40 is attached to the bearing surface of the bracket 30, and the axial length of the part of the peripheral wall of the second end of the bonding wire 40 connected with the bearing surface of the bracket 30 is controlled to be 20-130 μm.
The method specifically comprises the following steps: the second end of the bonding wire 40 is attached to the carrying surface of the bracket 30, and the attachment length of the second end is controlled to be 20 μm to 130 μm.
As shown in fig. 5, step 103 further includes: the receiving cavity is filled with the protective paste 50 such that the protective paste 50 covers the chip 10 and the bonding wires 40, and the surface of the protective paste 50 is controlled not to exceed the opening of the receiving groove 32.
The foregoing description of the preferred embodiments of the present disclosure is provided for the purpose of illustration only, and is not intended to limit the disclosure to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, alternatives, and alternatives falling within the spirit and principles of the disclosure.

Claims (10)

1. A package structure of a light emitting diode, the package structure comprising: chip (10), support (30) and bonding line (40), chip (10) have relative first surface and second surface, the first surface of chip (10) is located on the loading face of support (30), the first end of bonding line (40) with the second surface links to each other, at least part periphery wall of the second end of bonding line (40) with the loading face of support (30) links to each other.
2. The packaging structure according to claim 1, characterized in that the axial length of the part of the peripheral wall of the second end of the bonding wire (40) connected to the bearing surface of the bracket (30) is 20 μm to 130 μm.
3. The packaging structure according to claim 1, characterized in that the support (30) comprises a support plate (31), the surface of the support plate (31) has a receiving groove (32), the chip (10) is located in the receiving groove (32), and the first surface of the chip (10) is located on the bottom of the receiving groove (32);
the packaging structure further comprises a protective adhesive (50), and the protective adhesive (50) is filled in the accommodating groove (32).
4. A packaging structure according to claim 3, characterized in that the maximum distance on the bond wire (40) from the bottom of the receiving groove (32) is smaller than or equal to the groove depth of the receiving groove (32).
5. A package structure according to claim 3, wherein the protective glue (50) comprises at least one of a silicone and an epoxy.
6. A package structure according to claim 3, wherein the support plate (31) comprises at least one of a bismaleimide triazine resin plate, an epoxy glass fiber plate, an alumina plate, an aluminum nitride plate, a ceramic plate, a metal aluminum base material plate, a polycyclohexamethylene terephthalate resin plate, a polyphthalamide plate, and an epoxy molding compound plate.
7. The package structure according to any one of claims 1 to 6, wherein the bonding wire (40) comprises a metal wire.
8. A method for manufacturing a package structure of a light emitting diode, the method comprising:
Providing a chip, a bracket and a bonding wire, wherein the chip is provided with a first surface and a second surface which are opposite;
fixing the first surface of the chip on the bearing surface of the bracket;
And fixing the first end of the bonding wire on the second surface, and fixing at least part of the peripheral wall of the second end of the bonding wire on the bearing surface of the bracket.
9. The method of manufacturing of claim 8, wherein securing at least a portion of the peripheral wall of the second end of the bonding wire to the bearing surface of the bracket comprises:
And attaching at least part of the peripheral wall of the second end of the bonding wire to the bearing surface of the bracket, and controlling the axial length of the part of the peripheral wall, which is connected with the bearing surface of the bracket, of the second end of the bonding wire to be 20-130 mu m.
10. The method of manufacturing according to claim 8, wherein the bracket includes a support plate, a surface of the support plate has a receiving groove, the chip is located in the receiving groove, and a first surface of the chip is located on a bottom of the receiving groove;
fixing the first end of the bonding wire on the second surface, and after fixing at least part of the peripheral wall of the second end of the bonding wire on the bearing surface of the bracket, further comprising:
and filling protective glue in the accommodating cavity, so that the chip and the bonding wires are covered by the protective glue.
CN202410521956.XA 2024-04-28 2024-04-28 Packaging structure of light-emitting diode and preparation method thereof Pending CN118431389A (en)

Priority Applications (1)

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CN202410521956.XA CN118431389A (en) 2024-04-28 2024-04-28 Packaging structure of light-emitting diode and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410521956.XA CN118431389A (en) 2024-04-28 2024-04-28 Packaging structure of light-emitting diode and preparation method thereof

Publications (1)

Publication Number Publication Date
CN118431389A true CN118431389A (en) 2024-08-02

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410521956.XA Pending CN118431389A (en) 2024-04-28 2024-04-28 Packaging structure of light-emitting diode and preparation method thereof

Country Status (1)

Country Link
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