CN118431248B - Infrared detector array and preparation method thereof - Google Patents
Infrared detector array and preparation method thereof Download PDFInfo
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- CN118431248B CN118431248B CN202410896776.XA CN202410896776A CN118431248B CN 118431248 B CN118431248 B CN 118431248B CN 202410896776 A CN202410896776 A CN 202410896776A CN 118431248 B CN118431248 B CN 118431248B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The embodiment of the application provides an infrared detector array and a preparation method thereof, wherein the infrared detector array comprises the following components: a read-out circuit board; the substrate layer comprises a plurality of substrate areas, and the substrate area array is arranged on the read-out circuit base plate; the plurality of infrared detector units includes: the first absorption layer is positioned on one side of the substrate area, which is away from the read-out circuit substrate, and is contacted with the substrate area, and the first absorption layer is provided with a first doping type; the intermediate layer is positioned on one side of the first absorption layer, which is away from the substrate area, and is provided with a second doping type; the second absorption layer is positioned on one side of the middle layer, which is away from the first absorption layer, and the second absorption layer has a first doping type; the first conductive layer penetrates through the first absorption layer and the substrate region, and the first conductive layer is electrically connected with the intermediate layer and the readout circuit substrate respectively. The problem that the process difficulty of leading out the electrode of the middle layer in the infrared detector unit on the side wall of the infrared detector is high is solved, and the effect of improving the stability of the infrared detector array is achieved.
Description
Technical Field
The embodiment of the application relates to the technical field of semiconductor devices, in particular to an infrared detector array and a preparation method thereof.
Background
In the conventional process, the bicolor infrared detector has two back-to-back diode structures, and the diode structures have three layers, and the three layers are all connected physically through flip-chip interconnection of indium columns and a readout circuit (ROIC, readout Integrated Circuit), however, the technical difficulty exists in the scheme: and (3) etching the infrared detector unit in the infrared detector array with high depth-to-width ratio. Because the infrared detector unit of the double-color infrared detector comprises two wave bands, compared with single color, the functional area is thicker, and when the distance between the infrared detector units is reduced, the etching depth-to-width ratio is increased, so that the angle and the flatness of the side wall of the infrared detector unit are difficult to ensure; and (3) flip-chip interconnection underfill. After flip-chip interconnection of the micro-bumps, underfill is generally performed, i.e. glue is filled in gaps between the microspheres, so as to provide mechanical support for the subsequent substrate region thinning process and improve the reliability of the device. However, it is a challenge to uniformly and completely fill the glue in the gaps of several micrometers, and the filling process currently lacks observation means; the coplanarity and uniformity of the micro-bumps is difficult to control. The micro-bumps are generally obtained by vapor deposition and lift-off, and thick photoresist is required to obtain the corresponding pattern. Because the infrared detector units have small spacing and high density, the high aspect ratio photoetching technology and the high coplanarity micro-bump evaporation technology have difficulties; the metal climbing process of the middle layer electrode has great difficulty. The interlayer electrode is conventionally led out of the top of the device by depositing a metal line on the sidewall passivation layer. The metal lines are difficult to prepare and easy to fall off due to poor adhesion between the side wall passivation layer material and the metal.
Disclosure of Invention
The embodiment of the application provides an infrared detector array and a preparation method thereof, which are used for at least solving the problem that the extraction process of electrodes of an intermediate layer in an infrared detector unit on the side wall of the infrared detector unit in the related art is difficult.
According to an embodiment of the present application, there is provided an infrared detector array including: a read-out circuit board; the substrate layer comprises a plurality of substrate areas, and the substrate area array is arranged on the read-out circuit base plate; the infrared detector units are located on one side, away from the readout circuit substrate, of the substrate area, the substrate area corresponds to the infrared detector units one by one, and the infrared detector units comprise: a first absorption layer which is positioned on one side of the substrate region away from the readout circuit substrate and is in contact with the substrate region, wherein the first absorption layer has a first doping type; an intermediate layer on a side of the first absorber layer facing away from the substrate region, the intermediate layer having a second doping type; a second absorption layer, which is positioned on one side of the middle layer away from the first absorption layer, wherein the second absorption layer has the first doping type; and the first conductive layer penetrates through the first absorption layer and the substrate area and is respectively and electrically connected with the intermediate layer and the read-out circuit substrate.
In one exemplary embodiment, the infrared detector array further includes: a first electrode layer, a second electrode layer, and a third electrode layer, wherein: the first electrode layer is positioned on one side of the substrate area, which is away from the infrared detector unit, and is respectively and electrically connected with the first conductive layer and the readout circuit substrate; the second electrode layer penetrates through the substrate area, and the second electrode layer is respectively and electrically connected with the first absorption layer and the readout circuit substrate; in the direction perpendicular to the readout circuit substrate, the third electrode layer is located on the same side of the corresponding infrared detector unit and substrate region, and the third electrode layer is electrically connected with the second absorption layer and the readout circuit substrate, respectively.
In one exemplary embodiment, the readout circuit substrate has a plurality of bonding parts thereon, and the first electrode layer, the second electrode layer, and the third electrode layer are electrically connected to different ones of the bonding parts, respectively.
In an exemplary embodiment, the infrared detector unit further comprises a first passivation layer and a second passivation layer, wherein: a portion of the first passivation layer is located between the first conductive layer and the substrate region, and another portion of the first passivation layer is located between the first conductive layer and the first absorber layer; a part of the second passivation layer is positioned between the third electrode layer and the first side wall, another part of the second passivation layer is positioned between the third electrode layer and the substrate region, and the infrared detector unit is provided with the first side wall and the second side wall which are opposite in the direction that the third electrode layer points to the surface of the substrate region in parallel.
In an exemplary embodiment, the infrared detector unit further includes a third passivation layer, a portion of which is located between the substrate region and the readout circuit base plate and is penetrated by the second electrode layer and the first conductive layer, and another portion of which covers the second sidewall.
In an exemplary embodiment, there is a first gap and a second gap between adjacent infrared detector units, wherein: the areas adjacent to the substrate area, adjacent to the first absorber layer, and adjacent to the intermediate layer are in communication to form the first gap; the regions between adjacent ones of the intermediate layers and adjacent ones of the second absorbent layers communicate to form the second gap, the second gap having a width greater than a width of the first gap.
In one exemplary embodiment, the second absorption layer has a forbidden bandwidth greater than that of the first absorption layer.
According to another embodiment of the present application, there is provided a method for manufacturing an infrared detector array, including: providing a readout circuit substrate and a substrate layer, wherein the substrate layer comprises a plurality of substrate areas, and the substrate area array is arranged on the readout circuit substrate; an infrared detector unit is arranged on the substrate area, and the step of arranging the infrared detector unit comprises the following steps: forming a first absorption layer on one side of the substrate region, which is far away from the readout circuit substrate, wherein the first absorption layer is in contact with the substrate region and has a first doping type; forming an intermediate layer on a side of the first absorption layer facing away from the substrate region, the intermediate layer having a second doping type; and forming a first conductive layer in the first absorption layer, wherein the first conductive layer penetrates through the first absorption layer and the substrate region, and the first conductive layer is respectively electrically connected with the intermediate layer and the readout circuit substrate.
In an exemplary embodiment, the step of disposing a plurality of the infrared detector units includes: providing a preliminary substrate layer having a first surface; sequentially forming a first absorption preparation layer, a preparation intermediate layer and a second absorption preparation layer stacked on the first surface of the preparation substrate layer; and carrying out first patterning treatment on the second absorption preparation layer and the preparation intermediate layer to obtain a second absorption layer and the intermediate layer, wherein the second absorption layer is provided with a plurality of first grooves penetrating through the intermediate layer, and the first grooves are provided with a third side wall and a fourth side wall which are opposite along the direction parallel to the first surface.
In an exemplary embodiment, after the step of forming the first groove, the step of disposing a plurality of the infrared detector units further includes: forming a first passivation preparation layer on the second absorption layer, wherein the first passivation preparation layer covers the bottom, the first side wall and the second side wall of the first groove; performing second patterning treatment on the first passivation preparation layer to obtain a first sub-passivation preparation layer, wherein one part of the first sub-passivation preparation layer is positioned on the first side wall, and the other part of the first sub-passivation preparation layer is positioned at the bottom of the first groove; forming a first electrode preparation layer on the second absorption layer and in the first groove, wherein the first electrode preparation layer covers the first sub-passivation preparation layer; and carrying out third patterning treatment on the first electrode preparation layer to obtain a first sub-electrode preparation layer, wherein one part of the first sub-electrode preparation layer is positioned on the surface of one side of the second absorption layer, which is away from the middle layer, and the other part of the first sub-electrode preparation layer is positioned on the first sub-passivation preparation layer.
In an exemplary embodiment, the step of disposing a plurality of the infrared detector units further includes: providing a carrier plate; coating temporary bonding glue on one side surface of the carrier plate; and connecting the carrier plate with the second absorption layer through the temporary bonding adhesive.
In an exemplary embodiment, the step of disposing a plurality of the infrared detector units further includes: turning over the positions of the carrier plate and the prepared substrate layer so that the carrier plate is used as a base; and performing fourth patterning treatment on the prepared substrate layer and the first absorption preparation layer to obtain the substrate region and the first absorption layer, wherein the first absorption layer is provided with a plurality of second grooves penetrating through the middle layer, the projection of the bottoms of the second grooves on the carrier plate is positioned in the projection of the bottoms of the first grooves on the carrier plate, the second grooves are provided with opposite third side walls and fourth side walls along the direction parallel to the first surface, the third side walls are positioned on the same side as the first side walls, and the fourth side walls are positioned on the same side as the second side walls.
In an exemplary embodiment, the step of disposing a plurality of the infrared detector units further includes: and removing the region corresponding to at least one second groove in the intermediate layer, so that at least one second groove is communicated with at least one first groove to form a through groove, and obtaining the infrared detector unit.
In an exemplary embodiment, after the step of obtaining the infrared detector unit, the manufacturing method further includes: performing fifth patterning treatment on the substrate region to form a third groove, wherein the third groove penetrates through the first absorption layer; forming a second passivation preparation layer on the substrate region, the second passivation preparation layer covering the through groove, the second groove and the third groove; and performing sixth patterning treatment on the second passivation preparation layer to expose the region corresponding to the second groove in the intermediate layer, expose the region corresponding to the third groove in the first absorption layer, and expose the region corresponding to the through groove in the temporary bonding adhesive to obtain a third sub-passivation preparation layer, wherein the third sub-passivation preparation layer positioned on the fourth side wall and the first sub-passivation preparation layer form a second passivation layer, the third sub-passivation preparation layer positioned in the second groove forms a first passivation layer, and the rest of the third sub-passivation preparation layers form a third passivation layer.
In an exemplary embodiment, the preparation method further includes: forming a first conductive layer in the second groove; forming a first electrode layer on one side of the first conductive layer away from the intermediate layer; and forming a second electrode layer in the third groove.
In an exemplary embodiment, after the step of disposing the plurality of infrared detector units on the substrate region, the manufacturing method further includes: forming a bonding portion on the second electrode layer and the first electrode layer; and attaching the readout circuit substrate to the bonding part so as to bond the readout circuit substrate and the infrared detector array.
In an exemplary embodiment, the preparation method further includes: turning over the positions of the readout circuit substrate and the carrier plate so that the readout circuit substrate serves as a substrate; and removing the carrier plate and the temporary bonding adhesive.
In an exemplary embodiment, the preparation method further includes: a second sub-electrode preparation layer is formed on a side of the second passivation layer on the fourth sidewall facing away from the fourth sidewall, the second sub-electrode preparation layer and the first sub-electrode preparation layer forming a third electrode layer.
In one exemplary embodiment, the patterning process includes at least one of: ion etching and reactive ion etching.
In one exemplary embodiment, the process of forming the first, second and preliminary absorption layers is at least one of: molecular beam epitaxy processes and metalorganic chemical vapor deposition processes.
By inserting the first conductive layer into the first absorption layer of the infrared detector unit, the intermediate layer is electrically connected with the readout circuit substrate through the first conductive layer, the intermediate layer is led out to the readout circuit substrate in the infrared detector unit, a metal lead is not required to be led out from the side wall of the infrared detector unit, a passivation layer is arranged on the side wall of the infrared detector unit, the adhesiveness between the passivation layer and metal is poor, and the process difficulty of the infrared detector is reduced. Therefore, the problem that the process difficulty of leading out the electrode of the middle layer in the infrared detector unit on the side wall of the infrared detector unit in the related art is high can be solved, the falling-off between metal and the passivation layer on the side wall is avoided, and the purpose of improving the stability of the infrared detector array is further achieved.
Drawings
FIG. 1 is a schematic diagram of a partial cross-sectional structure of an infrared detector array according to an embodiment of the present application;
FIG. 2 is a schematic view of a partial cross-sectional structure of the third electrode layer and the second passivation layer of FIG. 1;
FIG. 3 is a schematic view showing a partial cross-sectional structure of the first electrode layer, the first passivation layer and the first conductive layer of FIG. 1;
FIG. 4 is a schematic flow chart of a method for fabricating an infrared detector array according to an embodiment of the present application;
FIG. 5 is a schematic diagram showing a cross-sectional structure of a substrate after providing a readout circuit substrate in the method for manufacturing an infrared detector array of FIG. 4;
FIG. 6 is a schematic cross-sectional view of a substrate after providing a preliminary substrate layer in a step of forming an infrared detector cell and sequentially forming a first absorption preliminary layer, a preliminary intermediate layer, and a second absorption preliminary layer on the preliminary substrate layer in a method of manufacturing the infrared detector array of FIG. 4;
FIG. 7 is a schematic cross-sectional view of the substrate after patterning the preliminary interlayer and the second absorption preliminary layer formed in FIG. 6 to form a first recess;
fig. 8 is a schematic cross-sectional view of a substrate after forming a first sub-passivation preparation layer and a first sub-electrode preparation layer in the first recess formed in fig. 7;
FIG. 9 is a schematic cross-sectional view of a substrate after providing a carrier and temporary bonding adhesive;
FIG. 10 is a schematic cross-sectional view of the substrate after bonding the carrier plate and temporary bonding paste provided in FIG. 9 to the structure formed in FIG. 8;
FIG. 11 is a schematic cross-sectional view of the substrate after the structure formed in FIG. 10 is flipped over and the preliminary substrate area is thinned;
FIG. 12 is a schematic cross-sectional view of the substrate after patterning the preliminary substrate region and the second absorber preliminary layer formed in FIG. 11 to form a substrate region and a second absorber layer;
FIG. 13 is a schematic cross-sectional view of the substrate after the first groove and the second groove in FIG. 12 are communicated to form a through groove;
FIG. 14 is a schematic cross-sectional view of the substrate after patterning the preliminary substrate region and the second absorber preliminary layer formed in FIG. 11 to form a substrate region, a second absorber layer, a through trench and a second recess;
fig. 15 is a schematic cross-sectional view of a substrate in which a third sub-passivation preparation layer and a first conductive layer are formed on the substrate region formed in fig. 12;
Fig. 16 is a schematic cross-sectional view of a substrate after forming a first electrode layer on the first conductive layer formed in fig. 15 and a second electrode layer in a third groove;
FIG. 17 is a schematic cross-sectional view of the substrate after bonding the structure formed in FIG. 16 to a readout circuit substrate;
fig. 18 is a schematic cross-sectional view of a substrate after a third electrode layer is formed after removing the carrier and temporary bonding paste in the structure formed in fig. 17.
Wherein the above figures include the following reference numerals:
10. A read-out circuit board; 21. a substrate region; 210. preparing a substrate layer; 22. an infrared detector unit; 221. a first absorbent layer; 2210. a first absorbent preparation layer; 222. an intermediate layer; 2220. preparing an intermediate layer; 223. a first conductive layer; 224. a second absorbent layer; 2240. a second absorbent preparation layer; 30. a first electrode layer; 31. a second electrode layer; 310. a third groove; 32. a third electrode layer; 320. a first sub-electrode preparation layer; 321. a second sub-electrode preparation layer; 33. a bonding portion; 34. a first passivation layer; 340. a first sub-passivation preparation layer; 35. a third passivation layer; 350. a third sub-passivation preparation layer; 36. a second passivation layer; 40. a carrier plate; 41. and (5) temporarily bonding glue.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The application will be described in detail below with reference to the drawings in connection with embodiments.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Furthermore, in the description and in the claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
In order that those skilled in the art will better understand the present application, a technical solution in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, shall fall within the scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
It should be noted that, the drawings in the embodiments of the present application are all partial schematic views, and only the area related to the device in the present application is taken as a schematic view. The drawings provided in the present embodiment are only for illustrating the basic concept of the present application by way of illustration, but only the parts related to the present application are shown in the drawings, not drawn according to the number, shape and size of the parts in actual implementation, the form, number and proportion of the parts in actual implementation may be arbitrarily changed, and the layout form of the parts may be more complex.
In this embodiment, there is provided an infrared detector array, as shown in fig. 1, including: a read-out circuit board 10; a substrate layer including a plurality of substrate regions 21, the substrate regions 21 being arranged in an array on one side of the readout circuit board 10; an infrared detector unit 22 located on a side of the substrate region 21 facing away from the readout circuit substrate 10, the substrate region 21 and the infrared detector unit 22 being in one-to-one correspondence, the infrared detector unit 22 including: a first absorption layer 221 located in the substrate region 21 away from the readout circuit substrate 10 and in contact with the substrate region 21, the first absorption layer 221 having a first doping type; an intermediate layer 222 located on a side of the first absorption layer 221 facing away from the substrate region 21, the intermediate layer 222 having a second doping type; a second absorption layer 224 is located on a side of the intermediate layer 222 facing away from the first absorption layer 221, the second absorption layer 224 having the first doping type; the first conductive layer 223 penetrates the first absorption layer 221 and the substrate region 21, and the first conductive layer 223 is electrically connected to the intermediate layer 222 and the readout circuit board 10, respectively.
Through the embodiment, the first conductive layer is filled in the substrate area and the first absorption layer, and the first conductive layer electrically connects the intermediate layer with the readout circuit substrate, so that the intermediate layer can be directly led out from the inside of the infrared detector unit to the readout circuit substrate, the step of preparing a metal lead on the passivation layer on the side wall of the infrared detector unit is omitted, and the process difficulty is reduced.
In the above embodiment, as shown in fig. 1, the infrared detector array includes the readout circuit substrate 10, the substrate area 21 and the plurality of infrared detector units 22, the infrared detector units 22 include the first absorption layer 221, the second absorption layer 224 and the intermediate layer 222, in the conventional technology, the connection between the intermediate layer 222 and the readout circuit substrate 10 is led out from the top of the infrared detector unit 22 through the intermediate layer 222 by metal leads, and the side wall of the infrared detector unit 22 is electrically connected with the readout circuit substrate 10, where the infrared detector unit 22 in the application further includes the first conductive layer 223, and the first conductive layer 223 penetrates through the substrate area 21 and the first absorption layer 221 to electrically connect the intermediate layer 222 with the readout circuit substrate 10, so that the stability of the integral electrical connection of the infrared detector is improved, and the process difficulty of the infrared detector is reduced.
In the above embodiment, as shown in fig. 1, the infrared detector unit 22 includes the first absorption layer 221, the intermediate layer 222, and the second absorption layer 224, where the doping type of the first absorption layer 221 is identical to the doping type of the second absorption layer 224, and the doping type of the intermediate layer 222 is opposite to the doping type of the first absorption layer 221, for example, the first absorption layer 221, the intermediate layer 222, and the second absorption layer 224 are an n-type long wave absorption region, a p-type intermediate layer, and an n-type short wave absorption region in the infrared detector unit 22 in order, so that two back-to-back diode structures are formed, and the short wave absorption region operates when a positive bias is applied between the n-type short wave absorption region and the p-type intermediate layer; the long wave absorption region operates when a negative bias is applied between the p-type intermediate layer and the n-type long wave absorption region. The electrodes of the first absorption layer 221, the intermediate layer 222, and the second absorption layer 224 are electrically connected to pads corresponding to the readout circuit substrate 10. The first absorption layer 221, the intermediate layer 222, and the second absorption layer 224 may be etched to form a discrete infrared detector unit with an n-p-n structure, which is also called a pixel.
In the above embodiment, the thicknesses of the first absorption layer and the second absorption layer may be 500nm to 2um, such as 500nm, 600nm, 1 μm, 1.5 μm and 2 μm, and the thicknesses of the intermediate layer may be 400nm to 1um, such as 500nm, 600nm and 1 μm.
In an alternative, as shown in fig. 1, the infrared detector array further includes a first electrode layer 30, a second electrode layer 31, and a third electrode layer 32, where: the first electrode layer 30 is located on a side of the substrate region 21 away from the infrared detector unit 22, and the first electrode layer 30 is electrically connected to the first conductive layer 223 and the readout circuit board 10, respectively; the second electrode layer 31 penetrates the substrate region 21, and the second electrode layer 31 is electrically connected to the first absorption layer 221 and the readout circuit board 10, respectively; the third electrode layer 32 is located on the same side of the corresponding infrared detector unit 22 and substrate region 21 in a direction perpendicular to the readout circuit board, and the third electrode layer 32 is electrically connected to the second absorption layer 224 and the readout circuit board 10, respectively.
In the above embodiment, as shown in fig. 1, the infrared detector unit 22 further includes the first electrode layer 30, the second electrode layer 31, and the third electrode layer 32, where the first electrode layer 30 is an electrode layer electrically connected to the readout circuit substrate 10 through the intermediate layer 222, the second electrode layer 31 is an electrode layer electrically connected to the readout circuit substrate 10 through the first absorption layer 221, and the third electrode layer 32 is an electrode layer electrically connected to the readout circuit substrate 10 through the second absorption layer 224. One end of the third electrode layer 32 is located at a side of the second absorption layer 224 away from the intermediate layer 222, and the other end of the third electrode layer 32 is deposited on the readout circuit substrate 10 along a first sidewall of the infrared detector unit 22, and is electrically connected to the short-wave signal corresponding to the readout circuit substrate 10. The first absorption layer 221 is electrically connected to the corresponding long wave signal of the readout circuit substrate 10 through the second electrode layer 31.
In an alternative, as shown in fig. 1, the readout circuit substrate 10 includes a plurality of bonding portions 33, and the first electrode layer 30, the second electrode layer 31, and the third electrode layer 32 are electrically connected to different bonding portions.
In the above embodiment, as shown in fig. 1, the first electrode layer 30, the second electrode layer 31, and the third electrode layer 32 are bonded at the pads of the readout circuit substrate 10 by wafer-level bonding, respectively, so as to electrically connect the first absorption layer 221, the second absorption layer 224, and the intermediate layer 222 with the readout circuit substrate 10.
In the above embodiment, the materials of the first electrode layer, the second electrode layer, and the third electrode layer may be Cu and In.
In the conventional process, the infrared detector unit is electrically connected with the readout circuit substrate by adopting a micro-bump flip-chip interconnection mode, but the method is generally used for underfilling, namely, glue is filled in gaps among the micro-bumps, so that mechanical support is provided for the subsequent substrate layer thinning process, and the reliability of the device is improved. However, the process difficulty of uniformly and completely filling the photoresist in a gap of a few micrometers is high, coplanarity and uniformity of the micro-bumps are difficult to control, the micro-bumps are generally obtained through evaporation deposition and stripping, thick photoresist is adopted to obtain corresponding patterns, and the high aspect ratio photoetching technology and the high coplanarity micro-bump evaporation technology are more difficult to use when the infrared detector units are etched due to small spacing and high density between the infrared detector units. The bonding of the infrared detector unit and the reading circuit is performed by adopting the wafer-level bonding mode to replace the micro-bump flip-chip interconnection technology, so that the process of filling glue in gaps between micro-bumps is omitted, the preparation process of the high-coplanarity micro-bumps is omitted, and the process difficulty of preparing the infrared detector unit is reduced.
In an alternative, as shown in fig. 1, the infrared detector unit 22 further includes a first passivation layer 34 and a second passivation layer 36, where: a part of the first passivation layer 34 is located between the first conductive layer 223 and the substrate region 21, and another part of the first passivation layer 34 is located between the first conductive layer 223 and the first absorption layer 221; a part of the second passivation layer 36 is located between the third electrode layer 32 and the first sidewall, another part of the second passivation layer 36 is located between the third electrode layer 32 and the substrate region 21, and the infrared detector unit 22 has the first sidewall and the second sidewall opposite to each other in a direction in which the third electrode layer 32 is parallel to a surface of the substrate region 21. As shown in fig. 2, fig. 2 is a schematic partial cross-sectional view of the third electrode layer 32 and the second passivation layer 36. As shown in fig. 3, fig. 3 is a schematic partial cross-sectional view of the first electrode layer 30, the first passivation layer 34, and the first conductive layer 223.
In the above embodiment, as shown in fig. 1, there is a portion of the first passivation layer 34 between the first conductive layer 223 and the substrate region 21, and another portion of the first passivation layer 34 between the first conductive layer 223 and the first absorption layer 221; the second passivation layer 36 is covered by the third electrode layer 32 and is located between the third electrode layer 32 and the side walls of the infrared detector cell 22. The passivation layer is not part of the infrared detector unit 22.
In an alternative, as shown in fig. 1, the infrared detector unit 22 further includes a third passivation layer 35, a portion of the third passivation layer 35 is located between the substrate region 21 and the readout circuit base plate 10 and is penetrated by the second electrode layer 31 and the first conductive layer 223, and another portion of the third passivation layer 35 covers the second sidewall.
In the above embodiment, as shown in fig. 1, a part of the third passivation layer 35 is located on the sidewall of the infrared detector unit 22, that is, on the sidewall of the infrared detector unit 22, another part of the third passivation layer 35 is located on the side of the substrate region 21 facing away from the first absorption layer 221, the first electrode layer 30 and the second electrode layer 31 are located in another part of the third passivation layer 35, and another part of the third passivation layer 35 is penetrated to be in contact with the substrate region 21.
In an alternative, as shown in fig. 1, a first gap H 1 and a second gap H 2 are provided between adjacent infrared detector units 22, where: the areas between the adjacent substrate area 21, the adjacent first absorption layer 221 and the adjacent intermediate layer 222 communicate to form the first gap H 1; the areas between the adjacent intermediate layer 222 and the adjacent second absorbing layer 224 communicate to form the second gap H 2, and the width of the second gap H 2 is greater than the width of the first gap H 1.
In the above embodiment, as shown in fig. 1, the infrared detector units 22 are arranged in an array on the substrate region 21, with a gap between the infrared detector units 22, wherein a first gap H 1 is provided between the substrate region 21 of the adjacent infrared detector unit 22 and the first absorption layer 221 and a part of the intermediate layer 222, a second gap H 2 is provided between another part of the intermediate layer 222 of the adjacent infrared detector unit 22 and the second absorption layer 224, and the first gap H 1 and the second gap H 2 are in communication.
In an alternative, as shown in fig. 1, the forbidden bandwidth of the second absorption layer 224 is greater than the forbidden bandwidth of the first absorption layer 221.
In the above embodiment, as shown in fig. 1, the second absorption layer 224 is a short-wave absorption region of the infrared detector unit 22, and the forbidden bandwidth of the second absorption layer 224 is larger, so that the short-wave infrared radiation can be better absorbed, and the sensitivity to the short-wave infrared radiation is improved; the forbidden bandwidth of the short wave absorption area is large, the response to the long wave infrared signal is small, the interference of the long wave infrared signal can be effectively reduced, and the noise level is reduced. By adjusting the difference of forbidden band widths, infrared signals in different wave bands can be resolved, and the wave band resolution is improved. The first absorption layer 221 is a long-wave absorption region of the infrared detector unit 22, and the design that the forbidden bandwidth of the short-wave absorption region is larger than that of the long-wave absorption region can improve the performance of the detector array and enhance the sensitivity and accuracy to the short-wave infrared signals.
In this embodiment, a method for manufacturing an infrared detector array is provided, and fig. 4 is a flowchart of the method for manufacturing an infrared detector array according to an embodiment of the present application, as shown in fig. 4, where the flowchart includes the following steps:
Step S102: providing a readout circuit substrate and a substrate layer, wherein the substrate layer comprises a plurality of substrate regions, and the substrate region array is arranged on the readout circuit substrate;
Step S104: an infrared detector unit is arranged on the substrate area, and the step of arranging the infrared detector unit comprises the following steps: forming a first absorption layer on one side of the substrate region, which is far away from the readout circuit substrate, wherein the first absorption layer is in contact with the substrate region, and the first absorption layer has a first doping type; forming an intermediate layer on one side of the first absorption layer away from the substrate region, the intermediate layer having a second doping type; forming a second absorption layer on one side of the intermediate layer, which is away from the first absorption layer, wherein the second absorption layer has a first doping type;
step S106: and forming a first conductive layer in the substrate region and the first absorption layer, wherein the first conductive layer penetrates the first absorption layer and the substrate region, and the first conductive layer is electrically connected to the intermediate layer and the readout circuit substrate, respectively.
Through the steps, in the process of preparing the infrared detector unit, the first conductive layer is formed in the substrate area and the first absorption layer, and the first conductive layer is used for electrically connecting the intermediate layer with the readout circuit substrate, so that the intermediate layer can be directly led out from the inside of the infrared detector unit to the readout circuit substrate, the step of preparing a metal lead on the passivation layer on the side wall of the infrared detector unit is omitted, and the process difficulty is reduced.
Exemplary embodiments of a method of fabricating an infrared detector array according to the present application will be described in more detail below. These exemplary embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. It should be appreciated that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of these exemplary embodiments to those skilled in the art.
First, step S102 is performed, and as shown in fig. 5, step S102: a readout circuit substrate 10 and a substrate layer including a plurality of substrate regions are provided, and the substrate region array is provided on the readout circuit substrate 10.
Specifically, the readout circuit substrate 10 may convert the infrared signal detected by the infrared detector array into a readable electrical signal, and perform operations such as processing, amplifying, filtering, and so on, so that the signal detected by the infrared detector array can be accurately collected, processed, and analyzed. The readout circuit substrate 10 can also output the processed infrared signal to a display, recorder or other device for the user to observe and analyze the infrared signal. The substrate layer is not shown temporarily in fig. 5.
After the step of providing the readout circuit substrate is performed, as shown in fig. 6 to 13, step S104 is performed: a plurality of infrared detector units 22 are arranged in an array on the readout substrate region 21, and the step of arranging the infrared detector units 22 includes: forming a first absorption layer 221 on a side of the substrate region 21 facing away from the readout circuit substrate 10, the first absorption layer 221 being in contact with the substrate region 21, the first absorption layer 221 having a first doping type; forming an intermediate layer 222 on a side of the first absorption layer 221 facing away from the substrate region 21, the intermediate layer 222 having a second doping type; forming a second absorption layer 224 on a side of the intermediate layer 222 facing away from the first absorption layer 221, wherein the second absorption layer 224 has a first doping type; a first conductive layer 223 is formed in the first absorption layer 221, the first conductive layer 223 penetrates the first absorption layer 221 and the substrate region 21, and the first conductive layer 223 is electrically connected to the intermediate layer 222 and the readout circuit substrate 10, respectively.
Specifically, the infrared detector unit 22 arranged in an array is formed on the readout circuit substrate 10, and the infrared detector unit 22 includes a first absorption layer 221, a second absorption layer 224, and an intermediate layer 222, and further includes, in the substrate region 21 and the first absorption layer 221, a first conductive layer 223, where the first conductive layer 223 is used to electrically connect the intermediate layer 222 with the readout circuit substrate 10.
In an alternative, as shown in fig. 6 and 7, the step of disposing a plurality of the above-mentioned infrared detector units includes: providing a preliminary substrate layer 210 having a first surface; a first absorption preparation layer 2210, a preparation intermediate layer 2220, and a second absorption preparation layer 2240 stacked in this order are formed on the first surface of the preparation substrate layer 210; the second absorption preparation layer 2240 and the preparation intermediate layer 2220 are subjected to a first patterning process to obtain a second absorption layer 224 and the intermediate layer 222, wherein the second absorption layer 224 has a plurality of first grooves penetrating through the intermediate layer 222, and the first grooves have opposite third and fourth sidewalls in a direction parallel to the first surface.
In the above-described embodiment, as shown in fig. 6, the structure preparation substrate layer 210, the first absorption preparation layer 2210, the preparation intermediate layer 2220, and the second absorption preparation layer 2240 may be grown using a molecular beam epitaxy apparatus or a metal organic chemical vapor deposition apparatus.
Illustratively, the first and second absorptive preparation layers 2210 and 2240 are n-type in material conductivity type; the material conductivity type of the preliminary intermediate layer 2220 is p-type; the forbidden bandwidth of the material of the second absorbing preparation layer 2240 is larger than that of the first absorbing preparation layer 2210. The thicknesses of the first and second absorption preparation layers 2210 and 2240 may be 500nm to 2 μm, e.g., 500nm, 600nm, 1 μm, 1.5 μm, and 2 μm, and the thicknesses of the preparation intermediate layer 2220 may be 400nm to 1 μm, e.g., 500nm, 600nm, and 1 μm.
In the above embodiment, as shown in fig. 7, the first patterning process is performed on the second absorption preparation layer and the preparation intermediate layer, the photoresist mesa pattern of the second absorption preparation layer may be formed by a photolithography process, then the first groove is formed in the second absorption preparation layer by using the photoresist as a mask, and the second absorption layer 224 is obtained by an inductively coupled plasma etching or a reactive ion etching process, and the etching is stopped to the intermediate position of the preparation intermediate layer, so as to obtain the intermediate layer 222.
In an alternative, as shown in fig. 8, after the step of forming the first groove, the step of disposing a plurality of the infrared detector units further includes: forming a first passivation preparation layer on the second absorption layer 224, the first passivation preparation layer covering the bottom of the first groove, the third sidewall and the fourth sidewall; performing a second patterning process on the first passivation preparation layer to obtain a first sub-passivation preparation layer 340, wherein a part of the first sub-passivation preparation layer 340 is located on the third sidewall, and another part of the first sub-passivation preparation layer 340 is located at the bottom of the first groove; forming a first electrode preparation layer on the second absorption layer 224 and in the first groove, the first electrode preparation layer covering the first sub-passivation preparation layer 340; and performing a third patterning process on the first electrode preparation layer to obtain a first sub-electrode preparation layer 320, wherein a part of the first sub-electrode preparation layer 320 is located on a surface of the second absorption layer 224 on a side facing away from the intermediate layer 222, and another part of the first sub-electrode preparation layer 320 is located on the first sub-passivation preparation layer 340.
In the above embodiment, as shown in fig. 8, a first passivation preparation layer is deposited on the second absorption layer 224, the first passivation preparation layer covers the bottom and the side walls of the first groove, and the first passivation preparation layer is patterned to form a first sub-passivation preparation layer 340, and the first sub-passivation preparation layer 340 covers the third side walls of the first groove and part of the bottom of the first groove. A first electrode preparation layer is deposited on the second absorption layer 224, and patterning is performed on the first electrode preparation layer to form a first sub-electrode preparation layer 320, wherein a part of the first sub-electrode preparation layer 320 covers the first sub-passivation preparation layer 340, and another part of the first sub-electrode preparation layer 320 covers a part of a surface of the second absorption layer 224, which is away from the middle layer 222. The first absorbing preparation layer 2210 and the preparation substrate layer 210 in fig. 7 and 8 are identical to those described in fig. 6, and a description thereof will not be repeated here.
In the above embodiment, the material of the first passivation preparation layer may be a SiO 2、Si3N4 and Al 2O3 wide bandgap insulating material or an organic material such as PI glue, and the thickness may be 1um to 2um. The material of the first electrode preparation layer may be any one or more of Ti, pt, and Au, or any one or more of Ti, ni, and Au.
In an alternative, as shown in fig. 9, the step of disposing a plurality of the above infrared detector units further includes: providing a carrier plate 40; a temporary bonding adhesive 41 is coated on one side surface of the carrier plate 40; the carrier 40 is connected to the second absorption layer by the temporary bonding adhesive 41.
In the above embodiment, as shown in fig. 9, the temporary bonding technique using the carrier plate 40 as a support is advantageous to improve the quality of the thinning process by thinning the substrate layer before bonding with the readout circuit substrate.
The infrared detector unit of the infrared detector array usually adopts a high aspect ratio etching technology, but because the infrared detector unit of the bicolor infrared detector array comprises two wave bands, the functional area is thicker than single color, and after the distance between the infrared detector units is reduced, the etching aspect ratio is increased, so that the side wall angle and the flatness of the infrared detector unit are difficult to ensure. The carrier plate is temporarily bonded on one side of the infrared detector array to etch the other side of the infrared detector array, so that the quality and stability of the infrared detector array are improved.
In an alternative, as shown in fig. 10 to 12, the step of disposing a plurality of the above-mentioned infrared detector units further includes: turning over the positions of the carrier 40 and the preliminary substrate layer 210 so that the carrier 40 serves as a base; the preliminary substrate layer 210 and the first absorption preliminary layer 2210 are subjected to a fourth patterning process to obtain the substrate region 21 and the first absorption layer 221, wherein the first absorption layer 221 has a plurality of second grooves penetrating through the intermediate layer 222, and a projection of bottoms of the second grooves onto the carrier 40 is positioned on a projection of bottoms of the first grooves onto the carrier 40, and the second grooves have opposite third and fourth sidewalls in a direction parallel to the first surface, the third sidewall being on the same side as the first sidewall, and the fourth sidewall being on the same side as the second sidewall.
In the above embodiment, as shown in fig. 10, the carrier 40 is temporarily bonded to the second absorption layer 224 by the temporary bonding adhesive 41, as shown in fig. 11, the current device is turned 180 ° to make the positions of the carrier 40 and the prepared substrate layer 210 be interchanged, the carrier 40 is used as a substrate, the prepared substrate layer 210 is thinned, as shown in fig. 12, the thinned prepared substrate layer and the first absorption prepared layer are patterned, and the substrate region 21 and the first absorption layer 221 are obtained. The carrier 40, temporary bonding adhesive 41, second absorption layer 224 and intermediate layer 222 in fig. 11 to 12 are identical to the structure in fig. 1, and the present application will not be repeated.
In the above embodiment, the preliminary substrate layer may be thinned to 100um or less by grinding and chemical mechanical polishing and chemical solvent etching processes. The patterning process may use a photolithography process to form a second recess in the first absorption layer and the substrate region, wherein a third sidewall of the second recess is on the same side as the first sidewall of the first recess, and a fourth sidewall of the second recess is on the same side as the second sidewall of the first recess.
In an alternative, as shown in fig. 13, the step of disposing a plurality of the above infrared detector units further includes: and removing the region corresponding to at least one second groove in the intermediate layer 222, so that at least one second groove and at least one first groove form a through groove, thereby obtaining the infrared detector unit.
In the above embodiment, as shown in fig. 13, the intermediate layer 222 between the second groove and the first groove is removed to form an independent n-p-n infrared detector unit structure, and the first groove and the second groove are communicated to form a through groove.
As shown in fig. 14, when patterning the thinned preliminary substrate layer and the first absorption preliminary layer, the substrate region 21, the first absorption layer 221, and the intermediate layer 222 may be directly etched through to obtain a through groove, and in this case, the bottom of the first groove is located in the intermediate layer 222, and a plurality of infrared detector units may be obtained by one etching.
After a plurality of infrared detector units are arrayed on the readout circuit substrate, as shown in fig. 15 to 18, step S106 is performed: a first conductive layer 223 is formed in the substrate region 21 and the first absorption layer 221, the first conductive layer 223 penetrates the first absorption layer 221 and the substrate region 21, and the first conductive layer 223 is electrically connected to the intermediate layer 222 and the readout circuit substrate, respectively.
Specifically, the first conductive layer 223 is formed in the second groove formed as described above, and the first conductive layer 223 connects the intermediate layer 222 and the readout circuit substrate, so that the first conductive layer 223 can be electrically connected inside the infrared detector unit.
In an alternative, as shown in fig. 15 and fig. 1, after the step of obtaining the infrared detector unit, the preparation method further includes: performing a fifth patterning process on the substrate region 21 to form a third recess 310, wherein the third recess 310 penetrates through the first absorption layer 221; forming a second passivation preparation layer on the substrate region 21, the second passivation preparation layer covering the through groove, the second groove, and the third groove; the second passivation preparing layer is subjected to a sixth patterning process so as to expose a region corresponding to the second recess in the intermediate layer 222, a region corresponding to the third recess 310 in the first absorbing layer 221, and a region corresponding to the through recess in the temporary bonding glue 41, thereby obtaining a third sub-passivation preparing layer 350, the third sub-passivation preparing layer 350 on the fourth sidewall and the first sub-passivation preparing layer 340 form a second passivation layer 36, the third sub-passivation preparing layer 350 in the second recess forms a first passivation layer 34, and the remaining third sub-passivation preparing layer 350 forms a third passivation layer 35.
In the above embodiment, as shown in fig. 15, before the step of forming the first conductive layer 223, the preparation method further includes: the substrate region 21 is patterned to obtain a third groove 310, a second passivation preparation layer is deposited and formed on the substrate region 21, the second passivation preparation layer covers the through groove, the second groove, the third groove, the side walls of the through groove and the second groove and the side walls of the third groove 310, patterning is performed on the through groove, the second groove and the third groove to obtain a third sub-passivation preparation layer 350, the third sub-passivation preparation layer 350 exposes the third groove 310, the bottom of the through groove and the bottom of the second groove in the substrate region 21, part of the third sub-passivation preparation layer 350 covers two side walls of the through groove, and part of the third sub-passivation preparation layer 350 covers two side walls of the second groove. The third sub-passivation preparation layer 350 covering the substrate region 21 and the third sidewall of the through trench is the third passivation layer 35 (shown in fig. 1), the third sub-passivation preparation layer 350 and the first sub-passivation preparation layer 340 covering the fourth sidewall of the through trench are the second passivation layer 36 (shown in fig. 1), and the third sub-passivation preparation layer 350 covering both sides of the second groove is the first passivation layer 34 (shown in fig. 1).
In an alternative, as shown in fig. 15, the above preparation method further includes: forming a first conductive layer 223 in the second groove; forming a first electrode layer on a side of the first conductive layer 223 facing away from the intermediate layer 222; a second electrode layer is formed in the third groove 310.
In the above embodiment, as shown in fig. 15, the first conductive layer 223 is formed in the second groove having the first passivation layer, as shown in fig. 16, the first electrode layer 30 is formed on the first conductive layer 223, and the second electrode layer 31 is formed in the third groove.
In an alternative, as shown in fig. 17, after the step of disposing an infrared detector unit on the substrate area 21, the preparation method further includes: forming a bonding portion 33 on the second electrode layer 31 and the first electrode layer 30; the readout circuit board 10 is attached to the bonding portion 33 so as to bond the readout circuit board 10 to the infrared detector array.
In the above embodiment, as shown in fig. 17, the bonding portion 33 is adhered to the second electrode layer 31 and the first electrode layer 30, and the readout circuit substrate 10 is bonded to the infrared detector array via the bonding portion 33.
In an alternative, as shown in fig. 17, the above preparation method further includes: turning the positions of the readout circuit board 10 and the carrier 40 so that the readout circuit board 10 serves as a substrate; the carrier 40 and the temporary bonding glue are removed.
In the above embodiment, the readout circuit substrate 10 and the carrier are turned over by 180 ° and the carrier is removed, so that the temporary bonding between the carrier and the temporary bonding adhesive is released.
In an alternative, as shown in fig. 18, the above preparation method further includes: a second sub-electrode preparation layer 321 is formed on a side of the second passivation layer 36 on the fourth sidewall facing away from the fourth sidewall, and the second sub-electrode preparation layer 321 and the first sub-electrode preparation layer 320 form a third electrode layer 32.
In the above embodiment, as shown in fig. 18, the second electrode preparation layer is deposited in the through groove, the second electrode preparation layer is patterned to form the second sub-electrode preparation layer 321, the second sub-electrode preparation layer 321 covers the second passivation layer 36, the second passivation layer 36 and the first sub-electrode preparation layer 320 form the third electrode layer 32, and the third electrode layer 32 electrically connects the second absorption layer 224 and the readout circuit substrate 10.
In one alternative, the patterning process includes at least one of: ion etching and reactive ion etching. The process of forming the first absorption preparation layer, the second absorption preparation layer and the preparation intermediate layer is at least one of the following: molecular beam epitaxy processes and metalorganic chemical vapor deposition processes.
In the above embodiment, the patterning process may also use photolithography, and the process of patterning process and the process of preparing each layer of structure in the infrared detector array may be selected reasonably according to practical situations.
It should be noted that the descriptions of fig. 6 to 18 are identical to the descriptions of fig. 1 if any of the structures not mentioned.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the above-mentioned methods of the various embodiments of the present application.
The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application should be included in the protection scope of the present application.
Claims (20)
1. An infrared detector array, characterized in that,
Comprising the following steps:
A read-out circuit board;
the substrate layer comprises a plurality of substrate areas, and the substrate area array is arranged on the read-out circuit base plate;
The infrared detector units are located on one side, away from the readout circuit substrate, of the substrate area, the substrate area corresponds to the infrared detector units one by one, and the infrared detector units comprise:
a first absorption layer which is positioned on one side of the substrate region away from the readout circuit substrate and is in contact with the substrate region, wherein the first absorption layer has a first doping type;
An intermediate layer on a side of the first absorber layer facing away from the substrate region, the intermediate layer having a second doping type;
A second absorption layer, which is positioned on one side of the middle layer away from the first absorption layer, wherein the second absorption layer has the first doping type;
And the first conductive layer penetrates through the first absorption layer and the substrate area and is respectively and electrically connected with the intermediate layer and the read-out circuit substrate.
2. The infrared detector array of claim 1, the infrared detector array is characterized by further comprising: a first electrode layer, a second electrode layer, and a third electrode layer, wherein:
The first electrode layer is positioned on one side of the substrate area, which is away from the infrared detector unit, and is respectively and electrically connected with the first conductive layer and the readout circuit substrate;
The second electrode layer penetrates through the substrate area, and the second electrode layer is respectively and electrically connected with the first absorption layer and the readout circuit substrate;
In the direction perpendicular to the readout circuit substrate, the third electrode layer is located on the same side of the corresponding infrared detector unit and substrate region, and the third electrode layer is electrically connected with the second absorption layer and the readout circuit substrate, respectively.
3. The infrared detector array according to claim 2, wherein the readout circuit substrate has a plurality of bonding portions thereon, and the first electrode layer, the second electrode layer, and the third electrode layer are electrically connected to different ones of the bonding portions, respectively.
4. The infrared detector array of claim 2, wherein the infrared detector cell further comprises a first passivation layer and a second passivation layer, wherein:
A portion of the first passivation layer is located between the first conductive layer and the substrate region, and another portion of the first passivation layer is located between the first conductive layer and the first absorber layer;
A portion of the second passivation layer is located between the third electrode layer and the first sidewall, another portion of the second passivation layer is located between the third electrode layer and the substrate region, and the infrared detector unit has opposite first and second sidewalls in a direction in which the third electrode layer points toward the substrate region.
5. The infrared detector array of claim 4, wherein the infrared detector cell further comprises a third passivation layer, a portion of the third passivation layer being located between the substrate region and the readout circuitry base plate and being penetrated by the second electrode layer and the first conductive layer, and another portion of the third passivation layer covering the second side wall.
6. The infrared detector array of claim 1, wherein adjacent ones of the infrared detector cells have a first gap and a second gap therebetween, wherein:
the areas adjacent to the substrate area, adjacent to the first absorber layer, and adjacent to the intermediate layer are in communication to form the first gap;
the regions between adjacent ones of the intermediate layers and adjacent ones of the second absorbent layers communicate to form the second gap, the second gap having a width greater than a width of the first gap.
7. The infrared detector array of claim 2, wherein a forbidden bandwidth of the second absorption layer is greater than a forbidden bandwidth of the first absorption layer.
8. A method of fabricating an infrared detector array, comprising:
Providing a readout circuit substrate and a substrate layer, wherein the substrate layer comprises a plurality of substrate areas, and the substrate area array is arranged on the readout circuit substrate;
An infrared detector unit is arranged on the substrate area, and the step of arranging the infrared detector unit comprises the following steps:
forming a first absorption layer on one side of the substrate region, which is far away from the readout circuit substrate, wherein the first absorption layer is in contact with the substrate region and has a first doping type;
Forming an intermediate layer on a side of the first absorption layer facing away from the substrate region, the intermediate layer having a second doping type;
forming a second absorption layer on one side of the middle layer, which is away from the first absorption layer, wherein the second absorption layer has a first doping type;
And forming a first conductive layer in the substrate region and the first absorption layer, wherein the first conductive layer penetrates through the first absorption layer and the substrate region, and the first conductive layer is respectively electrically connected with the intermediate layer and the readout circuit substrate.
9. The method of manufacturing according to claim 8, wherein the step of disposing the infrared detector unit includes:
Providing a preliminary substrate layer having a first surface;
sequentially forming a first absorption preparation layer, a preparation intermediate layer and a second absorption preparation layer stacked on the first surface of the preparation substrate layer;
and carrying out first patterning treatment on the second absorption preparation layer and the preparation intermediate layer to obtain a second absorption layer and the intermediate layer, wherein the second absorption layer is provided with a first groove penetrating to the intermediate layer, and the first groove is provided with a third side wall and a fourth side wall which are opposite along the direction parallel to the first surface.
10. The method of manufacturing according to claim 9, wherein, after the step of forming the first recess, the step of disposing the infrared detector unit further comprises:
Forming a first passivation preparation layer on the second absorption layer, wherein the first passivation preparation layer covers the bottom, the first side wall and the second side wall of the first groove;
Performing second patterning treatment on the first passivation preparation layer to obtain a first sub-passivation preparation layer, wherein one part of the first sub-passivation preparation layer is positioned on the first side wall, and the other part of the first sub-passivation preparation layer is positioned at the bottom of the first groove;
Forming a first electrode preparation layer on the second absorption layer and in the first groove, wherein the first electrode preparation layer covers the first sub-passivation preparation layer;
And carrying out third patterning treatment on the first electrode preparation layer to obtain a first sub-electrode preparation layer, wherein one part of the first sub-electrode preparation layer is positioned on the surface of one side of the second absorption layer, which is away from the middle layer, and the other part of the first sub-electrode preparation layer is positioned on the first sub-passivation preparation layer.
11. The method of manufacturing according to claim 10, wherein the step of disposing the infrared detector unit further comprises:
Providing a carrier plate;
coating temporary bonding glue on one side surface of the carrier plate;
And connecting the carrier plate with the second absorption layer through the temporary bonding adhesive.
12. The method of manufacturing according to claim 11, wherein the step of disposing the infrared detector unit further comprises:
turning over the positions of the carrier plate and the prepared substrate layer so that the carrier plate is used as a base;
And performing fourth patterning treatment on the prepared substrate layer and the first absorption preparation layer to obtain the substrate region and the first absorption layer, wherein a second groove penetrating through the middle layer is formed in the first absorption layer, the projection of the bottom of the second groove on the carrier plate is positioned in the projection of the bottom of the first groove on the carrier plate, the second groove is provided with a third side wall and a fourth side wall which are opposite along the direction parallel to the first surface, the third side wall is positioned on the same side as the first side wall, and the fourth side wall is positioned on the same side as the second side wall.
13. The method of manufacturing according to claim 12, wherein the step of disposing the infrared detector unit further comprises:
and removing a region corresponding to at least one second groove in the intermediate layer, so that at least one second groove is communicated with at least one first groove to form a through groove, and the infrared detector unit is obtained.
14. The method of manufacturing according to claim 13, characterized in that after the step of obtaining the infrared detector unit, the method of manufacturing further comprises:
performing fifth patterning treatment on the substrate region to form a third groove, wherein the third groove penetrates through the first absorption layer;
Forming a second passivation preparation layer on the substrate region, the second passivation preparation layer covering the through groove, the second groove and the third groove;
And performing sixth patterning treatment on the second passivation preparation layer to expose the region corresponding to the second groove in the intermediate layer, expose the region corresponding to the third groove in the first absorption layer, and expose the region corresponding to the through groove in the temporary bonding adhesive to obtain a third sub-passivation preparation layer, wherein the third sub-passivation preparation layer positioned on the fourth side wall and the first sub-passivation preparation layer form a second passivation layer, the third sub-passivation preparation layer positioned in the second groove forms a first passivation layer, and the rest of the third sub-passivation preparation layers form a third passivation layer.
15. The method of manufacturing according to claim 14, further comprising:
forming a first conductive layer in the second groove;
forming a first electrode layer on one side of the first conductive layer away from the intermediate layer;
and forming a second electrode layer in the third groove.
16. The method of manufacturing according to claim 15, wherein after the step of disposing an infrared detector unit on the substrate region, the method of manufacturing further comprises:
Forming a bonding portion on the second electrode layer and the first electrode layer;
And attaching the readout circuit substrate to the bonding part so as to bond the readout circuit substrate and the infrared detector array.
17. The method of manufacturing according to claim 14, further comprising:
Turning over the positions of the readout circuit substrate and the carrier plate so that the readout circuit substrate serves as a substrate;
and removing the carrier plate and the temporary bonding adhesive.
18. The method of manufacturing according to claim 16, further comprising:
And forming a second sub-electrode preparation layer on one side of the second passivation layer, which is away from the fourth side wall, wherein the second sub-electrode preparation layer and the first sub-electrode preparation layer form a third electrode layer.
19. The method of claim 14, wherein the patterning process comprises at least one of: ion etching and reactive ion etching.
20. The method of claim 9, wherein the process of forming the first absorbent preparation layer, the second absorbent preparation layer, and the preparation intermediate layer is at least one of: molecular beam epitaxy processes and metalorganic chemical vapor deposition processes.
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| CN202410896776.XA CN118431248B (en) | 2024-07-05 | 2024-07-05 | Infrared detector array and preparation method thereof |
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