CN118425604A

CN118425604A - Load current detection circuit, detection method and light hybrid vehicle

Info

Publication number: CN118425604A
Application number: CN202410537896.0A
Authority: CN
Inventors: 刘欢; 肖洋; 吴佳杰
Original assignee: Shanghai Jinmai Electronic Technology Co ltd
Current assignee: Shanghai Jinmai Electronic Technology Co ltd
Priority date: 2024-04-30
Filing date: 2024-04-30
Publication date: 2024-08-02

Abstract

The invention discloses a load current detection circuit, a load current detection method and a light-weight hybrid vehicle. The load current detection circuit comprises a high-side driving module, a load, a current conditioning module, a detection resistor and a pre-charging module; the input end of the high-side driving module is connected with a first power line, the output end of the high-side driving module is connected with a load, and the control end of the high-side driving module is connected with a second power line; the first input end of the current conditioning module is connected with the output end of the high-side driving module, the second input end of the current conditioning module is connected with the output end of the pre-charging module, and the output end of the current conditioning module is connected with the detection resistor; the input end of the pre-charging module is connected with the first power line, and the control end is connected with the second power line. According to the technical scheme provided by the embodiment of the invention, the current conditioning module mirrors the load current into the detection current, so that a bypass resistor or a magnetic sensor with a small resistance value but a large package is not required to be arranged to calculate the load current, the circuit can be simplified, and the cost can be saved.

Description

Load current detection circuit, detection method and light hybrid vehicle

Technical Field

The invention relates to the technical field of integrated circuits, in particular to a load current detection circuit, a detection method and a light hybrid vehicle.

Background

The high-side driving circuit needs to constantly detect the change of the load current, and the common detection method has two modes, namely, a magnetic sensor is used for measuring the magnetic field around a conductor through which the current flows, so that the current is measured; and secondly, a bypass (Shunt) resistor with small resistance but large package is inserted into the current path, and the voltage drop across the Shunt resistor is measured, so that the current is measured.

However, the detection method using the magnetic sensor is costly and error is easily introduced for the above two detection methods of load current. Second, when using a shot resistor to detect a load current, if a large current load is detected, the precision requirement for the shot resistor is high, and a mohm resistor is usually required. If a small current load is detected, the voltage drop across the resistor is too small due to the small resistance of the shot resistor, and the ADC (Analogue to Digital Converter, analog-to-digital converter) conversion unit cannot accurately distinguish.

Disclosure of Invention

The invention provides a load current detection circuit, a detection method and a light-weight hybrid vehicle, which are used for improving the accuracy of load current detection independent of a mount resistor or a magnetic sensor in a high-side driving circuit.

According to a first aspect of the present invention, there is provided a load current detection circuit comprising a high-side driving module, a load, a current conditioning module, a detection resistor and a precharge module;

The input end of the high-side driving module is connected with a first power line, the output end of the high-side driving module is connected with the load, and the control end of the high-side driving module is connected with a second power line;

the first input end of the current conditioning module is connected with the output end of the high-side driving module, the second input end of the current conditioning module is connected with the output end of the pre-charging module, and the output end of the current conditioning module is connected with the detection resistor;

The input end of the pre-charging module is connected with the first power line, the control end of the pre-charging module is connected with the second power line, and the pre-charging module is used for being conducted before the high-side driving module is conducted so that a passage is formed between the first power line and the detection resistor; the current conditioning module is used for mirroring the load current into the detection current after the high-side driving module is conducted.

Optionally, the current conditioning module includes a first operational amplifier, a first resistor, a second resistor, and a first transistor;

The first input end of the first operational amplifier is connected to the output end of the high-side driving module through the first resistor, the second input end of the first operational amplifier is connected to the output end of the pre-charging module, the output end of the first operational amplifier is connected to the control electrode of the first transistor through the second resistor, the first electrode of the first transistor is connected to the output end of the pre-charging module, and the second electrode of the first transistor is connected to the detection resistor;

Wherein, the resistance of the detection resistor is larger than the resistance of the load.

Optionally, the precharge module includes a second transistor, a third resistor, a fourth resistor, and a first capacitor;

the control electrode of the second transistor is connected with the second power line through the third resistor, the first electrode of the second transistor is connected with the first power line, and the second electrode of the second transistor is used as the output end of the precharge module;

The fourth resistor is connected between the control electrode and the second electrode of the second transistor, and the first capacitor is connected between the control electrode and the second electrode of the second transistor.

Optionally, the high-side driving module includes a third transistor, a fifth resistor, a sixth resistor and a second capacitor;

The control electrode of the third transistor is connected with the second power line through the fifth resistor, the first electrode of the third transistor is connected with the first power line, and the second electrode of the third transistor is used as the output end of the high-side driving module;

The sixth resistor is connected between the control electrode and the second electrode of the third transistor, and the second capacitor is connected between the control electrode and the second electrode of the third transistor.

Optionally, the resistance of the third resistor is equal to the resistance of the fifth resistor, the resistance of the fourth resistor is equal to the resistance of the sixth resistor, and the capacitance of the first capacitor is smaller than the capacitance of the second capacitor.

Optionally, a channel type of the second transistor is the same as a channel type of the third transistor;

The first power supply voltage transmitted on the first power supply line is smaller than the second power supply voltage transmitted on the second power supply line.

Optionally, the load current detection circuit further includes a sampling module, an input end of the sampling module is connected with an output end of the current conditioning module, and an output end of the sampling module outputs a sampling voltage.

Optionally, the sampling module includes a second operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, and a third capacitor;

The first input end of the second operational amplifier is connected with the output end of the current conditioning module through the seventh resistor, the second input end of the second operational amplifier is grounded through the eighth resistor, and the output end of the second operational amplifier outputs the sampling voltage;

The ninth resistor is connected between the output end and the second input end of the second operational amplifier, and the third capacitor is connected with the ninth resistor in parallel;

and the resistance value of the seventh resistor is equal to the resistance value of the eighth resistor and the ninth resistor which are connected in parallel.

According to a second aspect of the present invention, there is provided a load current detection method applied to the load current detection circuit provided in any of the above embodiments, the load current detection method including:

Controlling the precharge module to be conducted in response to a second power supply voltage on the second power supply line so as to form a passage between the first power supply line and the detection resistor;

Controlling the high-side driving module to respond to the second power supply voltage to be conducted, and transmitting the first power supply voltage to the load;

and controlling the current conditioning module to mirror the load current into the detection current.

According to a third aspect of the present invention, there is provided a light-hybrid vehicle, including the load current detection circuit provided in any of the above embodiments.

According to the technical scheme provided by the embodiment, the pre-charging module is conducted before the high-side driving module, so that a loop is formed between the first power line through the pre-charging module, the current conditioning module and the detection resistor, and after the high-side driving module is conducted, the load current is mirrored to be the detection current through the current conditioning module, so that the load current is calculated without setting a small-resistance but large-packaging shot resistor or a magnetic sensor, and the system cost is reduced. In addition, the load current mirror image is the detection current in a current mirror image mode, error interference is not introduced into the circuit, and the detection precision of the load current is improved

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a load current detection circuit according to an embodiment of the present invention;

Fig. 2 is a schematic diagram of another load current detection circuit according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of another load current detection circuit according to an embodiment of the present invention;

Fig. 4 is a schematic structural diagram of another load current detection circuit according to an embodiment of the present invention;

Fig. 5 is a schematic structural diagram of another load current detection circuit according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another load current detection circuit according to an embodiment of the present invention;

fig. 7 is a flowchart of a load current detection method according to an embodiment of the present invention;

fig. 8 is a flowchart of another load current detection method according to an embodiment of the present invention.

Detailed Description

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Fig. 1 is a schematic structural diagram of a load current detection circuit according to an embodiment of the present invention, and referring to fig. 1, the load current detection circuit includes a high-side driving module 1, a load R _load, a current conditioning module 3, a detection resistor R and a precharge module 2; the input end I1 of the high-side driving module 1 is connected with a first power line L1, the output end O1 of the high-side driving module 1 is connected with a load R _load, and the control end K1 of the high-side driving module 1 is connected with a second power line L2; the first input end I31 of the current conditioning module 3 is connected with the output end O1 of the high-side driving module 1, the second input end I32 of the current conditioning module 3 is connected with the output end O2 of the pre-charging module 2, and the output end O3 of the current conditioning module 3 is connected with the detection resistor R; the input end I2 of the pre-charging module 2 is connected with the first power line L1, the control end K2 of the pre-charging module 2 is connected with the second power line L2, and the pre-charging module 2 is used for conducting before the high-side driving module 1 is conducted so as to form a passage between the first power line L1 and the detection resistor R; the current conditioning module 3 is configured to mirror the load current to a detection current after the high-side driving module 1 is turned on.

The high-side driving module 1 is used for providing load current for a load after being conducted; the detection resistor R is used for collecting detection current.

Optionally, a first end of the load R _load is connected to the output terminal O1 of the high-side driving module 1, and a second end is grounded. The first end of the detection resistor R is connected with the output end O3 of the current conditioning module 3, and the second end is grounded.

Specifically, the first power line L1 may be used to transmit the first power voltage Vcc, and the second power line L2 may be used to transmit the second power voltage Vaa. The first power voltage Vcc and the second power voltage Vaa are both positive voltages and are not equal, for example, the second power voltage Vaa may be greater than the first power voltage Vcc.

In the present embodiment, the turn-on timing of the precharge module 2 is earlier than the turn-on timing of the high-side driving module 1. When the precharge module 2 is turned on in response to the second power supply voltage Vaa of the control terminal K2, the high-side driving module 1 is in an off state, the precharge module 2 generates a current, and the first power line L1 forms a loop through the precharge module 2, the current conditioning module 3 and the detection resistor R.

When the high-side driving module 1 is turned on in response to the second power voltage Vaa, the precharge module 2 continues to maintain the on state, and the high-side driving module 1 transmits the first power voltage Vcc to the load R _load to provide the load R _load with the load current I _load, and the load current I _load flows through the load R _load to form the load voltage drop V _load. At this time, the voltage at the first input terminal I31 of the current conditioning module 3 is the load voltage drop V _load, and the voltage at the second input terminal I32 is the voltage drop V _R of the detection resistor R. Wherein the load voltage drop V _load is associated with the load current I _load, and the voltage drop V _R of the sense resistor R is associated with the sense current I _R. Therefore, by configuring the current conditioning module 3, the load current I _load can be mirrored as the detection current I _R, so that the magnitude of the load current I _load can be obtained by calculating the detection current I _R flowing through the detection resistor R.

According to the technical scheme provided by the embodiment, the pre-charging module 2 is conducted before the high-side driving module 1 is arranged, so that a loop is formed among the first power line L1, the pre-charging module 2, the current conditioning module 3 and the detection resistor R, and after the high-side driving module 1 is conducted, the load current is mirrored to be the detection current through the current conditioning module 3, so that the load current is calculated without setting a short resistor or a magnetic sensor with a small resistance value but a large package, and the system cost is reduced. And the load current mirror image is a detection current in a current mirror image mode, so that error interference cannot be introduced into a circuit, and the detection accuracy of the load current is improved.

Fig. 2 is a schematic structural diagram of another load current detection circuit according to an embodiment of the present invention, referring to fig. 2, on the basis of the above embodiment, a current conditioning module 3 includes a first operational amplifier U1, a first resistor R1, a second resistor R2, and a first transistor Q1; the first input end of the first operational amplifier U1 is connected to the output end O1 of the high-side driving module 1 through a first resistor R1, the second input end of the first operational amplifier U1 is connected to the output end O2 of the pre-charging module 2, the output end of the first operational amplifier U1 is connected to the control electrode of the first transistor Q1 through a second resistor R2, the first electrode of the first transistor Q1 is connected to the output end O2 of the pre-charging module 2, and the second electrode of the first transistor Q1 is connected to the detection resistor R; the resistance value of the detection resistor R is larger than that of the load R _load.

The first input terminal of the first operational amplifier U1 may be a non-inverting input terminal, and the second input terminal of the first operational amplifier U1 may be an inverting input terminal. The first operational amplifier U1 is used for conducting the first transistor Q1 when in negative saturation output, and is used for conducting the first transistor Q1 when in positive saturation output; the first resistor R1 and the second resistor R2 are used for current limiting and damping.

Specifically, when the precharge module 2 is turned on in response to the second power supply voltage Vaa of the control terminal K2, the high-side driving module 1 is in an off state, and the precharge module 2 generates a current, which is output to the second input terminal of the first operational amplifier U1 and the first pole of the first transistor Q1 through the output terminal O2 of the precharge module 2, respectively. At this time, the voltage of the second input terminal of the first operational amplifier U1 is approximately equal to the first power supply voltage Vcc. Since the high-side driving module 1 is not turned on, the voltage of the first input terminal of the first operational amplifier U1 is approximately equal to 0V (ground voltage). The first input voltage of the first operational amplifier U1 is smaller than the second input voltage, so that the first operational amplifier U1 works in a deep negative feedback state, the output of the first operational amplifier U1 is a negative saturated output, the output voltage is approximately 0V, that is, the voltage of the control electrode of the first transistor Q1 is 0V. At this time, the voltage of the first pole of the first transistor Q1 is greater than the voltage of the control pole, and the first transistor Q1 is in a conductive state (e.g., the first transistor Q1 is a P-channel enhancement MOSFET), that is, the current conditioning module 3 is in a conductive state. Further, the first power line L1 forms a loop through the precharge module 2, the current conditioning module 3 and the sense resistor R to provide a path for the subsequent formation of the sense current I _R.

When the high-side driving module 1 is turned on in response to the second power voltage Vaa of the control terminal K1, the precharge module 2 maintains the on state, the high-side driving module 1 transmits the first power voltage Vcc to the load R _load, provides the load current I _load to the load R _load, load current I _load flows through load R _load forming a load voltage drop V _load. The first power voltage Vcc flows to the sensing resistor R through the precharge module 2 and the first transistor Q1, and provides the sensing resistor R with the sensing current I _R, and the sensing current I _R flows through the sensing resistor R to form the sensing resistor voltage drop V _R. At this time, the voltage u1+ at the first input terminal of the first operational amplifier U1 is the difference between the load voltage drop V _load and the voltage drop of the first resistor R1, and in this embodiment, the voltage drop across the first resistor R1 is negligible with respect to the load voltage drop V _load, so the voltage u1+ at the first input terminal of the first operational amplifier U1 is equivalent to the load voltage drop V _load. The voltage U1-at the second input terminal is the sum of the detection resistor voltage drop V _R and the voltage drop V _Q1 of the first transistor Q1. At this time, the first operational amplifier U1 continues to operate in a deep negative feedback state, maintaining a negative saturated output, and U1- =u1+ is obtained by "dummy short" of the first operational amplifier U1, and thus Vcc-U1- =vcc-u1+. The load current I _load thus flows through the high-side driver module 1 to form a voltage drop V1 and the sense current I _R flows through the precharge module 2 to form a voltage drop V2. Also v1=vcc-u1+ = (V _load/r_load)*R_DS(on)3,V2＝Vcc－U1-＝(V_R/r)*R_DS(on)2, therefore (V _load/r_load)*R_DS(on)3＝(V_R/r)*R_DS(on)2, by setting R _DS(on)3＝R_DS(on)2 (for example, by setting the high-side driving module 1 and the precharge module 2 to the same circuit configuration), I _load＝V_R/R can be obtained, Wherein R _DS(on)3 is the on-resistance of the high-side driving module 1, R _DS(on)2 is the on-resistance of the precharge module 2, R _load is the resistance of the load R _load, R is the resistance of the detection resistor R. Therefore, by configuring the first operational amplifier U1 and the first transistor Q1 such that the load current I _load is mirrored as the detection current I _R, the magnitude of the load current I _load can be obtained by calculating the detection current I _R flowing through the detection resistor R. According to the technical scheme provided by the embodiment, the load current I _load can be directly obtained through the voltage drop on the detection resistor R and the resistance value of the detection resistor, the resistance value of a known load is not needed, the design flow can be simplified, and the dependence on the load resistance parameter can be reduced.

Fig. 3 is a schematic diagram of another load current detection circuit according to an embodiment of the present invention, and referring to fig. 3, on the basis of the above embodiments, the precharge module 2 includes a second transistor Q2, a third resistor R3, a fourth resistor R4, and a first capacitor C1; the control electrode of the second transistor Q2 is connected with a second power line L2 through a third resistor R3, the first electrode of the second transistor Q2 is connected with a first power line L1, and the second electrode of the second transistor Q2 is used as an output end O2 of the precharge module 2; the fourth resistor R4 is connected between the control electrode and the second electrode of the second transistor Q2, and the first capacitor C1 is connected between the control electrode and the second electrode of the second transistor Q2.

The second transistor Q2 is configured to turn on the control precharge module 2 and turn off the control precharge module 2 when turned off; the third resistor R3 and the fourth resistor R4 are voltage dividing resistors, and are used for dividing the second power supply voltage Vaa on the second power supply line L2 and controlling the second transistor Q2 to be turned on; the first capacitor C1 is used to control the gate voltage establishment speed of the second transistor Q2.

Specifically, referring to fig. 3, when the second transistor Q2 is turned on in response to the second power voltage Vaa at the control end thereof, the high-side driving module 1 is in an off state, that is, the pre-charging module 2 is in an on state, so that the current conditioning module 3 is turned on, and the first power line L1 forms a loop through the pre-charging module 2, the current conditioning module 3 and the detection resistor R.

Referring to fig. 2 and 3, when the first transistor Q1 is turned on, the first power line L1, the second transistor Q2, the first transistor Q1 and the detection resistor R are in communication.

When the high-side driving module 1 is turned on in response to the second power voltage Vaa, the second transistor Q2 and the first transistor Q1 remain turned on, the first power voltage Vcc is transmitted to the load R _load through the high-side driving module 1, to provide the load R _load with the load current I _load, load current I _load flows through load R _load forming a load voltage drop V _load. since the loop where the first power line L1, the second transistor Q2, the first transistor Q1 and the detection resistor R are located is in a connected state, the loop can enable the first power voltage Vcc to provide the detection current I _R for the detection resistor R, and the detection current I _R flows through the detection resistor R to form a detection resistor voltage drop V _R. At this time, the voltage U1+ at the first input terminal of the first operational amplifier U1 is the load voltage drop V _load, the voltage U1-at the second input terminal is the sum of the detection resistance voltage drop V _R and the voltage drop V _Q1 of the first transistor Q1, in this embodiment, The on-resistance of the second transistor Q2 is the on-resistance R _DS(on)2 of the precharge module 2, and the load current I _load＝V_R/R is further calculated. By setting the second transistor Q2 to be turned on before the high-side driving module 1, a path is formed among the first power line L1, the pre-charging module 2, the current conditioning module 3 and the detection resistor R before the high-side driving module 1 supplies the load R _load with the load current, so that after the high-side driving module 1 is turned on, the pre-charging module 2 can supply the detection resistor R with the detection current I _R, and the load current I _load is mirrored to be the detection current I _R through the current conditioning module 3, so that the circuit can be simplified and the cost can be saved.

Fig. 4 is a schematic structural diagram of another load current detection circuit according to an embodiment of the present invention, referring to fig. 4, on the basis of the above embodiments, the high-side driving module 1 includes a third transistor Q3, a fifth resistor R5, a sixth resistor R6, and a second capacitor C2; the control electrode of the third transistor Q3 is connected to the second power line L2 through the fifth resistor R5, the first electrode of the third transistor Q3 is connected to the first power line L1, and the second electrode of the third transistor Q3 is used as the output terminal O1 of the high-side driving module 1; the sixth resistor R6 is connected between the control electrode and the second electrode of the third transistor Q3, and the second capacitor C2 is connected between the control electrode and the second electrode of the third transistor Q3.

The third transistor Q3 is configured to turn on the control high-side driving module 1 and turn off the control high-side driving module 1 when turned on; the fifth resistor R5 and the sixth resistor R6 are voltage dividing resistors, and are used for dividing the second power supply voltage Vaa on the second power supply line L2 and controlling the third transistor Q3 to be turned on; the second capacitor C2 is used to control the gate voltage establishment speed of the third transistor Q3.

Optionally, the resistance of the third resistor R3 is equal to the resistance of the fifth resistor R5, the resistance of the fourth resistor R4 is equal to the resistance of the sixth resistor R6, and the capacitance of the first capacitor C1 is smaller than the capacitance of the second capacitor C2.

In this embodiment, since the turn-on timings of the precharge module 2 and the high-side driving module 1 are different, that is, the turn-on timing of the second transistor Q2 is different from the turn-on timing of the third transistor Q3, and the driving voltages of the control electrodes of the two are the same, the establishment speed of the control electrode voltage can be configured by setting the magnitude relation of the first capacitor C1 and the second capacitor C2, so as to control the turn-on sequence of the second transistor Q2 and the third transistor Q3. Here, the turn-on time of the precharge module 2 is earlier than the turn-on time of the high-side driving module 1, that is, the turn-on time of the second transistor Q2 is earlier than the turn-on time of the third transistor Q3, so the capacitance value of the first capacitor C1 may be set smaller than the capacitance value of the second capacitor C2, so that the gate voltage of the second transistor Q2 is established faster than the gate voltage of the third transistor Q3, thereby making the second transistor Q2 turn on earlier than the third transistor Q3.

Optionally, the channel type of the second transistor Q2 is the same as the channel type of the third transistor Q3, and when the resistances of the third resistor R3 and the fifth resistor R5 are equal, and the resistances of the fourth resistor R4 and the sixth resistor R6 are equal, it is possible to simplify the peripheral circuits of the second transistor Q2 and the third transistor Q3, and reduce the error in which the load current I _load is mirrored as the detection current I _R.

Specifically, since the capacitance of the first capacitor C1 is smaller than that of the second capacitor C2, the gate voltage of the second transistor Q2 is established faster, so that the second transistor Q2 is turned on before the third transistor Q3 in response to the second power voltage Vaa. When the second transistor Q2 is turned on, the first power voltage Vcc is transmitted to the current conditioning module 3 through the second transistor Q2 and is transmitted to the detection resistor R through the current conditioning module 3, so that a loop is formed between the first power line L1 and the detection resistor R through the precharge module 2, the current conditioning module 3. Meanwhile, since the channel types of the second transistor Q2 and the third transistor Q3 are the same, for example, both are N-channel enhancement MOSFETs, and the resistance of the third resistor R3 and the resistance of the fifth resistor R5 are equal, the resistance of the fourth resistor R4 and the resistance of the sixth resistor R6 are equal, so that the second transistor Q2 and the third transistor Q3 are consistent, and the error of mirroring the load current I _load to the detected load current I _R by the current conditioning module 3 is small.

Fig. 5 is a schematic structural diagram of another load current detection circuit according to an embodiment of the present invention, and referring to fig. 5, on the basis of the above embodiments, the load current detection circuit further includes a sampling module 4, an input end of the sampling module 4 is connected to an output end of the current conditioning module 3, and an output end of the sampling module 4 outputs a sampling voltage.

The sampling module 4 is configured to obtain a voltage at an output end of the current conditioning module 3, that is, to collect a voltage drop on the detection resistor R.

Alternatively, the sampling mode of the sampling module 4 may sample the voltage through a resistor-capacitor circuit, or sample the voltage after being scaled by an operational amplifier.

Optionally, the output end of the sampling module 4 is connected to an ADC interface of the single-chip microcomputer.

Specifically, the sampling module 4 may further perform scaling on the detected resistance voltage drop V _R and input the scaled voltage drop V _R to the ADC interface of the singlechip, so as to obtain the sampling voltage Vo. By arranging the sampling module 4, the influence of load effect on ADC sampling can be avoided, thereby ensuring the detection precision of load current.

Fig. 6 is a schematic structural diagram of another load current detection circuit provided by the embodiment of the present invention, specifically, a schematic structural diagram of each module thinned into a device, referring to fig. 6, taking a first transistor Q1 as a P-channel enhancement MOSFET, and a second transistor Q2 and a third transistor Q3 as N-channel enhancement MOSFETs as examples, the specific working principle of the technical scheme provided in this embodiment is as follows:

Optionally, a first power supply end of the first operational amplifier U1 is grounded, and a second power supply end is connected with the first power supply line L1; the first power supply terminal of the second operational amplifier U2 is grounded, and the second power supply terminal is connected to the first power supply line L1.

The load current detection circuit can be used in a light hybrid vehicle, the first power supply voltage Vcc can be 12V, the second power supply voltage Vaa can be 48V, and the first power supply voltage Vcc is used for supplying power to a load R _load. The on-resistance of the third transistor Q3 is the on-resistance R _DS(on)3 of the high-side driving module 1, and the on-resistance of the second transistor Q2 is R _DS(on)2.

Since the capacitance of the first capacitor C1 is smaller than that of the second capacitor C2, the gate voltage of the second transistor Q2 is established faster, so that the second transistor Q2 is turned on before the third transistor Q3 in response to the second power voltage Vaa. When the second transistor Q2 is turned on in response to the second power voltage Vaa, the third transistor Q3 is turned off, the voltage of the second output terminal of the first operational amplifier U1 is approximately Vcc, the voltage of the first input terminal is approximately 0V, and at this time, the first operational amplifier U1 operates in a deep negative feedback state, and the output is a negative saturated output, and the output voltage thereof is the first power voltage, that is, 0V. The voltage of the control electrode of the first transistor Q1 is smaller than the voltage of the first electrode, so that the first transistor Q1 is turned on, the second transistor Q2 and the first transistor Q1 transmit the first power voltage Vcc to the detection resistor R, so that the first power line L1 forms a loop through the precharge module 2, the current conditioning module 3 and the detection resistor R, and the situation that the first transistor Q1 cannot be turned on after the third transistor Q3 is turned on is prevented.

When the voltage build-up on the second capacitor C2 is completed such that the third transistor Q3 is turned on, the second transistor Q2 and the first transistor Q1 are continuously turned on, the third transistor Q3 transmits the first power supply voltage Vcc to the load R _load, provides the load current I _load to the load R _load, Further load current I _load flows through load R _load forming a load voltage drop V _load. And, the second transistor Q2 and the first transistor Q1 transmit the first power voltage Vcc to the sensing resistor R, so that the first power voltage Vcc provides the sensing resistor R with the sensing current I _R, and the sensing current I _R flows through the sensing resistor R to form the sensing resistor drop V _R. Since the second transistor Q2 and the third transistor Q3 are both driven by the second power supply voltage Vaa and are the same in model, R _DS(on)2≈R_DS(on)3. At this time, the first operational amplifier U1 continues to operate in a deep negative feedback state, maintaining a negative saturated output, and obtaining U1- =u1+, i.e. Vcc-u1+ =vcc-U1-, i.e. v1=v2, according to the "virtual short" of the first operational amplifier U1, where V1 is a voltage drop formed by the load current I _load flowing through the third transistor Q3, V2 is a voltage drop formed by the detection current I _R flowing through the second transistor Q2, i.e. (V _load/r_load)*R_DS(on)3＝(V_R/r)*R_DS(on)2, i.e., I _load＝V_R/r). Accordingly, the load current I _load is mirrored as the detection current I _R, so that the magnitude of the load current I _load can be obtained by calculating the detection current I _R flowing through the detection resistor R. By setting the capacitance values of the first capacitor C1 and the second capacitor C2 and further controlling the conduction sequence of the second transistor Q2 and the third transistor Q3, more accurate control and adjustment can be realized, and the detection precision of the load current I _load is improved.

Optionally, the sampling module 4 includes a second operational amplifier U2, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, and a third capacitor C3; the first input end of the second operational amplifier U2 is connected with the output end O3 of the current conditioning module 3 through a seventh resistor R7, the second input end of the second operational amplifier U2 is grounded through an eighth resistor R8, and the output end of the second operational amplifier U2 outputs sampling voltage; the ninth resistor R9 is connected between the output end and the second input end of the second operational amplifier U2, and the third capacitor C3 is connected in parallel with the ninth resistor R9, where the resistance of the seventh resistor R7 is equal to the resistance of the eighth resistor R8 connected in parallel with the ninth resistor R9. The second operational amplifier U2 is used for amplifying an input voltage signal to obtain a sampling voltage and solving an ADC error caused by a load effect; the seventh resistor R7 is used for limiting current, and the resistance value of the seventh resistor R7 is equal to the resistance value of the eighth resistor R8 and the ninth resistor R9 which are connected in parallel, so that errors caused by the bias current of the second operational amplifier U2 are eliminated; the eighth resistor R8 is used for providing a reference point for the second operational amplifier U2 to operate in a proper operating range; the ninth resistor R9 is used for realizing stable control of the sampling voltage; the third capacitor C3 is used for filtering high-frequency noise components in the sampling voltage, and guaranteeing stability and accuracy of the output sampling voltage.

Further, due to the sampling module 4, the voltage drop V _R of the detection resistor R is input to the ADC interface of the single chip microcomputer after being subjected to in-phase proportional conversion by the second operational amplifier U2, and the output voltage of the second operational amplifier circuit U2 actually collected by the ADC interface is V _O＝V_R x (1+r9/R8), that is, V _R =vo x R8/(r8+r9). Wherein R8 is the resistance of the eighth resistor R8, and R9 is the resistance of the ninth resistor R9. By configuring the resistance values of the eighth resistor R8 and the ninth resistor R9, vo can be controlled within a proper ADC allowable range. And I _load＝V_R/r, so the load current after ADC sampling has the following calculation formula: i _load = Vo x r8/r (r8+r9). The detection of the load current I _load can be achieved. Through setting up second operational amplifier U2 so that with voltage drop V _R of detection resistance after the phase comparison conversion input to ADC interface, can avoid the load effect to lead to the fact the influence to the ADC sampling, promote sampling accuracy to guarantee the detection accuracy of load current I _load.

Optionally, in the light hybrid automobile system, the load and the controller circuit board are connected through the cable, so that the situation of abrasion short circuit may exist, if the cable is in short circuit to high voltage due to abrasion, or high-voltage pulse caused by complex electromagnetic environment of the vehicle-mounted system can enter the controller along the cable, so that the ADC interface is damaged, and driving safety is affected. In this embodiment, due to the existence of the first transistor Q1, when high voltage enters the first input terminal of the first operational amplifier U1, the voltage of the first input terminal is greater than the voltage of the second input terminal, the first operational amplifier U1 works in the forward saturated state, the output voltage thereof is the first power supply terminal voltage Vcc, and at this time, the first transistor Q1 is turned off, so that high voltage cannot be transmitted to the ADC interface, and the ADC interface is further protected.

Optionally, the embodiment of the present invention further provides a load current detection method, which is applicable to the load current detection circuit provided in any of the foregoing embodiments. Fig. 7 is a flowchart of a load current detection method according to an embodiment of the present invention, and referring to fig. 7, the load current detection method provided in this embodiment includes:

S701, controlling the pre-charging module to be conducted in response to the second power supply voltage on the second power supply line so as to form a passage between the first power supply line and the detection resistor.

S702, controlling the high-side driving module to respond to the second power voltage to conduct, and transmitting the first power voltage to the load.

S703, controlling the current conditioning module to mirror the load current into a detection current.

According to the technical scheme provided by the embodiment, the pre-charging module is conducted before the high-side driving module, so that a loop is formed between the first power line through the pre-charging module, the current conditioning module and the detection resistor, and after the high-side driving module is conducted, the load current is mirrored to be the detection current through the current conditioning module, so that the load current is calculated without setting a small-resistance but large-packaging shot resistor or a magnetic sensor, and the system cost is reduced. And the load current mirror image is a detection current in a current mirror image mode, so that error interference cannot be introduced into a circuit, and the detection accuracy of the load current is improved.

Optionally, the load current detection circuit provided in this embodiment further includes a sampling module (as shown in fig. 5), fig. 8 is a flowchart of another load current detection method provided in the embodiment of the present invention, and on the basis of the above embodiment, referring to fig. 8, after step S703, the load current detection circuit further includes:

S704, the sampling module is controlled to collect the voltage of the detection resistor to the ADC interface.

According to the technical scheme provided by the embodiment, the sampling module is arranged, so that the voltage drop of the detection resistor is input to the ADC interface after phase ratio conversion, the influence of load effect on ADC sampling can be avoided, sampling precision is provided, and the detection precision of load current is ensured.

In the above embodiment, the first transistor Q1 and the second transistor Q2 are both N-channel enhancement MOSFETs, the third transistor Q3 is exemplified by a P-channel enhancement MOSFET, and in other embodiments, the first transistor Q1 and the second transistor Q2 may also be P-channel enhancement MOSFETs, and the third transistor Q3 may be an N-channel enhancement MOSFET.

Optionally, the embodiment of the invention further provides a light hybrid vehicle, which comprises the load current detection circuit provided by any embodiment of the invention, so that the light hybrid vehicle also has the beneficial effects provided by any embodiment.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.

The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims

1. The load current detection circuit is characterized by comprising a high-side driving module, a load, a current conditioning module, a detection resistor and a pre-charging module;

The input end of the pre-charging module is connected with the first power line, the control end of the pre-charging module is connected with the second power line, and the pre-charging module is used for being conducted before the high-side driving module is conducted so that a passage is formed between the first power line and the detection resistor; the current conditioning module is used for mirroring the load current into the detection current flowing through the detection resistor after the high-side driving module is conducted.

2. The load current detection circuit of claim 1, wherein the current conditioning module comprises a first operational amplifier, a first resistor, a second resistor, and a first transistor;

3. The load current detection circuit of claim 1, wherein the precharge module comprises a second transistor, a third resistor, a fourth resistor, and a first capacitor;

4. The load current detection circuit of claim 3, wherein the high-side drive module comprises a third transistor, a fifth resistor, a sixth resistor, and a second capacitor;

5. The load current detection circuit of claim 4, wherein the third resistor has a resistance equal to the fifth resistor, the fourth resistor has a resistance equal to the sixth resistor, and the first capacitor has a capacitance less than the second capacitor.

6. The load current detection circuit according to claim 4, wherein a channel type of the second transistor is the same as a channel type of the third transistor;

7. The load current detection circuit of claim 1, further comprising a sampling module, an input of the sampling module being coupled to an output of the current conditioning module, an output of the sampling module outputting a sampled voltage.

8. The load current detection circuit of claim 7, wherein the sampling module comprises a second operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, and a third capacitor;

9. A load current detection method, characterized by being applied to the load current detection circuit according to any one of claims 1 to 8, comprising:

10. A light-hybrid vehicle comprising a load current detection circuit according to any one of claims 1 to 8.