CN118117531A - SSCB-oriented power device parallel active control current sharing circuit and method thereof - Google Patents

Abstract

SSCB-oriented power device parallel active control current sharing circuit and method thereof, and the circuit comprises the following steps: the switching circuit comprisesA plurality of switching units are arranged in the same row,Gate connection of (c)Is provided with a pair of grooves formed in the outer surface of the base,Is connected with the other end ofIs provided with a pair of grooves formed in the outer surface of the base,Is connected with the other end ofIs provided with a drain electrode of (c),Source and of (2)Are all connected to the source electrode ofConnected between two adjacent switch unitsConnected to twoIs connected with the drain electrode of the transistor; the feedback control circuit comprisesThe number of control units is controlled by the control unit,Is connected with the negative electrode input end ofThe positive electrode acquires the reference voltage, the output end of the comparator is connected with the input end of the driving circuit, and the output end of the driving circuit is connected with the corresponding switch unitA gate electrode of (a); the method comprises the following steps: In the time-course of which the first and second contact surfaces, Output low level, drive circuit outputs turn-off signal controlTurning off; In the time-course of which the first and second contact surfaces, The high level is output and the high level,Opening.

Description

SSCB-oriented power device parallel active control current sharing circuit and method thereof

Technical Field

The invention relates to the technical field of direct-current distribution networks, in particular to an SSCB-oriented power device parallel active control current sharing circuit and a method thereof.

Background

With the high-speed development of global economy, the distributed energy system has become an important means for solving the problems of insufficient power and environment due to the characteristics of high power supply reliability, small power transmission loss, flexible load variation, easy renewable energy application and the like. The existing research shows that the direct-current power distribution network has the advantages of high electric energy quality, lower electric energy loss, lower operation cost, fewer power electronic conversion steps and the like, and is convenient for a distributed energy system to be connected into a large power grid, so that the benefit of the distributed energy is fully exerted. However, because the impedance of the direct current power grid system is low, the rotational inertia is small, and the direct current power grid system has the characteristics of high rising speed of fault current, large amplitude and the like when short circuit fault occurs, the direct current power grid system has strict requirements on fault isolation. If the mechanical switch is used for cutting off fault current, high-voltage large arc can be generated at the cutting-off moment, electric equipment can be burnt out when serious, and the segmentation speed of the mechanical switch is lower. The direct current solid state circuit breaker (Solid State Circuit Breaker, SSCB) has received a lot of attention in recent years due to its extremely fast breaking speed, no mechanical contact, no arcing during breaking, extremely high operating frequency, higher reliability, longer lifetime, etc. While the SSCB of the existing wide bandgap semiconductor device as the main switch is mostly limited by the capacity of the wide bandgap semiconductor device, the SSCB has the advantages of low on-state loss, extremely fast switching speed, simple driving circuit and the like, but the insufficient switching capacity limits the application to small capacity occasions.

Because of the limited voltage-current capacity of a single solid-state switching device, in order to expand the capacity of the solid-state switching device, a dc solid-state circuit breaker is generally used in a larger capacity application, and power switching devices are generally connected in series and parallel. In practical applications, in order to increase the current capacity of a dc circuit breaker, a main switching power semiconductor device is generally used for parallel capacity expansion. However, the parameters of different devices and the parameters of external circuits are different, so that the current born by each parallel device has a certain difference, and the device is possibly damaged when serious, which is a main problem to be solved by the parallel devices. The common passive current sharing comprises series connection of small resistors and coupling inductors, or the symmetry of the circuit is improved during circuit design, so that the current non-uniformity degree of the parallel connection modules is reduced in a mode of reducing parasitic parameter influence and the like. However, when the device is aged in long-term operation or the driving circuit generates larger difference to cause serious current non-uniformity, the passive current sharing mode is difficult to meet the requirement of current sharing performance.

Disclosure of Invention

In view of this, the present invention provides an active control current equalizing circuit for parallel connection of power devices of an SSCB and a method thereof, which are used for at least solving the problem of current non-uniformity of parallel modules of the SSCB in the prior art.

In order to achieve the above purpose, the present invention adopts the following technical scheme:

An SSCB-oriented power device parallel active control current sharing circuit, comprising: a switching circuit and a feedback control circuit;

The switching circuit comprises 2 switching cells, wherein each switching cell comprises a SiC JFET device Resistance/>Capacitance/>MOS tube/>And sampling circuit/>，/>1 Or 2; /(I)Gate connection/>One end of/>The other end connection/>One end of/>The other end connection/>Drain of/>Source and/>Source electrode of (C) and/>Connected between two adjacent switching units, two/>Connected two/>Is connected with the drain electrode of the transistor;

The feedback control circuit comprises 2 control units, wherein each control unit comprises a comparator And a drive circuit, comparator/>Is correspondingly connected with the negative electrode input terminal/>The positive electrode input end obtains a reference voltage value, the output end of the comparator is connected with the input end of the driving circuit, and the output end of the driving circuit is connected with the corresponding switch unitIs formed on the substrate.

An SSCB-oriented power device parallel active control current sharing method comprises the following conditions:

1) When a fault occurs, the branch current exceeds the average value, Output low level:

When comparator Detection of sampling Voltage/>Reference voltage/>Time,/>Output low level, and the drive circuit outputs a turn-off signal to control the MOS tube/>Turn off, resistance/>And capacitance/>Disconnection of SiC JFET device/>Two sides of the gate source cannot be the/>Gate capacitance/>Providing a discharge loop, and keeping the turn-off speed of the SiC JFET normal;

2) When a fault occurs, the branch current is lower than the average, Output high level:

When comparator Detection of sampling Voltage/>Reference voltage/>Time,/>Output high level, and drive circuit outputs on signal to control MOS tube/>Turn on, resistance/>And capacitance/>The two sides of the grid source of the SiC JFET are connected to be/>Gate capacitance of (2)And a discharging loop is provided, so that the turn-off speed of the SiC JFET is slowed down.

Preferably, the reference voltageThe value of (2) is set by SSCB as fault current/>And (3) determining:

(1)

In the method, in the process of the invention, Is a sampling resistor.

Preferably, whenWhen 2, at/>In case of overcurrent,/>To start the operation of the feedback control circuit of (2) >, whileIs not operated; neglecting current sampling circuit and high-speed comparator/>The time delay of the (4) simplifies the equivalent circuit, and the specific contents of the transient turn-off process comprise:

Stage I: Period of normal operation of DC system, line operation current/> Is in the range of the safety threshold value, and does not trigger SSCB to work;

stage II: and when a short circuit fault occurs to a circuit, the on-state internal resistance/>, of the SiC JFET device is ignored The current in the line rises rapidly,/>And/>Two branch current-sharing line fault current/>According to KVL law:

(2)

wherein, For line inductance,/>Is the total current of the two branches;

Differential equation (2) is under initial conditions: ，/> The lower solution is developed by first-order Taylor

(3)

Wherein,Any time is at the current stage;

Stage III: time period when the fault current is greater than a preset threshold/> After that, comparator direction/>Connected MOS tube/>Send off signal, and/>Connected MOS tube/>Since the delay is inactive, the current continues to rise as in phase II:

(4)

wherein, And/>The currents on the two branches are respectively;

because the SSCB does not turn off the fault current at the present moment, the parallel branch current is the same, the comparator output is positive, the MOS tube is controlled to be conducted, Circuit and/>Circuit access circuit,/>Gate-source side parasitic capacitance/>By driving the resistor/>/>The circuit loop discharges according to KVL's law:

(5)

Differential equation (4) is under initial conditions: The following solution:

(6)

Stage IV: time period after delay,/> Receiving a turn-off signal, wherein the current stage is the same as the stage III, and the line current continuously rises,/>Gate-source side parasitic capacitance/>By driving the resistor/>Discharging the RC circuit on the driving side;

Stage V: Period of time/> Time/>Miller platform end, flow through/>Current/>The start of descent:

(7)

In the method, in the process of the invention, For/>Transconductance of/>For/>Gate threshold voltage of (a);

Then by driving the resistor/> Drive side/>The loop continues to discharge;

Stage VI: Period of time/> Time/>Miller platform end, and stage/>Similarly, flow through/>The current of (2) starts to drop, and due to/>First turn off results in/>Branch current is greater than/>Branch current, thus/>The comparator of the branch is output with low level,/>Drive side/>Disconnecting;

by driving the resistor/> Discharge, increase in voltage reduction rate,/>The decreasing rate of the branch current becomes larger, so that the current non-uniformity degree is relieved;

Stage VII: Period of time/> And/>The gate-source side voltage of (c) continues to decrease until the drive voltage-15V is reached.

Compared with the prior art, the invention discloses the SSCB-oriented power device parallel active control current sharing circuit and the method thereof, which have the following beneficial effects:

The invention can timely cut off the short-circuit fault when the SSCB responds to the generated line short-circuit fault, and ensures that the active feedback control circuit can timely adjust the current and reduce the current non-uniformity degree of the branches if the current among the branches is uneven in the SSCB cutting-off fault stage.

Drawings

In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a structural topology diagram of an active control current sharing circuit for parallel connection of power devices facing to SSCB provided by the invention;

fig. 2 is an active current sharing control simplified equivalent circuit diagram of an active current sharing control current sharing circuit of a power device parallel connection oriented to an SSCB provided by the invention;

FIG. 3 is a schematic diagram of an ideal transient shutdown waveform according to an embodiment of the present invention;

Fig. 4 is an active current sharing control simulation circuit provided in an embodiment of the present invention;

fig. 5 is a diagram of simulation results with active current sharing control according to an embodiment of the present invention;

fig. 6 is a diagram of simulation results in the case of no active flow equalization control according to an embodiment of the present invention.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

The invention provides an SSCB-oriented power device parallel active control current sharing circuit, as shown in figure 1, comprising: a switching circuit and a feedback control circuit;

The switching circuit comprises 2 switching cells, wherein each switching cell comprises a SiC JFET device Resistance/>Capacitance/>MOS tube/>And sampling circuit/>，/>1 Or 2; /(I)Gate connection/>One end of/>The other end connection/>One end of/>The other end connection/>Drain of/>Source and/>Source electrode of (C) and/>Connected between two adjacent switching units, two/>Connected two/>Is connected with the drain electrode of the transistor;

The feedback control circuit comprises 2 control units, wherein each control unit comprises a comparator And a drive circuit, comparator/>Is correspondingly connected with the negative electrode input terminal/>The positive electrode input end obtains a reference voltage value, the output end of the comparator is connected with the input end of the driving circuit, and the output end of the driving circuit is connected with the corresponding switch unitIs formed on the substrate.

It should be noted that:

In the process of switching off fault current of a switching device, the switching-off speed difference of a parallel device is a main cause of uneven dynamic current due to other various factors, so the invention creatively provides an active control topology capable of effectively reducing the parallel switching device, when a short circuit fault occurs, the switching-in and switching-off of a driving side RC circuit are realized in a closed loop control mode, the switching-off speed of the fault current is influenced by controlling the voltage drop rate of two poles of a grid source of a JFET, thereby ensuring the good effect of current sharing among the parallel devices when the fault current is rapidly switched off, and preventing the device damage caused by the uneven current with too high.

An SSCB-oriented power device parallel active control current sharing method comprises the following conditions:

1) When a fault occurs, the branch current exceeds the average value, Output low level:

When comparator Detection of sampling Voltage/>Reference voltage/>Time,/>Output low level, and the drive circuit outputs a turn-off signal to control the MOS tube/>Turn off, resistance/>And capacitance/>Disconnection of SiC JFET device/>Two sides of the gate source cannot be the/>Gate capacitance/>Providing a discharge loop, and keeping the turn-off speed of the SiC JFET normal;

2) When a fault occurs, the branch current is lower than the average, Output high level:

When comparator Detection of sampling Voltage/>Reference voltage/>Time,/>Output high level, and drive circuit outputs on signal to control MOS tube/>Turn on, resistance/>And capacitance/>The two sides of the grid source of the SiC JFET are connected to be/>Gate capacitance of (2)And a discharging loop is provided, so that the turn-off speed of the SiC JFET is slowed down.

In order to further implement the above technical scheme, reference voltageThe value of (2) is set by SSCB as fault current/>And (3) determining:

(1)

In the method, in the process of the invention, Is a sampling resistor.

In order to further implement the technical scheme, whenWhen 2, at/>In case of overcurrent,/>To start the operation of the feedback control circuit of (2) >, whileIs not operated; neglecting current sampling circuit and high-speed comparator/>As shown in fig. 2, and as shown in fig. 3, the transient shutdown process specifically includes:

Stage I: Period of normal operation of DC system, line operation current/> Is in the range of the safety threshold value, and does not trigger SSCB to work;

stage II: and when a short circuit fault occurs to a circuit, the on-state internal resistance/>, of the SiC JFET device is ignored The current in the line rises rapidly,/>And/>Two branch current-sharing line fault current/>According to KVL law:

(2)

wherein, For line inductance,/>Is the total current of the two branches;

Differential equation (2) is under initial conditions: ，/> The lower solution is developed by first-order Taylor

(3)

Wherein,Any time is at the current stage;

Stage III: time period when the fault current is greater than a preset threshold/> After that, comparator direction/>Connected MOS tube/>Send off signal, and/>Connected MOS tube/>Since the delay is inactive, the current continues to rise as in phase II:

(4)

wherein, And/>The currents on the two branches are respectively;

because the SSCB does not turn off the fault current at the present moment, the parallel branch current is the same, the comparator output is positive, the MOS tube is controlled to be conducted, Circuit and/>Circuit access circuit,/>Gate-source side parasitic capacitance/>By driving the resistor/>/>The circuit loop discharges according to KVL's law:

(5)

Differential equation (4) is under initial conditions: The following solution:

(6)

Stage IV: time period after delay,/> Receiving a turn-off signal, wherein the current stage is the same as the stage III, and the line current continuously rises,/>Gate-source side parasitic capacitance/>By driving the resistor/>Drive side/>Discharging a loop;

Stage V: Period of time/> Time/>Miller platform end, flow through/>Current/>The start of descent:

(7)

In the method, in the process of the invention, For/>Transconductance of/>For/>Gate threshold voltage of (a);

Then by driving the resistor/> Drive side/>The loop continues to discharge;

Stage VI: Period of time/> Time/>Miller platform end, and stage/>Similarly, flow through/>The current of (2) starts to drop, and due to/>First turn off results in/>Branch current is greater than/>Branch current, thus/>The comparator of the branch is output with low level,/>Drive side/>Disconnecting;

by driving the resistor/> Discharge, increase in voltage reduction rate,/>The decreasing rate of the branch current becomes larger, so that the current non-uniformity degree is relieved;

Stage VII: Period of time/> And/>The gate-source side voltage of (c) continues to decrease until the drive voltage-15V is reached.

The invention will be further illustrated by simulation experiments:

and (3) a simulation platform: in order to verify the effectiveness of the proposed SSCB active current sharing control scheme, the feasibility of the topology was verified by PSpice simulation.

The simulation circuit topology is shown in fig. 4, and the proposed active control parallel topology is connected into the test circuit to drive the topology to be turned on or turned off through VPULSE. Wherein the active control parallel topology is the topology circuit of fig. 1, VPULSE is a VPULSE pulse voltage source inside the PSpice, and DC uses a V _DC direct current voltage source built in the PSpice.

The device parameters in the simulation circuit are shown in table 1, where the simulation model bus voltage of the SiC JFET was set to 400V. And a control signal is output to two GS ends of the active current sharing control topology through VPULSE so as to drive the parallel JFETs to be turned off, the turn-off effect of the topology in a test circuit can be checked by observing the turn-off waveform of the active current sharing control topology, and the feasibility of the topology circuit is verified.

TABLE 1 active control parallel topology simulation circuit device parameter Table

The simulation results of the turn-off process of the active control parallel topology are shown in fig. 5 and 6, and the simulation causes the uneven branch current by adjusting the delay time of the VPULSE output control signal,Driving signal ratio/>Is 20ns earlier. Wherein the method comprises the steps of，/>For current flowing through two branches of a parallel topology,/>、/>For/>、/>The voltage at two ends of the gate source is shown in fig. 5, which is a simulation result diagram of current sharing by active control, and in fig. 6, which is a simulation result diagram of current sharing without active control.

As can be seen from fig. 6, when the drive signals are not synchronized, the current split between the two branches will deviate,The divided current will be greater than/>The current is divided. As can be seen by comparing FIG. 5, after adding the active current sharing control, when the current sample reaches the threshold voltage set by the comparator, the active current sharing control circuit starts to work,/>Turn off, accelerate/>Gate voltage lowering speed,/>The turn-off speed is increased, the current non-uniformity degree is greatly reduced, and the feasibility of the active clamp control method is verified.

The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims (4)

1. The utility model provides a power device parallel active control current sharing circuit towards SSCB which characterized in that includes: a switching circuit and a feedback control circuit;

The switching circuit comprises 2 switching cells, wherein each switching cell comprises a SiC JFET device Resistance/>Capacitance/>MOS tube/>And sampling circuit/>，/>1 Or 2; /(I)Gate connection/>One end of/>The other end connection/>Is provided with a pair of grooves formed in the outer surface of the base,The other end connection/>Drain of/>Source and/>Source electrode of (C) and/>Connected between two adjacent switching units, two/>Connected two/>Is connected with the drain electrode of the transistor;

The feedback control circuit comprises 2 control units, wherein each control unit comprises a comparator And a drive circuit, comparator/>Is correspondingly connected with the negative electrode input terminal/>The positive electrode input end obtains a reference voltage value, the output end of the comparator is connected with the input end of the driving circuit, and the output end of the driving circuit is connected with the corresponding switch unitIs formed on the substrate.

2. The SSCB-oriented power device parallel active control current sharing method is based on the SSCB-oriented power device parallel active control current sharing circuit disclosed by claim 1, and is characterized by comprising the following conditions:

1) When a fault occurs, the branch current exceeds the average value, Output low level:

When comparator Detection of sampling Voltage/>Reference voltage/>Time,/>Output low level, and the drive circuit outputs a turn-off signal to control the MOS tube/>Turn off, resistance/>And capacitance/>Disconnection of SiC JFET device/>Two sides of the gate source cannot be the/>Gate capacitance/>Providing a discharge loop, and keeping the turn-off speed of the SiC JFET normal;

2) When a fault occurs, the branch current is lower than the average, Output high level:

When comparator Detection of sampling Voltage/>Reference voltage/>Time,/>Output high level, and drive circuit outputs on signal to control MOS tube/>Turn on, resistance/>And capacitance/>The two sides of the grid source of the SiC JFET are connected to be/>Gate capacitance/>And a discharging loop is provided, so that the turn-off speed of the SiC JFET is slowed down.

3. The method for actively controlling current sharing in parallel of power devices for SSCB according to claim 2, wherein the reference voltage isThe value of (2) is set by SSCB as fault current/>And (3) determining:

(1)

In the method, in the process of the invention, Is a sampling resistor.

4. The method for actively controlling current sharing in parallel with power devices oriented to SSCB according to claim 2, wherein whenWhen 2, at/>In case of overcurrent,/>To start the operation of the feedback control circuit of (2) >, whileIs not operated; neglecting current sampling circuit and high-speed comparator/>The time delay of the (4) simplifies the equivalent circuit, and the specific contents of the transient turn-off process comprise:

Stage I: Period of normal operation of DC system, line operation current/> Is in the range of the safety threshold value, and does not trigger SSCB to work;

stage II: and when a short circuit fault occurs to a circuit, the on-state internal resistance/>, of the SiC JFET device is ignored The current in the line rises rapidly,/>And/>Two branch current-sharing line fault current/>According to KVL law:

(2)

wherein, For line inductance,/>Is the total current of the two branches;

Differential equation (2) is under initial conditions: ，/> The lower solution is developed by first-order Taylor

(3)

Wherein,Any time is at the current stage;

Stage III: time period when the fault current is greater than a preset threshold/> After that, comparator direction/>Connected MOS tubeSend off signal, and/>Connected MOS tube/>Since the delay is inactive, the current continues to rise as in phase II:

(4)

wherein, And/>The currents on the two branches are respectively;

because the SSCB does not turn off the fault current at the present moment, the parallel branch current is the same, the comparator output is positive, the MOS tube is controlled to be conducted, Circuit and/>Circuit access circuit,/>Gate-source side parasitic capacitance/>By driving the resistor/>/>The circuit loop discharges according to KVL's law:

(5)

Differential equation (4) is under initial conditions: The following solution:

(6)

Stage IV: time period after delay,/> Receiving a turn-off signal, wherein the current stage is the same as the stage III, and the line current continuously rises,/>Gate-source side parasitic capacitance/>By driving the resistor/>Drive side/>Discharging a loop;

Stage V: Period of time/> Time/>Miller platform end, flow through/>Current/>The start of descent:

(7)

In the method, in the process of the invention, For/>Transconductance of/>For/>Gate threshold voltage of (a);

Then by driving the resistor/> Drive side/>The loop continues to discharge;

Stage VI: Period of time/> Time/>Miller platform end, and stage/>Similarly, flow through/>The current of (2) starts to drop, and due to/>First turn off results in/>Branch current is greater than/>Branch current, thus/>The comparator of the branch is output with low level,/>Drive side/>Disconnecting;

by driving the resistor/> Discharge, increase in voltage reduction rate,/>The decreasing rate of the branch current becomes larger, so that the current non-uniformity degree is relieved;

Stage VII: Period of time/> And/>The gate-source side voltage of (c) continues to decrease until the drive voltage-15V is reached.