CN118100805A - On-chip integrated high-frequency oscillator - Google Patents
On-chip integrated high-frequency oscillator Download PDFInfo
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Abstract
Description
技术领域Technical Field
本发明属于高频振荡器技术领域，尤其涉及一种片内集成的高频振荡器。The invention belongs to the technical field of high-frequency oscillators, and in particular relates to an on-chip integrated high-frequency oscillator.
背景技术Background technique
振荡器是一种能够产生周期性信号的电路或设备，广泛应用于无线通信、计算机、仪器仪表等领域。其背景技术主要包括电子振荡器、压电振荡器、光学振荡器等多种类型。电子振荡器利用电感、电容和晶体管等元件来产生稳定的电压或电流波形；压电振荡器则利用压电效应产生机械振动；光学振荡器则利用光的干涉或放大效应产生稳定的光波。这些技术为振荡器的设计和应用提供了丰富的选择和可能性。An oscillator is a circuit or device that can generate a periodic signal. It is widely used in wireless communications, computers, instrumentation and other fields. Its background technology mainly includes electronic oscillators, piezoelectric oscillators, optical oscillators and other types. Electronic oscillators use components such as inductors, capacitors and transistors to generate stable voltage or current waveforms; piezoelectric oscillators use the piezoelectric effect to generate mechanical vibrations; optical oscillators use the interference or amplification effect of light to generate stable light waves. These technologies provide a wealth of options and possibilities for the design and application of oscillators.
但是上述方式都需要外围器件来实现，需要额外的空间与物料成本，对于目前集成化和小型化的要求不相符。为此需要设计一种能够片上集成的振荡器电路，减小体积与节约成本。However, the above methods all require peripheral devices to implement, which requires additional space and material costs, and are not in line with the current requirements for integration and miniaturization. Therefore, it is necessary to design an oscillator circuit that can be integrated on a chip to reduce the volume and save costs.
发明内容Summary of the invention
本发明的目的是提供一种用于载波调制的振荡器电路，采用VCO(voltagecontrol osillator)架构，使用开关电容和运算放大器等结构实现了一种片内集成的高频振荡器电路。The purpose of the present invention is to provide an oscillator circuit for carrier modulation, which adopts a VCO (voltage control osillator) architecture and uses structures such as switch capacitors and operational amplifiers to realize an on-chip integrated high-frequency oscillator circuit.
本发明的技术方案为：The technical solution of the present invention is:
一种片内集成的高频振荡器，其特征在于，包括运算放大器EA、第一电容、第二电容、第三电容、第四电容、第一电阻、第二电阻、第一NMOS管、第二NMOS管、第三NMOS管、第一PMOS管、第二PMOS管、第三PMOS管、第一反相器、第二反相器、第三反相器、第四反相器、第五反相器和第六反相器；An on-chip integrated high-frequency oscillator, characterized in that it includes an operational amplifier EA, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a first inverter, a second inverter, a third inverter, a fourth inverter, a fifth inverter, and a sixth inverter;
第一反相器、第二反相器、第三反相器、第四反相器、第五反相器依次串联，并且第一反相器的输入接第三反相器的输出；The first inverter, the second inverter, the third inverter, the fourth inverter and the fifth inverter are connected in series in sequence, and the input of the first inverter is connected to the output of the third inverter;
第五反相器的输出通过第四电容后接第二电阻的一端、第二PMOS管的栅极和第二NMOS管的栅极；第二PMOS管的源极接电源，第二NMOS管的源极接地；第二PMOS管的漏极接第二电阻的另一端、第二NMOS管的漏极、第三PMOS管的栅极、第三NMOS管的栅极；第三PMOS管的源极接电源，第三NMOS管的源极接地；第三PMOS管的漏极接第三NMOS管的漏极、第六反相器的输入；The output of the fifth inverter is connected to one end of the second resistor, the gate of the second PMOS tube and the gate of the second NMOS tube after passing through the fourth capacitor; the source of the second PMOS tube is connected to the power supply, and the source of the second NMOS tube is grounded; the drain of the second PMOS tube is connected to the other end of the second resistor, the drain of the second NMOS tube, the gate of the third PMOS tube, and the gate of the third NMOS tube; the source of the third PMOS tube is connected to the power supply, and the source of the third NMOS tube is grounded; the drain of the third PMOS tube is connected to the drain of the third NMOS tube and the input of the sixth inverter;
第六反相器的输出接第一PMOS管的栅极、第一NMOS管的栅极；第一PMOS管的源极通过第一电阻后接电源，第一NMOS管的源极接地；第一PMOS管的漏极接第一NMOS管的漏极、第一电容的一端，第一电容的另一端接地；The output of the sixth inverter is connected to the gate of the first PMOS tube and the gate of the first NMOS tube; the source of the first PMOS tube is connected to the power supply through the first resistor, and the source of the first NMOS tube is grounded; the drain of the first PMOS tube is connected to the drain of the first NMOS tube and one end of the first capacitor, and the other end of the first capacitor is grounded;
运算放大器EA的正输入端接第一PMOS管的源极和第二电容的一端，运算放大器EA的负输入端接基准电压，运算放大器EA的输出接第三电容的一端和第一反相器、第二反相器、第三反相器、第四反相器、第五反相器的电源端；第二电容的另一端和第三电容的另一端接地。The positive input terminal of the operational amplifier EA is connected to the source of the first PMOS tube and one end of the second capacitor, the negative input terminal of the operational amplifier EA is connected to the reference voltage, the output of the operational amplifier EA is connected to one end of the third capacitor and the power supply terminals of the first inverter, the second inverter, the third inverter, the fourth inverter and the fifth inverter; the other end of the second capacitor and the other end of the third capacitor are grounded.
本发明的有益效果是：使用开关电容和运算放大器等结构实现了一种片内集成的高频振荡器电路，实现了减小体积与节约成本。The beneficial effects of the present invention are: using structures such as switch capacitors and operational amplifiers to realize an on-chip integrated high-frequency oscillator circuit, thereby reducing the volume and saving costs.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为本发明的电路结构示意图；FIG1 is a schematic diagram of a circuit structure of the present invention;
图2为本发明的电平位移结构频响图；FIG2 is a frequency response diagram of a level shift structure of the present invention;
图3为本发明实例所采用的误差放大器结构示意图；FIG3 is a schematic diagram of the structure of an error amplifier used in an example of the present invention;
图4为本发明的关键节点工作波形。FIG. 4 is a working waveform of a key node of the present invention.
具体实施方式Detailed ways
下面结合附图，详细描述本发明的技术方案。The technical solution of the present invention is described in detail below in conjunction with the accompanying drawings.
如图1所示，本发明设计的高频振荡器1主要由压控振荡器VCO11、电平位移12、频率电压转换器13、误差放大器14四个模块组成，还包括第二电容C2、直流电源VCC、参考地GND、参考电压VREF。As shown in FIG1 , the high frequency oscillator 1 designed in the present invention mainly consists of four modules: a voltage controlled oscillator VCO11 , a level shifter 12 , a frequency voltage converter 13 , and an error amplifier 14 , and also includes a second capacitor C 2 , a DC power supply VCC, a reference ground GND, and a reference voltage VREF.
压控振荡器11由第一反相器、第二反相器、第三反相器、第四反相器、第五反相器组成，其中第一反相器输入接第三反相器输出和第四反相器输入，第二反相器输入接第一反相器输出，第三反相器输入接第二反相器输出，第四反相器输入接第三反相器输出和第一反相器输入，第五反相器输入接第四反相器输出，第五反相器输出接电平位移12的输入。The voltage-controlled oscillator 11 is composed of a first inverter, a second inverter, a third inverter, a fourth inverter, and a fifth inverter, wherein the input of the first inverter is connected to the output of the third inverter and the input of the fourth inverter, the input of the second inverter is connected to the output of the first inverter, the input of the third inverter is connected to the output of the second inverter, the input of the fourth inverter is connected to the output of the third inverter and the input of the first inverter, the input of the fifth inverter is connected to the output of the fourth inverter, and the output of the fifth inverter is connected to the input of the level shifter 12.
电平位移12由第二NMOS、第三NMOS、第二PMOS、第三PMOS、第二电阻、第四电容、第六反相器组成；第四电容一端接第五反相器输出，另一端接第二NMOS、第二PMOS的栅端和第二电阻的一端；第二PMOS的源端接电源VCC，漏端接第二NMOS的漏端、第三PMOS和第三NMOS的栅端以及第二电阻的一端；第三PMOS的源端接电源VCC，第三PMOS的漏端接第三NMOS的漏端和第六反相器的输入端，第二NMOS和第三NMOS源端接地GND，第六反相器输出作为频率电压转换器13的输入。The level shifter 12 is composed of a second NMOS, a third NMOS, a second PMOS, a third PMOS, a second resistor, a fourth capacitor, and a sixth inverter; one end of the fourth capacitor is connected to the output of the fifth inverter, and the other end is connected to the gate ends of the second NMOS, the second PMOS, and one end of the second resistor; the source end of the second PMOS is connected to the power supply VCC, and the drain end is connected to the drain end of the second NMOS, the gate ends of the third PMOS and the third NMOS, and one end of the second resistor; the source end of the third PMOS is connected to the power supply VCC, the drain end of the third PMOS is connected to the drain end of the third NMOS and the input end of the sixth inverter, the source ends of the second NMOS and the third NMOS are grounded GND, and the output of the sixth inverter is used as the input of the frequency-to-voltage converter 13.
频率电压转换器13由第一电阻、第一电容、第二电容、第一NMOS、第二PMOS组成；第一电阻一端接电源VCC，另一端接第一PMOS的源端、误差放大器的正向输入端、第二电容的正端；第一PMOS的漏端接第一NMOS管的漏端以及第一电容的正端；第一NMOS的源端、第一电容的负端、第二电容的负端接地。The frequency-to-voltage converter 13 is composed of a first resistor, a first capacitor, a second capacitor, a first NMOS, and a second PMOS; one end of the first resistor is connected to the power supply VCC, and the other end is connected to the source end of the first PMOS, the positive input end of the error amplifier, and the positive end of the second capacitor; the drain end of the first PMOS is connected to the drain end of the first NMOS tube and the positive end of the first capacitor; the source end of the first NMOS, the negative end of the first capacitor, and the negative end of the second capacitor are grounded.
误差放大器14由误差放大器EA、第三电容、参考电压VREF组成。误差放大器正端接频率电压转换器13的输出，负端接参考电压VREF，输出接第三电容正端以及第一至第五反相器的电源端，第三电容负端接地GND。The error amplifier 14 is composed of an error amplifier EA, a third capacitor, and a reference voltage VREF. The error amplifier has a positive terminal connected to the output of the frequency-to-voltage converter 13, a negative terminal connected to the reference voltage VREF, an output connected to the positive terminal of the third capacitor and the power supply terminals of the first to fifth inverters, and a negative terminal of the third capacitor connected to the ground GND.
本发明的工作原理如下：The working principle of the present invention is as follows:
压控振荡器11、电平位移12、频率电压转换器13、误差放大器14、第二电容C2构成一个负反馈环路，误差放大器14作为负反馈环路内的核心模块，将误差放大器正负输入端电压钳位至一样大，其输出Vctrl则作为压控振荡器11的电源电压控制压控振荡器的振荡频率，第三电容为误差放大器的负载电容，其主要作用为滤波；压控振荡器11由第一至第五反向器组成，核心为第一至第三反相器，INV1、INV2和INV3首尾相连组成环形振荡器，INV4和INV5起到缓冲的作用，避免后级电路的干扰；电平位移12的作用是实现电平转换，因为压控振荡器11的振荡幅度由电压Vctrl确定，在实现不同的振荡频率时该电压的值会发生变化，且小于直流电源电压VCC，而后级频率电压转换器需要的是峰峰值为VCC-GND的方波，电平位移12则是实现该功能；频率电压转换器13的功能是实现频率信息至电压信息的转换，因为误差放大器只能放大电压信息，而前级传递过来的为频率信息，只有将频率信息转换为电压信息后才能实现负反馈环路的闭合。The voltage-controlled oscillator 11, the level shifter 12, the frequency-voltage converter 13, the error amplifier 14, and the second capacitor C2 form a negative feedback loop. The error amplifier 14 is the core module in the negative feedback loop. It clamps the voltages of the positive and negative input terminals of the error amplifier to the same value. Its output Vctrl is used as the power supply voltage of the voltage-controlled oscillator 11 to control the oscillation frequency of the voltage-controlled oscillator. The third capacitor is the load capacitor of the error amplifier, and its main function is filtering. The voltage-controlled oscillator 11 is composed of the first to fifth inverters, and the core is the first to third inverters. INV1, INV2 and INV3 are connected end to end to form a ring oscillator. INV4 and INV5 play a buffering role to avoid interference from the subsequent circuit. The function of 12 is to realize level conversion, because the oscillation amplitude of the voltage-controlled oscillator 11 is determined by the voltage Vctrl. When different oscillation frequencies are realized, the value of this voltage will change and is less than the DC power supply voltage VCC. What the subsequent frequency-to-voltage converter needs is a square wave with a peak-to-peak value of VCC-GND, and the level shifter 12 realizes this function; the function of the frequency-to-voltage converter 13 is to realize the conversion of frequency information to voltage information, because the error amplifier can only amplify voltage information, and what is transmitted from the previous stage is frequency information. Only after the frequency information is converted into voltage information can the negative feedback loop be closed.
频率电压转换器核心结构是由第一PMOS、第一NMOS，第一电容组成的开关电容，该结构的等效阻抗为：The core structure of the frequency-to-voltage converter is a switched capacitor composed of a first PMOS, a first NMOS, and a first capacitor. The equivalent impedance of the structure is:
其中，fosc代表节点E处的振荡频率。Wherein, f osc represents the oscillation frequency at node E.
在稳态工作条件下，误差放大器正向输入端电压等于负向输入端电压VREF，则流过第一电阻R1的电流为：Under steady-state operating conditions, the voltage at the positive input terminal of the error amplifier is equal to the voltage at the negative input terminal VREF, and the current flowing through the first resistor R1 is:
由式(1)和式(2)可以得到稳态下误差放大器EA的正向输入端电压为：From equations (1) and (2), we can get the voltage at the positive input terminal of the error amplifier EA in steady state:
又因为稳态工作条件下，误差放大器正向输入端电压等于负向输入端电压VREF，所以可以得到稳态下振荡器频率为：Because under steady-state working conditions, the voltage at the positive input terminal of the error amplifier is equal to the voltage at the negative input terminal VREF, the oscillator frequency in steady state can be obtained as:
该振荡频率仅与直流电源电压VCC、参考电压VREF、第一电容C1、第一电阻R1有关，若追求更高的稳定性，可以将第一电阻R1替换为电流源，该方案同样在本发明实例权利保护内。The oscillation frequency is only related to the DC power supply voltage VCC, the reference voltage VREF, the first capacitor C 1 , and the first resistor R 1 . If higher stability is desired, the first resistor R 1 can be replaced with a current source, which is also within the scope of protection of the present invention.
对于本发明中的电平位移12，节点B和节点C的dc工作点约为VCC/2，A点的振荡幅度为0-Vctrl，经过第四电容C4耦合至节点B，经过MP2、MN2和R2放大至节点C，在经过MP3和MN3推挽放大器放大至节点D，经过INV6整形至节点E，各个节点的工作波形示意图如图4所示。电平位移12实际上为一个微分器，由于C节点存在寄生电容Cp，存在一个零点和两个极点，整体频率响应呈现带通放大器特性，如图2所示。为保证振荡频率能得到有效放大，振荡器频率应该处于两个极点之间。另外，频率响应呈现带通特性是必要的，在振荡器起振过程中，振荡频率是由高到低最后到达稳定，如果对特别高频的信号也有放大作用，那么高频信号会传导到E节点，过高的开关频率无法实现MP1和MN1的开启和关断，达不到开关电容的作用。此时电路会被锁死，虽然在振荡，但振荡频率无法被锁定至设定值。For the level shift 12 in the present invention, the dc operating point of node B and node C is about VCC/2, the oscillation amplitude of point A is 0-Vctrl, coupled to node B through the fourth capacitor C4 , amplified to node C through MP2, MN2 and R2 , amplified to node D through MP3 and MN3 push-pull amplifiers, and shaped to node E through INV6. The schematic diagram of the working waveform of each node is shown in Figure 4. The level shift 12 is actually a differentiator. Due to the parasitic capacitance Cp at the C node, there is a zero point and two poles, and the overall frequency response presents a bandpass amplifier characteristic, as shown in Figure 2. To ensure that the oscillation frequency can be effectively amplified, the oscillator frequency should be between the two poles. In addition, it is necessary for the frequency response to present a bandpass characteristic. During the oscillator start-up process, the oscillation frequency is from high to low and finally reaches stability. If it also has an amplification effect on a particularly high-frequency signal, then the high-frequency signal will be conducted to the E node, and the excessively high switching frequency cannot realize the opening and closing of MP1 and MN1, and the effect of the switch capacitor cannot be achieved. At this time, the circuit will be locked. Although it is oscillating, the oscillation frequency cannot be locked to the set value.
图3所示为本发明采用的误差放大器结构，采用二级级联的方式实现高增益。第一级为五管OTA，第二级为共源极放大器。补偿结构由电阻R3、电容C5和电容C6组成，产生一个低频主极点，高频极点和一个补偿零点。该误差放大器的传输函数为：FIG3 shows the error amplifier structure used in the present invention, which uses a two-stage cascade to achieve high gain. The first stage is a five-tube OTA, and the second stage is a common source amplifier. The compensation structure consists of resistor R 3 , capacitor C 5 and capacitor C 6 , which produce a low-frequency main pole, a high-frequency pole and a compensation zero. The transfer function of the error amplifier is:
RO1＝ro2||r04 (6)R O1 ＝r o2 ||r 04 (6)
其中，ro2和ro4为M2和M4的小信号输出阻抗，Rout和Cout为误差放大器的输出阻抗和输出电容。整个反馈环路的环路增益为：Where, r o2 and r o4 are the small signal output impedances of M2 and M4, R out and C out are the output impedance and output capacitance of the error amplifier. The loop gain of the entire feedback loop is:
其中，Kvco为振荡器的增益，AV为误差放大器的低频增益，为保证整个环路的稳定性，需要合理设置零极点的位置来保证一定的相位裕度。Among them, K vco is the gain of the oscillator, A V is the low-frequency gain of the error amplifier. In order to ensure the stability of the entire loop, the position of the zero pole needs to be reasonably set to ensure a certain phase margin.
最后应说明的是：显然，上述实施例仅是为清楚地说明本发明所作的举例，而并非对实施方式的限定。对于所属领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引申出的显而易见的变化或变动仍处于本发明的保护范围之中。Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly explaining the present invention, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present invention.
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