CN118100805A - On-chip integrated high-frequency oscillator - Google Patents
On-chip integrated high-frequency oscillator Download PDFInfo
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- CN118100805A CN118100805A CN202410276775.5A CN202410276775A CN118100805A CN 118100805 A CN118100805 A CN 118100805A CN 202410276775 A CN202410276775 A CN 202410276775A CN 118100805 A CN118100805 A CN 118100805A
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- inverter
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- error amplifier
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- 239000003990 capacitor Substances 0.000 claims abstract description 51
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 230000010355 oscillation Effects 0.000 description 10
- 230000000694 effects Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 101150070189 CIN3 gene Proteins 0.000 description 1
- 101150110971 CIN7 gene Proteins 0.000 description 1
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 1
- 101100508840 Daucus carota INV3 gene Proteins 0.000 description 1
- 101150110298 INV1 gene Proteins 0.000 description 1
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 1
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/20—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator
- H03B5/24—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator active element in amplifier being semiconductor device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The invention belongs to the technical field of high-frequency oscillators, and particularly relates to an on-chip integrated high-frequency oscillator. The high-frequency oscillator mainly comprises a voltage-controlled oscillator, a level shift, a frequency-voltage converter, an error amplifier and a second capacitor, a direct-current power supply, a reference ground and a reference voltage; the voltage-controlled oscillator, the level shift, the frequency-voltage converter, the error amplifier and the second capacitor form a negative feedback loop, the error amplifier is used as a core module in the negative feedback loop, the voltage of the positive and negative input ends of the error amplifier is clamped to be the same, and the output of the error amplifier is used as the power supply voltage of the voltage-controlled oscillator; the voltage-controlled oscillator is composed of an inverter; the function of the level shift is to realize level shift; the function of the frequency-to-voltage converter is to achieve conversion of frequency information into voltage information. The invention realizes an on-chip integrated high-frequency oscillator circuit by using structures such as a switch capacitor, an operational amplifier and the like.
Description
Technical Field
The invention belongs to the technical field of high-frequency oscillators, and particularly relates to an on-chip integrated high-frequency oscillator.
Background
An oscillator is a circuit or device capable of generating periodic signals and is widely applied to the fields of wireless communication, computers, instruments and meters and the like. The background technology mainly comprises various types such as an electronic oscillator, a piezoelectric oscillator, an optical oscillator and the like. The electronic oscillator utilizes elements such as an inductor, a capacitor, a transistor and the like to generate stable voltage or current waveforms; the piezoelectric oscillator generates mechanical vibration by utilizing a piezoelectric effect; the optical oscillator generates stable light waves by utilizing interference or amplification effect of light. These techniques provide a rich choice and possibility for the design and application of the oscillator.
However, the above methods all need peripheral devices to be implemented, require additional space and material cost, and do not meet the current requirements of integration and miniaturization. For this purpose, it is necessary to design an oscillator circuit that can be integrated on-chip, reducing the volume and saving the cost.
Disclosure of Invention
The invention aims to provide an oscillator circuit for carrier modulation, which adopts VCO (voltage control osillator) architecture and uses structures such as a switch capacitor, an operational amplifier and the like to realize an on-chip integrated high-frequency oscillator circuit.
The technical scheme of the invention is as follows:
An on-chip integrated high-frequency oscillator is characterized by comprising an operational amplifier EA, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a first NMOS tube, a second NMOS tube, a third NMOS tube, a first PMOS tube, a second PMOS tube, a third PMOS tube, a first inverter, a second inverter, a third inverter, a fourth inverter, a fifth inverter and a sixth inverter;
the first inverter, the second inverter, the third inverter, the fourth inverter and the fifth inverter are sequentially connected in series, and the input of the first inverter is connected with the output of the third inverter;
The output of the fifth inverter is connected with one end of the second resistor, the grid electrode of the second PMOS tube and the grid electrode of the second NMOS tube through the fourth capacitor; the source electrode of the second PMOS tube is connected with a power supply, and the source electrode of the second NMOS tube is grounded; the drain electrode of the second PMOS tube is connected with the other end of the second resistor, the drain electrode of the second NMOS tube, the grid electrode of the third PMOS tube and the grid electrode of the third NMOS tube; the source electrode of the third PMOS tube is connected with a power supply, and the source electrode of the third NMOS tube is grounded; the drain electrode of the third PMOS tube is connected with the drain electrode of the third NMOS tube and the input of the sixth inverter;
The output of the sixth inverter is connected with the grid electrode of the first PMOS tube and the grid electrode of the first NMOS tube; the source electrode of the first PMOS tube is connected with a power supply through a first resistor, and the source electrode of the first NMOS tube is grounded; the drain electrode of the first PMOS tube is connected with the drain electrode of the first NMOS tube and one end of the first capacitor, and the other end of the first capacitor is grounded;
The positive input end of the operational amplifier EA is connected with the source electrode of the first PMOS tube and one end of the second capacitor, the negative input end of the operational amplifier EA is connected with the reference voltage, and the output end of the operational amplifier EA is connected with one end of the third capacitor and the power supply ends of the first inverter, the second inverter, the third inverter, the fourth inverter and the fifth inverter; the other end of the second capacitor and the other end of the third capacitor are grounded.
The beneficial effects of the invention are as follows: the high-frequency oscillator circuit integrated in the chip is realized by using structures such as a switch capacitor, an operational amplifier and the like, and the size is reduced and the cost is saved.
Drawings
FIG. 1 is a schematic diagram of a circuit structure of the present invention;
FIG. 2 is a frequency chart of a level shift structure according to the present invention;
FIG. 3 is a schematic diagram of an error amplifier used in an example of the present invention;
fig. 4 is a key node operating waveform of the present invention.
Detailed Description
The technical scheme of the invention is described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the high-frequency oscillator 1 of the present invention mainly comprises four modules including a voltage-controlled oscillator VCO11, a level shift 12, a frequency-to-voltage converter 13, and an error amplifier 14, and further comprises a second capacitor C 2, a dc power VCC, a reference ground GND, and a reference voltage VREF.
The voltage-controlled oscillator 11 is composed of a first inverter, a second inverter, a third inverter, a fourth inverter and a fifth inverter, wherein the input of the first inverter is connected with the output of the third inverter and the input of the fourth inverter, the input of the second inverter is connected with the output of the first inverter, the input of the third inverter is connected with the output of the second inverter, the input of the fourth inverter is connected with the output of the third inverter and the input of the first inverter, the input of the fifth inverter is connected with the output of the fourth inverter, and the output of the fifth inverter is connected with the input of the level shift 12.
The level shift 12 is composed of a second NMOS, a third NMOS, a second PMOS, a third PMOS, a second resistor, a fourth capacitor and a sixth inverter; one end of the fourth capacitor is connected with the output of the fifth inverter, and the other end of the fourth capacitor is connected with the gate ends of the second NMOS and the second PMOS and one end of the second resistor; the source end of the second PMOS is connected with the power VCC, the drain end of the second NMOS, the gate ends of the third PMOS and the third NMOS and one end of the second resistor; the source of the third PMOS is connected to the power VCC, the drain of the third PMOS is connected to the drain of the third NMOS and the input of the sixth inverter, the second NMOS and the third NMOS source are connected to GND, and the sixth inverter output is used as the input of the frequency-to-voltage converter 13.
The frequency-voltage converter 13 is composed of a first resistor, a first capacitor, a second capacitor, a first NMOS and a second PMOS; one end of the first resistor is connected with the power supply VCC, and the other end of the first resistor is connected with the source end of the first PMOS, the positive input end of the error amplifier and the positive end of the second capacitor; the drain end of the first PMOS is connected with the drain end of the first NMOS tube and the positive end of the first capacitor; the source end of the first NMOS, the negative end of the first capacitor and the negative end of the second capacitor are grounded.
The error amplifier 14 is composed of an error amplifier EA, a third capacitor, and a reference voltage VREF. The positive end of the error amplifier is connected with the output of the frequency-voltage converter 13, the negative end of the error amplifier is connected with the reference voltage VREF, the output of the error amplifier is connected with the positive end of the third capacitor and the power ends of the first to fifth inverters, and the negative end of the third capacitor is grounded GND.
The working principle of the invention is as follows:
The voltage-controlled oscillator 11, the level shift 12, the frequency-voltage converter 13, the error amplifier 14 and the second capacitor C 2 form a negative feedback loop, the error amplifier 14 is used as a core module in the negative feedback loop, the voltage of the positive and negative input ends of the error amplifier is clamped to be the same, the output Vctrl is used as the power supply voltage of the voltage-controlled oscillator 11 to control the oscillation frequency of the voltage-controlled oscillator, and the third capacitor is used as the load capacitor of the error amplifier and mainly used for filtering; the voltage-controlled oscillator 11 consists of a first inverter, a second inverter, a third inverter and a ring oscillator, wherein the cores of the voltage-controlled oscillator 11 are the first inverter, the third inverter and the ring oscillator are formed by connecting INV1, INV2 and INV3 end to end, the INV4 and INV5 play a role in buffering, and the interference of a later-stage circuit is avoided; the level shift 12 is used for realizing level shift, because the oscillation amplitude of the voltage-controlled oscillator 11 is determined by the voltage Vctrl, the value of the voltage is changed when different oscillation frequencies are realized and is smaller than the direct-current power supply voltage VCC, the square wave with the peak-peak value of VCC-GND is needed by the post-stage frequency voltage converter, and the level shift 12 realizes the function; the function of the frequency-to-voltage converter 13 is to convert the frequency information into voltage information, since the error amplifier can only amplify the voltage information, whereas the previous stage is the frequency information, and the negative feedback loop can only be closed after converting the frequency information into the voltage information.
The frequency-voltage converter core structure is a switch capacitor composed of a first PMOS, a first NMOS and a first capacitor, and the equivalent impedance of the structure is as follows:
Where f osc represents the oscillation frequency at node E.
Under steady-state operating conditions, the positive input terminal voltage of the error amplifier is equal to the negative input terminal voltage VREF, and then the current flowing through the first resistor R 1 is:
the positive input voltage of the error amplifier EA in steady state can be obtained from the equations (1) and (2) as:
In addition, under the steady-state working condition, the positive input end voltage of the error amplifier is equal to the negative input end voltage VREF, so that the oscillator frequency in the steady state can be obtained as follows:
The oscillation frequency is only related to the direct current power supply voltage VCC, the reference voltage VREF, the first capacitor C 1 and the first resistor R 1, and if higher stability is required, the first resistor R 1 may be replaced by a current source, which is also within the protection of the example of the present invention.
For the level shift 12 of the present invention, the dc operating point of node B and node C is about VCC/2, the oscillation amplitude of point a is 0-Vctrl, coupled to node B via fourth capacitor C 4, amplified to node C via MP2, MN2 and R 2, amplified to node D via MP3 and MN3 push-pull amplifiers, and shaped to node E via INV6, the operating waveforms of each node being schematically shown in fig. 4. The level shift 12 is effectively a differentiator, with a zero and two poles due to the parasitic capacitance C p at node C, and the overall frequency response exhibits bandpass amplifier characteristics, as shown in fig. 2. To ensure that the oscillation frequency is effectively amplified, the oscillator frequency should be between the two poles. In addition, it is necessary that the frequency response exhibits a bandpass characteristic, and during the oscillation starting process of the oscillator, the oscillation frequency is stabilized from high to low, if the amplification effect is also provided for a particularly high-frequency signal, the high-frequency signal is conducted to the node E, and the switching frequency too high cannot realize the on/off of MP1 and MN1, so that the effect of the switching capacitor cannot be achieved. At this time, the circuit is locked, and the oscillation frequency cannot be locked to the set value although it is oscillating.
Fig. 3 shows an error amplifier structure adopted by the invention, and a high gain is realized by adopting a two-stage cascade connection mode. The first stage is five-tube OTA, and the second stage is a common source amplifier. The compensation structure consists of a resistor R 3, a capacitor C 5 and a capacitor C 6, and generates a low-frequency main pole, a high-frequency pole and a compensation zero. The transfer function of the error amplifier is:
RO1=ro2||r04 (6)
Where R o2 and R o4 are the small signal output impedances of M2 and M4, and R out and C out are the output impedance and output capacitance of the error amplifier. The loop gain of the whole feedback loop is:
wherein, K vco is the gain of the oscillator, a V is the low-frequency gain of the error amplifier, and in order to ensure the stability of the whole loop, the position of the zero pole needs to be set reasonably to ensure a certain phase margin.
Finally, it should be noted that: it is apparent that the above examples are only illustrative of the present invention and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. And obvious variations or modifications thereof are contemplated as falling within the scope of the present invention.
Claims (1)
1. An on-chip integrated high-frequency oscillator is characterized by comprising an operational amplifier EA, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a first NMOS tube, a second NMOS tube, a third NMOS tube, a first PMOS tube, a second PMOS tube, a third PMOS tube, a first inverter, a second inverter, a third inverter, a fourth inverter, a fifth inverter and a sixth inverter;
the first inverter, the second inverter, the third inverter, the fourth inverter and the fifth inverter are sequentially connected in series, and the input of the first inverter is connected with the output of the third inverter;
The output of the fifth inverter is connected with one end of the second resistor, the grid electrode of the second PMOS tube and the grid electrode of the second NMOS tube through the fourth capacitor; the source electrode of the second PMOS tube is connected with a power supply, and the source electrode of the second NMOS tube is grounded; the drain electrode of the second PMOS tube is connected with the other end of the second resistor, the drain electrode of the second NMOS tube, the grid electrode of the third PMOS tube and the grid electrode of the third NMOS tube; the source electrode of the third PMOS tube is connected with a power supply, and the source electrode of the third NMOS tube is grounded; the drain electrode of the third PMOS tube is connected with the drain electrode of the third NMOS tube and the input of the sixth inverter;
The output of the sixth inverter is connected with the grid electrode of the first PMOS tube and the grid electrode of the first NMOS tube; the source electrode of the first PMOS tube is connected with a power supply through a first resistor, and the source electrode of the first NMOS tube is grounded; the drain electrode of the first PMOS tube is connected with the drain electrode of the first NMOS tube and one end of the first capacitor, and the other end of the first capacitor is grounded;
The positive input end of the operational amplifier EA is connected with the source electrode of the first PMOS tube and one end of the second capacitor, the negative input end of the operational amplifier EA is connected with the reference voltage, and the output end of the operational amplifier EA is connected with one end of the third capacitor and the power supply ends of the first inverter, the second inverter, the third inverter, the fourth inverter and the fifth inverter; the other end of the second capacitor and the other end of the third capacitor are grounded.
Priority Applications (1)
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CN202410276775.5A CN118100805A (en) | 2024-03-12 | 2024-03-12 | On-chip integrated high-frequency oscillator |
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CN202410276775.5A CN118100805A (en) | 2024-03-12 | 2024-03-12 | On-chip integrated high-frequency oscillator |
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CN118100805A true CN118100805A (en) | 2024-05-28 |
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