CN118073439A

CN118073439A - Solar cell and photovoltaic module

Info

Publication number: CN118073439A
Application number: CN202410175610.9A
Authority: CN
Inventors: 王巍; 夏志鹏; 黄纪德; 刘长明; 张昕宇; 金浩
Original assignee: Jinko Solar Haining Co Ltd
Current assignee: Jinko Solar Haining Co Ltd
Priority date: 2024-02-07
Filing date: 2024-02-07
Publication date: 2024-05-24

Abstract

The embodiment of the application relates to the field of photovoltaics, and provides a solar cell and a photovoltaic module, wherein the solar cell comprises: a substrate and a passivation layer on the substrate; first fine grids and second fine grids alternately arranged along a first direction; the first main grids and the second main grids are alternately arranged along the second direction, the first main grids are in electrical contact with the first fine grids, and the second main grids are in electrical contact with the second fine grids; the first main grid is one of an anode electrode or a cathode electrode, and the second main grid is the other of the anode electrode or the cathode electrode; at least two first connecting grid lines penetrating through the passivation layer and electrically connected with the substrate, wherein the first connecting grid lines are electrically connected with n ₁ adjacent first main grids; and the second connecting grid lines penetrate through the passivation layer and are electrically connected with the substrate, and the second connecting grid lines are electrically connected with the adjacent n ₂ second main grids. The solar cell and the photovoltaic module provided by the embodiment of the application can at least improve the yield of the photovoltaic module.

Description

Solar cell and photovoltaic module

Technical Field

The embodiment of the application relates to the field of photovoltaics, in particular to a solar cell and a photovoltaic module.

Background

Currently, with the gradual depletion of fossil energy, solar cells are increasingly used as new energy alternatives. A solar cell is a device that converts solar light energy into electrical energy. The solar cell generates carriers by utilizing the photovoltaic principle, and then the carriers are led out by using the electrodes, so that the electric energy can be effectively utilized.

The reasons for influencing the photoelectric conversion efficiency and the yield of the solar cell mainly comprise two aspects, namely optical loss, wherein the optical loss comprises shielding loss, carrier recombination loss of a substrate, carrier recombination loss of a highly doped film layer and refraction loss of the film layer; and secondly, the electrical loss comprises the problems of resistance loss of the material, contact loss of an electrode, contact loss between a welding strip and a solar cell, cold joint between the welding strip and the solar cell and the like.

Therefore, there is an urgent need in the art to provide a solar cell and a photovoltaic module capable of reducing electrical loss and optical loss, thereby improving the photoelectric conversion efficiency of the corresponding solar cell and the yield of the photovoltaic module.

Disclosure of Invention

The embodiment of the application provides a solar cell and a photovoltaic module, which are at least beneficial to improving the yield of the photovoltaic module.

According to some embodiments of the present application, an aspect of an embodiment of the present application provides a solar cell, including: a substrate and a passivation layer on the substrate; the thin grid penetrates through the passivation layer and is electrically connected with the substrate; the fine grids comprise first fine grids and second fine grids which are alternately arranged along a first direction; a plurality of main grids arranged along a second direction, wherein the main grids are positioned on the surface of the passivation layer and are electrically contacted with the thin grids, the main grids comprise m ₁ first main grids and m ₂ second main grids which are alternately arranged along the second direction, the first main grids are electrically contacted with the first thin grids, and the second main grids are electrically contacted with the second thin grids; the first main grid is one of an anode electrode or a cathode electrode, and the second main grid is the other of the anode electrode or the cathode electrode; at least two first connecting grid lines penetrating through the passivation layer and electrically connected with the substrate, wherein one first connecting grid line is electrically connected with n ₁ adjacent first main grids, and n ₁＜m₁ is smaller than 1; and at least two second connecting grid lines penetrating through the passivation layer and electrically connected with the substrate, wherein one second connecting grid line is electrically connected with n ₂ adjacent second main grids, and n ₂＜m₂ is smaller than 1.

In some embodiments, the first main gate includes a plurality of first sub-main gates sequentially arranged along the first direction, and the first connection gate line is electrically contacted with a first sub-main gate of a plurality of adjacent first main gates; the second main grid comprises a plurality of second sub-main grids which are sequentially arranged along the first direction, and the second connecting grid line is electrically contacted with the second sub-main grids of the plurality of adjacent second main grids.

In some embodiments, the passivation layer between two adjacent second sub-main gates has a second isolation region, and the first connection gate line is located in the second isolation region and is electrically connected to two adjacent first main gates; the passivation layer between two adjacent first sub-main grids is provided with a first partition area, and the second connecting grid line is positioned in the first partition area and is electrically connected with two adjacent second main grids.

In some embodiments, the first partition region and the second partition region are disposed adjacent to each other along the second direction, the first connection gate line is further located at the first partition region, and the second connection gate line is further located at the second partition region; the first connection grid line is positioned between the first sub-main grid and the second connection grid line.

In some embodiments, the first connection gate lines are arranged offset along the first direction; the second connecting grid lines are arranged in a staggered mode along the first direction.

In some embodiments, the first connection gate lines are arranged stepwise along the first direction; the second connection grid lines are arranged in a step mode along the first direction.

In some embodiments, n ₁≤1/2m₁; and/or, n ₂≤1/2m₂.

In some embodiments, the material of the first connection gate line is the same as the material of the fine gate; the material of the second connecting grid line is the same as that of the fine grid.

In some embodiments, the width of the first connection gate line along the first direction is greater than or equal to the width of the thin gate, and the width of the second connection gate line along the first direction is greater than or equal to the width of the thin gate.

According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a photovoltaic module, including: a cell string formed by connecting a plurality of solar cells according to any one of the above embodiments; the solar cell comprises a first main grid and a second main grid; a connection member for electrically connecting the first and second main grids of two adjacent solar cells; the packaging adhesive film is used for covering the surface of the battery string; and the cover plate is used for covering the surface of the packaging adhesive film, which is away from the battery strings.

The technical scheme provided by the embodiment of the application has at least the following advantages:

In the technical scheme provided by the embodiment of the application, the first main grids are communicated through at least two first connecting grids, one grid line is used for connecting the grids (positive electrode or negative electrode) with the same polarity in the solar cell in series, and one solar cell forms an integral electrode, so that the first main grids and each first fine grid are in a mutually communicated state, the probability of efficiency and yield reduction of the cell caused by the problem of one of the first main grids can be avoided, and the first fine grids which are positioned at the edge of the substrate can be collected in the conducting state to improve the collection efficiency of the cell. Likewise, the battery efficiency can be improved by improving the battery collection efficiency of the second fine grid.

The solar cell provided by the embodiment of the application can ensure that the first main grid and the first fine grid are in a mutually conducted state, and can avoid the problem of poor appearance between each first main grid and each first fine grid caused by different preparation processes. The mutual communication between the first main grids can also avoid the problem of reduced battery efficiency caused by broken grids of one of the thin grids or the main grids, thereby improving battery efficiency. The at least two second connection gate lines may also improve second thin gate and second main gate battery efficiency.

In addition, as for the connection of the plurality of first main grids or the plurality of second main grids with one connecting grid line, the application can avoid the problem of grid breakage caused by overlong grid lines and the problem of larger influence on the first main grids and the second main grids caused by overlong grid lines by arranging two connecting grid lines to connect the plurality of first main grids or the second main grids, thereby improving the yield of the battery.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, which are not to be construed as limiting the embodiments unless specifically indicated otherwise; in order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the drawings required for the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.

Fig. 1 is a schematic structural diagram of a solar cell according to an embodiment of the present application;

FIG. 2 is an enlarged view of a portion of FIG. 1 at C;

FIG. 3 is a schematic cross-sectional view of FIG. 2 along line A1-A2;

FIG. 4 is a schematic cross-sectional view of FIG. 2 along line B1-B2;

fig. 5 is a schematic view of a second structure of a solar cell according to an embodiment of the application;

fig. 6 is a schematic view of a third structure of a solar cell according to an embodiment of the application;

Fig. 7 is a layout diagram of a first connection grid line and a second connection grid line in a solar cell according to an embodiment of the application;

fig. 8 is another layout diagram of a first connection grid line and a second connection grid line in a solar cell according to an embodiment of the application;

fig. 9 is a schematic diagram of a fourth structure of a solar cell according to an embodiment of the application;

fig. 10 is a schematic view of a fifth structure of a solar cell according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of a photovoltaic module according to another embodiment of the present application;

FIG. 12 is a schematic cross-sectional view of the structure of FIG. 11 along the line M1-M2;

Fig. 13 is a schematic structural diagram of a solar cell in a photovoltaic module according to another embodiment of the present application.

Detailed Description

As known from the background art, the yield of the solar cell and the photovoltaic module is poor.

Analysis finds that one of the reasons for the poor yield of solar cells and photovoltaic modules is: the current back contact solar cell, namely, the first electrode and the second electrode in the IBC cell are both located on the back surface of the substrate, and further include a first main gate and a second main gate, the first electrode is electrically contacted with the corresponding first main gate, the second electrode is electrically contacted with the corresponding second main gate, the first electrode intersects with the extending direction of the first main gate, and the second electrode intersects with the extending direction of the second main gate, so that electrical insulation between the first electrode and the second main gate with different polarities is involved, electrical insulation between the second electrode and the first main gate with different polarities occurs, and then electrical connection occurs between the first main gate and part of the first electrode, the first main gate is electrically insulated from the other first electrodes, and the first main gate cannot collect carriers of all the first electrodes, when one of the first main gates has a problem or a problem of poor welding between the first main gate and the welding strip, a plurality of first electrodes abutted by the first main gate cannot be collected, thereby affecting the solar cell and photovoltaic yield of the photovoltaic module. Similarly, the second main grid has the same problem, thereby influencing the yield of the solar cell and the photovoltaic module.

According to the technical scheme provided by the embodiment of the application, the first main grids are communicated through at least two first connecting grids, one grid line is used for connecting the grids of the same polarity in the solar cell in series, and one solar cell forms an integral electrode, so that the first main grids and each first fine grid are in a mutually communicated state, the probability of reduction of the efficiency and yield of the cell due to the problem of one of the first main grids can be avoided, and the first fine grids at the edge of the substrate can be collected in the conducting state to improve the collection efficiency of the cell. Likewise, the battery efficiency can be improved by improving the battery collection efficiency of the second fine grid.

Embodiments of the present application will be described in detail below with reference to the attached drawings. However, it will be understood by those of ordinary skill in the art that in various embodiments of the present application, numerous specific details are set forth in order to provide a thorough understanding of the present application. The claimed application may be practiced without these specific details and with various changes and modifications based on the following embodiments.

Fig. 1 is a schematic structural diagram of a solar cell according to an embodiment of the present application; FIG. 2 is an enlarged view of a portion of FIG. 1 at C; FIG. 3 is a schematic cross-sectional view of FIG. 2 along line A1-A2; fig. 4 is a schematic cross-sectional view of fig. 2 along B1-B2.

Referring to fig. 1 to 3, according to some embodiments of the present application, an aspect of an embodiment of the present application provides a solar cell, including: a substrate 100 and a passivation layer 102 on the substrate 100; the thin gate 110 arranged along the first direction Y, the thin gate 110 penetrating the passivation layer 102 and electrically connected with the substrate 100; the fine grid 110 includes first fine grids 111 and second fine grids 112 alternately arranged in the first direction Y; a plurality of main gates 120 arranged in the second direction X, the main gates 120 being located on the surface of the passivation layer 102 and being in electrical contact with the thin gate 110, the main gates 120 including m ₁ first main gates 121 and m ₂ second main gates 122 alternately arranged in the second direction X, the first main gates 121 being in electrical contact with the first thin gate 111, the second main gates 122 being in electrical contact with the second thin gate 112; wherein the first main gate 121 is one of a positive electrode and a negative electrode, and the second main gate 122 is the other of the positive electrode and the negative electrode; at least two first connection gate lines 131, wherein the first connection gate lines 131 penetrate through the passivation layer 102 and are electrically connected with the substrate 100, and one first connection gate line 131 is electrically connected with n ₁ adjacent first main gates 121, wherein n ₁＜m₁ is less than 1; at least two second connection gate lines 132, wherein the second connection gate lines 132 penetrate through the passivation layer 102 and are electrically connected with the substrate 100, and one second connection gate line 132 is electrically connected with n ₂ second main gates 122 adjacent to each other, wherein 1 < n ₂＜m₂.

In some embodiments, referring to fig. 3, the solar cell is a back contact solar cell, which refers to a solar cell in which electrodes of different polarities (positive and negative electrodes) are both located on the back side of the substrate.

Referring to fig. 3, in some embodiments, the material of the substrate 100 may be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, which may be silicon or germanium, for example. The elemental semiconductor material may be in a single crystal state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both a single crystal state and an amorphous state, referred to as a microcrystalline state), and for example, silicon may be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

In some embodiments, the material of the substrate 100 may also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, copper indium selenium, and the like. The substrate 100 may also be a sapphire substrate, a silicon-on-insulator substrate, or a germanium-on-insulator substrate.

In some embodiments, the substrate 100 may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type doping element, which may be any of v group elements such As phosphorus (P) element, bismuth (Bi) element, antimony (Sb) element, and arsenic (As) element. The P-type semiconductor substrate is doped with a P-type element, and the P-type doped element may be any one of group iii elements such as boron (B) element, aluminum (Al) element, gallium (Ga) element, and indium (In) element.

In some embodiments, the substrate 100 has a first surface 11 and a second surface 12 disposed opposite to each other, where the first surface 11 of the substrate 100 may be a front surface and the second surface 12 may be a back surface, and the front surface may be a light receiving surface for receiving incident light, and the back surface may be a back surface. The backlight surface can also receive the incident light, but the efficiency of receiving the incident light is weaker than that of the light receiving surface.

It should be noted that, the incident light received by the light receiving surface is directly irradiated on the solar cell by sunlight, and the incident light received by the back surface is caused by reflection on the ground, reflection by other objects, and refraction of the film layer on the substrate.

In some embodiments, the first surface 11 has a first pile structure 13, the first pile structure 13 comprising a plurality of raised structures 105. The first surface 11 has a front surface field (front surface field, FSF) with a conductivity type of dopant ions that is the same as the conductivity type of dopant ions of the substrate 100, and the field passivation effect is used to reduce the surface minority carrier concentration, thereby reducing the surface recombination rate, and also reducing the series resistance and improving the electron transport capability.

In some embodiments, substrate 100 has alternating regions i and ii, where i is one of region P or region N, and ii is the other of region P or region N, with a spacer gap between regions P and N, where first fine gate 111 is located in region i and second fine gate 112 is located in region ii.

In some embodiments, the P region and the N region do not have a spacer gap therebetween, and an insulating film layer is disposed between the P region and the N region to insulate the P region from the N region, thereby insulating the first fine gate 111 from the second fine gate 112.

In some embodiments, referring to fig. 3, the spacer gap is flush with the P-region and the N-region, i.e., the substrate 100 is not etched, and insulation is achieved between the P-region and the N-region by some isolating film, which may be the passivation layer 102.

In some embodiments, the spacer gap is lower than the P region and the spacer gap is lower than the N region, the spacer gap has a trench extending from the second surface toward the first surface, the trench is used to achieve automatic isolation between regions of different conductivity types, and it is possible to eliminate leakage caused by formation of a PN junction by the heavily doped P and N regions in IBC cells (crossed back electrode contact cells, INTERDIGITATED BACK CONTACT), which may affect cell efficiency.

In some embodiments, the surface of the spacer gap may be a polished surface structure, the surface of the spacer gap may be a second textured structure, and the roughness of the first textured structure is greater than or equal to the roughness of the second textured structure.

Wherein "roughness" refers to an arithmetic average of absolute values of amounts of vertical deviations of peaks and valleys within a sampling length from an average horizontal line, which is set in the sampling length. Roughness can be measured by comparison, photocutting, interferometry, and needle punching.

In some embodiments, the solar cell includes a first dielectric layer 143 and a first doped semiconductor layer 144 on the i region and a second dielectric layer 153 and a second doped semiconductor layer 154 on the ii region; the passivation layer 102 covers the first doped semiconductor layer 144 and the second doped semiconductor layer 154, the first fine gate 111 extends through the passivation layer 102 in electrical contact with the first doped semiconductor layer 144, and the second fine gate 112 extends through the passivation layer 102 in electrical contact with the second doped semiconductor layer 154.

In some embodiments, the first doped semiconductor layer 144 is doped with one of an N-type doping element or a P-type doping element, and the second doped semiconductor layer 154 is doped with the other of the N-type doping element or the P-type doping element.

In some embodiments, at least one of the first dielectric layer 143 or the second dielectric layer 153 may be a tunneling dielectric layer, the material of which includes silicon oxide or silicon carbide.

In some embodiments, at least one of the first doped semiconductor layer 144 or the second doped semiconductor layer 154 may be at least one of a doped amorphous silicon layer, a doped polysilicon layer, a doped microcrystalline silicon layer, a doped silicon carbide layer, or a doped crystalline silicon layer.

In some embodiments, the solar cell may include a first intrinsic dielectric layer, a first doped amorphous silicon layer, and a first transparent conductive layer over the i region; the first intrinsic medium layer is positioned on the second surface, the first doped amorphous silicon layer is positioned on the first intrinsic medium layer, and the first transparent conductive layer is positioned on the first doped amorphous silicon layer; the second intrinsic medium layer, the second doped amorphous silicon layer and the second transparent conducting layer are arranged on the II region, the second intrinsic medium layer is arranged on the second surface, the second doped amorphous silicon layer is arranged on the second intrinsic medium layer, and the second transparent conducting layer is arranged on the second doped amorphous silicon layer. Wherein the first doped amorphous silicon layer is doped with one of an N-type doping element or a P-type doping element, and the second doped amorphous silicon layer is doped with the other of the N-type doping element or the P-type doping element.

With continued reference to fig. 3 and 4, the solar cell further includes: a front passivation layer 103, the front passivation layer 103 covering the front surface of the substrate 100.

In some embodiments, the material of at least one of the front passivation layer 103 and the passivation layer 102 comprises: one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbonitride, titanium oxide, hafnium oxide, or aluminum oxide.

In some embodiments, at least one of the front passivation layer 103 and the passivation layer 102 includes a stacked film layer, where the stacked film layer includes at least a first passivation layer and a second passivation layer, and a material of the first passivation layer may be one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbonitride, titanium oxide, hafnium oxide, or aluminum oxide. The material of the second passivation layer may be one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride oxide, titanium oxide, hafnium oxide, or aluminum oxide.

In some embodiments, the material of the front passivation layer 103 is the same as the material of the passivation layer 102, and the front passivation layer 103 and the passivation layer 102 are prepared in the same manufacturing process.

In some embodiments, the first thin gate 111, the second thin gate 112, and the connection gate line 130 are all made of a burn-through paste, wherein the first thin gate 111 burns through the passivation layer 102 and is in electrical contact with the first doped semiconductor layer 144, the second thin gate 112 burns through the passivation layer 102 and is in electrical contact with the second doped semiconductor layer 154, the connection gate line 130 burns through the passivation layer 102 and is in electrical contact with the first doped semiconductor layer 144, or the connection gate line 130 burns through the passivation layer 102 and is in electrical contact with the second doped semiconductor layer 154. The connection gate line 130 includes a first connection gate line 131 and a second connection gate line 132, where the first connection gate line 131 burns through the passivation layer 102 to electrically contact the first doped semiconductor layer 144, and the second connection gate line 132 burns through the passivation layer 102 to electrically contact the second doped semiconductor layer 154.

For example, the method of forming the first fine gate 111 includes: a screen printing process is used to print a metal paste on the surface of a portion of the passivation layer 102. The metal paste may include at least one of silver, aluminum, copper, tin, gold, lead, or nickel.

With continued reference to fig. 1, the first fine grid 111 and the second fine grid 112 extend along the second direction X, and the first direction Y and the second direction X may be perpendicular to each other, or may have an included angle smaller than 90 degrees, for example, 60 degrees, 45 degrees, 30 degrees, or the like, where the first direction Y and the second direction X are not the same direction. In order to facilitate explanation and understanding, the embodiment uses the example that the first direction Y and the second direction X are perpendicular to each other, and in a specific application, the setting of the included angle between the first direction Y and the second direction X may be adjusted according to the actual needs and the application scenario, which is not limited in the embodiment of the present application.

In some embodiments, the material of the connection gate line 130 is the same as the material of the fine gate 110. The slurry of the connection gate line 130 is the same as that of the fine gate 110, that is, the connection gate line 130 is formed by burning-through slurry, and the connection gate line 130 also penetrates through the passivation layer to be electrically connected with the corresponding first doped semiconductor layer or second doped semiconductor layer, so that the connection gate line 130 can realize the current penetration of the first main gate 121 and the current penetration of the second main gate 122, and the connection gate line 130 can collect the current on the surface of the substrate by itself, thereby increasing the collection path and improving the current collection efficiency.

In some embodiments, the material of the first connection gate line 131 is the same as that of the fine gate 110; the material of the second connection gate line 132 is the same as that of the fine gate 110.

In some embodiments, the paste of the connection gate line 130 is the same as the paste of the main gate 120, that is, the connection gate line 130 is formed of non-burn-through paste, and the connection gate line 130 is located on the surface of the passivation layer, so that the i region and the ii region of the substrate surface under the connection gate line 130 do not need to be typeset, so as to prevent the electrical contact between the connection gate line 130 and the doped region of another polarity, and the problem of short circuit occurs. In addition, the connection gate line 130 may not damage the passivation layer, so that the integrity of the film layer of the passivation layer is ensured, thereby improving the passivation effect of the passivation layer on the substrate, and being beneficial to reducing the optical loss of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell. In addition, as the non-burning-through paste does not damage the pn junction due to excessive glass powder, metal recombination can be effectively reduced, the open-circuit voltage of the solar cell can be improved, and the conversion efficiency of the solar cell can be improved.

The traditional slurry comprises a mixture of metal powder, glass powder and an organic carrier. The non-burn-through type slurry is a slurry which contains glass powder with lower content than the traditional slurry, has weak burn-through capability in the sintering process and does not need or cannot burn through the passivation layer. The burn-through type slurry refers to slurry which has strong burn-through capability and can burn through a passivation layer in the sintering process.

In some embodiments, the first connection grid lines are electrically connected with the first main grids, the second connection grid lines are electrically connected with the second main grids, so that the collection efficiency of the solar cell can be improved by 1% -5%, the reject ratio of the cell is reduced by less than 5%, and the photoelectric conversion efficiency of the solar cell and the high cost performance of the photovoltaic module are improved.

In some embodiments, referring to fig. 2, the first fine gate 111 includes a plurality of first sub-gate lines 1111 arranged along the second direction X, a passivation layer between two adjacent first sub-gate lines 1111 forms a first spacer 1112, the second main gate 122 is located on the first spacer 1112, and the first main gate 121 is in electrical contact with the first sub-gate lines 1111; the second fine gate 112 includes a plurality of second sub-gate lines 1121 arranged along the second direction X, the passivation layer between two adjacent second sub-gate lines 1121 forms a second spacing region 1122, and the first main gate 121 is located on the second spacing region 1122; the second main gate 122 is in electrical contact with the second sub-gate line 1121.

In some embodiments, referring to fig. 2, the first main gate 121 includes a plurality of first sub-main gates 1211 sequentially arranged along the first direction Y, and the first connection gate line 131 is electrically contacted with the first sub-main gates 1211 of the plurality of adjacent first main gates 121; the second main gate 122 includes a plurality of second sub-main gates 1221 sequentially arranged in the first direction Y, and the second connection gate line 132 is electrically contacted with the second sub-main gates 1221 of the plurality of adjacent second main gates 122.

In some embodiments, referring to fig. 1, 5 and 6, the first partition region 1212 is disposed adjacent to the second partition region 1222 in the second direction, the first connection gate line 131 is further located at the first partition region 1212, and the second connection gate line 132 is further located at the second partition region 1222; the first connection gate line 131 is located between the first sub-main gate 1211 and the second connection gate line 132. Fig. 5 is a schematic diagram of a second structure of a solar cell according to an embodiment of the application, and fig. 6 is a schematic diagram of a third structure of a solar cell according to an embodiment of the application.

Referring to fig. 1, a solar cell includes: two first connection gate lines 131, wherein the first connection gate lines 131 penetrate through the passivation layer 102 and are electrically connected with the substrate 100, and one first connection gate line 131 is electrically connected with n1 adjacent first main gates 121, wherein n ₁＝1/2m₁; two second connection gate lines 132, wherein the second connection gate lines 132 penetrate through the passivation layer 102 and are electrically connected with the substrate 100, and one second connection gate line 132 is electrically connected with n2 adjacent second main gates 122, wherein n ₂＝1/2m₂.

In some embodiments, the typesetting mode of each grid line shown in fig. 1 can improve the collection efficiency of the solar cell by 1% -6%, and reduce the reject ratio of the cell by within 3.5%.

Referring to fig. 5 or 6, the number of first connection gate lines 131 in the solar cell is greater than two, and the first connection gate lines 131 penetrate the passivation layer 102 and are electrically connected with the substrate 100, wherein one first connection gate line 131 is electrically connected with n1 adjacent first main gates 121, wherein n ₁＜1/2m₁. The number of the second connection grid lines 132 in the solar cell is greater than two, and the second connection grid lines 132 penetrate through the passivation layer 102 and are electrically connected with the substrate 100, wherein one second connection grid line 132 is electrically connected with n ₂ second main grids 122 adjacent to n ₂＜1/2m₂.

In some embodiments, the typesetting mode of each grid line shown in fig. 5 can improve the collection efficiency of the solar cell by 2% -5.8%, and reduce the reject ratio of the cell by less than 6%.

In some embodiments, the grid line typesetting mode shown in fig. 6 can improve the collection efficiency of the solar cell by 2% -6.3%, and reduce the reject ratio of the cell by less than 5.5%.

In some embodiments, referring to fig. 5 and 7, the first connection gate lines 131 are arranged offset along the first direction Y; the second connection gate lines 132 are arranged offset along the first direction Y.

In some embodiments, referring to fig. 3 and 8, the first connection gate lines 131 are arranged stepwise along the first direction Y; the second connection gate lines 132 are arranged stepwise along the first direction Y.

Fig. 7 is a layout diagram of a first connection grid line and a second connection grid line in a solar cell according to an embodiment of the application; fig. 8 is another layout diagram of the first connection grid line and the second connection grid line in the solar cell according to an embodiment of the application.

Fig. 9 is a schematic diagram of a fourth structure of a solar cell according to an embodiment of the application; fig. 10 is a schematic view of a fifth structure of a solar cell according to an embodiment of the application.

In some embodiments, referring to fig. 9 and 10, the passivation layer 102 between two adjacent second sub-main gates 1221 has a second isolation region 1222, and the first connection gate line 131 is located in the second isolation region 1222 and is electrically connected to two adjacent first main gates 121; the passivation layer 102 between two adjacent first sub-main gates 1211 has a first blocking region 1212, and the second connection gate line 132 is located at the first blocking region 1212 and electrically connected to two adjacent second main gates 122.

The arrangement of the first connection gate line 131 and the second connection gate line 132 in fig. 9 is shown in fig. 7, and the first connection gate line 131 and the second connection gate line 132 in fig. 10 are shown in fig. 8.

In some embodiments, the grid line typesetting mode shown in fig. 9 can improve the collection efficiency of the solar cell by 3% -8% and reduce the reject ratio of the cell by less than 7%.

In some embodiments, the typesetting mode of each grid line shown in fig. 10 can improve the collection efficiency of the solar cell by 2% -7.8%, and reduce the reject ratio of the cell by less than 6%.

In some embodiments, the width of the connection gate line 130 is greater than the width of the fine gate 110, for example, referring to fig. 2, the width W1 of the first connection gate line 131 along the first direction Y is greater than or equal to the width W3 of the fine gate 110. The width W2 of the second connection gate line 132 along the first direction Y is greater than or equal to the width W3 of the fine gate 110. Having a wider connecting gate line 130 can increase the collection area and collection efficiency.

In some embodiments, the width W1 of the first connection gate line 131 along the first direction Y includes: 10um to 55um. The width W1 of the first connection gate line 131 along the first direction Y may be 10um to 16um, 16um to 22um, 22um to 30um, 30um to 38um, 38um to 46um, or 46um to 55um.

In some embodiments, the width W2 of the second connection gate line 132 along the first direction Y includes: 10um to 55um. The width W2 of the second connection gate line 132 along the first direction may be 10um to 16um, 16um to 22um, 22um to 30um, 30um to 38um, 38um to 46um, or 46um to 55um.

In some embodiments, the first connection gate line 131 and the adjacent thin gate 110 have a first spacing S1, and the first spacing S1 is less than or equal to the distance between the adjacent first thin gate 111 and the second thin gate 112. In this way, the distance between the first connection gate line 131 and the fine gate 110 is more suitable, and in the typesetting without wasting the shielding area of the first connection gate line 131 and the fine gate 110, the typesetting between the first connection gate line 131 and the fine gate 110 can realize the minimum migration distance and the minimum migration loss of the carriers on the substrate, thereby improving the open circuit voltage of the solar cell.

It should be noted that, in the embodiment of the present application, the first pitch illustrated in fig. 2 refers to a pitch between the area where the axis of the first connection gate line 131 is located and the axis of the adjacent fine gate, and the embodiment of the present application is not limited to the specific meaning of the first pitch, for example, the first pitch may also be a distance between a side of the first connection gate line 131 near the substrate boundary and a side of the adjacent fine gate far from the substrate boundary, or a shortest distance between the first connection gate line 131 and the adjacent fine gate 110.

In some embodiments, the first spacing S1 ranges from 0.2mm to 0.7mm. The first spacing ranges from 0.2mm to 0.35mm, from 0.35mm to 0.46mm, from 0.46mm to 0.58mm, from 0.58mm to 0.63mm, or from 0.63mm to 0.7mm.

In some embodiments, the distance S2 between adjacent first and second fine gratings 111 and 112 ranges from 0.3mm to 0.8mm. The distance S2 between the adjacent first fine grid 111 and second fine grid 112 ranges from 0.3mm to 0.35mm, from 0.35mm to 0.43mm, from 0.43mm to 0.5mm, from 0.5mm to 0.58mm, from 0.58mm to 0.66mm, from 0.66mm to 0.72mm or from 0.72mm to 0.8mm.

Similarly, the distance between the second connection gate line 132 and the adjacent thin gate 110 is a third distance S3, and the third distance S3 is less than or equal to the distance between the adjacent first thin gate 111 and the second thin gate 112. The third spacing S3 is in the range of 0.2mm to 0.7mm.

In some embodiments, the distance between the first connection gate line 131 and the second connection gate line 132 is a second spacing S2, and the second spacing is less than or equal to the distance between the adjacent first fine gate 111 and the second fine gate 112. The third spacing S3 is in the range of 0.2mm to 0.7mm.

In some embodiments, m ₁≥8,m₂ is greater than or equal to 8, the number of first primary gates may be 8, the number of second primary gates may be 8, and the number of primary gates may be 16.

In some embodiments, the number of first primary gates may be a natural number greater than 8 and the number of second primary gates may be a natural number greater than 8.

In the technical solution provided in the embodiment of the present application, the first main grids 121 are connected through at least two first connection grids 131, and one grid line is used to connect the grids (positive electrode or negative electrode) of the same polarity in the solar cell in series, and one solar cell forms an integral electrode, so that the first main grids 121 and each first fine grid 111 are guaranteed to be in a mutually conductive state, and thus the probability of decreasing the efficiency and yield of the cell due to the problem of one of the first main grids 121 can be avoided, and the first fine grids 111 in the conductive state can also collect the first fine grids 111 located at the edge of the substrate to improve the collection efficiency of the cell. Likewise, the battery efficiency may be improved by improving the battery collection efficiency of the second fine grid 112.

The solar cell provided by the embodiment of the application can ensure that the first main grid 121 and the first fine grid 111 are in a mutually conducted state, and can avoid the problem of poor appearance between each first main grid 121 and each first fine grid 111 caused by different preparation processes. The mutual communication between the first main grids 121 can also avoid the problem of reduction in battery efficiency due to breakage of one of the thin grids or the main grids, thereby improving battery efficiency. The at least two second connection gate lines 132 may also improve the battery efficiency of the second fine gate 112 and the second main gate 122.

In addition, in the present application, the plurality of first main grids 121 or second main grids 122 are connected with one connecting grid line, and by providing two connecting grid lines to connect the plurality of first main grids 121 or second main grids 122, the problem of grid breakage caused by overlong grid lines and the problem of large influence on the first main grids 121 and the second main grids 122 caused by overlong grid lines can be avoided, so that the yield of the battery can be improved.

Fig. 11 is a schematic structural diagram of a photovoltaic module according to another embodiment of the present application; FIG. 12 is a schematic cross-sectional view of the structure of FIG. 11 along the line M1-M2; fig. 13 is a schematic structural diagram of a solar cell in a photovoltaic module according to another embodiment of the present application.

Correspondingly, another aspect of the embodiment of the present application further provides a photovoltaic module, which may include the solar cell provided in the foregoing embodiment, and technical features the same as or corresponding to those of the foregoing embodiment are not described in detail herein.

Referring to fig. 11 to 13, according to some embodiments of the present application, another aspect of the embodiments of the present application further provides a photovoltaic module, including: a cell string formed by connecting a plurality of solar cells 20 according to any one of the above embodiments; the solar cell 20 includes a first main grid 121 and a second main grid 122; a connection part 209, the connection part 209 being for electrically connecting the first main grid 121 and the second main grid 122 of two adjacent solar cells; a packaging adhesive film 27 for covering the surface of the battery string; and a cover plate 28 for covering the surface of the packaging adhesive film 27 facing away from the battery strings.

Specifically, in some embodiments, the plurality of battery strings may be electrically connected by a connection member 209, and the connection member 209 is soldered to the main grid on the battery plate. For example, one end of the connection member is electrically connected to the first main gate of the first battery cell, and the other end of the connection member is electrically connected to the second main gate of the adjacent second battery cell.

In some embodiments, no space is provided between the battery cells, i.e., the battery cells overlap each other.

In some embodiments, the connection member is welded to the fine grid on the battery plate.

In some embodiments, referring to fig. 13, the solar cell has solder joints 108 thereon for effecting soldering between the connection members 209 and the main grid.

In some embodiments, referring to fig. 12, the photovoltaic module further comprises: and an insulating film 206, wherein the insulating film 206 covers part of the surface of the solar cell 20, for example, the insulating film 206 covers part of the surface of the first main grid and part of the surface of the first thin grid, so that when the connecting component is electrically connected with the second main grid, the electric insulation between the second main grid and the first main grid is realized, the surface of the welding point 108 is exposed by the insulating film 206, and the insulating film is also positioned between the connecting component 209 and the solar cell, thereby realizing the welding between the connecting component and the corresponding main grid, avoiding the condition that the connecting component is electrically contacted with the main grid with the other polarity, and further improving the yield. For example, the connection member is soldered to the first main gate, and the insulating film electrically insulates the connection member from the second main gate.

In some embodiments, the packaging adhesive film 27 includes a first packaging adhesive film and a second packaging adhesive film, wherein the first packaging adhesive film covers one of the front surface or the back surface of the solar cell, and the second packaging adhesive film covers the other of the front surface or the back surface of the solar cell, and specifically, at least one of the first packaging adhesive film or the second packaging adhesive film may be an organic packaging adhesive film such as a polyvinyl butyral (Polyvinyl Butyral, abbreviated as PVB) adhesive film, an ethylene-vinyl acetate copolymer (EVA) adhesive film, a polyethylene octene co-elastomer (POE) adhesive film, or a polyethylene terephthalate (PET) adhesive film.

It should be noted that, the first packaging film and the second packaging film have a parting line before the lamination process, and the concept of forming the photovoltaic module after the lamination process does not have the first packaging film and the second packaging film any more, that is, the first packaging film and the second packaging film have formed the integrated packaging film 27.

In some embodiments, the cover 28 may be a glass cover, a plastic cover, or the like having a light-transmitting function. Specifically, the surface of the cover plate 28 facing the packaging film 27 may be a concave-convex surface, so as to increase the utilization rate of incident light. The cover plate 28 includes a first cover plate and a second cover plate, the first cover plate is opposite to the first packaging adhesive film, and the second cover plate is opposite to the second packaging adhesive film; or the first cover plate is opposite to one side of the solar cell, and the second cover plate is opposite to the other side of the solar cell.

In some embodiments, further comprising: an electrical connection line; the electric connection wire is electrically connected with the first main grid and the second main grid of the adjacent solar cell; or the electrical connection line electrically connects the second main grid with the first main grid of the adjacent solar cell. Therefore, the mutual communication between the two solar cells can be realized by utilizing the electric connection wire, so that the yield of the photovoltaic module is improved, and the problem of yield reduction caused by the occurrence of cold joint of one of the connection parts is effectively avoided.

It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples of carrying out the application and that various changes in form and details may be made therein without departing from the spirit and scope of the application. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the application, and the scope of the application should be assessed accordingly to that of the appended claims.

Claims

1. A solar cell, comprising:

A substrate and a passivation layer on the substrate;

The thin grid penetrates through the passivation layer and is electrically connected with the substrate; the fine grids comprise first fine grids and second fine grids which are alternately arranged along a first direction;

A plurality of main grids arranged along a second direction, wherein the main grids are positioned on the surface of the passivation layer and are electrically contacted with the thin grids, the main grids comprise m ₁ first main grids and m ₂ second main grids which are alternately arranged along the second direction, the first main grids are electrically contacted with the first thin grids, and the second main grids are electrically contacted with the second thin grids; the first main grid is one of an anode electrode or a cathode electrode, and the second main grid is the other of the anode electrode or the cathode electrode;

At least two first connecting grid lines penetrating through the passivation layer and electrically connected with the substrate, wherein one first connecting grid line is electrically connected with n ₁ adjacent first main grids, and n ₁＜m₁ is smaller than 1;

And at least two second connecting grid lines penetrating through the passivation layer and electrically connected with the substrate, wherein one second connecting grid line is electrically connected with n ₂ adjacent second main grids, and n ₂＜m₂ is smaller than 1.

2. The solar cell of claim 1, wherein the first main grid comprises a plurality of first sub-main grids sequentially arranged along the first direction, and the first connection grid line is in electrical contact with first sub-main grids of a plurality of adjacent first main grids; the second main grid comprises a plurality of second sub-main grids which are sequentially arranged along the first direction, and the second connecting grid line is electrically contacted with the second sub-main grids of the plurality of adjacent second main grids.

3. The solar cell according to claim 2, wherein a passivation layer between two adjacent second sub-main grids has a second isolation region, and the first connection grid line is located in the second isolation region and is electrically connected to two adjacent first main grids; the passivation layer between two adjacent first sub-main grids is provided with a first partition area, and the second connecting grid line is positioned in the first partition area and is electrically connected with two adjacent second main grids.

4. The solar cell of claim 3, wherein the first and second separation regions are disposed adjacent in the second direction, the first connection grid line is further located in the first separation region, and the second connection grid line is further located in the second separation region; the first connection grid line is positioned between the first sub-main grid and the second connection grid line.

5. The solar cell according to claim 3 or 4, wherein the first connection grid lines are arranged offset along the first direction; the second connecting grid lines are arranged in a staggered mode along the first direction.

6. The solar cell according to claim 3 or 4, wherein the first connection grid lines are arranged stepwise along the first direction; the second connection grid lines are arranged in a step mode along the first direction.

7. The solar cell of claim 1, wherein n ₁≤1/2m₁; and/or, n ₂≤1/2m₂.

8. The solar cell according to claim 1, wherein the material of the first connection grid line is the same as the material of the fine grid; the material of the second connecting grid line is the same as that of the fine grid.

9. The solar cell of claim 1, wherein a width of the first connection gate line in the first direction is greater than or equal to a width of the fine gate, and a width of the second connection gate line in the first direction is greater than or equal to a width of the fine gate.

10. A photovoltaic module, comprising:

A cell string formed by connecting a plurality of solar cells according to any one of claims 1 to 9; the solar cell comprises a first main grid and a second main grid;

A connection member for electrically connecting the first and second main grids of two adjacent solar cells;

The packaging adhesive film is used for covering the surface of the battery string;

and the cover plate is used for covering the surface of the packaging adhesive film, which is away from the battery strings.