CN118053401A - Line driving circuit, driving method and display device - Google Patents
Line driving circuit, driving method and display device Download PDFInfo
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- CN118053401A CN118053401A CN202410381389.2A CN202410381389A CN118053401A CN 118053401 A CN118053401 A CN 118053401A CN 202410381389 A CN202410381389 A CN 202410381389A CN 118053401 A CN118053401 A CN 118053401A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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Abstract
The application discloses a row driving circuit, a driving method and a display device, wherein the row driving circuit comprises a first charging module, a second charging module, a pull-down maintaining module and an output module; when the first power supply module outputs a high-level signal, the second power supply module outputs a low-level signal, the first charging module receives a frame starting signal or an upper scanning signal to be conducted, the first power supply module charges a first node through the first charging module, and the output module is controlled to output a current scanning signal to realize forward scanning; when the second power supply module outputs a high-level signal, the first power supply module outputs a low level, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and the output module is controlled to output a current scanning signal to realize reverse scanning. According to the application, the two charging modules are connected with different power supply modules, so that different levels are received at the same time, and forward and backward scanning is realized.
Description
Technical Field
The present application relates to the field of display technologies, and in particular, to a row driving circuit, a driving method, and a display device.
Background
In the display field, the Gate drive integration (GATE DRIVEN on Array, GOA) technology on an Array substrate refers to a technology for realizing Gate (Gate) shift waveform output by utilizing a thin film transistor (Thin film transistor, TFT) integrated design on a display glass substrate, and the technology can replace the function of a Gate drive chip (GATE DRIVER IC), so that the use and manufacturing procedures of GATE DRIVER IC are omitted, the panel cost is greatly saved, and therefore, the GOA technology becomes a core and widely applied technology of the panel.
In the application fields of vehicle-mounted, flat-panel and mobile phones, the GOA is required to have forward and backward scanning functions, namely, the GOA can perform progressive scanning in different directions from top to bottom and from bottom to top so as to cope with horizontal and vertical or forward and backward application of a screen in different scenes; the Oxide is known as a new generation technology capable of realizing large-generation line low-cost production after A-si, so developing the GOA with the Oxide forward and backward scanning function is particularly important, and the GOA circuit with the forward and backward scanning function is provided, so that the display panel with the forward and backward scanning function under different scenes can be effectively realized, and the problem to be solved is urgent.
Disclosure of Invention
The application aims to provide a line driving circuit, a driving method and a display device, and aims to provide a GOA circuit with a forward and reverse scanning function, and a display panel with the forward and reverse scanning function under different scenes can be effectively realized.
The application discloses a row driving circuit, which comprises a plurality of cascaded row driving units, wherein each row driving unit comprises a first charging module, a second charging module, a pull-down maintaining module and an output module; the control end of the first charging module is connected with a gate start signal or an upper scanning signal, the input end of the first charging module is connected with the first power supply module, and the output end of the first charging module is connected with a first node and charges the first node; the control end of the second charging module is connected with a gate start signal or a lower scanning signal, the input end of the second charging module is connected with the second power supply module, the output of the second charging module is connected with the first node, and the first node is charged; the control end of the pull-down maintaining module is connected with the third power supply module, the input end of the pull-down maintaining module is connected with the first node, and the output end of the pull-down maintaining module is connected with a low-level signal output end; the control end of the output module is connected with the first node, the input end of the output module is connected with the current-stage normal-phase clock signal, and the output end of the output module outputs a current-stage scanning signal;
The level signal output by the first power supply module is opposite to the level signal output by the second power supply module at the same time; when the first power supply module outputs a high-level signal, the second power supply module outputs a low-level signal, the first charging module receives a frame starting signal or a superior scanning signal to be conducted, the first power supply module charges a first node through the first charging module, and the output module is controlled to output a current-stage scanning signal to realize forward scanning; when the second power supply module outputs a high-level signal, the first power supply module outputs a low level, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and the output module is controlled to output a current scanning signal to realize reverse scanning.
Optionally, the line driving circuit includes a forward and backward scanning signal generating module and a forward and backward scanning detecting module, the input end of the forward and backward scanning signal generating module is respectively connected with the first line driving unit and the last line driving unit, the output end is connected with the input end of the forward and backward scanning detecting module, and the forward scanning signal and the backward scanning signal are output to the forward and backward scanning detecting module;
the output end of the forward and backward scanning detection module is connected with the first power supply module and the second power supply module respectively; when the forward and backward scanning detection module receives a forward scanning signal, the first power supply module is controlled to output a high-level signal to the first charging module, and when the forward and backward scanning detection module receives a backward scanning signal, the second power supply module is controlled to output a high-level signal to the second charging module;
The positive and negative scanning signal generating module generates a positive scanning signal when the frame start signal is output to the first row driving unit, and generates a negative scanning signal when the frame start signal is output to the last row driving unit.
Optionally, the pull-down maintaining module includes a first pull-down maintaining unit, and the first charging module includes a first transistor; the second charging module comprises a second transistor; the output module includes a third transistor; the first pull-down maintaining unit includes a fourth transistor, a fifth transistor, and a sixth transistor;
The control end of the first transistor is connected with a gate start signal or an upper scanning signal, the input end of the first transistor is connected with the first power supply module, and the output end of the first transistor is connected with the control end of the third transistor through the first node; the control end of the second transistor is connected with a lower scanning signal, the input end of the second transistor is connected with the second power supply module, and the output end of the second transistor is connected with the control end of the third transistor through the first node; the input end of the third transistor is connected with the current stage clock signal, and the output end of the third transistor outputs the current stage scanning signal;
The control end and the input end of the fourth transistor are connected with the output end of the third power supply module, and the output end is connected with a second node; the control end of the fifth transistor is connected with the first node or the control end of the first transistor, the input end of the fifth transistor is connected with the second node, and the output end of the fifth transistor is connected with the low-level signal output end; the control end of the sixth transistor is connected with the second node, the input end of the sixth transistor is connected with the first node, and the output end of the sixth transistor is connected with the low-level signal output end.
Optionally, the pull-down maintaining module further includes a first protection circuit, where the first protection circuit includes a seventh transistor, an eighth transistor, and a ninth transistor;
The control end of the seventh transistor is connected with the output end of the fourth transistor, the input end of the seventh transistor is connected with the third power supply module, and the output end of the seventh transistor is connected with the second node; the control end of the eighth transistor is connected with the first node or the control end of the first transistor, the input end of the eighth transistor is connected with the output end of the fourth transistor, and the output end of the eighth transistor is connected with the low-level signal output end; the control end of the ninth transistor is connected with the second node, the input ends of the ninth transistor are connected with the output end of the third transistor, and the output end of the ninth transistor is connected with the low-level signal output end;
The third power supply module outputs an inverted clock signal with a potential opposite to that of the current-stage inverted clock signal to the fourth transistor and the seventh transistor.
Optionally, the pull-down maintaining module includes a first pull-down maintaining module and a second pull-down maintaining module, the third power supply module includes a first power supply unit and a second power supply unit, an output end of the first power supply unit is connected to a control end of the first pull-down maintaining module, an output end of the second power supply unit is connected to a control end of the second pull-down maintaining module, an input end of the first pull-down module and an input end of the second pull-down module are both connected to the first node, and an output end of the first pull-down module and an output end of the second pull-down module are both connected to the low level signal output end;
At the same time, the level signal output by the first power supply unit is opposite to the level signal output by the second power supply unit.
The application also discloses a driving method which is applied to the row driving circuit, and the driving method comprises the following steps:
The first charging module receives a frame starting signal or an upper scanning signal to conduct, and the first power supply module charges the first node through the first charging module to control the output module to output a current scanning signal so as to realize forward scanning;
after the current frame scanning is finished, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and the output module is controlled to output the current scanning signal so as to realize reverse scanning;
After the current-stage scanning is finished, the third power supply module controls the pull-down maintaining module to pull the potential of the first node down to the potential of the low-level signal output end; at the same time, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module.
Optionally, after the current frame scanning is finished, the second charging module receives a frame start signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and controls the output module to output the current scanning signal, so that the step of implementing the reverse scanning includes:
When the current frame is scanned, a gray scale value corresponding to the next frame is obtained, if the difference value between the gray scale value corresponding to the next frame and the gray scale value of the current frame is larger than or equal to a first preset value, after the current frame is scanned, a first charging module receives a frame starting signal or a superior scanning signal to conduct, a first power supply module charges a first node through the first charging module, and an output module is controlled to output the current scanning signal to continue forward scanning; if the difference value between the gray level value corresponding to the next frame picture and the gray level value of the current frame picture is smaller than a first preset value, the second charging module receives a frame starting signal or a lower scanning signal after the current frame scanning is finished, and the second power supply module charges the first node through the second charging module, and controls the output module to output the current scanning signal so as to realize reverse scanning;
The value range of the first preset value is 30 gray scales to 60 gray scales.
Optionally, the row driving circuit includes a positive and negative scanning signal generating module and a positive and negative scanning detecting module, the first charging module receives a frame starting signal or a superior scanning signal to be conducted, the first power supplying module charges the first node through the first charging module, and the step of controlling the output module to output a current scanning signal to realize positive scanning includes:
When a frame start signal is output to a first row driving unit, the positive and negative scanning signal generating module generates a positive scanning signal, and the first power supply module outputs a high-level signal to the first charging module to charge a first node;
After the current frame scanning is finished, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, the output module is controlled to output the current scanning signal, and the step of realizing reverse scanning comprises the following steps:
When the frame start signal is output to the last row of driving units, the positive and negative scanning signal generating module generates a reverse scanning signal, and the second power supply module outputs a high-level signal to the first charging module to charge the first node.
The application also discloses a display device which comprises the line driving circuit, wherein the line driving circuit is used for driving a display panel and a display panel, and the line driving circuit is used for driving the display panel.
Optionally, the display device includes a photoelectric sensor, the photoelectric sensor detects external light intensity, when the display panel rotates, the photoelectric sensor outputs a corresponding control signal to the forward and backward scanning signal generating module and the forward and backward scanning detecting module of the row driving circuit according to the external light intensity change, and the forward and backward scanning detecting module detects a scanning signal before the display panel rotates and generates a corresponding opposite scanning signal to scan after the display panel rotates.
According to the GOA scanning device, the two charging modules are arranged, and voltage signals output by the two power supply modules are combined, so that the GOA scanning device has a forward and reverse scanning function, and at the same time, the level signals output by the first power supply module are opposite to the level signals output by the second power supply module; when the first power supply module outputs a high-level signal, the second power supply module outputs a low-level signal, the first charging module receives a frame starting signal or an upper scanning signal to be conducted, the first power supply module charges a first node through the first charging module, and the output module is controlled to output a current scanning signal to realize forward scanning; when the second power supply module outputs a high-level signal, the first power supply module outputs a low level, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and the output module is controlled to output a current scanning signal to realize reverse scanning.
Drawings
The accompanying drawings, which are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is evident that the figures in the following description are only some embodiments of the application, from which other figures can be obtained without inventive effort for a person skilled in the art. In the drawings:
fig. 1 is a schematic diagram of a row driving circuit according to a first embodiment of the present application;
Fig. 2 is a schematic diagram of a row driving circuit according to a second embodiment of the present application;
FIG. 3 is a schematic diagram of waveforms of the frame start signal during the forward and backward scanning according to the second embodiment of the present application;
FIG. 4 is a schematic diagram of another frame start signal waveform during a forward/backward scan according to a second embodiment of the present application;
fig. 5 is a circuit schematic of a row driving circuit of a third embodiment of the application;
FIG. 6 is a circuit schematic of another row driver circuit of a third embodiment of the present application;
FIG. 7 is a schematic diagram of waveforms at the input of a row driver circuit according to a third embodiment of the present application;
Fig. 8 is a circuit schematic of a row driving circuit of a fourth embodiment of the application;
fig. 9 is a circuit schematic of a row driving circuit of a fifth embodiment of the present application;
FIG. 10 is a schematic diagram of a row driver cell cascade of a row driver circuit according to a fifth embodiment of the application;
fig. 11 is a circuit schematic of a row driving circuit of a sixth embodiment of the present application;
fig. 12 is a schematic diagram of a driving method of a seventh embodiment of the present application;
fig. 13 is a schematic diagram of a driving method of an eighth embodiment of the present application;
fig. 14 is a schematic view of a display device according to a ninth embodiment of the present application;
Fig. 15 is a schematic view (before rotation) of a display device according to a tenth embodiment of the present application;
fig. 16 is a schematic view (after rotation) of a display device according to a tenth embodiment of the present application.
10, A row driving circuit; 100. a row driving unit; 101. a low level signal output terminal; 110. a first charging module; 120. a second charging module; 130. a pull-down maintenance module; 131. a first pull-down maintaining unit; 132. a second pull-down maintaining unit; 133. a first protection circuit; 134. a first pull-down maintenance module; 135. a second pull-down maintenance module; 140. an output module; 150. a first power supply module; 160. a second power supply module; 170. a third power supply module; 171. a first power supply unit; 172. a second power supply unit; 180. an inverse scanning signal generation module; 190. a forward and backward scanning detection module; 200. a display device; 300. a display panel; 400. a photoelectric sensor;
M1-a first transistor; m2-a second transistor; m3-a third transistor; m4-fourth transistors; m5-fifth transistors; m6-sixth transistors; m7-seventh transistor; m8-eighth transistors; m9-ninth transistors; m10-tenth transistor; m11-eleventh transistors; m12-twelfth transistor; m13-thirteenth transistor; m14-fourteenth transistors; m15-fifteenth transistor; m16-sixteenth transistor;
C-capacitance; STV-frame enable signal; VGL-low level signal; VGH-high level signal; gn—a gate scan signal; CLR-reset signal; CLK, positive clock signal; CLKB, inverted clock signal; VDS, a first supply voltage; VDS, second supply voltage.
Detailed Description
The present application will be described in detail below with reference to the drawings and the optional embodiments, and it should be noted that, without conflict, new embodiments may be formed by any combination of the embodiments or technical features described below.
As shown in fig. 1, as a first embodiment of the present application, a row driving circuit 10 with a forward and reverse scanning function, i.e. a GOA circuit, is disclosed, which can effectively implement the forward and reverse scanning function in different scenarios, specifically, the row driving circuit 10 includes a plurality of cascaded row driving units 100, and each row driving unit 100 includes a first charging module 110, a second charging module 120, a pull-down maintaining module 130 and an output module 140; the control end of the first charging module 110 is connected with a gate start signal or an upper scanning signal, the input end of the first charging module is connected with the first power supply module 150, and the output end of the first charging module is connected with a first node and charges the first node; the control end of the second charging module 120 is connected with a gate start signal or a lower scanning signal, the input end of the second charging module is connected with the second power supply module 160, the output of the second charging module is connected with a first node, and the first node is charged; the control end of the pull-down maintaining module 130 is connected with the third power supply module 170, the input end is connected with the first node, and the output end is connected with a low-level signal output end 101; the control end of the output module 140 is connected to the first node, the input end is connected to the current-stage normal phase clock signal, and the output end outputs the current-stage scanning signal.
Generally, at the same time, the level signal output by the first power supply module 150 is opposite to the level signal output by the second power supply module 160; for example, when the first power supply module 150 outputs a high level signal, the second power supply module 160 outputs a low level signal, the first charging module 110 receives a frame start signal or a superior scan signal, the first power supply module 150 charges the first node through the first charging module 110, and the control output module 140 outputs a current-stage scan signal to realize forward scanning; when the second power supply module 160 outputs a high level signal, the first power supply module 150 outputs a low level, the second charging module 120 receives a frame start signal or a lower scanning signal, the second power supply module 160 charges the first node through the second charging module 120, and the control output module 140 outputs a current scanning signal to realize reverse scanning; when the first power supply module 150 outputs a high level signal to charge the first node through the first charging module 110, the second power supply module 160 does not output any signal, and maintains a non-operating state; in addition, after the current line scan is finished, except for the third power supply module 170, the pull-down maintaining module 130 is controlled to pull down the voltage of the first node, and the first power supply module 150 or the second power supply module 160 corresponding to the next line scan when the next line scan is firstly scanned inputs a low level to pull down the first node of the previous line or the next line, so as to reduce the charge residue in the first node.
As shown in fig. 2 to 4, as a second embodiment of the present application, which is a further refinement and improvement of the first embodiment, the row driving circuit 10 includes a forward and backward scanning signal generating module 180 and a forward and backward scanning detecting module 190, wherein an input end of the forward and backward scanning signal generating module 180 is connected to the first row driving unit 100 and the last row driving unit 100 respectively, an output end is connected to an input end of the forward and backward scanning detecting module 190, and a forward scanning signal and a backward scanning signal are output to the forward and backward scanning detecting module 190; the output end of the forward and backward scanning detection module 190 is connected with the first power supply module 150 and the second power supply module 160 respectively; the forward/reverse scan detection module 190 controls the first power supply module 150 to output a high level signal to the first charging module 110 when receiving a forward scan signal, and controls the second power supply module 160 to output a high level signal to the second charging module 120 when the forward/reverse scan detection module 190 receives a reverse scan signal.
Wherein, when the frame start signal is output to the first row driving unit 100, the forward and backward scanning signal generating module 180 generates a forward scanning signal, and when the frame start signal is output to the last row driving unit 100, the forward and backward scanning signal generating module 180 generates a backward scanning signal; the first power supply module 150 and the second power supply module 160 output corresponding level signals only after receiving corresponding scan signals.
In this embodiment, the forward scanning signal and the reverse scanning signal are generated mainly according to the position where the frame start signal is output first, and the first power supply module 150 and the second power supply module 160 output a high voltage or a low voltage according to the forward scanning signal and the reverse scanning signal, where it should be noted that, the frame start signal is output by the timing control chip, and in general, the timing control chip has two output terminals to output two frame start signals with different waveforms to the input terminal of the first row driving unit 100 and the output terminal of the last row driving unit 100 respectively; of course, the timing control chip may also be an output terminal, which outputs the frame start signal to the first row driving unit 100 and the last row driving unit 100 in a time-sharing manner.
Taking the frame start signal output to the first row driving unit 100 as a positive STV signal, and taking the frame start signal output to the last row driving unit 100 as a negative STV signal, wherein the positive STV signal triggers the first row driving unit 100 during normal scanning, then line-by-line scanning is realized, and the negative STV signal triggers the last row driving unit 100 to realize reverse line-by-line scanning in the idle time of two adjacent frames, otherwise the same; additionally, the STV adopts a plurality of (n is more than or equal to 2) high square wave output modes, and compared with the previous single long-term direct current square wave, the STV can effectively reduce the working pressure of devices corresponding to the first charging module 110 and the second charging module 120, and prolong the service life of the devices.
As shown in fig. 5, as a third embodiment of the present application, which is a further refinement and improvement of any of the above embodiments, the pull-down maintaining module 130 includes a first pull-down maintaining unit 131, and the first charging module 110 includes a first transistor M1; the second charging module 120 includes a second transistor M2; the output module 140 includes a third transistor M3; the first pull-down maintaining unit 131 includes a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6, the fifth transistor M5 having a channel width-to-length ratio greater than that of the fourth transistor M4; the control end of the first transistor M1 is connected to a gate start signal or an upper scanning signal, the input end is connected to the first power supply module 150, and the output end is connected to the control end of the third transistor M3 through the first node; the control end of the second transistor M2 is connected to a lower scanning signal, the input end is connected to the second power supply module 160, and the output end is connected to the control end of the third transistor M3 through the first node; the input end of the third transistor M3 is connected with the current stage clock signal, and the output end of the third transistor M3 outputs the current stage scanning signal; the control end and the input end of the fourth transistor M4 are connected to the output end of the third power supply module 170, and the output end is connected to the second node; the control end of the fifth transistor M5 is connected to the first node or the control end of the first transistor M1, the input end is connected to the second node, and the output end is connected to the low-level signal output end 101; the control terminal of the sixth transistor M6 is connected to the second node, the input terminal is connected to the first node, and the output terminal is connected to the low-level signal output terminal 101.
The sixth transistor M6 and the fifth transistor M5 effectively pull down the electric potentials of the first node Q and the second node QB1, improve the charging capability of the first charging module 110 or the second charging module 120 to the first node Q, increase the precharge voltage of the Q point to a higher voltage, reduce the leakage, avoid the leakage from generating the cross-stripe, and when the nth gate scan signal outputs a high level, the Q point is coupled to a higher point location, the output module 140 is opened more fully, the nth gate scan signal is charged to a high level more quickly, further improving the driving capability, and the two groups of circuits are used alternately, so as to improve the reliability of the transistors in the circuits.
Further, as shown in fig. 4, in order to avoid that the fourth transistor M4, the fifth transistor M5 and the sixth transistor M6 have a large operation time loss, which results in a short lifetime, a first protection circuit 133 is usually further disposed in the pull-down maintaining module 130, and the first protection circuit 133 includes a seventh transistor M7, an eighth transistor M8 and a ninth transistor M9; the control end of the seventh transistor M7 is connected to the output end of the fourth transistor M4, the input end is connected to the third power supply module 170, and the output end is connected to the second node; the control end of the eighth transistor M8 is connected to the first node or the control end of the first transistor M1, the input end is connected to the output end of the fourth transistor M4, and the output end is connected to the low-level signal output end 101; the control end of the ninth transistor M9 is connected to the second node, the input ends thereof are both connected to the output end of the third transistor M3, and the output end thereof is connected to the low-level signal output end 101; wherein the third power supply module 170 outputs an inverted clock signal opposite to the potential of the current-stage inverted clock signal to the fourth transistor M4 and the seventh transistor M7; the fifth transistor M5 and the eighth transistor M8 each have a channel width to length ratio greater than that of the fourth transistor M4 and the seventh transistor M7.
Specifically, as shown with reference to fig. 5 and 7, the forward scanning is taken as an example:
And A phase: VGL is dc low, and the first power supply module 150 outputs the voltage signals VDS, CLK and CLKB as opposite clock signals. The previous row signal Gn-1 (input) is in a high state, the first transistor M1 is turned on, VDS is in a high state VGH, the capacitor C is charged through M1, the first node Q becomes in a high state, at this time, the fifth transistor M5 and the eighth transistor M8 are turned on, and the second node QB1 is pulled in a low state by the low level VGL output from the low level signal output terminal 101.
B, stage: VGL is DC low level, gn-1 is low level, normal phase clock signal CLK is high level state, first node Q is kept high level state, third transistor M3 is turned on, current row Gn outputs high level, second node QB1 is kept low level state.
And C, stage: VGL is a dc low level, gn+1 is a dc high level, the positive phase clock signal CLK becomes a low level signal, and the negative phase clock signal CLKB output by the third power supply module 170 becomes a high level; the second transistor M2 is turned on, the voltage VSD output by the second power supply module 160 is a low level VGL, the first node Q is pulled down to a low level, the fifth transistor M5 and the eighth transistor M8 are turned off, the fourth transistor M4 and the seventh transistor M7 are turned on, the second node QB1 becomes a high level, the sixth transistor M6 and the ninth transistor M9 are turned on, and Q/QB1 is pulled down to maintain a low level state.
In addition, during the reverse scan, the second power supply module 160 outputs an electrical signal VSD, where VSD is a high level signal, the next row signal gn+1 is a high level, the second power supply module 160 charges the first node Q to control the third transistor M3 to be turned on, and the first node and the second node are pulled down and maintained in cooperation with the transistors in the pull-down maintaining module 130 where the third power supply module 170 is located, so as to complete the output of the scan signal; from this, it can be seen that the circuit scan direction can be changed by only changing the level of the VDS/VSD DC signal during forward and reverse scanning.
As shown in fig. 8, as a fourth embodiment of the present application, a further modification of the above third embodiment is that the pull-down maintaining module 130 further includes a second pull-down maintaining unit 132, and the second pull-down maintaining unit 132 includes a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, and a thirteenth transistor M13; the control end and the input end of the tenth transistor M10 are connected with a high-level signal output end, and the output end is connected with a third node; the control end of the eleventh transistor M11 is connected to the first node, the input end is connected to the third node, and the output end is connected to the low-level signal output end 101; the control end of the twelfth transistor M12 is connected with the third node, the input end of the twelfth transistor M12 is connected with the output end of the third transistor M3, and the output end of the twelfth transistor M is connected with the low-level signal output end 101; the control terminal of the thirteenth transistor M13 is connected to the third node, the input terminal is connected to the first node, and the output terminal of the thirteenth transistor M13 is connected to the low-level signal output terminal 101.
Wherein the channel width-to-length ratio of the eleventh transistor M11 is greater than the channel width-to-length ratio of the twelfth transistor M12 and the channel width-to-length ratio of the thirteenth transistor M13.
An additional four TFTs, namely, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, and a thirteenth transistor M13, are added, and a VGH is used as a signal source to supply a sustain voltage for M12/M13, which maintains the voltages at Gn and the first node Q together with the first pull-down maintaining unit 131 of the embodiment, so that the circuit stability is improved, and the lifetime is improved by 1.5-2 times.
As shown in fig. 9 and 10, as a fifth embodiment of the present application, which is a further refinement and improvement of any of the above embodiments, the row driving circuit 10 further includes a reset module including a fourteenth transistor M14 and a fifteenth transistor M15 and a pull-down module including a sixteenth transistor M16; the control ends of the fourteenth transistor M14 and the fifteenth transistor M15 are connected with a CLR signal, the input end of the fourteenth transistor M14 is connected with the first node Q, the output end of the fourteenth transistor M14 is connected with VGL, the input end of the fifteenth transistor M15 is connected with the output end of the third transistor M3, and the output end of the fifteenth transistor M15 is connected with VGL; the control terminal of the sixteenth transistor M16 is connected to the CLKB signal, the input terminal is connected to the output terminal of the third transistor M3, and the output terminal is connected to VGL, and the reset module and the pull-down module can both realize pull-down and reset of the corresponding row driving circuit 10, regardless of forward scanning or backward scanning.
Each row driving unit 100 is connected in a cascade manner, and each row driving unit 100 includes a plurality of input terminals and a control terminal, and receives corresponding clock signals CLK and CLKB and a frame start signal STV and supply voltage signals VSD and VDS through the corresponding input terminals to generate a scan signal of the row driving unit 100.
As can be seen from fig. 9 and 10, in the working phase of the row driving unit 100, taking forward scanning as an example, vds=high, vsd=vgl=low
And A phase: VGL is DC low, VDS is DC high, CLR is low, CLK and CLKB are opposite clock signals. The previous line signal Gn-1 (input) or STV signal is in a high state, the first transistor M1 is turned on, vds=vgh charges the capacitor C through M1, and the first node Q becomes a high level. At this time, M5 and M8 are turned on, and the second node QB1 is pulled low by VGL.
B, stage: VGL is DC low, gn-1 is low, and CLR is low. CLK is in a high state, the first node is maintained in a high state, the third transistor M3 is turned on, the current row Gn outputs a high level, and the second node QB1 is maintained in a low state.
And C, stage: VGL is DC low level, gn+1 is DC high level, CLR is low level, CLK becomes low level signal, CLKB becomes high level; m2 is turned on, vsd=vgl, the first node is pulled low to low level, M5& M8 is turned off, CLKB becomes high level, M4/M7 is turned on, the second node QB1 becomes high level, M13/M6/M16 is turned on, the first node/Gn is pulled low, and the low level state is maintained. Meanwhile, the CLKB continuously turns on M16 according to the state of the clock signal in a continuously high level, so that the maintenance of the Gn low level state is ensured until the next frame comes, and the stability of Gn output waveforms is ensured.
When one frame scanning is finished, the CLR signal becomes high level, M14/M15 is started, reset is respectively carried out on a first node and Gn at the end of one frame, circuit stability is further ensured, and preparation is carried out for starting of the next frame.
As shown in fig. 11, as a sixth embodiment of the present application, unlike the above embodiment, the pull-down maintaining module 130 includes a first pull-down maintaining module 134 and a second pull-down maintaining module 135, the third power supply module 170 includes a first power supply unit 171 and a second power supply unit 172, an output terminal of the first power supply unit 171 is connected to a control terminal of the first pull-down maintaining module 134, an output terminal of the second power supply unit 172 is connected to a control terminal of the second pull-down maintaining module 135, an input terminal of the first pull-down module and an input terminal of the second pull-down module are both connected to the first node, and an output terminal of the first pull-down module and an output terminal of the second pull-down module are both connected to the low-level signal output terminal 101; at the same time, the level signal output from the first power supply unit 171 is opposite to the level signal output from the second power supply unit 172.
In this embodiment, two sets of pull-down maintenance modules 130 are provided to alternately operate, and the thin film transistors in the two sets of pull-down maintenance modules 130 correspond to each other, for example, M5 in the first pull-down maintenance module 134 corresponds to M5A in the second pull-down maintenance module 135, wherein the signals CLKB1 and CLKB2 provided by the first power supply unit 171 and the second power supply unit 172 are two sets of opposite timing signals, and when CLKB1 is at a high level, CLKB2 is at a low level, so that the two sets of pull-down modules can realize the alternate operation, so that the long-term operation of one pull-down module can avoid the excessive loss of the corresponding thin film transistor, and the service life of the thin film transistor is affected.
As a seventh embodiment of the present application, as shown in fig. 12, there is disclosed a driving method for driving the row driving circuit in any of the above embodiments, the driving method including the steps of:
S1: the first charging module receives a frame starting signal or an upper scanning signal to conduct, and the first power supply module charges the first node through the first charging module to control the output module to output a current scanning signal so as to realize forward scanning;
S2: after the current frame scanning is finished, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and the output module is controlled to output the current scanning signal so as to realize reverse scanning;
After the current-stage scanning is finished, the third power supply module controls the pull-down maintaining module to pull the potential of the first node down to the potential of the low-level signal output end; at the same time, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module.
During forward scanning: vds=high, vsd=vgl=low, i.e., M1 is on and M2 is off, the first node starts to charge the capacitor C to a high level from the Gn-1 signal going high, and then Gn is output, the first node starts to discharge to a low level from the gn+1 signal going high, gn is pulled down, and GOA realizes forward scan transfer.
During the reverse scanning: vsd=high, vds=vgl=low, i.e. M1/M2 TFT is turned on in opposite ways, M2 is turned on, M1 is turned off, the first node starts to charge the capacitor C to become high level from gn+1 signal to output Gn, the first node starts to discharge to be low level from Gn-1 signal to pull Gn low, other TFT switch states during operation are consistent with the above three phases a/B/C, and GOA realizes reverse scanning transfer.
As shown in fig. 13, as an eighth embodiment of the present application, the seventh embodiment is further refined, and the step S2 includes:
S21: when the current frame is scanned, a gray scale value corresponding to the next frame is obtained, if the difference value between the gray scale value corresponding to the next frame and the gray scale value of the current frame is larger than or equal to a first preset value, after the current frame is scanned, a first charging module receives a frame starting signal or a superior scanning signal to conduct, a first power supply module charges a first node through the first charging module, and an output module is controlled to output the current scanning signal to continue forward scanning; if the difference value between the gray level value corresponding to the next frame picture and the gray level value of the current frame picture is smaller than a first preset value, the second charging module receives a frame starting signal or a lower scanning signal after the current frame scanning is finished, and the second power supply module charges the first node through the second charging module, and controls the output module to output the current scanning signal so as to realize reverse scanning;
The value range of the first preset value is 30 gray scales to 60 gray scales.
In this embodiment, the difference value of the gray scale values of the current frame and the next frame is mainly used as the judging condition for the forward and backward scanning switching, if the difference value of the gray scale values of the current frame and the next frame is too large and exceeds the first preset value, the scanning mode which is continuously used can be selected to scan, the change of the scanning mode is avoided, the last line driving unit is used as the driving line, the charging time is insufficient due to the impedance problem, so that the residual shadow appears when the frame picture is switched, the original scanning mode can be selected to scan at this time, for example, the forward scanning is adopted when the first frame is scanned, the gray scale value is 120, the forward scanning is still adopted when the gray scale value corresponding to the second frame picture is 255, and the reverse scanning is adopted when the gray scale value corresponding to the second frame picture is 135.
In addition, in addition to taking the gray scale values of the front frame and the rear frame as judging conditions for the forward and backward scanning switching, other switching modes can be set, such as switching through setting time, and after the forward scanning reaches a certain time, adopting the backward scanning, and when switching, switching is carried out after the scanning of the current frame is finished, and switching is carried out no matter whether the scanning of the current frame is finished or not, if the preset time is not reached; of course, the preset number of frames may be set to perform switching, for example, forward scanning is started after 1 frame, 2 frames or 4 frames, and reverse scanning is started after 1 frame, 2 frames or 4 frames corresponding to the number of frames.
Further, the row driving circuit includes a forward and backward scanning signal generating module and a forward and backward scanning detecting module, and the step S1 includes:
When a frame start signal is output to a first row driving unit, the positive and negative scanning signal generating module generates a positive scanning signal, and the first power supply module outputs a high-level signal to the first charging module to charge a first node;
correspondingly, the step S2 includes:
When the frame start signal is output to the last row of driving units, the positive and negative scanning signal generating module generates a reverse scanning signal, and the second power supply module outputs a high-level signal to the first charging module to charge the first node.
As shown in fig. 14, as a ninth embodiment of the present application, a display device 200 is disclosed, the display device 200 including a line driving circuit 10 as described in any one of the above and a display panel 300, the line driving circuit 10 for driving display of the display panel, the line driving circuit including a plurality of line driving units each of which can realize forward scanning and reverse scanning.
It should be noted that, in the whole display panel, the row driving circuit 10 is provided with a plurality of scanning lines 210 corresponding to the display panel, each row driving circuit 10 opens the corresponding second transistor by controlling the clock signal of the clock signal module 220 to output the corresponding gate scanning signal to the scanning line, the row driving circuit 10 in any one of the embodiments is explained, the row driving circuit (GDL) is provided with a plurality of GDL circuits, the GDL circuits are cascaded, the output of the GDL circuits is ensured to be normal, the number of TFTs is relatively small under the premise of ensuring the performance and reliability of the GDL circuits, the risk of short circuit failure can be reduced during the process manufacturing, and a narrower frame can be achieved, so that the display panel is suitable for the narrow frame and high resolution model design. The row driving circuits in the above embodiments may be used in combination to output the gate scan signals together, thereby completing the display of the display panel.
Further, as shown in fig. 15 and 16, as a tenth embodiment of the present application, the display device 200 includes a photosensor 400, the photosensor 400 is disposed on the display panel 300 and connected to a driving chip or a processor unit in the display panel 300, the photosensor 400 detects the intensity of external light, and when the display panel 300 rotates, the photosensor 400 outputs a corresponding control signal to a forward and backward scanning signal generating module and a forward and backward scanning detecting module of the row driving circuit 10 according to the change of the intensity of external light, and the forward and backward scanning detecting module detects a scanning signal before the rotation of the display panel 300 and generates a corresponding opposite scanning signal to scan after the rotation of the display panel 300 is completed; when the screen rotates 360 degrees, the scanning direction of the display panel 300 needs to be correspondingly adjusted, so that signal transmission is facilitated, at this time, the GOA in the display panel needs to have a reverse scanning function, so that the reverse scanning mode can be directly started, and the scanning signal in the previous normal scanning process can be directly used, so that the scanning signal is more rapidly input into the panel, signal delay is avoided, and user experience is affected.
In general, when the display panel 300 is used as a vehicle-mounted display screen or an outdoor screen, a rotatable display bracket (not shown) is disposed below the display panel, and when the photoelectric sensor 400 detects that light is weakened, a signal is transmitted to the IC or the display processing unit, and meanwhile, the display bracket motor is driven to rotate, so as to search for light, and when the current generated by the photoelectric sensor reaches a maximum value, the rotation is stopped, and an adjustment is performed along with 10% attenuation of the light. Therefore, the solar energy electricity storage module can be integrated in the display, and outdoor display light is saved. Meanwhile, the application can be applied to display devices which reflect display by ambient light, such as electronic paper, reflective display LCD and the like. Of course, the application can be used in reverse for avoiding strong ambient light, facilitating human eye viewing, such as vehicle-mounted, outdoor, etc.
It should be noted that, the limitation of each step in the present solution is not to be considered as limiting the sequence of steps on the premise of not affecting the implementation of the specific solution, and the steps written in the previous step may be executed before, or executed after, or even executed simultaneously, so long as the implementation of the present solution is possible, all the steps should be considered as falling within the protection scope of the present application.
The inventive concept of the present application can form a very large number of embodiments, but the application documents are limited in size and cannot be listed one by one, so that on the premise of no conflict, the above-described embodiments or technical features can be arbitrarily combined to form new embodiments, and after the embodiments or technical features are combined, the original technical effects can be enhanced.
The technical scheme of the application can be widely applied to various display panels, such as MN (MWISMED NEMAMIC, twisted nematic) display panels, IPS (In-PLANE SWIMCHING, in-plane switching) display panels, VA (VERMICAL ALIGNMENM, vertical alignment) display panels, MVA (MulMi-Domain VERMICAL ALIGNMENM, multi-quadrant vertical alignment) display panels, and of course, other types of display panels, such as OLED (Organic LighM-EmiMMing Diode, organic light emitting diode) display panels, can be also applied to the scheme.
The above description of the application in connection with specific alternative embodiments is further detailed and it is not intended that the application be limited to the specific embodiments disclosed. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the application, and these should be considered to be within the scope of the application.
Claims (10)
1. A row drive circuit comprising a plurality of cascaded row drive units, wherein each of said row drive units comprises:
The first charging module is characterized in that a control end is connected with a gate starting signal or an upper scanning signal, an input end is connected with the first power supply module, and an output end is connected with a first node and charges the first node;
The control end of the second charging module is connected with a gate starting signal or a lower scanning signal, the input end of the second charging module is connected with the second power supply module, the output of the second charging module is connected with the first node, and the first node is charged;
the control end of the pull-down maintaining module is connected with the third power supply module, the input end of the pull-down maintaining module is connected with the first node, and the output end of the pull-down maintaining module is connected with a low-level signal output end; and
The control end of the output module is connected with the first node, the input end of the output module is connected with the current-stage normal-phase clock signal, and the output end of the output module outputs a current-stage scanning signal;
The level signal output by the first power supply module is opposite to the level signal output by the second power supply module at the same time; when the first power supply module outputs a high-level signal, the second power supply module outputs a low-level signal, the first charging module receives a frame starting signal or a superior scanning signal to be conducted, the first power supply module charges a first node through the first charging module, and the output module is controlled to output a current-stage scanning signal to realize forward scanning; when the second power supply module outputs a high-level signal, the first power supply module outputs a low level, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and the output module is controlled to output a current scanning signal to realize reverse scanning.
2. The line driving circuit according to claim 1, wherein the line driving circuit comprises a forward and backward scanning signal generating module and a forward and backward scanning detecting module, wherein the input end of the forward and backward scanning signal generating module is respectively connected with the first line driving unit and the last line driving unit, the output end is connected with the input end of the forward and backward scanning detecting module, and a forward scanning signal and a backward scanning signal are output to the forward and backward scanning detecting module;
the output end of the forward and backward scanning detection module is connected with the first power supply module and the second power supply module respectively; when the forward and backward scanning detection module receives a forward scanning signal, the first power supply module is controlled to output a high-level signal to the first charging module, and when the forward and backward scanning detection module receives a backward scanning signal, the second power supply module is controlled to output a high-level signal to the second charging module;
The positive and negative scanning signal generating module generates a positive scanning signal when the frame start signal is output to the first row driving unit, and generates a negative scanning signal when the frame start signal is output to the last row driving unit.
3. The row driving circuit of claim 2, wherein the pull-down maintaining module comprises a first pull-down maintaining unit, and the first charging module comprises a first transistor; the second charging module comprises a second transistor; the output module includes a third transistor; the first pull-down maintaining unit includes a fourth transistor, a fifth transistor, and a sixth transistor;
The control end of the first transistor is connected with a gate start signal or an upper scanning signal, the input end of the first transistor is connected with the first power supply module, and the output end of the first transistor is connected with the control end of the third transistor through the first node; the control end of the second transistor is connected with a lower scanning signal, the input end of the second transistor is connected with the second power supply module, and the output end of the second transistor is connected with the control end of the third transistor through the first node; the input end of the third transistor is connected with the current stage clock signal, and the output end of the third transistor outputs the current stage scanning signal;
The control end and the input end of the fourth transistor are connected with the output end of the third power supply module, and the output end is connected with a second node; the control end of the fifth transistor is connected with the first node or the control end of the first transistor, the input end of the fifth transistor is connected with the second node, and the output end of the fifth transistor is connected with the low-level signal output end; the control end of the sixth transistor is connected with the second node, the input end of the sixth transistor is connected with the first node, and the output end of the sixth transistor is connected with the low-level signal output end.
4. The row driver circuit of claim 3, wherein the pull-down maintenance module further comprises a first protection circuit comprising a seventh transistor, an eighth transistor, and a ninth transistor;
The control end of the seventh transistor is connected with the output end of the fourth transistor, the input end of the seventh transistor is connected with the third power supply module, and the output end of the seventh transistor is connected with the second node; the control end of the eighth transistor is connected with the first node or the control end of the first transistor, the input end of the eighth transistor is connected with the output end of the fourth transistor, and the output end of the eighth transistor is connected with the low-level signal output end; the control end of the ninth transistor is connected with the second node, the input ends of the ninth transistor are connected with the output end of the third transistor, and the output end of the ninth transistor is connected with the low-level signal output end;
The third power supply module outputs an inverted clock signal with a potential opposite to that of the current-stage inverted clock signal to the fourth transistor and the seventh transistor.
5. The row driving circuit of claim 2, wherein the pull-down maintaining module comprises a first pull-down maintaining module and a second pull-down maintaining module, the third power supply module comprises a first power supply unit and a second power supply unit, the output end of the first power supply unit is connected with the control end of the first pull-down maintaining module, the output end of the second power supply unit is connected with the control end of the second pull-down maintaining module, the input end of the first pull-down module and the input end of the second pull-down module are both connected with the first node, and the output end of the first pull-down module and the output end of the second pull-down module are both connected with the low level signal output end;
At the same time, the level signal output by the first power supply unit is opposite to the level signal output by the second power supply unit.
6. A driving method applied to the row driving circuit of any one of the preceding claims 1-5, characterized in that the driving method comprises the steps of:
The first charging module receives a frame starting signal or an upper scanning signal to conduct, and the first power supply module charges the first node through the first charging module to control the output module to output a current scanning signal so as to realize forward scanning;
after the current frame scanning is finished, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, and the output module is controlled to output the current scanning signal so as to realize reverse scanning;
After the current-stage scanning is finished, the third power supply module controls the pull-down maintaining module to pull the potential of the first node down to the potential of the low-level signal output end; at the same time, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module.
7. The driving method as claimed in claim 6, wherein the second charging module receives the frame start signal or the lower scanning signal after the current frame scanning is completed, the second power supply module charges the first node through the second charging module, and the control output module outputs the current scanning signal, the step of implementing the reverse scanning includes:
When the current frame is scanned, a gray scale value corresponding to the next frame is obtained, if the difference value between the gray scale value corresponding to the next frame and the gray scale value of the current frame is larger than or equal to a first preset value, after the current frame is scanned, a first charging module receives a frame starting signal or a superior scanning signal to conduct, a first power supply module charges a first node through the first charging module, and an output module is controlled to output the current scanning signal to continue forward scanning; if the difference value between the gray level value corresponding to the next frame picture and the gray level value of the current frame picture is smaller than a first preset value, the second charging module receives a frame starting signal or a lower scanning signal after the current frame scanning is finished, and the second power supply module charges the first node through the second charging module, and controls the output module to output the current scanning signal so as to realize reverse scanning;
The value range of the first preset value is 30 gray scales to 60 gray scales.
8. The driving method as claimed in claim 7, wherein the row driving circuit includes a forward and backward scanning signal generating module and a forward and backward scanning detecting module, the first charging module receives a frame start signal or a superior scanning signal to be turned on, the first power supplying module charges the first node through the first charging module, and the step of controlling the output module to output a current-stage scanning signal to realize forward scanning includes:
When a frame start signal is output to a first row driving unit, the positive and negative scanning signal generating module generates a positive scanning signal, and the first power supply module outputs a high-level signal to the first charging module to charge a first node;
After the current frame scanning is finished, the second charging module receives a frame starting signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, the output module is controlled to output the current scanning signal, and the step of realizing reverse scanning comprises the following steps:
When the frame start signal is output to the last row of driving units, the positive and negative scanning signal generating module generates a reverse scanning signal, and the second power supply module outputs a high-level signal to the first charging module to charge the first node.
9. A display device comprising a display panel and a row drive circuit as claimed in any one of claims 1 to 5, the row drive circuit being arranged to drive the display panel.
10. The display device according to claim 9, wherein the display device includes a photosensor detecting an external light intensity, and when the display panel rotates, the photosensor outputs a corresponding control signal to a forward and reverse scanning signal generating module and a forward and reverse scanning detecting module of the row driving circuit according to the external light intensity change, and the forward and reverse scanning detecting module detects a scanning signal before rotation of the display panel and generates a corresponding reverse scanning signal to scan after the display panel rotates.
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