CN118042347A

CN118042347A - Driving unit, audio amplifier and terminal

Info

Publication number: CN118042347A
Application number: CN202211388760.5A
Authority: CN
Inventors: 周建成
Original assignee: Beijing Xiaomi Mobile Software Co Ltd
Current assignee: Beijing Xiaomi Mobile Software Co Ltd
Priority date: 2022-11-08
Filing date: 2022-11-08
Publication date: 2024-05-14

Abstract

The disclosure provides a driving unit, an audio amplifier and a terminal, wherein the driving unit comprises a power supply unit, a voltage doubling driving circuit and a reserved interface externally connected with a loudspeaker; the driving unit is configured to cause the reserved interface to output one of the following driving signals through the voltage-multiplying driving circuit: a maximum voltage value of 0 times power supply unit, -a maximum voltage value of 1 time power supply unit, +1 time power supply unit, -a maximum voltage value of 2 times power supply unit, +2 time power supply unit, -a maximum voltage value of 3 times power supply unit, +3 time power supply unit. In the disclosure, the driving unit can output seven kinds of driving signals with voltage values through the voltage doubling driving circuit, so that the audio signal output by the loudspeaker is closer to the original audio analog signal, the distortion of the audio analog signal is reduced better, and the use experience of a user is improved.

Description

Driving unit, audio amplifier and terminal

Technical Field

The disclosure relates to the technical field of audio amplifiers, and in particular relates to a driving unit, an audio amplifier and a terminal.

Background

At present, mobile phones and other terminals with higher density requirements generally adopt a class-D audio amplifier to amplify power, and drive signals output to a loudspeaker are generally three voltage values, so that audio signals output by the loudspeaker have larger distortion relative to original audio analog signals, and user experience is poor.

Disclosure of Invention

To overcome the problems in the related art, the present disclosure provides a driving unit, an audio amplifier, and a terminal.

According to a first aspect of embodiments of the present disclosure, there is provided a driving unit, including a power supply unit, a voltage doubler driving circuit, and a reserved interface for externally connecting a speaker;

the driving unit is configured to cause the reserved interface to output one of the following driving signals through the voltage doubling driving circuit:

0 times the maximum voltage value of the power supply unit, -1 times the maximum voltage value of the power supply unit. +1 times the maximum voltage value of the power supply unit, -2 times the maximum voltage value of the power supply unit, +2 times the maximum voltage value of the power supply unit, -3 times the maximum voltage value of the power supply unit, +3 times the maximum voltage value of the power supply unit.

Optionally, the voltage doubling driving circuit includes a first capacitor unit, a second capacitor unit, a bidirectional switch unit and a switch combination, where a second end of the first capacitor unit is electrically connected to a first end of the second capacitor unit, and a first end of the bidirectional switch unit is electrically connected to a second end of the first capacitor unit and a first end of the second capacitor unit respectively;

The switch assembly includes a first switch unit and a second switch unit, and the switch assembly is configured such that when the first switch unit is in an on state, the second switch unit is in an off state; when the second switch unit is in a conducting state, the first switch unit is in a disconnecting state;

The voltage doubling drive circuit further comprises a first half-bridge circuit, wherein a first input end of the first half-bridge circuit is electrically connected with the positive electrode of the power supply unit, a second input end of the first half-bridge circuit is electrically connected with the negative electrode of the power supply unit, and an output end of the first board-bridge circuit is electrically connected with the first end of the reserved interface;

The voltage doubling drive circuit further comprises a second half-bridge circuit, wherein a first input end of the second half-bridge circuit is electrically connected with the positive electrode of the power supply unit, a second input end of the second half-bridge circuit is electrically connected with the negative electrode of the power supply unit, an output end of the second half-bridge circuit is electrically connected with the first end of the first capacitor unit through the first switch unit, and an output end of the second half-bridge circuit is electrically connected with the second end of the second capacitor unit through the second switch unit;

The voltage doubling drive circuit further comprises a third half-bridge circuit, wherein a first input end of the third half-bridge circuit is electrically connected with the positive electrode of the power supply unit, a second input end of the third half-bridge circuit is electrically connected with the negative electrode of the power supply unit, and an output end of the third plate-bridge circuit is electrically connected with the second end of the bidirectional switch unit;

The voltage doubling driving circuit further comprises a fourth half-bridge circuit, wherein a first input end of the fourth half-bridge circuit is electrically connected with the first end of the first capacitor unit, a second input end of the fourth half-bridge circuit is electrically connected with the second end of the second capacitor unit, and an output end of the fourth plate-bridge circuit is electrically connected with the second end of the reserved interface.

Optionally, the first half-bridge circuit includes a third switching unit and a fourth switching unit, where the third switching unit is located at a first input end of the first half-bridge circuit, and the fourth switching unit is located at a second input end of the first half-bridge circuit;

The first half-bridge circuit is configured such that when the third switching unit is in an on state, the fourth switching unit is in an off state; when the fourth switch unit is in an on state, the third switch unit is in an off state.

Optionally, the second half-bridge circuit includes a fifth switch unit and a sixth switch unit, where the fifth switch unit is located at a first input end of the second half-bridge circuit, and the sixth switch unit is located at a second input end of the second half-bridge circuit;

the second half-bridge circuit is configured such that the sixth switching unit is in an off state when the fifth switching unit is in an on state; when the sixth switching unit is in an on state, the fifth switching unit is in an off state.

Optionally, the third half-bridge circuit includes a seventh switching unit and an eighth switching unit, where the seventh switching unit is located at the first input end of the third half-bridge circuit, and the eighth switching unit is located at the second input end of the third half-bridge circuit;

The third half-bridge circuit is configured such that when the seventh switching unit is in an on state, the eighth switching unit is in an off state; when the eighth switching unit is in an on state, the seventh switching unit is in an off state.

Optionally, the fourth half-bridge circuit includes a ninth switching unit and a tenth switching unit, where the ninth switching unit is located at a first input terminal of the fourth half-bridge circuit, and the tenth switching unit is located at a second input terminal of the fourth half-bridge circuit;

the fourth half-bridge circuit is configured such that the tenth switching unit is in an off state when the ninth switching unit is in an on state; when the tenth switch unit is in an on state, the ninth switch unit is in an off state.

Alternatively, the process may be carried out in a single-stage,

The first capacitance unit comprises at least one first capacitor; and/or the number of the groups of groups,

The second capacitive unit includes at least one second capacitor.

Alternatively, the process may be carried out in a single-stage,

The withstand voltage value of the first capacitor is greater than or equal to the maximum voltage value of the power supply unit; and/or the number of the groups of groups,

The withstand voltage value of the second capacitor is greater than or equal to the maximum voltage value of the power supply unit.

According to a second aspect of embodiments of the present disclosure, there is provided an audio amplifier comprising a pulse width modulation unit and the driving unit according to the first aspect, the pulse width modulation unit being electrically connected to the driving unit, the pulse width modulation unit being configured to control a voltage doubling driving circuit in the driving unit based on an output signal of the pulse width modulation unit so that the driving unit outputs a driving signal.

According to a third aspect of embodiments of the present disclosure, there is provided a terminal comprising a speaker and an audio amplifier according to the second aspect, a reserved interface of a driving unit of the audio amplifier being electrically connected to the speaker.

The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects: in the disclosure, the driving unit can output seven kinds of driving signals with voltage values through the voltage doubling driving circuit, so that the audio signal output by the loudspeaker is closer to the original audio analog signal, the distortion of the audio analog signal is reduced better, and the use experience of a user is improved.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.

Fig. 1 is a circuit schematic diagram of a driving unit shown according to an exemplary embodiment.

Fig. 2 is a schematic diagram of an audio amplifier (including a speaker in the figure) of the terminal shown according to an exemplary embodiment.

Fig. 3 is a block diagram of a terminal shown according to an exemplary embodiment.

Detailed Description

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods of some embodiments of the present disclosure.

In the related art, a part of driving units can output driving signals with five voltage values, but the driving signals still have larger distortion, and the voltage doubling driving circuit is generally complex, and an additional boost inductance device is required to be arranged, so that the cost is higher.

Embodiments of the present disclosure provide a driving unit of an audio amplifier. The driving unit can output seven driving signals with voltage values through the voltage doubling driving circuit, so that the audio signals output by the loudspeaker are closer to the original audio analog signals, distortion of the audio analog signals is reduced better, and use experience of a user is improved.

In one exemplary embodiment, a driving unit of an audio amplifier is provided. Referring to fig. 1, the driving unit may include a power supply unit DC, a voltage doubling driving circuit, and a reserved interface SPK connected to a speaker.

The driving unit is configured to enable the reserved interface SPK to output driving signals with seven voltage values through the voltage doubling driving circuit. The seven voltage values are one of the following:

The maximum voltage value of the power supply unit DC is 0 times, -the maximum voltage value of the power supply unit DC is 1 times, +1 times, -the maximum voltage value of the power supply unit DC is 2 times, +2 times, -3 times, +3 times.

For example, if the maximum voltage value of the power supply unit DC is Vs, the driving unit controls the voltage-multiplying driving circuit so that the reserved interface SPK can output seven voltage values of-3 Vs, -2Vs, -Vs, 0, vs, 2Vs, and 3 Vs.

The driving unit can output seven voltage value driving signals through the voltage doubling driving circuit, so that the audio signal output by the loudspeaker is more similar to the original audio analog signal, the distortion of the audio analog signal is reduced better, and the use experience of a user is improved.

In one exemplary embodiment, a drive unit is provided. In the driving unit, the voltage doubling driving circuit may include a first capacitor unit C1, a second capacitor unit C2, a bidirectional switch unit S0, and a switch combination.

Wherein the first capacitance unit C1 may include at least one first capacitor. The second capacitance unit C2 may also include at least one second capacitor. For example, the first capacitance unit C1 includes a first capacitor, and the second capacitance unit C2 includes a second capacitor. That is, in the driving unit, the driving signals of seven voltage values can be output through the two capacitors, so that the voltage doubling driving circuit can be simplified, and the cost can be reduced.

The withstand voltage value of the first capacitor is greater than or equal to the maximum voltage value of the power supply unit DC. The withstand voltage value of the second capacitor may also be greater than or equal to the maximum voltage value of the power supply unit DC. It is thus better ensured that the drive unit can output in case the voltage doubling drive circuit comprises only one first capacitor and one second capacitor: a drive signal of seven voltage values, i.e., a maximum voltage value of 0 times power supply unit DC, -a maximum voltage value of 1 times power supply unit DC, +1 times power supply unit DC, -a maximum voltage value of 2 times power supply unit DC, +2 times power supply unit DC, -a maximum voltage value of 3 times power supply unit DC, and +3 times power supply unit DC.

The second end of the first capacitor unit C1 is electrically connected to the first end of the second capacitor unit C2, that is, the first capacitor unit C1 is connected in series with the second capacitor unit C2. The first end of the bidirectional switch unit S0 is electrically connected to the second end of the first capacitor unit C1 and the first end of the second capacitor unit C2, respectively. That is, the first end of the bidirectional switch unit S0 is electrically connected to the second end of the first capacitor unit C1 and the first end of the second capacitor unit C2.

In some embodiments, the second end of the first capacitive unit C1 is connected to the first end of the second capacitive unit C2 through a first wire, so as to realize that the second end of the first capacitive unit C1 is electrically connected to the first end of the second capacitive unit C2. And, the first end of the bidirectional switch unit S0 is connected to the first conductive wire, so as to realize that the first end of the bidirectional switch unit S0 is electrically connected to the second end of the first capacitor unit C1 and the first end of the second capacitor unit C2, respectively.

Wherein the switch combination may include a first switch unit S1 and a second switch unit S2. And the switch combination is configured such that when the first switch unit S1 is in an on state, the second switch unit S2 is in an off state; when the second switching unit S2 is in an on state, the first switching unit S1 is in an off state. That is, the switch combination includes two complementary first switch units S1 and second switch units S2.

The voltage doubler drive circuit may further include a first half-bridge circuit. The first input end of the first half-bridge circuit is electrically connected with the positive electrode of the power supply unit DC, the second input end of the first half-bridge circuit is electrically connected with the negative electrode of the power supply unit DC, and the output end of the first board-bridge circuit is electrically connected with the first end of the reserved interface SPK.

In some embodiments, the first half-bridge circuit may include a third switching unit S3 and a fourth switching unit S4, the third switching unit S3 being located at a first input terminal of the first half-bridge circuit, and the fourth switching unit S4 being located at a second input terminal of the first half-bridge circuit. That is, the first half-bridge circuit is electrically connected to the positive electrode of the power supply unit DC through the third switching unit S3, and the first half-bridge circuit is electrically connected to the negative electrode of the power supply unit DC through the fourth switching unit S4. Wherein the first half-bridge circuit is configured such that when the third switching unit S3 is in an on state, the fourth switching unit S4 is in an off state; when the fourth switching unit S4 is in the on state, the third switching unit S3 is in the off state. That is, the third switching unit S3 and the fourth switching unit S4 are complementary.

The voltage doubler drive circuit may further include a second half-bridge circuit. The first input end of the second half-bridge circuit is electrically connected with the positive electrode of the power supply unit DC, the second input end of the second half-bridge circuit is electrically connected with the negative electrode of the power supply unit DC, the output end of the second half-bridge circuit is electrically connected with the first end of the first capacitor unit C1 through the first switch unit S1, and the output end of the second half-bridge circuit is electrically connected with the second end of the second capacitor unit C2 through the second switch unit S2.

In some embodiments, the second half-bridge circuit may include a fifth switching unit S5 and a sixth switching unit S6. The fifth switching unit S5 is located at the first input terminal of the second half-bridge circuit, and the sixth switching unit S6 is located at the second input terminal of the second half-bridge circuit. That is, the second half-bridge circuit is electrically connected to the positive electrode of the power supply unit DC through the fifth switching unit S5, and the second half-bridge circuit is electrically connected to the negative electrode of the power supply unit DC through the sixth switching unit S6. Wherein the second half-bridge circuit is configured such that the sixth switching unit S6 is in an off state when the fifth switching unit S5 is in an on state; when the sixth switching unit S6 is in the on state, the fifth switching unit S5 is in the off state. That is, the fifth switching unit S5 and the sixth switching unit S6 are complementary.

The voltage doubler drive circuit may further include a third half-bridge circuit. The first input end of the third half-bridge circuit is electrically connected with the positive electrode of the power supply unit DC, the second input end of the third half-bridge circuit is electrically connected with the negative electrode of the power supply unit DC, and the output end of the third plate bridge circuit is electrically connected with the second end of the bidirectional switch unit S0.

In some embodiments, the third half-bridge circuit may include a seventh switching unit S7 and an eighth switching unit S8, the seventh switching unit S7 being located at the first input terminal of the third half-bridge circuit, and the eighth switching unit S8 being located at the second input terminal of the third half-bridge circuit. That is, the third half-bridge circuit is electrically connected to the positive electrode of the power supply unit DC through the seventh switching unit S7, and the third half-bridge circuit is electrically connected to the negative electrode of the power supply unit DC through the eighth switching unit S8. Wherein the third half-bridge circuit is configured such that when the seventh switching unit S7 is in an on state, the eighth switching unit S8 is in an off state; when the eighth switching unit S8 is in the on state, the seventh switching unit S7 is in the off state. That is, the seventh switching unit S7 is complementary to the eighth switching unit S8.

The voltage doubling driving circuit may further include a fourth half-bridge circuit, wherein a first input end of the fourth half-bridge circuit is electrically connected to the first end of the first capacitor unit C1, a second input end of the fourth half-bridge circuit is electrically connected to the second end of the second capacitor unit C2, and an output end of the fourth plate-bridge circuit is electrically connected to the second end of the reserved interface SPK.

In some embodiments, the fourth half-bridge circuit includes a ninth switching unit S9 and a tenth switching unit S10, the ninth switching unit S9 being located at a first input terminal of the fourth half-bridge circuit, and the tenth switching unit S10 being located at a second input terminal of the fourth half-bridge circuit. That is, the fourth half-bridge circuit is electrically connected to the first terminal of the first capacitance unit C1 through the ninth switching unit S9, and the fourth half-bridge circuit is electrically connected to the second terminal of the second capacitance unit C2 through the tenth switching unit S10. Wherein the fourth half-bridge circuit is configured such that the tenth switching unit S10 is in an off state when the ninth switching unit S9 is in an on state; when the tenth switching unit S10 is in the on state, the ninth switching unit S9 is in the off state. That is, the ninth switching unit S9 is complementary to the tenth switching unit S10.

In the driving unit, the two-way switch unit S0, the switch combination, the first half-bridge circuit, the second half-bridge circuit, the third half-bridge circuit and the fourth half-bridge circuit are controlled to be in a conducting state, so that the reserved interface SPK of the external loudspeaker outputs seven voltage-value driving signals, the audio signals output by the loudspeaker are more similar to original audio analog signals, distortion of the audio analog signals is reduced better, and use experience of a user is improved.

In addition, the voltage doubling driving circuit in the driving unit is simpler, an additional boost inductance device is not required to be arranged, driving signals with seven voltage values can be output only by two capacitance units, and the cost is low.

In one exemplary embodiment, an audio amplifier is provided. As shown with reference to fig. 2, the audio amplifier 1 may comprise a pulse width modulation unit 12 and the above-mentioned driving unit 13. Wherein the pulse width modulation unit 12 is electrically connected to the driving unit 13. The pulse width modulation unit 12 is configured to control the voltage doubler driving circuit in the driving unit 13 based on the output signal of the pulse width modulation unit 12 so that the driving unit 13 outputs the driving signal.

In some embodiments, referring to fig. 1 and 2, the audio amplifier 1 may include an input amplifying unit 11, a pulse width (PMW) modulating unit 12, and a driving unit 13. The original audio signal is typically an analog signal, which may be sequentially processed by the input amplifying unit 11 and the pwm unit 12, and then the pwm unit 12 inputs the output signal into the driving unit 13 to control the on state of each switch unit in the driving unit 13.

The driving unit 13 may include a power supply unit DC, a voltage doubling driving circuit, and a reserved interface SPK connected to the speaker. The voltage doubling driving circuit may include a first capacitor unit C1, a second capacitor unit C2, a bidirectional switch unit S0, a switch combination, a first half-bridge circuit, a second half-bridge circuit, a third half-bridge circuit, and a fourth half-bridge circuit. The switch combination may comprise complementary first and second switch units S1, S2. Wherein the power supply unit DC may be a direct current power supply unit. The maximum voltage value of which can be noted as Vs.

The second end of the first capacitor unit C1 is connected to the first end of the second capacitor unit C2 through a wire, so as to realize that the second end of the first capacitor unit C1 is electrically connected to the first end of the second capacitor unit C2. And, the first end of the bidirectional switch unit S0 is connected to the conductive wire, so as to realize that the first end of the bidirectional switch unit S0 is electrically connected to the second end of the first capacitor unit C1 and the first end of the second capacitor unit C2, respectively.

The first half-bridge circuit may include a third switching unit S3 and a fourth switching unit S4, which are complementary, the third switching unit S3 being located at a first input terminal of the first half-bridge circuit, and the fourth switching unit S4 being located at a second input terminal of the first half-bridge circuit. The first input end of the first half-bridge circuit is electrically connected with the positive electrode of the power supply unit DC, the second input end of the first half-bridge circuit is electrically connected with the negative electrode of the power supply unit DC, and the output end of the first half-bridge circuit is electrically connected with the first end of the reserved interface SPK.

The second half-bridge circuit may include complementary fifth and sixth switching units S5 and S6. The fifth switching unit S5 is located at the first input terminal of the second half-bridge circuit, and the sixth switching unit S6 is located at the second input terminal of the second half-bridge circuit. The first input end of the second half-bridge circuit is electrically connected with the positive electrode of the power supply unit DC, the second input end of the second half-bridge circuit is electrically connected with the negative electrode of the power supply unit DC, the output end of the second half-bridge circuit is electrically connected with the first end of the first capacitor unit C1 through the first switch unit S1, and the output end of the second half-bridge circuit is electrically connected with the second end of the second capacitor unit C2 through the second switch unit S2.

The third half-bridge circuit may include a complementary seventh switching unit S7 and eighth switching unit S8, the seventh switching unit S7 being located at the first input terminal of the third half-bridge circuit, and the eighth switching unit S8 being located at the second input terminal of the third half-bridge circuit. The first input end of the third half-bridge circuit is electrically connected with the positive electrode of the power supply unit DC, the second input end of the third half-bridge circuit is electrically connected with the negative electrode of the power supply unit DC, and the output end of the third plate-bridge circuit is electrically connected with the second end of the bidirectional switch unit S0.

The fourth half-bridge circuit may include a ninth switching unit S9 and a tenth switching unit S10 that are complementary, the ninth switching unit S9 being located at a first input terminal of the fourth half-bridge circuit, and the tenth switching unit S10 being located at a second input terminal of the fourth half-bridge circuit. The first input end of the fourth half-bridge circuit is electrically connected with the first end of the first capacitor unit C1, the second input end of the fourth half-bridge circuit is electrically connected with the second end of the second capacitor unit C2, and the output end of the fourth plate bridge circuit is electrically connected with the second end of the reserved interface SPK.

In the audio amplifier 1, when the voltage value of the output signal of the pwm unit 12 is such that the first switch unit S1, the third switch unit S3, the fifth switch unit S5, the eighth switch unit S8, the ninth switch unit S9 and the bi-directional switch unit S0 are in the on state, the first capacitor unit C1 is charged in parallel with the power supply unit DC to the voltage value Vs, and the second capacitor unit C2 is in the idle state. Meanwhile, two ends of the reserved interface SPK are short-circuited, and the reserved interface SPK can output a driving signal with a voltage value of 0.

When the voltage value of the output signal of the pwm unit 12 is such that the fourth switch unit S4, the fifth switch unit S5, the first switch unit S1, the eighth switch unit S8, the ninth switch unit S9 and the bi-directional switch unit S0 are in the on state, the first capacitor unit C1 is charged in parallel with the power supply unit DC to the voltage value Vs, and the second capacitor unit C2 is in the idle state. Meanwhile, the power supply unit DC directly supplies power to the reserved interface SPK, the second end of the reserved interface SPK at the positive electrode of the power supply unit DC is electrically connected, the negative electrode of the power supply unit DC is electrically connected with the first end of the reserved interface SPK, and the reserved interface SPK can output a driving signal with a voltage value of Vs.

When the voltage value of the output signal of the pwm unit 12 makes the fourth switch unit S4, the sixth switch unit S6, the second switch unit S2, the seventh switch unit S7, the ninth switch unit S9 and the bi-directional switch unit S0 in the on state, the second capacitor unit C2 is charged in parallel with the power supply unit DC to a voltage value Vs. Meanwhile, the first capacitor unit C1 is connected in series with the power supply unit DC to supply power to the reserved interface SPK simultaneously, and the reserved interface SPK outputs a driving signal with a voltage value of +2vs.

When the voltage value of the output signal of the pulse width modulation unit 12 is such that the fourth switch unit S4, the fifth switch unit S5, the second switch unit S2, the seventh switch unit S7, the ninth switch unit S9 are in an on state and the bidirectional switch unit S0 is in an off state, the bidirectional switch unit S0 blocks the charging loop of the first capacitor unit C1 and the second capacitor unit C2, so that the power supply unit DC, the first capacitor unit C1 and the second capacitor unit C2 supply power to the reserved interface SPK together, and the reserved interface SPK outputs a driving signal with a voltage value of +3vs.

When the voltage value of the output signal of the pwm unit 12 is such that the third switch unit S3, the sixth switch unit S6, the second switch unit S2, the seventh switch unit S7, the tenth switch unit S10 and the bi-directional switch unit S0 are in the on state, the second capacitor unit C2 is charged in parallel with the power supply unit DC to the voltage value Vs, and the first capacitor unit C1 is in the idle state. Meanwhile, the power supply unit DC directly supplies power to the reserved interface SPK, the first end of the reserved interface SPK at the positive electrode of the power supply unit DC is electrically connected, the negative electrode of the power supply unit DC is electrically connected with the second end of the reserved interface SPK, and the reserved interface SPK can output a driving signal with a voltage value of-Vs.

When the voltage value of the output signal of the pwm unit 12 makes the third switch unit S3, the fifth switch unit S5, the first switch unit S1, the eighth switch unit S8, the tenth switch unit S10 and the bi-directional switch unit S0 in the on state, the first capacitor unit C1 is charged in parallel with the power supply unit DC to a voltage value Vs. Meanwhile, the second capacitor unit C2 is connected in series with the power supply unit DC to supply power to the reserved interface SPK simultaneously, and the reserved interface SPK outputs a driving signal with a voltage value of-2 Vs.

When the voltage values of the output signals of the pulse width modulation unit 12 are such that the third switch unit S3, the sixth switch unit S6, the first switch unit S1, the eighth switch unit S8, the tenth switch unit S10 are in an on state and the bidirectional switch unit S0 is in an off state, the bidirectional switch unit S0 blocks the charging loop of the first capacitor unit C1 and the second capacitor unit C2, so that the power supply unit DC, the first capacitor unit C1 and the second capacitor unit C2 supply power to the reserved interface SPK together, and the reserved interface SPK outputs a driving signal with a voltage value of-3 Vs.

In the audio amplifier 1, the pulse width modulation unit 12 controls the conduction state of the voltage doubling driving circuit in the driving unit 13 through the output signal, so that the reserved interface SPK of the external loudspeaker outputs driving signals with seven voltage values, the audio signal output by the loudspeaker is more similar to the original audio analog signal, the distortion of the audio analog signal is better reduced, and the use experience of a user is improved.

In one exemplary embodiment, a terminal is provided. The terminal may be an audio device, a mobile phone, a computer, a wearable device, etc., which is not limited thereto. The terminal may include a speaker and an audio amplifier as described above. The reserved interface of the driving unit of the audio amplifier is electrically connected with the loudspeaker.

In the terminal, the reserved interface of the driving unit in the audio amplifier can output seven driving signals with voltage values, so that the audio signal output by the loudspeaker is more similar to the original audio analog signal, the distortion of the audio analog signal is better reduced, and the use experience of a user is improved.

Referring to fig. 3, the terminal 400 may include one or more of the following components: a processing component 402, a memory 404, a power component 406, a multimedia component 408, an audio component 410, an input/output (I/O) interface 412, a sensor component 414, and a communication component 416.

The processing component 402 generally controls the overall operation of the device 400, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 402 may include one or more processors 420 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 402 can include one or more modules that facilitate interaction between the processing component 402 and other components. For example, the processing component 402 may include a multimedia module to facilitate interaction between the multimedia component 408 and the processing component 402.

Memory 404 is configured to store various types of data to support operations at device 400. Examples of such data include instructions for any application or method operating on device 400, contact data, phonebook data, messages, pictures, video, and the like. The memory 404 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.

The power component 406 provides power to the various components of the device 400. Power components 406 may include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power for device 400.

The multimedia component 408 includes a screen between the device 400 and the user that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input instructions from a user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or sliding action, but also the duration and pressure associated with the touch or sliding operation. In some embodiments, the multimedia component 408 includes a front camera and/or a rear camera. The front camera and/or the rear camera may receive external multimedia data when the terminal 400 is in an operation mode, such as a photographing mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

The audio component 410 is configured to output and/or input audio instructions. For example, audio component 410 includes a Microphone (MIC) configured to receive external audio instructions when device 400 is in an operational mode, such as a call mode, a recording mode, and a speech recognition mode. The received audio instructions may be further stored in memory 404 or transmitted via communication component 416. In some embodiments, audio component 410 further includes a speaker for outputting audio instructions.

The I/O interface 412 provides an interface between the processing component 402 and peripheral interface modules, which may be a keyboard, click wheel, buttons, etc. These buttons may include, but are not limited to: homepage button, volume button, start button, and lock button.

The sensor assembly 414 includes one or more sensors for providing status assessment of various aspects of the terminal 400. For example, the sensor assembly 414 may detect the on/off state of the terminal 400, the relative positioning of the components, such as the display and keypad of the terminal 400, the sensor assembly 414 may also detect the change in position of the device 400 or one of the components of the terminal 400, the presence or absence of user contact with the device 400, the orientation or acceleration/deceleration of the device 400, and the change in temperature of the device 400. The sensor assembly 414 may include a proximity sensor configured to detect the presence of nearby objects in the absence of any physical contact. The sensor assembly 414 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 414 may also include an acceleration sensor, a gyroscopic sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

The communication component 416 is configured to facilitate communication between the device 400 and other devices, either wired or wireless. The device 700 may access a wireless network based on a communication standard, such as WiFi,2G or 3G, or a combination thereof. In one exemplary embodiment, the communication component 416 receives broadcast instructions or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component 416 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, device 400 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital instruction processors (DSPs), digital instruction processing devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements.

In an exemplary embodiment, a non-transitory computer readable storage medium is also provided, such as memory 404, including instructions executable by processor 420 of device 400 to perform the above-described method. For example, the non-transitory computer readable storage medium may be ROM, random Access Memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. The driving unit is characterized by comprising a power supply unit, a voltage doubling driving circuit and a reserved interface externally connected with a loudspeaker;

-0 times the maximum voltage value of the power supply unit, -1 times the maximum voltage value of the power supply unit, +1 times the maximum voltage value of the power supply unit, -2 times the maximum voltage value of the power supply unit, +2 times the maximum voltage value of the power supply unit, -3 times the maximum voltage value of the power supply unit, +3 times the maximum voltage value of the power supply unit.

2. The drive unit of claim 1, wherein the voltage doubling drive circuit comprises a first capacitance unit, a second capacitance unit, a bi-directional switch unit, and a switch combination, wherein a second end of the first capacitance unit is electrically connected to a first end of the second capacitance unit, and a first end of the bi-directional switch unit is electrically connected to a second end of the first capacitance unit and a first end of the second capacitance unit, respectively;

3. The drive unit of claim 2, wherein the first half-bridge circuit comprises a third switching unit and a fourth switching unit, the third switching unit being located at a first input of the first half-bridge circuit, the fourth switching unit being located at a second input of the first half-bridge circuit;

4. The drive unit of claim 2, wherein the second half-bridge circuit comprises a fifth switching unit and a sixth switching unit, the fifth switching unit being located at a first input of the second half-bridge circuit, the sixth switching unit being located at a second input of the second half-bridge circuit;

5. The drive unit of claim 2, wherein the third half-bridge circuit comprises a seventh switching unit and an eighth switching unit, the seventh switching unit being located at a first input of the third half-bridge circuit, the eighth switching unit being located at a second input of the third half-bridge circuit;

6. The drive unit of claim 2, wherein the fourth half-bridge circuit comprises a ninth switching unit and a tenth switching unit, the ninth switching unit being located at a first input of the fourth half-bridge circuit, the tenth switching unit being located at a second input of the fourth half-bridge circuit;

7. Drive unit according to any of the claims 2-6, characterized in that,

The second capacitive unit includes at least one second capacitor.

8. The drive unit of claim 7, wherein the drive unit comprises a drive unit,

9. An audio amplifier comprising a pulse width modulation unit and a drive unit according to claims 1-8, the pulse width modulation unit being electrically connected to the drive unit, the pulse width modulation unit being configured to control a voltage doubling drive circuit in the drive unit based on an output signal of the pulse width modulation unit such that the drive unit outputs a drive signal.

10. A terminal comprising a speaker and an audio amplifier according to claim 9, wherein a reserved interface of a driving unit of the audio amplifier is electrically connected to the speaker.