CN118034574A - DDR data refreshing control method, device, equipment and storage medium - Google Patents

DDR data refreshing control method, device, equipment and storage medium Download PDF

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Publication number
CN118034574A
CN118034574A CN202211390007.XA CN202211390007A CN118034574A CN 118034574 A CN118034574 A CN 118034574A CN 202211390007 A CN202211390007 A CN 202211390007A CN 118034574 A CN118034574 A CN 118034574A
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China
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program
refreshing
ddr
ddr memory
data
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孙炳彤
严丽琴
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China Automotive Innovation Corp
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China Automotive Innovation Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1438—Restarting or rejuvenating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658—Controller construction arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Computer Security & Cryptography (AREA)
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Abstract

The application discloses a DDR data refreshing control method, device, equipment and storage medium, relates to the technical field of memories, and can solve the problem that data in DDR are lost due to overlong hot start time. The specific scheme comprises the following steps: after receiving the hot restart instruction, controlling the first refresh program of the DDR memory to be closed, controlling the second refresh program of the DDR memory to be opened, and controlling the programmable logic device to set the first level state of the preset pin to be a preset state and then executing the shutdown program; the first refreshing program is a data refreshing program based on hardware control, and the second refreshing program is a data refreshing program based on software control; and in the process of executing the starting program, if the starting program is detected to be executed to the initialization process of the DDR memory, after the second refreshing program is controlled to be closed according to the second level state of the preset pin, executing the initialization process of the DDR memory, wherein the initialization process comprises the step of controlling the starting of the first refreshing program.

Description

DDR data refreshing control method, device, equipment and storage medium
Technical Field
The present application relates to the field of memory technologies, and in particular, to a method, an apparatus, a device, and a storage medium for controlling DDR data refresh.
Background
The hot restart refers to closing the electronic device according to a normal program, so that the software and hardware of the electronic device cannot be damaged. More and more electronic products in the prior art are required to quickly recover the upper layer service of the system after hot restarting. Avoiding the time spent restarting all traffic, the more complex the system, the longer the traffic can take to restart, the more this functionality is needed.
The method for realizing the fast recovery of the upper layer service of the system generally comprises the steps of storing key data of the upper layer service in a memory area of a DDR (double rate synchronous dynamic random access memory) before the system is restarted, and reading the data of the DDR reserved memory area after the system is restarted to fast recover the service. To meet this requirement, it must be ensured that data in the DDR reserved memory area must not be lost before and after a hot restart. However, since DDR is a volatile memory, data in DDR is easily lost without self-refreshing DDR. The DDR is uncontrolled from the time of the hot start to the time of the DDR re-initialization, and if the time of the hot start is too long, the data in the DDR is lost.
Disclosure of Invention
The application provides a DDR data refreshing control method, device, equipment and storage medium, which can solve the problem that data in DDR is lost due to overlong hot start time.
In order to achieve the above purpose, the application adopts the following technical scheme:
In a first aspect of the embodiment of the present application, a control method for DDR data refresh is provided, where the method includes:
After receiving the hot restart instruction, controlling the first refresh program of the DDR memory to be closed, controlling the second refresh program of the DDR memory to be opened, and controlling the programmable logic device to set the first level state of the preset pin to be a preset state and then executing the shutdown program; the first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is used for indicating that a preset pin is at a high level or a low level;
And in the process of executing the starting program, if the starting program is detected to be executed to the initializing process of the DDR memory, acquiring a second level state of a preset pin, and executing the initializing process of the DDR memory after controlling the second refreshing program to be closed according to the second level state, wherein the initializing process comprises the step of controlling the starting of the first refreshing program.
In one embodiment, controlling the first refresh program of the DDR memory to be turned off and controlling the second refresh program of the DDR memory to be turned on includes:
And sending a control instruction to the controller, and controlling the first refresh function of the DDR memory to be closed and controlling the second refresh function of the DDR memory to be opened by the controller according to the control instruction.
In one embodiment, after controlling the programmable logic device to set the first level state of the preset pin to the preset state, executing the shutdown procedure includes:
And sending a first instruction to the programmable logic device, wherein the first instruction is used for instructing the programmable logic device to start a timer so that the programmable logic device can execute a closing program after setting the first level state of the preset pin to be a preset state according to the set time of the timer.
In one embodiment, after the second refresh program is controlled to be turned off according to the second level state, an initialization process of the DDR memory is performed, including:
if the second level state is the same as the preset state, the initialization process of the DDR memory is executed after the second refreshing function is controlled to be closed;
And if the second level state is different from the preset state, executing the initialization process of the DDR memory.
In one embodiment, the preset pins include a first preset pin and a second preset pin, the preset state is that the first preset pin is at a high level, and the second preset pin is at a low level.
In one embodiment, before receiving the hot restart instruction, the method further comprises:
Acquiring a detection data set, and sequentially writing the detection data set into a preset memory space in the DDR memory according to a random data set;
after performing the initialization process of the DDR memory, the method further comprises: and reading a reference data set from the DDR memory, and determining whether the data in the DDR memory is lost according to the detection data and the reference data set.
In one embodiment, after acquiring the detection data set, the method further comprises: generating check values of all detection data in the detection data set, and writing the check values into a preset memory space;
after reading the reference data set from the DDR memory, the method further comprises:
Generating a check value of each reference data in the reference data set;
and acquiring the check value of each detection data, and determining whether the data in the DDR memory is lost or not according to the check value of each detection data and the check value of the reference data.
In a second aspect of the embodiment of the present application, there is provided a control device for DDR data refresh, the device comprising:
The first processing module is used for controlling the closing of a first refreshing program of the DDR memory and the opening of a second refreshing program of the DDR memory after receiving a hot restarting instruction, and executing a shutdown program after controlling the programmable logic device to set a first level state of a preset pin to a preset state; the first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is used for indicating that a preset pin is at a high level or a low level;
And the second processing module is used for acquiring a second level state of a preset pin when the starting program is detected to be executed to the initializing process of the DDR memory in the process of executing the starting program, and executing the initializing process of the DDR memory after controlling the second refreshing program to be closed according to the second level state, wherein the initializing process comprises the step of controlling the starting of the first refreshing program.
In a third aspect of the embodiment of the present application, an electronic device is provided, including a memory and a processor, where the memory stores a computer program, and the computer program implements the control method for DDR data refresh in the first aspect of the embodiment of the present application when executed by the processor.
In a fourth aspect of the embodiment of the present application, a computer readable storage medium is provided, on which a computer program is stored, which when executed by a processor implements the DDR data refresh control method in the first aspect of the embodiment of the present application.
The technical scheme provided by the embodiment of the application has the beneficial effects that at least:
According to the DDR data refreshing control method provided by the embodiment of the application, after the processor receives the hot restarting instruction, the processor controls the first refreshing program of the DDR memory to be closed, controls the second refreshing program of the DDR memory to be opened, and controls the programmable logic device to set the first level state of the preset pin to be the preset state and then execute the shutdown program. The first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is high level or low level; and in the process of executing the starting program, if the starting program is detected to be executed to the initializing process of the DDR memory, acquiring a second level state of a preset pin, and executing the initializing process of the DDR memory after controlling the second refreshing program to be closed according to the second level state, wherein the initializing process comprises the step of controlling the starting of the first refreshing program. Because the data refreshing program based on the hardware control is in an uncontrolled state in the hot restarting process, if the hot restarting time is too long, the data in the DDR is lost, and the equipment is not powered off in the hot restarting process, so long as the equipment is not powered off, the data refreshing program based on the software control can normally control the data refreshing of the DDR memory, and meanwhile, the closing of the data refreshing program based on the software control can be identified and controlled according to the level state of a preset pin, so that the data refreshing of the DDR memory can be ensured to be controlled by the data refreshing program based on the hardware control normally after the equipment is started.
Drawings
FIG. 1 is a flowchart of a DDR data refresh control method provided in an embodiment of the present application;
fig. 2 is a hardware design structure diagram of an electronic device according to an embodiment of the present application;
Fig. 3 is a block diagram of a control device for DDR data refresh according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present disclosure, unless otherwise indicated, the meaning of "a plurality" is two or more.
In addition, the use of "based on" or "according to" is meant to be open and inclusive, as a process, step, calculation, or other action that is "based on" or "according to" one or more conditions or values may in practice be based on additional conditions or exceeded values.
The hot restart refers to closing the electronic device according to a normal program, so that the software and hardware of the electronic device cannot be damaged. More and more electronic products in the prior art are required to quickly recover the upper layer service of the system after hot restarting. Avoiding the time spent restarting all traffic, the more complex the system, the longer the traffic can take to restart, the more this functionality is needed.
The method for realizing the fast recovery of the upper layer service of the system generally comprises the steps of storing key data of the upper layer service in a memory area of a DDR (double rate synchronous dynamic random access memory) before the system is restarted, and reading the data of the DDR reserved memory area after the system is restarted to fast recover the service. To meet this requirement, it must be ensured that data in the DDR reserved memory area must not be lost before and after a hot restart. However, since DDR is a volatile memory, data in DDR is easily lost without self-refreshing DDR. The DDR is uncontrolled during the period from the hot start to the DDR re-initialization, and if the hot restart is performed for too long, the data in the DDR is lost.
In order to solve the above-mentioned problems, an embodiment of the present application provides a control method for refreshing DDR data, in which a processor controls a first refresh program of a DDR memory to be turned off and a second refresh program of the DDR memory to be turned on after receiving a hot-restart instruction, and controls a programmable logic device to set a first level state of a preset pin to a preset state and then execute a shutdown program. The first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is high level or low level; and in the process of executing the starting program, if the starting program is detected to be executed to the initializing process of the DDR memory, acquiring a second level state of a preset pin, and executing the initializing process of the DDR memory after controlling the second refreshing program to be closed according to the second level state, wherein the initializing process comprises the step of controlling the starting of the first refreshing program. Because the data refreshing program based on the hardware control is in an uncontrolled state in the hot restarting process, if the hot restarting time is too long, the data in the DDR is lost, and the equipment is not powered off in the hot restarting process, so long as the equipment is not powered off, the data refreshing program based on the software control can normally control the data refreshing of the DDR memory, and meanwhile, the closing of the data refreshing program based on the software control can be identified and controlled according to the level state of a preset pin, so that the data refreshing of the DDR memory can be ensured to be controlled by the data refreshing program based on the hardware control normally after the equipment is started.
The execution main body of the control method for DDR data refreshing provided by the embodiment of the application can be a processor or a processing unit in electronic equipment.
Based on the execution body, the embodiment of the application provides a DDR data refreshing control method.
As shown in fig. 1, the method comprises the steps of:
Step 101, after receiving a hot restart instruction, the processor controls a first refresh program of the DDR memory to be turned off, controls a second refresh program of the DDR memory to be turned on, and controls the programmable logic device to set a first level state of a preset pin to a preset state, and then executes a shutdown program.
The processor is a CPU in the electronic device, and the CPU is located in a System on Chip (SoC), which is an integrated circuit with a dedicated target, and contains the entire System and the entire content of embedded software. The SoC chip is a micro-system, and if the Central Processing Unit (CPU) is the brain, the SoC chip is a system including the brain, heart, eyes and hands.
DDR is Double Data Rate, DDR memory is Double Rate synchronous dynamic random access memory.
The programmable logic device may be a complex programmable logic device (Complex Programmable logic device, CPLD), a field programmable gate array (Field Programmable GATE ARRAY, FPGA), or a single chip microcomputer.
As shown in fig. 2, an embodiment of the present application provides a hardware design structure diagram of an electronic device, where the electronic device includes a SoC chip, a programmable logic device, and a DDR memory. The CPU of the electronic device is located in the SoC chip, and the SoC chip is connected with the programmable logic device and the DDR memory through system buses respectively. Meanwhile, pins of the programmable logic device are connected with the SoC chip.
The first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is high level or low level. The data refreshing program based on hardware control is uncontrolled in the hot start process of the equipment, and the data refreshing program based on software control can always run normally in the hot start process of the equipment.
Optionally, the preset pins include a first preset pin and a second preset pin, the preset state includes that the first preset pin is at a high level, and the second preset pin is at a low level.
In the actual implementation process, the preset pins may be one or more pins, and the preset state may also be a high level or a low level, which is not particularly limited in the present application.
For example, when the programmable logic device is a CPLD, the preset pins may be a first GPIO pin and a second GPIO pin. The preset state may be: the first GPIO pin is high and the second GPIO pin is low.
Step 102, when the processor detects that the start program is executed to the initialization process of the DDR memory during the execution of the start program, the processor obtains a second level state of a preset pin, and after controlling the second refresh program to be closed according to the second level state, executes the initialization process of the DDR memory, where the initialization process includes controlling the start of the first refresh program.
The starting program refers to a starting program of the electronic device, and initializes the DDR memory during a starting process of the electronic device.
It can be understood that the closing of the second refresh program can be identified and controlled according to the level state of the preset pin, so that the data refresh of the DDR memory can be ensured to be controlled by the first refresh program normally after the device is started.
According to the DDR data refreshing control method provided by the embodiment of the application, after the processor receives the hot restarting instruction, the processor controls the first refreshing program of the DDR memory to be closed, controls the second refreshing program of the DDR memory to be opened, and controls the programmable logic device to set the first level state of the preset pin to be the preset state and then execute the shutdown program. The first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is high level or low level; and in the process of executing the starting program, if the starting program is detected to be executed to the initializing process of the DDR memory, acquiring a second level state of a preset pin, and executing the initializing process of the DDR memory after controlling the second refreshing program to be closed according to the second level state, wherein the initializing process comprises the step of controlling the starting of the first refreshing program. Because the data refreshing program based on the hardware control is in an uncontrolled state in the hot restarting process, if the hot restarting time is too long, the data in the DDR is lost, and the equipment is not powered off in the hot restarting process, so long as the equipment is not powered off, the data refreshing program based on the software control can normally control the data refreshing of the DDR memory, and meanwhile, the closing of the data refreshing program based on the software control can be identified and controlled according to the level state of a preset pin, so that the data refreshing of the DDR memory can be ensured to be controlled by the data refreshing program based on the hardware control normally after the equipment is started.
Optionally, the specific process of controlling the first refresh program of the DDR memory to be turned off and controlling the second refresh program of the DDR memory to be turned on in step 101 may be:
The processor sends a control instruction to the controller, and the controller controls the first refresh function of the DDR memory to be closed and controls the second refresh function of the DDR memory to be opened according to the control instruction.
That is, a controller is also connected between the processor and the DDR memory, and the processor needs to be controlled by the controller when controlling the first refresh program and turning off and on of the DDR memory and controlling the second refresh program of the DDR memory.
Optionally, after the programmable logic device is controlled to set the first level state of the preset pin to the preset state, executing a shutdown program, including:
And sending a first instruction to the programmable logic device, wherein the first instruction is used for instructing the programmable logic device to start a timer so that the programmable logic device can execute a closing program after setting the first level state of the preset pin to be a preset state according to the set time of the timer.
The setting time of the timer may be 1 second, or the setting time of the timer may be set according to the control precision, which is not particularly limited in the embodiment of the present application.
Optionally, after the second refresh program is controlled to be turned off according to the second level state, an initialization process of the DDR memory is performed, including:
if the second level state is the same as the preset state, the initialization process of the DDR memory is executed after the second refreshing function is controlled to be closed;
And if the second level state is different from the preset state, executing the initialization process of the DDR memory.
It can be understood that if the second level state is the same as the preset state, it is indicated that the DDR memory has turned off the first refresh program and turned on the second refresh program to control the data refresh of the DDR memory before starting, and then in order to ensure that the original first refresh program is maintained to control the data refresh of the DDR memory after the electronic device is initialized, the second refresh program needs to be turned off first, and then the initialization process of the DDR memory is performed. If the second level state is inconsistent with the preset state, the first refresh program is not closed before the electronic device is started, so that the initialization process can be normally executed when the electronic device is initialized.
Optionally, before receiving the hot restart instruction, the method further includes:
Acquiring a detection data set, and sequentially writing the detection data set into a preset memory space in the DDR memory according to a random data set;
After performing the initialization process of the DDR memory, the method further comprises: and reading the reference data set from the DDR memory, and determining whether the data in the DDR memory is lost according to the detection data set and the reference data set.
That is, it is possible to determine whether or not the data loss occurs in the data refresh control of the DDR memory provided by the embodiment of the present application by detecting whether or not data in the DDR memory is consistent before and after the restart.
Optionally, after acquiring the detection data set, the method further comprises: generating check values of all detection data in the detection data set, and writing the check values into a preset memory space;
After reading the reference data set from the DDR memory, the method further comprises: generating a check value of each reference data in the reference data set; and acquiring the check value of each detection data, and determining whether the data in the DDR memory is lost or not according to the check value of each detection data and the check value of the reference data.
It can be understood that, when detecting whether the data in the DDR memory is consistent before and after restarting, in order to facilitate detecting whether the data is consistent, the detection can be performed by using a check value of the data in the memory in the DDR memory, so that the detection efficiency can be improved.
In the actual execution process, 10M-4bytes of random ascii data can be written into the reserved memory area of the DDR, the last 4bytes record the check value of the crc of the 10M-4bytes of data, then the hot restart of the electronic equipment is executed, after the hot restart, the 10M-4bytes of data are read out from the reserved memory area of the DDR, the check value of the crc is calculated, and compared with the data stored in the last 4bytes before, if the check value is equal, the data of the DDR reserved memory part is unchanged, and if the check value is unequal, the data of the DDR reserved memory part is lost. In the actual process, after 1000 times of pressure tests, the final result is: the data loss rate of the prior art is: 0.7%, and the data loss rate is 0% by using the DDR data refreshing control method provided by the embodiment of the application.
As shown in fig. 3, the embodiment of the present application further provides a control device for DDR data refresh, where the device includes:
The first processing module 11 is configured to control, after receiving the hot restart instruction, the first refresh program of the DDR memory to be turned off, and control the second refresh program of the DDR memory to be turned on, and control the programmable logic device to set the first level state of the preset pin to be a preset state, and then execute the shutdown program; the first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is used for indicating that a preset pin is at a high level or a low level;
The second processing module 12 is configured to, during execution of the start-up program, obtain a second level state of the preset pin if it is detected that the start-up program is executed to an initialization process of the DDR memory, and control the second refresh program to be turned off according to the second level state, and then execute the initialization process of the DDR memory, where the initialization process includes controlling the start of the first refresh program.
In one embodiment, the first processing module 11 is specifically configured to:
And sending a control instruction to the controller, and controlling the first refresh function of the DDR memory to be closed and controlling the second refresh function of the DDR memory to be opened by the controller according to the control instruction.
In one embodiment, the first processing module 11 is specifically configured to:
And sending a first instruction to the programmable logic device, wherein the first instruction is used for instructing the programmable logic device to start a timer so that the programmable logic device can execute a closing program after setting the first level state of the preset pin to be a preset state according to the set time of the timer.
In one embodiment, the second processing module 12 is specifically configured to:
if the second level state is the same as the preset state, the initialization process of the DDR memory is executed after the second refreshing function is controlled to be closed;
And if the second level state is different from the first preset state, executing the initialization process of the DDR memory.
In one embodiment, the preset pins include a first preset pin and a second preset pin, the preset state is that the first preset pin is at a high level, and the second preset pin is at a low level.
In one embodiment, the apparatus further comprises: a third processing module 13, the third processing module 13 being configured to:
Acquiring a detection data set, and sequentially writing the detection data set into a preset memory space in the DDR memory according to a random data set;
Correspondingly, the apparatus further comprises a determining module 14, and the determining module 14 is configured to: and reading a reference data set from the DDR memory, and determining whether the data in the DDR memory is lost according to the detection data and the reference data set.
In one embodiment, the third processing module 13 is further configured to: generating check values of all detection data in the detection data set, and writing the check values into a preset memory space;
the determining module 14 is further configured to: generating a check value of each reference data in the reference data set;
and acquiring the check value of each detection data, and determining whether the data in the DDR memory is lost or not according to the check value of each detection data and the check value of the reference data.
The control device for DDR data refreshing provided in this embodiment may execute the above method embodiment, and its implementation principle and technical effects are similar, and will not be repeated here.
For specific limitation of the control device for DDR data refresh, reference may be made to the limitation of the control method for DDR data refresh hereinabove, and the description thereof will not be repeated here. The modules in the control device for DDR data refreshing can be all or partially realized by software, hardware and a combination thereof. The above modules may be embedded in hardware or may be independent of a processor of the electronic device, or may be stored in software in a memory of the electronic device, so that the processor may call and execute operations corresponding to the above modules.
In another embodiment of the present application, there is also provided an electronic device including a memory and a processor, the memory storing a computer program, the computer program implementing the steps of the DDR data refresh control method according to the embodiment of the present application when executed by the processor.
In another embodiment of the present application, there is also provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the DDR data refresh control method according to the embodiments of the present application.
In another embodiment of the present application, a computer program product is provided, where the computer program product includes computer instructions, when the computer instructions are executed on a control device for DDR data refresh, cause the control device for DDR data refresh to execute each step of the control method for DDR data refresh in the method flow shown in the method embodiment described above.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer-executable instructions are loaded and executed on a computer, the processes or functions in accordance with embodiments of the present application are fully or partially produced. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another, for example, a website, computer, server, or data center via a wired (e.g., coaxial cable, fiber optic, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. Computer readable storage media can be any available media that can be accessed by a computer or data storage devices including one or more servers, data centers, etc. that can be integrated with the media. Usable media may be magnetic media (e.g., floppy disks, hard disks, magnetic tape), optical media (e.g., DVD), or semiconductor media (e.g., solid State Disk (SSD)) or the like.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims (10)

1. A control method for DDR data refresh, the method comprising:
After receiving a hot restart instruction, controlling a first refreshing program of the DDR memory to be closed, controlling a second refreshing program of the DDR memory to be opened, controlling the programmable logic device to set a first level state of a preset pin to be a preset state, and executing a shutdown program; the first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is high level or low level;
In the process of executing the starting program, if the starting program is detected to be executed to the initializing process of the DDR memory, a second level state of the preset pin is obtained, and after the second refreshing program is controlled to be closed according to the second level state, the initializing process of the DDR memory is executed, wherein the initializing process comprises the step of controlling the starting of the first refreshing program.
2. The method of claim 1, wherein controlling the first refresh program of the DDR memory to be turned off and controlling the second refresh program of the DDR memory to be turned on comprises:
And sending a control instruction to a controller, wherein the controller controls the first refresh function of the DDR memory to be closed and controls the second refresh function of the DDR memory to be opened according to the control instruction.
3. The method of claim 1, wherein the controlling the programmable logic device to execute the shutdown procedure after setting the first level state of the preset pin to the preset state comprises:
And sending a first instruction to the programmable logic device, wherein the first instruction is used for indicating the programmable logic device to start a timer, so that the programmable logic device sets the first level state of the preset pin to the preset state according to the set time of the timer, and then executes a closing program.
4. A method according to any one of claims 1-3, wherein said performing an initialization process of the DDR memory after said controlling the second refresh program to be turned off according to the second level state comprises:
If the second level state is the same as the preset state, the initialization process of the DDR memory is executed after the second refreshing function is controlled to be closed;
And if the second level state is different from the preset state, executing the initialization process of the DDR memory.
5. The method of claim 1, wherein the preset pins comprise a first preset pin and a second preset pin, the preset state comprises the first preset pin being high and the second preset pin being low.
6. The method of claim 1, wherein prior to receiving the hot restart instruction, the method further comprises:
Acquiring a detection data set, and sequentially writing the detection data set into a preset memory space in the DDR memory according to a random data set;
After the initialization process of the DDR memory is executed, the method further comprises: and reading a reference data set from the DDR memory, and determining whether data in the DDR memory is lost according to the detection data set and the reference data set.
7. The method of claim 6, wherein after the acquisition of the detection data set, the method further comprises: generating a check value of each detection data in the detection data set, and writing the check value into the preset memory space;
after the reading of the reference data set from the DDR memory, the method further comprises:
Generating a check value of each reference data in the reference data set;
and acquiring the check value of each detection data, and determining whether the data in the DDR memory is lost or not according to the check value of each detection data and the check value of the reference data.
8. A DDR data refresh control device, the device comprising:
The first processing module is used for controlling the closing of a first refreshing program of the DDR memory after receiving a hot restarting instruction, controlling the opening of a second refreshing program of the DDR memory, and executing a shutdown program after controlling the programmable logic device to set a first level state of a preset pin to a preset state; the first refreshing program is a data refreshing program based on hardware control, the second refreshing program is a data refreshing program based on software control, and the level state is used for indicating whether the preset pin is at a high level or a low level;
And the second processing module is used for acquiring a second level state of the preset pin when the starting program is detected to be executed to the initializing process of the DDR memory in the process of executing the starting program, and executing the initializing process of the DDR memory after controlling the second refreshing program to be closed according to the second level state, wherein the initializing process comprises the step of controlling the starting of the first refreshing program.
9. An electronic device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, implements the DDR data refresh control method of any one of claims 1 to 7.
10. A computer-readable storage medium, having stored thereon a computer program which, when executed by a processor, implements the DDR data refresh control method of any of claims 1 to 7.
CN202211390007.XA 2022-11-08 2022-11-08 DDR data refreshing control method, device, equipment and storage medium Pending CN118034574A (en)

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