CN117995770A - Method for forming semiconductor device - Google Patents
Method for forming semiconductor device Download PDFInfo
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- CN117995770A CN117995770A CN202410205275.2A CN202410205275A CN117995770A CN 117995770 A CN117995770 A CN 117995770A CN 202410205275 A CN202410205275 A CN 202410205275A CN 117995770 A CN117995770 A CN 117995770A
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- 238000000034 method Methods 0.000 title claims abstract description 40
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 239000002184 metal Substances 0.000 claims abstract description 131
- 229910052751 metal Inorganic materials 0.000 claims abstract description 131
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 238000005530 etching Methods 0.000 claims abstract description 10
- 239000007769 metal material Substances 0.000 claims description 9
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 7
- 229910052721 tungsten Inorganic materials 0.000 claims description 7
- 239000010937 tungsten Substances 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 140
- 239000011229 interlayer Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention provides a method for forming a semiconductor device, which comprises the following steps: forming a partial structure of a control circuit on a substrate of the DC area, and forming a partial structure of a radio frequency switch on a substrate of the RF area; forming a first dielectric layer to cover part of the structure of the control circuit and part of the structure of the radio frequency switch; forming a through hole structure in the first dielectric layer; forming a metal layer on the surface of the first dielectric layer, wherein the metal layer comprises a plurality of metal wires, the surface of the first dielectric layer is exposed among the metal wires, and the distance between adjacent metal wires in the DC area is smaller than that between adjacent metal wires in the RF area; forming a second dielectric layer to cover the metal layer and the first dielectric layer; etching the second dielectric layer with partial depth, wherein the first dielectric layer with partial thickness between the metal wires in the RF region is etched; and forming a third dielectric layer, wherein the third dielectric layer covers the metal layers, and an air gap is formed in the third dielectric layer between the metal wires in the RF region.
Description
Technical Field
The present invention relates to the field of semiconductor technology, and in particular, to a method for forming a semiconductor device.
Background
In the rf front-end circuit, an rf switch is one of indispensable elements. The radio frequency switch may be used to electrically connect the antenna to either the transmit path or the receive path of the RF system, allowing multiple components to access the antenna. Typically, the radio frequency switch may be composed of a stacked configuration of a plurality of transistors, such as Field Effect Transistors (FETs). In addition, a control circuit is arranged at the periphery of the radio frequency switch, and is used for providing some peripheral control circuits for the radio frequency switch, such as power supply. In the formation of the semiconductor device, some structures of the control circuit and some structures of the radio frequency switch are formed in the DC region and the RF region, respectively. And forming an interlayer dielectric layer above the two layers, forming a contact hole in the interlayer dielectric layer, and forming a metal layer on the interlayer dielectric layer, wherein the metal layer comprises a plurality of metal wires. The contact holes link the metal wires with the radio frequency switch and the control circuit respectively.
The rf switch requires an air gap in the dielectric layer to improve the parasitic capacitance between the metal lines. While the wiring of the control circuit is more complex and the footprint is smaller, resulting in smaller and narrower dimensions for the metal lines. Typically, a minimum rule of 0.19um is used. The formation of the air gap by the same process may lead to exposure of the contact hole from the air gap, and may even result in loss of tungsten metal in the contact hole, affecting device performance.
Disclosure of Invention
The invention aims to provide a method for forming a semiconductor device, which can not form an air gap in an interlayer dielectric layer of a DC region, so that the condition that a contact hole is exposed from the air gap is avoided, the condition that tungsten metal in the contact hole is lost is avoided, and good radio frequency performance is ensured while the process reliability is improved.
In order to achieve the above object, the present invention provides a method for forming a semiconductor device, comprising:
providing a substrate, dividing the substrate into a DC area and an RF area, wherein the DC area is used for forming a control circuit of a radio frequency switch, and the RF area is used for forming the radio frequency switch;
Forming a partial structure of a control circuit on a substrate of the DC area, forming a partial structure of a radio frequency switch on a substrate of the RF area, and exposing the surface of the substrate between the partial structure of the control circuit and the partial structure of the radio frequency switch;
forming a first dielectric layer, wherein the first dielectric layer covers the surface of the substrate, part of the structure of the control circuit and part of the structure of the radio frequency switch;
Forming a through hole structure in the first dielectric layer;
Forming a metal layer on the surface of the first dielectric layer, wherein the metal layer comprises a plurality of metal wires, the surface of the first dielectric layer is exposed among the metal wires, and the distance between adjacent metal wires in the DC area is smaller than that between adjacent metal wires in the RF area;
Forming a second dielectric layer, wherein the second dielectric layer covers the metal layer and the first dielectric layer;
etching a part of the second dielectric layer to expose the surface of the metal wires, wherein the first dielectric layer with a part of thickness between the metal wires in the RF region is etched;
And forming a third dielectric layer, wherein the third dielectric layer covers the metal layers, fills gaps between the metal lines, and forms air gaps in the third dielectric layer between the metal lines in the RF region.
Optionally, in the method for forming a semiconductor device, the substrate includes a wafer.
Optionally, in the method for forming a semiconductor device, the first dielectric layer, the second dielectric layer and the third dielectric layer each include an oxide.
Optionally, in the method for forming a semiconductor device, a portion of the control circuit includes a first gate structure.
Optionally, in the method for forming a semiconductor device, a portion of the structure of the radio frequency switch includes a second gate structure.
Optionally, in the method for forming a semiconductor device, the method for forming a via structure in the first dielectric layer includes:
Etching the first dielectric layer, forming a plurality of through holes in the first dielectric layer, wherein part of structures of the control circuit and part of structures of the radio frequency switch are respectively exposed in the through holes;
And filling metal into the through hole to form a through hole structure.
Optionally, in the method for forming a semiconductor device, the metal material is tungsten metal.
Optionally, in the method for forming a semiconductor device, the method for forming a metal layer on the surface of the first dielectric layer includes:
depositing a metal material layer on the surface of the first dielectric layer;
And etching the metal material layer to form a plurality of metal wires.
Optionally, in the method for forming a semiconductor device, a line width of the metal line located in the DC region is smaller than a line width of the metal line located in the RF region.
Optionally, in the method for forming a semiconductor device, a second dielectric layer is formed, the second dielectric layer covers the metal layer and the first dielectric layer, and the second dielectric layer is recessed between the metal lines.
The method for forming the semiconductor device provided by the invention comprises the following steps: providing a substrate, dividing the substrate into a DC area and an RF area which are adjacent, wherein the DC area is used for forming a control circuit of a radio frequency switch, and the RF area is used for forming the radio frequency switch; forming a partial structure of a control circuit on a substrate of the DC area, forming a partial structure of a radio frequency switch on a substrate of the RF area, and exposing the surface of the substrate between the partial structure of the control circuit and the partial structure of the radio frequency switch; forming a first dielectric layer, wherein the first dielectric layer covers the surface of the substrate, part of the structure of the control circuit and part of the structure of the radio frequency switch; forming a through hole structure in the first dielectric layer; forming a metal layer on the surface of the first dielectric layer, wherein the metal layer comprises a plurality of metal wires, the surface of the first dielectric layer is exposed among the metal wires, and the distance between adjacent metal wires in the DC area is smaller than that between adjacent metal wires in the RF area; forming a second dielectric layer, wherein the second dielectric layer covers the metal layer and the first dielectric layer; etching a part of the second dielectric layer to expose the surface of the metal wires, wherein the first dielectric layer with a partial thickness between the metal wires in the RF region is etched; a third dielectric layer is formed overlying the metal layers while filling gaps between the metal lines and an air gap is formed in the third dielectric layer between the metal lines in the RF region. The distance between the adjacent metal wires in the DC area is smaller than the distance between the adjacent metal wires in the RF area, so that an air gap is not formed in the first dielectric layer in the DC area, the condition that the contact hole is exposed from the air gap is avoided, the condition that tungsten metal in the contact hole is lost is avoided, and good radio frequency performance is ensured while the process reliability is improved.
Drawings
Fig. 1 is a flowchart of a method of forming a semiconductor device according to an embodiment of the present invention;
Fig. 2 is a schematic view of a semiconductor device after forming a metal layer according to an embodiment of the present invention;
fig. 3 is a schematic view of a semiconductor device after forming a metal layer according to an embodiment of the present invention;
fig. 4 is a schematic view of a semiconductor device after forming a metal layer according to an embodiment of the present invention;
fig. 5 is a schematic view of a semiconductor device after forming a metal layer according to an embodiment of the present invention;
In the figure: 110-substrate, 110A-DC region, 110B-RF region, 120-first gate structure, 130-second gate structure, 140-first dielectric layer, 150-via structure, 160-metal line, 170-second dielectric layer, 180-third dielectric layer, 190-air gap.
Detailed Description
Specific embodiments of the present invention will be described in more detail below with reference to the drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
In the following, the terms "first," "second," and the like are used to distinguish between similar elements and are not necessarily used to describe a particular order or chronological order. It is to be understood that such terms so used are interchangeable under appropriate circumstances. Similarly, if a method described herein comprises a series of steps, and the order of the steps presented herein is not necessarily the only order in which the steps may be performed, and some of the described steps may be omitted and/or some other steps not described herein may be added to the method.
Also, it will be understood that when a layer (or film), region, pattern, or structure is referred to as being "on" a substrate, layer (or film), region, and/or pattern, it can be directly on another layer or substrate, and/or intervening layers may also be present. In addition, it will be understood that when a layer is referred to as being "under" another layer, it can be directly under the other layer and/or one or more intervening layers may also be present. In addition, references to "upper" and "lower" on the respective layers may be made based on the drawings.
Referring to fig. 1, the present invention provides a method for forming a semiconductor device, including:
S11: providing a substrate, dividing the substrate into a DC area and an RF area, wherein the DC area is used for forming a control circuit of a radio frequency switch, and the RF area is used for forming the radio frequency switch;
S12: forming a partial structure of a control circuit on a substrate of the DC area, forming a partial structure of a radio frequency switch on a substrate of the RF area, and exposing the surface of the substrate between the partial structure of the control circuit and the partial structure of the radio frequency switch;
s13: forming a first dielectric layer, wherein the first dielectric layer covers the surface of the substrate, part of the structure of the control circuit and part of the structure of the radio frequency switch;
s14: forming a through hole structure in the first dielectric layer;
S15: forming a metal layer on the surface of the first dielectric layer, wherein the metal layer comprises a plurality of metal wires, the surface of the first dielectric layer is exposed among the metal wires, and the distance between adjacent metal wires in the DC area is smaller than that between adjacent metal wires in the RF area;
s16: forming a second dielectric layer, wherein the second dielectric layer covers the metal layer and the first dielectric layer;
S17: etching a part of the second dielectric layer to expose the surface of the metal wires, wherein the first dielectric layer with a part of thickness between the metal wires in the RF region is etched;
S18: and forming a third dielectric layer, wherein the third dielectric layer covers the metal layers, fills gaps between the metal lines, and forms air gaps in the third dielectric layer between the metal lines in the RF region.
The specific forming method is as follows, referring to fig. 2, a substrate 110 is provided first, the substrate 110 includes a silicon substrate, and a wafer may be selected according to an embodiment of the present invention. The substrate 110 is divided into adjacent DC regions 110A and RF regions 110B, the DC regions 110A being used to form control circuitry for the radio frequency switch and the RF regions 110B being used to form the radio frequency switch. A partial structure of the control circuit is formed on the substrate 110 of the DC region 110A, a partial structure of the radio frequency switch is formed on the substrate 110 of the RF region 110B, and a surface of the substrate 110 is exposed between the partial structure of the control circuit and the partial structure of the radio frequency switch. Part of the structure of the control circuit includes a first gate structure 120. Part of the structure of the radio frequency switch includes a second gate structure 130. The specific structure of the first gate structure 120 and the second gate structure 130 is not described herein.
Next, referring to fig. 2, a first dielectric layer 140 is formed, where the first dielectric layer 140 covers the surface of the substrate 110, a part of the control circuit and a part of the radio frequency switch. The first dielectric layer 140 includes an oxide. A via structure 150 is formed within the first dielectric layer 140. The method for forming the through hole structure in the first dielectric layer comprises the following steps: the first dielectric layer 140 is etched, a plurality of through holes are formed in the first dielectric layer 140, and a part of the control circuit structure and a part of the radio frequency switch structure are respectively exposed in the plurality of through holes. The metal material is tungsten metal.
Next, referring to fig. 2, a metal layer is formed on the surface of the first dielectric layer 140, where the metal layer includes a plurality of metal lines 160, and the surface of the first dielectric layer 140 is exposed between the plurality of metal lines 160, and the spacing between adjacent metal lines 160 in the DC region 110A is smaller than the spacing between adjacent metal lines 160 in the RF region 110B. The method for forming the metal layer on the surface of the first dielectric layer 140 includes: depositing a metal material layer on the surface of the first dielectric layer 140; the metal material layer is etched to form a plurality of metal lines 160. The linewidth of the metal lines 160 located in the DC region 110A is smaller than the linewidth of the metal lines 160 located in the RF region 110B. The line width of the metal line 160 located in the DC region 110A is 0.19 microns. May be the smallest rule.
Next, referring to fig. 3, a second dielectric layer 170 is formed, and the second dielectric layer 170 includes an oxide. The second dielectric layer 170 covers the metal layer and the first dielectric layer 140. After the second dielectric layer 170 is formed, the second dielectric layer 170 is recessed between the metal lines 160 due to the shape of the metal lines 160, and the greater the distance between adjacent metal lines 160, the greater the depth of the recess. Referring to fig. 4, a portion of the second dielectric layer 170 is etched to expose the surface of the metal lines 160, and at this time, a portion of the first dielectric layer 140 is etched to have a thickness between the metal lines 160 in the RF region 110B. Since the pitch between adjacent metal lines 160 of the DC region 110A is relatively small, the recess depth and width are small, and the pitch between adjacent metal lines 160 of the RF region 110B is large, so the recess depth and width are large. The second dielectric layer 170 of the RF region 110B may be partially etched when the depths of the dielectric layers etched down in the DC region 110A and the RF region 110B are the same. The grooves formed between adjacent metal lines 160 of RF region 110B are deeper and larger.
Next, referring to fig. 5, a third dielectric layer 180 is formed, and the third dielectric layer 180 includes oxide. The third dielectric layer 180 covers the metal layers while filling the gaps between the metal lines 160. Because the recesses formed between adjacent metal lines 160 of RF region 110B are deeper and larger, an air gap 190 is formed in the third dielectric layer 180 between the metal lines 160 of RF region 110B. While the recesses formed between adjacent metal lines 160 of the DC region 110A are shallow and small so that they can be filled completely without air gaps. In this way, neither the performance of the RF region is affected nor the risk of exposing the air gap of the DC region to the via structure.
In summary, the method for forming a semiconductor device according to the embodiment of the present invention includes: providing a substrate, dividing the substrate into a DC area and an RF area which are adjacent, wherein the DC area is used for forming a control circuit of a radio frequency switch, and the RF area is used for forming the radio frequency switch; forming a partial structure of a control circuit on a substrate of the DC area, forming a partial structure of a radio frequency switch on a substrate of the RF area, and exposing the surface of the substrate between the partial structure of the control circuit and the partial structure of the radio frequency switch; forming a first dielectric layer, wherein the first dielectric layer covers the surface of the substrate, part of the structure of the control circuit and part of the structure of the radio frequency switch; forming a through hole structure in the first dielectric layer; forming a metal layer on the surface of the first dielectric layer, wherein the metal layer comprises a plurality of metal wires, the surface of the first dielectric layer is exposed among the metal wires, and the distance between adjacent metal wires in the DC area is smaller than that between adjacent metal wires in the RF area; forming a second dielectric layer, wherein the second dielectric layer covers the metal layer and the first dielectric layer; etching a part of the second dielectric layer to expose the surface of the metal wires, wherein the first dielectric layer with a partial thickness between the metal wires in the RF region is etched; a third dielectric layer is formed overlying the metal layers while filling gaps between the metal lines and an air gap is formed in the third dielectric layer between the metal lines in the RF region. The distance between the adjacent metal wires in the DC area is smaller than the distance between the adjacent metal wires in the RF area, so that an air gap is not formed in the first dielectric layer in the DC area, the condition that the contact hole is exposed from the air gap is avoided, the condition that tungsten metal in the contact hole is lost is avoided, and good radio frequency performance is ensured while the process reliability is improved.
The foregoing is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the invention without departing from the scope of the technical solution of the invention, and the technical solution of the invention is not departing from the scope of the invention.
Claims (10)
1. A method of forming a semiconductor device, comprising:
providing a substrate, dividing the substrate into a DC area and an RF area, wherein the DC area is used for forming a control circuit of a radio frequency switch, and the RF area is used for forming the radio frequency switch;
Forming a partial structure of a control circuit on a substrate of the DC area, forming a partial structure of a radio frequency switch on a substrate of the RF area, and exposing the surface of the substrate between the partial structure of the control circuit and the partial structure of the radio frequency switch;
forming a first dielectric layer, wherein the first dielectric layer covers the surface of the substrate, part of the structure of the control circuit and part of the structure of the radio frequency switch;
Forming a through hole structure in the first dielectric layer;
Forming a metal layer on the surface of the first dielectric layer, wherein the metal layer comprises a plurality of metal wires, the surface of the first dielectric layer is exposed among the metal wires, and the distance between adjacent metal wires in the DC area is smaller than that between adjacent metal wires in the RF area;
Forming a second dielectric layer, wherein the second dielectric layer covers the metal layer and the first dielectric layer;
etching a part of the second dielectric layer to expose the surface of the metal wires, wherein the first dielectric layer with a part of thickness between the metal wires in the RF region is etched;
And forming a third dielectric layer, wherein the third dielectric layer covers the metal layers, fills gaps between the metal lines, and forms air gaps in the third dielectric layer between the metal lines in the RF region.
2. The method of forming a semiconductor device of claim 1, wherein the substrate comprises a wafer.
3. The method of forming a semiconductor device of claim 1, wherein the first dielectric layer, the second dielectric layer, and the third dielectric layer each comprise an oxide.
4. The method of forming a semiconductor device according to claim 1, wherein the partial structure of the control circuit includes a first gate structure.
5. The method of forming a semiconductor device of claim 1, wherein the partial structure of the radio frequency switch comprises a second gate structure.
6. The method of forming a semiconductor device of claim 1, wherein forming a via structure within the first dielectric layer comprises:
Etching the first dielectric layer, forming a plurality of through holes in the first dielectric layer, wherein part of structures of the control circuit and part of structures of the radio frequency switch are respectively exposed in the through holes;
And filling metal into the through hole to form a through hole structure.
7. The method of forming a semiconductor device according to claim 6, wherein the metal material is tungsten metal.
8. The method of forming a semiconductor device of claim 1, wherein forming a metal layer on a surface of the first dielectric layer comprises:
depositing a metal material layer on the surface of the first dielectric layer;
And etching the metal material layer to form a plurality of metal wires.
9. The method of forming a semiconductor device according to claim 1, wherein a line width of a metal line located in the DC region is smaller than a line width of a metal line located in the RF region.
10. The method of forming a semiconductor device of claim 1, wherein a second dielectric layer is formed, the second dielectric layer covering the metal layer and the first dielectric layer, the second dielectric layer being recessed down between metal lines.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410205275.2A CN117995770A (en) | 2024-02-23 | 2024-02-23 | Method for forming semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410205275.2A CN117995770A (en) | 2024-02-23 | 2024-02-23 | Method for forming semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117995770A true CN117995770A (en) | 2024-05-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410205275.2A Pending CN117995770A (en) | 2024-02-23 | 2024-02-23 | Method for forming semiconductor device |
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|---|---|
| CN (1) | CN117995770A (en) |
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- 2024-02-23 CN CN202410205275.2A patent/CN117995770A/en active Pending
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