CN117992375A - Interrupt address allocation method, device and storage medium - Google Patents
Interrupt address allocation method, device and storage medium Download PDFInfo
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Abstract
The application discloses an interrupt address allocation method, equipment and a storage medium, and relates to the technical field of computers, wherein the method comprises the following steps: the borrowing equipment intercepts an interrupt address application request; the borrowing device applies for a request according to the interrupt address, and the interrupt address allocated to the first virtual device is a first address; the borrowing equipment establishes a first mapping relation between the first address and a second address in the non-transparent bridge; the borrowing device sends an interrupt address setting message to the lending device; the lending device sets the interrupt address of the first real device as the second address according to the interrupt address setting message. The method can reduce the abnormal interruption condition.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a method, an apparatus, and a storage medium for allocating interrupt addresses.
Background
PCIe (Peripheral Component Interconnect Express) is a high speed serial computer expansion bus standard. With the rapid development of PCIe technology and the continuous growth of large data transmission demands for computer peripherals in recent years, device manufacturers have become mainstream to produce peripheral devices at high speed using PCIe standards, for example, PCIe devices include an image processing unit (Graphics Processing Unit, GPU) and a data processing unit (Data Processing Unit, DPU), etc.
Interrupts are a way for peripherals to notify the CPU, and PCIe devices currently support the Message Signaled Interrupt (MSI) mechanism, as well as the MSI-X mechanism. According to the PCIe specification, when an interrupt request occurs, the PCIe device generates a task of writing interrupt data, initiates a memory write request to an interrupt address in a fixed packet format, and enters interrupt processing after the CPU recognizes the memory write request.
However, in the scenario that the PCIe device is lent to the remote host, when an interrupt request occurs, the lent PCIe device initiates a memory write request at the interrupt address of the source host, and the CPU of the remote host cannot learn the memory write request, thereby causing an interrupt exception.
Disclosure of Invention
The application provides an interrupt address allocation method, an interrupt address allocation device and a storage medium, which can reduce interrupt abnormality.
In order to achieve the above purpose, the application adopts the following technical scheme:
in a first aspect, the present application provides a method for allocating an interrupt address, which is applied to a borrowing device, where the borrowing device is connected to a lending device through a non-transparent bridge, and a first virtual device corresponding to the lending device is created on the borrowing device, where the method includes:
Intercepting an interrupt address application request;
According to the interrupt address application request, the interrupt address allocated to the first virtual device is a first address;
And establishing a first mapping relation between the first address and a second address in the non-transparent bridge, and sending an interrupt address setting message to the lending device, wherein the interrupt address setting message is used for indicating the lending device to set the interrupt address of the first real device corresponding to the first virtual device as the second address.
In some possible implementations, the interrupt address application request carries a first identifier of an application device; the intercepting the interrupt address application request includes:
And if the first identifier characterizes the application device as a first virtual device corresponding to the lending device, intercepting an interrupt address application request generated by the first virtual device.
In some possible implementations, the method further includes:
And if the first identifier represents that the application device is a second real device corresponding to the borrowing device, according to the interrupt address application request, the interrupt address allocated to the second real device is a third address.
In some possible implementations, the allocating, according to the interrupt address application request, the interrupt address of the first virtual device to the first virtual device is a first address, including:
Acquiring hardware information of a first real device corresponding to the first virtual device and window address information of the non-transparent bridge according to the interrupt address application request;
and setting the interrupt address of the first virtual device as the first address according to the hardware information of the first real device and the window address information.
In some possible implementations, the interrupt address application request is generated when the borrowing device emulates the first virtual device as being in place.
In a second aspect, the present application provides a method for allocating an interrupt address, which is applied to a lending device, where the lending device is connected to a lending device through a non-transparent bridge, and a first virtual device corresponding to the lending device is created on the lending device, where the method includes:
Receiving an interrupt address setting message sent by the borrowing equipment;
according to the interrupt address equipment message, setting the interrupt address of the first real equipment corresponding to the first virtual equipment as a second address of the non-transparent bridge, wherein the second address and the first address have a first mapping relation, and the first address is the interrupt address of the first virtual equipment in the borrowing equipment.
In a third aspect, the present application provides a borrowing device, where the borrowing device is connected to a lending device through a non-transparent bridge, and a first virtual device corresponding to the lending device is created on the borrowing device, where the borrowing device includes:
the interception module is used for intercepting an interrupt address application request;
The first allocation module is used for allocating an interrupt address of the first virtual device to be a first address according to the interrupt address application request; establishing a first mapping relation between the first address and a second address in the non-transparent bridge;
The first communication module is used for sending an interrupt address setting message to the lending device, and the interrupt address setting message is used for indicating the lending device to set the interrupt address of the first real device corresponding to the first virtual device as the second address.
In some possible implementations, the interrupt address application request carries a first identifier of an application device;
The interception module is specifically configured to intercept an interrupt address application request generated by the first virtual device if the first identifier characterizes that the application device is the first virtual device corresponding to the lending device.
In some possible implementations, the interception module is further configured to, if the first identifier characterizes that the applying device is a second real device corresponding to the borrowing device, apply for a request according to the interrupt address, and assign, to the second real device, the interrupt address to be a third address.
In some possible implementation manners, the first allocation module is specifically configured to obtain, according to the interrupt address application request, hardware information of a first real device corresponding to the first virtual device and window address information of the non-transparent bridge; and setting the interrupt address of the first virtual device as the first address according to the hardware information of the first real device and the window address information.
In some possible implementations, the interrupt address application request is generated when the borrowing device emulates the first virtual device as being in place.
In a fourth aspect, the present application provides a lending device, where the lending device is connected to a borrowing device through a non-transparent bridge, and a first virtual device corresponding to the lending device is created on the borrowing device, where the lending device includes:
the second communication module is used for receiving the interrupt address setting message sent by the borrowing equipment;
The second allocation module is configured to set, according to the interrupt address device message, an interrupt address of a first real device corresponding to the first virtual device as a second address of the non-transparent bridge, where the second address has a first mapping relationship with a first address, and the first address is an interrupt address of the first virtual device at the borrowing device.
In a fifth aspect, the present application provides a computing device comprising a memory and a processor;
Wherein one or more computer programs are stored in the memory, the one or more computer programs comprising instructions; the instructions, when executed by the processor, cause the computing device to perform the method of any of the first or second aspects.
In a sixth aspect, the present application provides a computer readable storage medium for storing a computer program for performing the method of any one of the first or second aspects.
According to the technical scheme, the application has at least the following beneficial effects:
in the application, borrowing equipment is connected with borrowing equipment through a non-transparent bridge, first virtual equipment corresponding to the borrowing equipment is created on the borrowing equipment, and the borrowing equipment firstly intercepts an interrupt address application request generated by the first virtual equipment; then, according to the interrupt address application request, the interrupt address allocated to the first virtual device is a first address; and then, establishing a first mapping relation between the first address and a second address in the non-transparent bridge, sending an interrupt address setting message to the lending equipment, and setting the interrupt address of the first real equipment corresponding to the first virtual equipment as the second address based on the interrupt address setting message after the lending equipment receives the interrupt address setting message. After the configuration is completed, when the first real device of the borrowing device generates an interrupt request, a memory write request is initiated to a second address, the second address corresponds to the first address based on the first mapping relationship, and the first address is the interrupt address of the first virtual device of the borrowing device, that is, the first real device initiates the memory write request to the first address, so that the CPU of the borrowing device can identify the memory write request, and thus interrupt processing is entered. It can be seen that by this method, the occurrence of an interruption abnormality can be reduced.
It should be appreciated that the description of technical features, aspects, benefits or similar language in the present application does not imply that all of the features and advantages may be realized with any single embodiment. Conversely, it should be understood that the description of features or advantages is intended to include, in at least one embodiment, the particular features, aspects, or advantages. Therefore, the description of technical features, technical solutions or advantageous effects in this specification does not necessarily refer to the same embodiment. Furthermore, the technical features, technical solutions and advantageous effects described in the present embodiment may also be combined in any appropriate manner. Those of skill in the art will appreciate that an embodiment may be implemented without one or more particular features, aspects, or benefits of a particular embodiment. In other embodiments, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments.
Drawings
Fig. 1 is a schematic diagram of an application scenario provided in an embodiment of the present application;
fig. 2 is a schematic diagram of another application scenario provided in an embodiment of the present application;
FIG. 3 is a flowchart of a method for allocating interrupt addresses according to an embodiment of the present application;
FIG. 4 is a flowchart of another method for allocating interrupt addresses according to an embodiment of the present application;
fig. 5 is a schematic view of a borrowing device according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a lending device according to an embodiment of the application;
Fig. 7 is a schematic diagram of a computing device according to an embodiment of the present application.
Detailed Description
The terms "first," "second," and "third," and the like, in the description and in the drawings, are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order.
In embodiments of the application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment should not be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
For clarity and conciseness in the description of the following embodiments, a brief description of the related art will be given first:
MSI is an interrupt mechanism of PCIe device, when the PCIe device needs to generate interrupt, PCIe device will initiate memory write request to interrupt address, after CPU of computer inserted with PCIe device recognizes the memory write request, it will enter interrupt process.
Non-transparent bridges (Non-TRANSPARENT BRIDGE, NTBs) are a special class of PCIe devices, and typically, different computer hosts have independent PCIe domains, and communication between different PCIe domains is not possible. The main function of the NTB is to perform address conversion between different PCIe domains and provide a channel for communication between the different PCIe domains. Both computers with different PCIe domains may share PCIe devices through the NTB.
As shown in fig. 1, the diagram is a schematic diagram of an application scenario provided in an embodiment of the present application, in the application scenario, a borrowing device 110 includes a first CPU 111, a borrowing device 120 includes a second CPU 121 and a PCIe device 122, and the borrowing device 110 and the borrowing device 120 are connected through an NTB 130. If the interrupt address of the PCIe device 122 is not configured correctly, the PCIe device 120 initiates a memory write request to the interrupt address corresponding to the PCIe device 122, and since the interrupt address of the PCIe device 122 is not configured correctly, that is, the interrupt address is an address allocated by the borrowing device 120 to the PCIe device 122, the second CPU 121 of the borrowing device 120 recognizes the memory write request initiated by the PCIe device 122, and thus enters interrupt processing.
It can be seen that, in the scenario where PCIe devices 122 are shared, if the interrupt address of PCIe device 122 is not properly configured, the first CPU 110 of borrowing device 110 cannot recognize the memory write request, which results in an interrupt exception.
In view of this, the embodiment of the present application provides a method for allocating an interrupt address, which may be executed by a borrowing device, or may be executed by a borrowing device and a borrowing device in cooperation, and the present application is not particularly limited to the execution body of the method.
Specifically, in the method, the borrowing device is connected with the lending device through a non-transparent bridge, and a first virtual device corresponding to the lending device is created on the borrowing device, and the method includes: the borrowing device intercepts an interrupt address application request generated by the first virtual device, allocates an interrupt address to the first virtual device according to the interrupt address application request, for example, allocates the interrupt address to the first virtual device as a first address, establishes a first mapping relation between the first address and a second address in the non-transparent bridge, and sends an interrupt address setting message to the borrowing device. And after the lending device receives the interrupt address setting message, setting the interrupt address of the first real device corresponding to the first virtual device as a second address.
After the configuration is completed, when the first real device of the borrowing device generates an interrupt request, a memory write request is initiated to a second address, the second address corresponds to the first address based on the first mapping relationship, and the first address is the interrupt address of the first virtual device of the borrowing device, that is, the first real device initiates the memory write request to the first address, so that the CPU of the borrowing device can identify the memory write request, and thus interrupt processing is entered. It can be seen that by this method, the occurrence of an interruption abnormality can be reduced.
In order to make the technical solution of the present application clearer and easier to understand, an application scenario of an embodiment of the present application is described below, as shown in fig. 2, where the diagram is a schematic diagram of another application scenario provided by an embodiment of the present application, in the application scenario, in a process that PCIe devices 122 of a lending device 120 are shared to use by a lending device 110, the lending device 110 may locally create a virtual device 112 corresponding to the PCIe devices 122, where the PCIe devices 122 may be first real devices, the virtual device 121 may be first virtual devices, after the virtual device 112 completes creation, the lending device 110 may also simulate an in-place signal of the virtual device 112, so as to trigger the virtual device 112 to generate an interrupt address application request, after the lending device 110 intercepts the interrupt address application request, configure an interrupt address for the virtual device 112 as a first address, and establish a first mapping relationship between the first address and a second address in the NTB 130, where the first mapping relationship may be stored in a first interrupt signal table 113, and the lending device 120 sends an interrupt address setting message. Upon receiving the interrupt address setting message, the lending device 120 sets the interrupt address of the PCIe device 122 to a second address in the NTB 130.
In this application scenario, when the PCIe device 122 generates the interrupt request, a memory write request is initiated to the second address, and the second address and the first address have a mapping relationship, that is, the memory write request is initiated to the first address, so that the first CPU 111 of the borrowing device 110 can identify the memory write request and enter the interrupt process. Thus, after the interrupt address of the PCIe device is correctly configured, the occurrence of interrupt exceptions can be reduced.
In order to make the technical solution of the present application clearer and easier to understand, the following describes a method for allocating interrupt addresses according to an embodiment of the present application in terms of cooperative execution of a borrowing device and a lending device, as shown in fig. 3, which is a flowchart of a method for allocating interrupt addresses according to an embodiment of the present application. The method comprises the following steps:
S301, the borrowing equipment intercepts an interrupt address application request.
The interrupt address application request refers to a request for applying an interrupt address in order to subsequently initiate a memory write request to the interrupt address, so as to be recognized by the CPU to generate an interrupt.
In the embodiment of the present application, the borrowing device and the lending device are connected through a non-transparent bridge, that is, the PCIe device on the lending device, that is, the first real device is plugged into the PCIe card slot of the lending device, the lending device loads the device driver of the first real device, creates a Virtual Function (VF), and then shares the VF to the borrowing device through the NTB.
The borrowing device creates a first virtual device for the VF, where the first virtual device corresponds to the first real device, the borrowing device may also simulate an action of inserting the first virtual device into a PCIe card slot of the borrowing device, that is, simulate an in-place signal of the first virtual device, and then a linux of the borrowing device will load a device driver of the first virtual device, where the first virtual device may generate an interrupt address application request to allocate an interrupt address to the first virtual device, and the borrowing device may intercept the interrupt address application request.
In some embodiments, the interrupt address application request carries a first identifier of an application device, and if the first identifier characterizes that the application device is a first virtual device corresponding to a lending device, the interrupt address application request generated by the first virtual device is intercepted.
S302, the borrowing device applies for a request according to the interrupt address, and the interrupt address allocated to the first virtual device is the first address.
After intercepting the interrupt address application request, the borrowing device allocates an interrupt address to the first virtual device, for example, allocates a first address to the first virtual device as the interrupt address of the first virtual device.
In some embodiments, the borrowing device may obtain, according to the interrupt address application request, hardware information of a first real device corresponding to the first virtual device and window address information of a non-transparent bridge, and then use the interrupt address device of the first virtual device as the first address based on the hardware information of the first real device and the window address information of the non-transparent bridge. In some examples, the borrowing device may perform comprehensive research and judgment based on the hardware information of the NTB, the window address information of the NTB, the hardware information of the first real device, the hardware architecture information of the lending device, the operating system information of the lending device, and the like, to calculate the interrupt address of the first virtual device.
In some embodiments, if the first identification of the requesting device characterizes that the requesting device is not a virtual device, but is a real device (e.g., a second real device) local to the borrowing device, then the interrupt address is assigned according to a normal flow. For example, upon determining that the interrupt address application request is initiated by the second real device, the borrowing device assigns the interrupt address to the second real device as the third address.
S303, the borrowing device establishes a first mapping relation between the first address and a second address in the non-transparent bridge.
After allocating the interrupt address to the first virtual device as the first address, the borrowing device may establish a first mapping relationship between the first address and the second address in the non-transparent bridge, and then store the first mapping relationship in a first interrupt signal table of the borrowing device. So that the first real device corresponding to the first virtual device generates an interrupt request.
S304, the borrowing equipment sends an interrupt address setting message to the lending equipment.
The interrupt address setting message is used for indicating that the interrupt address of the lending device to the first real device corresponding to the first virtual device is set as a second address in the non-transparent bridge.
After the borrowing device establishes the mapping relation between the first address and the second address, the borrowing device may send the interrupt address device message to the borrowing device, so as to ensure that the interrupt request generated by the first real device can be identified by the CPU of the borrowing device, and thus, interrupt processing is entered.
S305, the lending device sets the interrupt address of the first real device as the second address according to the interrupt address setting message.
After the lending device receives the interrupt address setting message, the interrupt address of the first real device may be set to a second address in the non-transparent bridge based on the interrupt address setting message.
After the borrowing device configures the first mapping relation between the first address and the second address and the borrowing device configures the interrupt address of the first real device, the first real device may send the interrupt request to the borrowing device, so as to normally enter the interrupt.
When the first real device generates the interrupt request, the borrowing device sets the interrupt address of the first real device to be a second address in the non-transparent bridge, so that the first real device may initiate a memory write request to the second address, however, the second address and the first address have a first mapping relationship, and further the first address is converted into initiating the memory write request to the first address, at this time, the CPU of the borrowing device can identify the memory write request, and thus interrupt processing is performed. It can be seen that by this method, the occurrence of an interruption abnormality can be reduced.
For ease of understanding, the process of assigning an interrupt address to a borrowing device is described below with reference to the accompanying drawings. Fig. 4 is a flowchart of another interrupt address allocation method according to an embodiment of the present application. The method comprises the following steps:
s401, the allocation algorithm unit sends an address area request to the NTB.
In some embodiments, upon system initialization of the borrowing device, the allocation algorithm unit first sends an address field request to the NTB, which is used to request an address field from the NTB to facilitate configuration of subsequent interrupt addresses.
S402, the NTB allocates the address area to the allocation algorithm unit according to the address area request.
After the NTB receives the address area request, a section of address area is allocated to the allocation algorithm unit.
S403, the first virtual device sends an interrupt address application request to the interrupt initializing unit.
The first virtual device may send an interrupt address application request to the interrupt initializing unit, where the interrupt initializing unit may determine from which device the interrupt address application request originates, and if it is a virtual device, forward the interrupt address application request to the allocation algorithm unit, and if it is a real device, normally allocate the interrupt address.
S404, the interrupt initializing unit forwards the interrupt address application request to the allocation algorithm unit.
And when the interrupt initializing unit determines that the interrupt address application request is from the virtual device, the interrupt address application request is sent to the allocation algorithm unit.
S405, the allocation algorithm unit forwards the first address to the interrupt initializing unit.
The allocation algorithm unit determines the interrupt address of the first virtual device as a first address based on the interrupt address application request, and forwards the first address to the interrupt initializing unit.
S406, the interrupt initializing unit generates an interrupt address setting message according to the first address.
After receiving the first address, the interrupt initializing unit may establish a mapping relationship between the first address and a second address, where the second address is an address in the non-transparent bridge (for example, an address in the allocated address area, and send an interrupt address device message back to the lending device, so as to set the interrupt address of the first real device as the second address.
In the method, a custom allocation algorithm is inserted into a kernel in a linux kernel mode. The kernel does two things when it is initialized. Firstly, initializing internal parameters, for example, communicating with NTB to obtain window address information of the NTB; reading current software and hardware information (such as hardware architecture, internal version, etc.); configuration information (e.g., detailed configuration of devices to be shared, etc.) is obtained. Secondly, the interrupt initializing function of the kernel is intercepted in a hook mode, so that interrupt address allocation behavior is changed. The modified kernel needs to be started earlier than PCIe equipment, so that abnormality caused by imperfect starting is avoided.
For PCIe devices that support Single Root I/O virtualization (SR-IOV), the loan device creates a large number of Virtual Functions (VFs) for flexible loans. After the VF is borrowed to the borrowing device, the borrowing device's NTB creates a virtual device for it and triggers the virtual device's driver loading process. In the process of driving loading, the system flow is changed in a mode of intercepting related functions of a linux kernel.
The driver of the virtual device initiates an interrupt address application request to the system in the loading stage, and at the moment, the interrupt initialization unit intercepts the interrupt address application request and forwards the interrupt address application request to the allocation algorithm unit. The allocation algorithm unit will be based on the parameters obtained before: the method comprises the steps of calculating an interrupt address of a first virtual device by using hardware information of NTB, window address information of NTB, hardware information of a first real device, hardware architecture information of borrowing equipment, operating system information of borrowing equipment and the like, and returning the interrupt address to the first virtual device.
Finally, the first virtual device is driven by the NTB channel. When the hardware of the host running of the lending device triggers an interrupt, an interrupt request is initiated to the interrupt address returned before. The interrupt address is in the NTB mapping address range and is forwarded to the interrupt address of the borrowing end by the NTB according to the rule, and the actual interrupt request is triggered, so that interrupt processing is entered.
Based on the above description, the embodiment of the present application provides a method for allocating an interrupt address, where in the method, a borrowing device is connected with a borrowing device through a non-transparent bridge, a first virtual device corresponding to the borrowing device is created on the borrowing device, and the borrowing device first intercepts an interrupt address application request generated by the first virtual device; then, according to the interrupt address application request, the interrupt address allocated to the first virtual device is a first address; and then, establishing a first mapping relation between the first address and a second address in the non-transparent bridge, sending an interrupt address setting message to the lending equipment, and setting the interrupt address of the first real equipment corresponding to the first virtual equipment as the second address based on the interrupt address setting message after the lending equipment receives the interrupt address setting message. After the configuration is completed, when the first real device of the borrowing device generates an interrupt request, a memory write request is initiated to a second address, the second address corresponds to the first address based on the first mapping relationship, and the first address is the interrupt address of the first virtual device of the borrowing device, that is, the first real device initiates the memory write request to the first address, so that the CPU of the borrowing device can identify the memory write request, and thus interrupt processing is entered. It can be seen that by this method, the occurrence of an interruption abnormality can be reduced.
The foregoing details of the interrupt address allocation method provided by the embodiment of the present application are described with reference to fig. 1 to 4, and the apparatus and the storage medium provided by the embodiment of the present application are described with reference to the accompanying drawings.
As shown in fig. 5, which is a schematic diagram of a borrowing device provided in an embodiment of the present application, the borrowing device 110 is connected to the borrowing device through a non-transparent bridge, a first virtual device corresponding to the borrowing device is created on the borrowing device 110, and the borrowing device 110 includes:
an interception module 511, configured to intercept an interrupt address application request;
a first allocation module 512, configured to allocate, according to the interrupt address application request, an interrupt address allocated to the first virtual device as a first address; establishing a first mapping relation between the first address and a second address in the non-transparent bridge;
The first communication module 513 is configured to send an interrupt address setting message to the lending device, where the interrupt address setting message is used to instruct the lending device to set an interrupt address of a first real device corresponding to the first virtual device to the second address.
In some possible implementations, the interrupt address application request carries a first identifier of the application device;
the interception module 511 is specifically configured to intercept an interrupt address application request generated by the first virtual device if the first identifier characterizes the application device as the first virtual device corresponding to the lending device.
In some possible implementations, the interception module 511 is further configured to, if the first identifier characterizes that the application device is a second real device corresponding to the borrowing device, apply for a request according to the interrupt address, and assign, to the second real device, the interrupt address to be a third address.
In some possible implementations, the first allocation module 512 is specifically configured to obtain, according to the interrupt address application request, hardware information of a first real device corresponding to the first virtual device and window address information of the non-transparent bridge;
and setting the interrupt address of the first virtual device as the first address according to the hardware information of the first real device and the window address information.
In some possible implementations, the interrupt address application request is generated when the borrowing device emulates the first virtual device as being in place.
As shown in fig. 6, the present disclosure is a schematic diagram of a lending device provided by an embodiment of the present disclosure, where the lending device 120 is connected to a borrowing device through a non-transparent bridge, a first virtual device corresponding to the lending device is created on the borrowing device, and the lending device 120 includes:
a second communication module 621, configured to receive an interrupt address setting message sent by the borrowing device;
The second allocation module 622 is configured to set, according to the interrupt address device message, an interrupt address of a first real device corresponding to the first virtual device as a second address of the non-transparent bridge, where the second address has a first mapping relationship with a first address, and the first address is an interrupt address of the first virtual device at the borrowing device.
The borrowing apparatus or the lending apparatus according to the embodiments of the present application may correspond to performing the method described in the embodiments of the present application, and the above-mentioned other operations and/or functions of the respective modules/units of the borrowing apparatus or the lending apparatus are respectively for implementing the respective flows of the respective methods in the embodiments shown in fig. 3 or fig. 4, and are not described herein for brevity.
The embodiment of the application also provides a computing device. The computing device is specifically configured to implement the functionality of the borrowing device or the lending device in the embodiments shown in fig. 5 or 6.
As shown in fig. 7, which is a schematic diagram of a computing device according to an embodiment of the present application, as shown in fig. 7, a computing device 700 includes a bus 701, a processor 702, a communication interface 703, and a memory 704. Communication between processor 702, memory 704 and communication interface 703 is via bus 701.
Bus 701 may be a peripheral component interconnect standard (PERIPHERAL COMPONENT INTERCONNECT, PCI) bus or an extended industry standard architecture (extended industry standard architecture, EISA) bus, or the like. The buses may be divided into address buses, data buses, control buses, etc. For ease of illustration, only one thick line is shown in fig. 7, but not only one bus or one type of bus.
The processor 702 may be any one or more of a central processing unit (central processing unit, CPU), a graphics processor (graphics processing unit, GPU), a Microprocessor (MP), or a digital signal processor (DIGITAL SIGNAL processor, DSP).
The communication interface 703 is used for communication with the outside. For example, when the computing device 700 is the borrowing device 110 described above, the computing device 700 may send an interrupt address setting message to the borrowing device 120 via the communication interface 703; for another example, when the computing device 700 is the lending device 120 described above, the computing device 700 may receive the interrupt address setting message sent by the borrowing device 110 through the communication interface 703.
The memory 704 may include volatile memory (RAM), such as random access memory (random access memory). The memory 704 may also include a non-volatile memory (non-volatile memory), such as read-only memory (ROM), flash memory, a hard disk drive (HARD DISK DRIVE, HDD) or a solid state drive (SSD STATE DRIVE).
The memory 704 has stored therein executable code that the processor 702 executes to perform the interrupt address allocation method described previously.
In particular, in the case where the embodiment shown in fig. 5 or 6 is implemented, and each module or unit of the borrowing apparatus described in the embodiment of fig. 5 or the lending apparatus described in the embodiment of fig. 6 is implemented by software, software or program code required to perform the functions of each module/unit in fig. 5 or 6 may be partially or entirely stored in the memory 704. The processor 702 executes the program codes corresponding to the respective units stored in the memory 704, and executes the interrupt address allocation method described above.
The embodiment of the application also provides a computer readable storage medium. The computer readable storage medium may be any available medium that can be stored by a computing device or a data storage device such as a data center containing one or more available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk), etc. The computer readable storage medium includes instructions that instruct a computing device to perform the above-described interrupt address allocation method applied to a borrowing device or a lending device.
Embodiments of the present application also provide a computer program product comprising one or more computer instructions. When the computer instructions are loaded and executed on a computing device, the processes or functions in accordance with embodiments of the present application are fully or partially developed.
The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, or data center to another website, computer, or data center by a wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.).
The computer program product, when executed by a computer, performs any of the methods of interrupt address assignment described above. The computer program product may be a software installation package which may be downloaded and executed on a computer in case any of the methods of interrupt address assignment described above is required.
The descriptions of the processes or structures corresponding to the drawings have emphasis, and the descriptions of other processes or structures may be referred to for the parts of a certain process or structure that are not described in detail.
The foregoing is merely illustrative of specific embodiments of the present application, and the scope of the present application is not limited thereto, but any changes or substitutions within the technical scope of the present application should be covered by the scope of the present application.
Claims (10)
1. The method for allocating the interrupt address is characterized by being applied to borrowing equipment, wherein the borrowing equipment is connected with lending equipment through a non-transparent bridge, and a first virtual equipment corresponding to the lending equipment is created on the borrowing equipment, and the method comprises the following steps:
Intercepting an interrupt address application request;
According to the interrupt address application request, the interrupt address allocated to the first virtual device is a first address;
And establishing a first mapping relation between the first address and a second address in the non-transparent bridge, and sending an interrupt address setting message to the lending device, wherein the interrupt address setting message is used for indicating the lending device to set the interrupt address of the first real device corresponding to the first virtual device as the second address.
2. The method of claim 1, wherein the interrupt address application request carries a first identification of an application device; the intercepting the interrupt address application request includes:
And if the first identifier characterizes the application device as a first virtual device corresponding to the lending device, intercepting an interrupt address application request generated by the first virtual device.
3. The method according to claim 2, wherein the method further comprises:
And if the first identifier represents that the application device is a second real device corresponding to the borrowing device, according to the interrupt address application request, the interrupt address allocated to the second real device is a third address.
4. The method according to claim 1, wherein the interrupt address allocated to the first virtual device according to the interrupt address application request is a first address, comprising:
Acquiring hardware information of a first real device corresponding to the first virtual device and window address information of the non-transparent bridge according to the interrupt address application request;
and setting the interrupt address of the first virtual device as the first address according to the hardware information of the first real device and the window address information.
5. The method of claim 1 wherein the interrupt address application request is generated when simulating the first virtual device in place for the borrowing device.
6. The utility model provides an interrupt address allocation method, which is characterized in that the interrupt address allocation method is applied to lending equipment, the lending equipment is connected with lending equipment through a non-transparent bridge, a first virtual equipment corresponding to the lending equipment is created on the lending equipment, and the method comprises the following steps:
Receiving an interrupt address setting message sent by the borrowing equipment;
according to the interrupt address equipment message, setting the interrupt address of the first real equipment corresponding to the first virtual equipment as a second address of the non-transparent bridge, wherein the second address and the first address have a first mapping relation, and the first address is the interrupt address of the first virtual equipment in the borrowing equipment.
7. Borrowing equipment, characterized in that, borrowing equipment passes through non-transparent bridge and borrows out the equipment connection, borrowing equipment is last to be created borrowing the corresponding first virtual equipment of equipment, borrowing the equipment and include:
the interception module is used for intercepting an interrupt address application request;
The first allocation module is used for allocating an interrupt address of the first virtual device to be a first address according to the interrupt address application request; establishing a first mapping relation between the first address and a second address in the non-transparent bridge;
The first communication module is used for sending an interrupt address setting message to the lending device, and the interrupt address setting message is used for indicating the lending device to set the interrupt address of the first real device corresponding to the first virtual device as the second address.
8. Borrowing equipment, characterized in that, borrowing equipment is connected with borrowing equipment through non-transparent bridge, borrowing equipment is last to be created borrowing equipment corresponds first virtual equipment, borrowing equipment includes:
the second communication module is used for receiving the interrupt address setting message sent by the borrowing equipment;
The second allocation module is configured to set, according to the interrupt address device message, an interrupt address of a first real device corresponding to the first virtual device as a second address of the non-transparent bridge, where the second address has a first mapping relationship with a first address, and the first address is an interrupt address of the first virtual device at the borrowing device.
9. A computing device comprising a memory and a processor;
Wherein one or more computer programs are stored in the memory, the one or more computer programs comprising instructions; the instructions, when executed by the processor, cause the computing device to perform the method of any of claims 1 to 6.
10. A computer readable storage medium for storing a computer program for performing the method of any one of claims 1 to 6.
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| CN202410173122.4A CN117992375A (en) | 2024-02-07 | 2024-02-07 | Interrupt address allocation method, device and storage medium |
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| CN202410173122.4A CN117992375A (en) | 2024-02-07 | 2024-02-07 | Interrupt address allocation method, device and storage medium |
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