CN117978394A - Fault processing method and device - Google Patents

Fault processing method and device Download PDF

Info

Publication number
CN117978394A
CN117978394A CN202410245939.8A CN202410245939A CN117978394A CN 117978394 A CN117978394 A CN 117978394A CN 202410245939 A CN202410245939 A CN 202410245939A CN 117978394 A CN117978394 A CN 117978394A
Authority
CN
China
Prior art keywords
state
state machine
fault injection
detected
elliptical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202410245939.8A
Other languages
Chinese (zh)
Inventor
郭知样
师晓云
袁涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hunan Goke Microelectronics Co Ltd
Original Assignee
Hunan Goke Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hunan Goke Microelectronics Co Ltd filed Critical Hunan Goke Microelectronics Co Ltd
Priority to CN202410245939.8A priority Critical patent/CN117978394A/en
Publication of CN117978394A publication Critical patent/CN117978394A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The application discloses a fault processing method and equipment, which are applied to the technical field of data security, wherein the method comprises the following steps: performing fault injection detection; and when the fault injection is detected, restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected. Therefore, when fault injection is detected, the state of the target state machine can be timely restored to the latest state before fault injection, information which is useful for an attacker can be reduced in the process of being attacked, the defending capability of the password chip can be improved, and data leakage is reduced.

Description

Fault processing method and device
Technical Field
The present application relates to the field of data security technologies, and in particular, to a fault processing method and device.
Background
The fault injection attack is to change the intermediate state of the chip operation by changing some working conditions of the password chip, so as to lead the key to be cracked, thereby an attacker can obtain the ciphertext in the chip. In practice, a certain time still exists between the fault injection attack and the information output, and how to improve the defending capability of the password chip and reduce the data leakage in the period of buffering time is a problem to be solved urgently at present.
Disclosure of Invention
Accordingly, the present application aims to provide a fault processing method and device, which can improve the defending capability of a cryptographic chip and reduce data leakage.
In a first aspect, the present application discloses a fault handling method, including:
Performing fault injection detection;
And when the fault injection is detected, restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected.
Optionally, the performing fault injection detection includes:
Elliptical point data are obtained, elliptical point detection is carried out according to the elliptical point data, and whether state jump of the target state machine is normal or not is detected;
detecting fault injection when the elliptical dot data are not on a given elliptical curve or the state jump of the target state machine is abnormal;
When the elliptical dot data is on a given elliptical curve and the state jump of the target state machine is normal, no fault injection is detected.
Optionally, if the state jump of the target state machine is normal, the method further includes:
storing the state of the target state machine after the jump and the corresponding output value;
If the state jump of the target state machine is abnormal and the elliptic point data is on a given elliptic curve, the restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected includes:
Obtaining the latest output value stored before fault injection;
and restoring the state of the target state machine to the state corresponding to the latest output value according to the latest output value.
Optionally, the detecting whether the state jump of the target state machine is normal includes:
Performing exclusive OR or difference operation based on the state of the target state machine and the state of the opposite phase state machine corresponding to the target state machine to obtain a corresponding operation result;
If the operation result is a preset value, judging that the state jump of the target state machine is normal, otherwise, judging that the state jump of the target state machine is abnormal.
Optionally, if the ellipse data is on a given elliptic curve, the method further comprises:
Storing the elliptical point data and IP core control data corresponding to the elliptical point data;
If the ellipse point data is not on the given ellipse curve, the restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected includes:
acquiring IP core control data corresponding to the latest elliptical point data before fault injection is detected, and acquiring a first output value, wherein the first output value is an output value corresponding to the target state machine when the latest elliptical point data is stored;
And updating the IP core control data corresponding to the latest elliptic point data into the IP core, and recovering the state of the target state machine to the state corresponding to the first output value.
In a second aspect, the present application discloses a fault handling apparatus comprising:
a detection component for performing fault injection detection;
And the control component is used for restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected when the fault injection is detected.
Optionally, the detection assembly includes:
the state machine detection module is used for detecting whether the state jump of the target state machine is normal or not;
the elliptical dot detection module is used for acquiring elliptical dot data and executing elliptical dot detection according to the elliptical dot data;
Wherein fault injection is detected when the elliptical dot data is not on a given elliptical curve or the state jump of the target state machine is abnormal; when the elliptical dot data is on a given elliptical curve and the state jump of the target state machine is normal, no fault injection is detected.
Optionally, the method further comprises:
the ping-pong register is used for storing the state of the target state machine after the jump and the corresponding output value if the state of the target state machine is normal;
and the control component is further used for acquiring the latest output value stored before fault injection from the ping-pong register if the state jump of the target state machine is abnormal and the elliptic point data is on a given elliptic curve, and restoring the state of the target state machine to the state corresponding to the latest output value according to the latest output value.
Optionally, the method further comprises:
the state of the inversion state machine and the state of the target state machine with normal state jump are mutually inverted;
The state machine detection module is further used for performing exclusive OR or difference operation based on the state of the target state machine and the state of the reverse phase state machine to obtain a corresponding operation result;
And if the operation result is a preset value, judging that the state jump of the target state machine is normal, otherwise, judging that the state jump of the target state machine is abnormal.
Optionally, the method further comprises:
a shadow register, configured to store the elliptic point data and IP core control data corresponding to the elliptic point data if the elliptic point data is on a given elliptic curve;
The control component is configured to obtain, if the elliptic point data is not on the given elliptic curve, IP core control data corresponding to the latest elliptic point data before fault injection is detected from the shadow register, and obtain a first output value, where the first output value is an output value corresponding to the target state machine when the latest elliptic point data is stored; and updating the IP core control data corresponding to the latest elliptic point data into the IP core, and recovering the state of the target state machine to the state corresponding to the first output value.
According to the scheme, the application provides a fault processing method, and fault injection detection is performed; and when the fault injection is detected, restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected.
The beneficial effects of the application are as follows: when fault injection is detected, the state of the target state machine is restored to the latest state before fault injection in time before useful error information is output, so that useful information for an attacker can be reduced or even avoided in the process of being attacked, the defending capability of a password chip can be improved, and data leakage is reduced.
Correspondingly, the fault processing equipment provided by the application also has the technical effects.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a fault handling method according to an embodiment of the present application;
FIG. 2 is a flowchart of a specific fault handling method according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a state detection according to an embodiment of the present application;
FIG. 4 is a block diagram of a fault handling apparatus according to an embodiment of the present application;
fig. 5 is a schematic diagram of a fault handling apparatus according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The fault analysis method in the related art is mainly divided into two types, namely differential-based fault analysis, and the difference between the error ciphertext and the correct ciphertext caused by fault injection in the algorithm operation process is mainly analyzed on the premise of the same input. The differential fault attack method related to the differential fault analysis mainly attacks the input point and the intermediate state.
The other is to analyze the ciphertext by using the statistical characteristic difference between the correct ciphertext and the incorrect ciphertext. Further, when being attacked by a fault based on the missing operation, an attacker can analyze the ciphertext by utilizing the statistical characteristic difference between the correct ciphertext and the error ciphertext. The missing operation is mainly that the elliptic curve signature algorithm is executed for a few times in the dot multiplication operation execution process, and then a partial key is obtained by analyzing a fault signature, and finally a complete key is obtained by combining attack. The fault injection can be performed by controlling the state of the state machine or the process variable operated by the whole algorithm, so that the operation jump is realized, and the leakage operation is completed.
Whether it is fault attack based on the missing operation or differential fault attack poses a great threat to data security. Therefore, the related art incorporates the fault attack mode into the fault processing or fault defense mechanism, but the current fault defense scheme has a defect that after the fault injection attack is detected, the operation flow is difficult to continue to be maintained, and in practice, a certain key or ciphertext analysis time still exists between the fault injection attack and the key cracking, and the current fault defense scheme still has data leakage, so that the defense capability of the password chip is weakened.
In order to solve the technical problems, the embodiment of the application provides a fault processing method and equipment.
Referring to fig. 1, an embodiment of the present application discloses a fault handling method, including:
Step S11: fault injection detection is performed.
Step S12: and when the fault injection is detected, restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected.
The fault injection detection may include at least one of fault detection based on elliptical dots and fault detection based on a state machine, and may include other detection schemes as long as fault injection detection can be implemented.
Under the condition that any fault injection is detected, for example, fault injection is detected by using an elliptical dot and/or fault injection is detected based on a state machine, the state of a target state machine when the fault injection is detected can be restored to the latest state before the fault injection is detected, so that the existing operation flow can be restored in time, correct data can be outputted, data leakage is reduced, and the active defense capacity of a chip or equipment where the fault injection is detected can be improved.
Namely, when fault injection is detected, the embodiment of the application can timely restore the state of the target state machine to the latest state before fault injection before outputting useful error information, can reduce or even avoid generating useful information for an attacker in the process of being attacked, can output correct data, and reduces data leakage, thereby improving the defending capability of the password chip.
In some examples, the elliptical dot based fault injection detection and the state machine based fault injection detection are described in conjunction.
That is, in the embodiment of the present application, the process of performing fault injection detection in the step S11 may include:
Elliptical point data are obtained, elliptical point detection is carried out according to the elliptical point data, and whether state jump of the target state machine is normal or not is detected;
detecting fault injection when the elliptical dot data are not on a given elliptical curve or the state jump of the target state machine is abnormal;
When the elliptical dot data is on a given elliptical curve and the state jump of the target state machine is normal, no fault injection is detected.
The whole fault handling mechanism can acquire the elliptic point data from the outside, for example, acquire the elliptic point data from the IP core of the chip, and then detect whether the input elliptic point data is on a given elliptic curve according to the Willd Laplace equation, wherein when the elliptic point data is not on the given elliptic curve, the fault injection can be determined to be detected.
The whole fault handling mechanism further comprises a target state machine, for example, the target state machine is a key state machine, and the key state machine may be a state machine corresponding to a key algorithm, for example, a state machine corresponding to an elliptic curve signature algorithm.
Further, a state machine corresponding to the sm2 elliptic curve public key cryptographic algorithm may be determined as a target state machine according to actual requirements, and may specifically be a state machine corresponding to elliptic operation and dot product operation.
For this, a corresponding reference state machine may be set for the target state machine, and whether the jump of the target state machine is normal may be determined based on the state of the reference state machine. Wherein, when the jump is abnormal, it can be determined that the fault injection is detected.
For example, an inversion state machine can be added in the fault handling mechanism, and the inversion state machine and the state of the target state machine with normal state jump are mutually inverted. The states of the target state machine and the inverted state machine may be characterized in terms of binary sequences.
The embodiment of the application can carry out exclusive OR operation or difference operation based on the state of the target state machine and the state of the opposite phase state machine corresponding to the target state machine to obtain a corresponding operation result;
If the operation result is a preset value, judging that the state jump of the target state machine is normal, otherwise, judging that the state jump of the target state machine is abnormal, and determining that fault injection exists currently.
It can be understood that by designing the inversion state machine, each state of the inversion state machine is an inversion state of the original state machine of the normal state, the difference value obtained by performing exclusive or on each state in the same stage is fixed, and if the difference value is not a preset value, the state machine is proved to jump abnormally, so that the state machine can be found to jump fault under the state.
In this embodiment, by adding the state machine jump detection and combining with the elliptic point detection, the time for detecting the fault attack based on the missing operation can be shortened, and the time cost of fault injection detection can be reduced.
In the embodiment of the application, if the state of the target state machine is normal, the state of the target state machine after the jump and the corresponding output value can be stored, so that the state of the jump and the corresponding output value are updated continuously under the condition that the state machine is normal.
In some embodiments, the state of the target state machine after the jump and the corresponding output value may be saved in a ping-pong register.
If the state jump of the target state machine is abnormal and the elliptical dot data is on the given elliptical curve, the latest output value stored before fault injection can be obtained, and then the state of the target state machine is restored to the state corresponding to the latest output value according to the latest output value.
For example, the previously stored value can be directly read from the ping-pong register, and the state of the target state machine is forcedly restored to the previous state, so that the output of correct data can be quickly restored, and the data leakage is reduced.
For another case, if the ellipse point data is on a given ellipse curve, the ellipse point data and the IP core control data corresponding to the ellipse point data may also be stored, so that the ellipse point data and the corresponding IP core control data are continuously updated under the condition that the ellipse point detection is normal.
For example, a shadow register may be set, and the oval dot data and the IP core control data are stored in the shadow register, and it should be noted that the shadow register is used to construct a passive defense of data storage, that is, two successive writing operations are performed by using the shadow register, and whether the two writing operations are consistent is compared to ensure the storage accuracy, so that the storage error caused by the burr can be reduced.
If the elliptical point data are not on the given elliptical curve, the conditions of normal jump of the target state machine and abnormal jump of the target state machine are included, IP core control data corresponding to the latest elliptical point data before fault injection is detected can be obtained, and a first output value is obtained, wherein the first output value is an output value corresponding to the target state machine when the latest elliptical point data are stored; and updating the IP core control data corresponding to the latest elliptic point data into the IP core, and recovering the state of the target state machine to the state corresponding to the first output value.
For example, the elliptical dot data is on a given elliptical curve, then the current given elliptical dot data is written into a shadow register for the next call; if the elliptic point is not on the given elliptic curve, reading the value stored in the shadow register, forcedly updating the value into the corresponding register of the IP core, and restoring the state of the state machine to the state when the elliptic point data is detected last time.
It can be understood that, in the embodiment of the present application, for the detection of the ellipses and the detection of the state machine jump are parallel, the entire state restoration logic takes the detection of the ellipses as the priority, that is, when the fault injection is detected by two detection modes, if the fault injection is detected by two detection modes at the same time, that is, when two warnings occur at the same time, the shadow register is directly read to restore.
Therefore, when fault injection is detected, the embodiment of the application timely restores the state of the target state machine to the latest state before fault injection before outputting useful error information, thereby avoiding the generation of useful output information for an attacker, improving the defending capability of the password chip and reducing data leakage.
The current state jump is detected in the running process of the state machine, and the state jump is recovered when the state jump is abnormal, so that the operation missing attack can be timely detected, the information leakage is reduced, and the safety is improved. And by detecting whether the elliptical dot data is on a given elliptical curve, when the elliptical dot data is on the given elliptical curve, the elliptical dot data is stored, and when the elliptical dot data is not on the given elliptical curve, the target state machine is restored to the state of last detected elliptical dot data based on the elliptical dot data stored last time, so that the defense of differential fault attack is realized.
Further, referring to fig. 2, fig. 2 is a flowchart of a specific fault handling method according to an embodiment of the present application. After the defense mechanism is started, if the elliptical point is on the given elliptical curve, writing the current given elliptical point data into a shadow register for the next call; if the elliptical dot is not on the given elliptical curve, reading the value stored in the shadow register, forcedly updating the value into the register corresponding to the IP core, and restoring the state of the state machine to the state of the elliptical dot detected last time.
In addition, the detection mechanism of the state machine can detect the jump of each state, and once the state jump of the state machine is abnormal, the value stored in the last ping-pong register is directly read and forcedly restored to the last state; if the state of the state machine jumps normally, the current state and the output value are written into the ping-pong register.
The detection of the elliptical dot and the detection of the state are parallel, and the recovery mechanism takes precedence on the left side of fig. 2, namely, when two warnings occur simultaneously, the shadow register is directly read for recovery.
Referring to fig. 3, fig. 3 is a schematic diagram of state machine jump detection according to an embodiment of the present application. Because the state flip injection fault of the FSM (i.e., FINITE STATE MACHINE, finite state machine) is sufficient to tamper with the flow of the operation, the state jump of the state machine is detected in the embodiment of the present application. The state transitions of the FSM are detected using a redundant dual-rail FSM scheme, in which there are two FSMs, one is the original FSM and the other is the inverted FSM.
Each state state_inv of the inversion state machine is an inversion state of the state_p of the original state machine, the difference value obtained by exclusive-or of each state in the same stage is fixed, if a fault occurs in a certain state stage, the fault occurrence of the current state transition can be immediately detected in the state, and thus, whether the fault exists in each state can be detected.
If there is a fault, the comparison logic will send alert_to_idle signals to the two FSMs, suspend the transition of the FSMs, and control the recovery of the site through the control module, so that the FSMs transition to the state recorded before, and perform redundancy calculation on the current operation, and continue the whole point multiplication calculation process until the correct result is output, thereby avoiding generating useful output information for the attacker. While issuing Alert signals to the control modules (i.e., the control components involved in the subsequent embodiments).
Therefore, the current operation flow can be recovered in time, a correct result is output, and information leakage is reduced; reducing the time of fault injection by the detection leakage operation; the single-point defense is changed into multi-point defense comprising elliptical dot detection and state machine detection, and the defense strength is improved.
Further, referring to fig. 4, an embodiment of the present application discloses a fault handling apparatus, including:
A detection component 11 for performing fault injection detection;
And a control component 12 for restoring the state of the target state machine at the time of detecting the fault injection to the latest state before the fault injection is detected when the fault injection is detected.
Therefore, when fault injection is detected, the state of the target state machine is restored to the latest state before fault injection in time before key cracking, so that output information useful for an attacker is avoided, the defending capability of the password chip can be improved, and data leakage is reduced.
Wherein the detection assembly 11 comprises:
the state machine detection module is used for detecting whether the state jump of the target state machine is normal or not;
the elliptical dot detection module is used for acquiring elliptical dot data and executing elliptical dot detection according to the elliptical dot data;
Wherein fault injection is detected when the elliptical dot data is not on a given elliptical curve or the state jump of the target state machine is abnormal; when the elliptical dot data is on a given elliptical curve and the state jump of the target state machine is normal, no fault injection is detected.
And, the fault handling apparatus further includes:
the ping-pong register is used for storing the state of the target state machine after the jump and the corresponding output value if the state of the target state machine is normal;
and the control component is further used for acquiring the latest output value stored before fault injection from the ping-pong register if the state jump of the target state machine is abnormal and the elliptic point data is on a given elliptic curve, and restoring the state of the target state machine to the state corresponding to the latest output value according to the latest output value.
Further, the fault handling apparatus further includes:
the state of the inversion state machine and the state of the target state machine with normal state jump are mutually inverted;
The state machine detection module is further used for performing exclusive OR or difference operation based on the state of the target state machine and the state of the reverse phase state machine to obtain a corresponding operation result;
And if the operation result is a preset value, judging that the state jump of the target state machine is normal, otherwise, judging that the state jump of the target state machine is abnormal.
Further, the fault handling apparatus further includes:
a shadow register, configured to store the elliptic point data and IP core control data corresponding to the elliptic point data if the elliptic point data is on a given elliptic curve;
The control component is configured to obtain, if the elliptic point data is not on the given elliptic curve, IP core control data corresponding to the latest elliptic point data before fault injection is detected from the shadow register, and obtain a first output value, where the first output value is an output value corresponding to the target state machine when the latest elliptic point data is stored; and updating the IP core control data corresponding to the latest elliptic point data into the IP core, and recovering the state of the target state machine to the state corresponding to the first output value.
Further, referring to fig. 5, fig. 5 is a schematic diagram of another fault handling apparatus according to an embodiment of the present application. The whole mechanism is provided with two detection parts, one is an elliptic point detection (namely an elliptic point detection module) which can detect whether an input elliptic point is on a given elliptic curve according to the Weibull Laplace equation;
The other is state machine detection (i.e., state machine detection module) that can be detected based on exclusive or of the state machine with the state of the corresponding inverse state machine. The input data of the ellipse point detection is directly input from the outside, and the alarm signals of the two parts are directly returned to the control module, namely the control component.
The control module is externally controlled to be enabled or not. In the case of no alarm, the control module controls updating the shadow register and the ping-pong register; if there is an alarm, the control module will force the use of the data in the shadow register and ping-pong register to update the external registers, restore the scene to the time of last writing to both registers.
It should be noted that, in the existing defense method, the existing operation flow is not restored after the fault injection attack is detected, and the embodiment of the application restores the existing calculation flow from the current and the previous data after the fault injection is detected. In addition, whether the state of the state machine is injected with faults or not is detected in the whole process so as to skip certain states to execute the leakage operation, correct data is output, data leakage is reduced, and the time cost of operation can be reduced. Besides the active defense, the shadow register is used for constructing the passive defense of the data storage, namely, the storage error caused by burrs is reduced by utilizing the characteristics of the shadow register.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other. For the apparatus disclosed in the examples, since it corresponds to the method disclosed in the examples, the description is relatively simple, and the relevant points are referred to in the description of the method section.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The foregoing has outlined a detailed description of a fault handling method and apparatus according to the present application, wherein specific examples are provided herein to illustrate the principles and embodiments of the present application, and the above examples are provided to assist in understanding the method and core ideas of the present application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.

Claims (10)

1. A method of fault handling comprising:
Performing fault injection detection;
And when the fault injection is detected, restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected.
2. The method of claim 1, wherein the performing fault injection detection comprises:
Elliptical point data are obtained, elliptical point detection is carried out according to the elliptical point data, and whether state jump of the target state machine is normal or not is detected;
detecting fault injection when the elliptical dot data are not on a given elliptical curve or the state jump of the target state machine is abnormal;
When the elliptical dot data is on a given elliptical curve and the state jump of the target state machine is normal, no fault injection is detected.
3. The method of claim 2, wherein if the state jump of the target state machine is normal, the method further comprises:
storing the state of the target state machine after the jump and the corresponding output value;
If the state jump of the target state machine is abnormal and the elliptic point data is on a given elliptic curve, the restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected includes:
Obtaining the latest output value stored before fault injection;
and restoring the state of the target state machine to the state corresponding to the latest output value according to the latest output value.
4. The method of claim 2, wherein the detecting whether the state jump of the target state machine is normal comprises:
Performing exclusive OR or difference operation based on the state of the target state machine and the state of the opposite phase state machine corresponding to the target state machine to obtain a corresponding operation result;
If the operation result is a preset value, judging that the state jump of the target state machine is normal, otherwise, judging that the state jump of the target state machine is abnormal.
5. The method of claim 2, wherein if the elliptical dot data is on a given elliptical curve, the method further comprises:
Storing the elliptical point data and IP core control data corresponding to the elliptical point data;
If the ellipse point data is not on the given ellipse curve, the restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected includes:
acquiring IP core control data corresponding to the latest elliptical point data before fault injection is detected, and acquiring a first output value, wherein the first output value is an output value corresponding to the target state machine when the latest elliptical point data is stored;
And updating the IP core control data corresponding to the latest elliptic point data into the IP core, and recovering the state of the target state machine to the state corresponding to the first output value.
6. A fault handling apparatus, comprising:
a detection component for performing fault injection detection;
And the control component is used for restoring the state of the target state machine when the fault injection is detected to the latest state before the fault injection is detected when the fault injection is detected.
7. The fault handling apparatus of claim 6, wherein the detection component comprises:
the state machine detection module is used for detecting whether the state jump of the target state machine is normal or not;
the elliptical dot detection module is used for acquiring elliptical dot data and executing elliptical dot detection according to the elliptical dot data;
Wherein fault injection is detected when the elliptical dot data is not on a given elliptical curve or the state jump of the target state machine is abnormal; when the elliptical dot data is on a given elliptical curve and the state jump of the target state machine is normal, no fault injection is detected.
8. The fault handling apparatus of claim 7, further comprising:
the ping-pong register is used for storing the state of the target state machine after the jump and the corresponding output value if the state of the target state machine is normal;
and the control component is further used for acquiring the latest output value stored before fault injection from the ping-pong register if the state jump of the target state machine is abnormal and the elliptic point data is on a given elliptic curve, and restoring the state of the target state machine to the state corresponding to the latest output value according to the latest output value.
9. The fault handling apparatus of claim 7, further comprising:
the state of the inversion state machine and the state of the target state machine with normal state jump are mutually inverted;
The state machine detection module is further used for performing exclusive OR or difference operation based on the state of the target state machine and the state of the reverse phase state machine to obtain a corresponding operation result;
And if the operation result is a preset value, judging that the state jump of the target state machine is normal, otherwise, judging that the state jump of the target state machine is abnormal.
10. The fault handling apparatus of claim 7, further comprising:
a shadow register, configured to store the elliptic point data and IP core control data corresponding to the elliptic point data if the elliptic point data is on a given elliptic curve;
The control component is configured to obtain, if the elliptic point data is not on the given elliptic curve, IP core control data corresponding to the latest elliptic point data before fault injection is detected from the shadow register, and obtain a first output value, where the first output value is an output value corresponding to the target state machine when the latest elliptic point data is stored; and updating the IP core control data corresponding to the latest elliptic point data into the IP core, and recovering the state of the target state machine to the state corresponding to the first output value.
CN202410245939.8A 2024-03-05 2024-03-05 Fault processing method and device Pending CN117978394A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410245939.8A CN117978394A (en) 2024-03-05 2024-03-05 Fault processing method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410245939.8A CN117978394A (en) 2024-03-05 2024-03-05 Fault processing method and device

Publications (1)

Publication Number Publication Date
CN117978394A true CN117978394A (en) 2024-05-03

Family

ID=90864862

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410245939.8A Pending CN117978394A (en) 2024-03-05 2024-03-05 Fault processing method and device

Country Status (1)

Country Link
CN (1) CN117978394A (en)

Similar Documents

Publication Publication Date Title
CN111563282B (en) Interference detection device and detection sensitivity adjustment method thereof
CN102135925B (en) Method and device for detecting error check and correcting memory
Khoumsi Sensor and actuator attacks of cyber-physical systems: A study based on supervisory control of discrete event systems
CN112507396B (en) Electronic device and method for checking data sampling integrity by using gating clock
CN117978394A (en) Fault processing method and device
Baksi et al. A Novel Duplication-Based Countermeasure to Statistical Ineffective Fault Analysis
CN110941236B (en) PLC safety monitoring and dynamic measuring method and system
CN109472600B (en) Block chain credibility verification method and device
CN108616381B (en) Event correlation alarm method and device
CN115357094A (en) Clock monitoring circuit and clock monitoring method
CN108616527A (en) One kind is towards SQL injection bug excavation method and device
EP3649553B1 (en) Data protection
CN114363658B (en) Method and device for encrypted transmission of audio and video stream
CN114095395B (en) Method, device and medium for analyzing error data generated by fault injection
US20230352074A1 (en) Signal control circuit, signal control method and semiconductor memory
Yu et al. Reliability measures of discrete time k-out-of-n: G retrial systems based on Bernoulli shocks
CN113055496B (en) Block chain transaction system based on DAG and method thereof
CN118012674B (en) Back fault recovery method, cloud operating system and intelligent computing platform
US20230216677A1 (en) Cipher accelerator and differential fault analysis method for encryption/decryption operation
JP2806856B2 (en) Diagnostic device for error detection and correction circuit
Merideth et al. Metrics for the evaluation of proactive and reactive survivability
US10148671B2 (en) Method for protecting a chip card against a physical attack intended to modify the logical behaviour of a functional program
EP2083372A1 (en) Application information falsification monitoring device and method
CN114844778B (en) Abnormality detection method and device for core network, electronic equipment and readable storage medium
CN116719749B (en) Processor operation detection method, device, equipment and medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination