CN117931714A

CN117931714A - Chip multichannel cooperative transmission method and system

Info

Publication number: CN117931714A
Application number: CN202311822501.3A
Authority: CN
Inventors: 向柏澄; 习伟; 陈军健; 陶伟; 张巧惠; 关志华; 董飞龙; 谢心昊; 孙沁; 张泽林
Original assignee: Southern Power Grid Digital Grid Research Institute Co Ltd
Current assignee: Southern Power Grid Digital Grid Research Institute Co Ltd
Priority date: 2023-12-27
Filing date: 2023-12-27
Publication date: 2024-04-26

Abstract

The application relates to a chip multichannel cooperative transmission method and system. The method comprises the following steps: acquiring a plurality of data to be processed which are to be processed by the multi-chip, and data processing tasks of the data to be processed, and determining a data processing flow corresponding to each data processing task; identifying target chips corresponding to each data processing flow and data processing nodes of each target chip, and collecting channel information of each target chip for data transmission; determining a data transmission time point of each target chip to each data to be processed based on the data processing node and the data processing timeliness corresponding to each target chip; and according to the data transmission time point and the channel information of each target chip, obtaining the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip, and carrying out cooperative transmission processing on each piece of data to be processed. By adopting the method, the collaborative transmission efficiency of the chip to the data can be improved.

Description

Chip multichannel cooperative transmission method and system

Technical Field

The present application relates to the field of integrated circuit chip technology, and in particular, to a chip multichannel cooperative transmission method, system, computer device, storage medium and computer program product.

Background

With the increasing data processing amount and variety of integrated circuit chips, multiple chips need to cooperatively interact to efficiently process data. However, in the process of chip cooperation, as each data transmission channel is different, the operation mode of the chip is independent, so that the data cooperation transmission time delay is longer, and the integral timeliness of the multi-chip for carrying out cooperation processing on the data is affected.

In the related art, the conventional chip multi-channel cooperative transmission method adopts a mode of independent transmission of each chip, and when the chip is running data processing and cannot receive data, a plurality of data loops are caused to wait until the chip can receive the data and transmit the data to the chip. Based on the mode, the data transmission efficiency is low, the data transmission time is prolonged, and the cooperative transmission efficiency of the chip to the data is low.

Disclosure of Invention

In view of the foregoing, it is desirable to provide a chip multi-channel cooperative transmission method, system, computer device, storage medium and computer program product that can improve the data cooperative transmission efficiency of chip multi-channels.

In a first aspect, the present application provides a chip multichannel cooperative transmission method, including:

Acquiring a plurality of pieces of data to be processed which are processed by a plurality of chips, and data processing tasks of the pieces of data to be processed, and determining a data processing flow corresponding to each data processing task;

Identifying target chips corresponding to each data processing flow and data processing nodes of each target chip, and collecting channel information of each target chip for data transmission;

Determining a data transmission time point of each target chip to each piece of data to be processed based on a data processing node and data processing timeliness corresponding to each target chip;

Obtaining target channel information of each target chip corresponding to each piece of data to be processed and a target transmission time point of each piece of data to be processed in each target chip according to the data transmission time point of each piece of data to be processed and the channel information of each target chip;

and carrying out cooperative transmission processing on each piece of data to be processed by adopting the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip.

In one embodiment, the determining the data processing flow corresponding to each data processing task includes:

Inquiring historical processing progress information of any data processing task in a database, and identifying processing duration of each piece of historical processing progress information and the number of chips participating in each piece of historical processing progress information;

In the historical processing process information, the processing duration is smaller than the preset processing duration, and the number of the participated chips is smaller than the number of the preset chips, the historical processing process information corresponding to the minimum processing duration is used as target historical processing process information corresponding to any data processing task;

And identifying the sub-data processing flow of each chip and the processing sequence of each chip in the target historical processing process information to obtain the data processing flow corresponding to any data processing task.

In one embodiment, the identifying the target chip corresponding to each data processing flow, and the data processing node of each target chip, includes:

based on the sub-data processing flows of the chips corresponding to any data processing flow, identifying the data processing contents of the chips in any data processing flow, and determining the similarity between the data processing contents;

Optimizing the sub-data processing flow of each chip according to the target similarity among the data processing contents to obtain the sub-data processing flow of each target chip;

and determining the data processing nodes of the target chips according to the sub-data processing flow of the target chips.

In one embodiment, the optimizing the sub-data processing flow of each chip according to the target similarity between the data processing contents to obtain the sub-data processing flow of each target chip includes:

Determining a first similarity between the data processing contents according to the data processing type of the data processing contents, and determining a second similarity between the data processing contents according to the data processing characteristics of the data processing contents;

Based on the first similarity and the second similarity, obtaining target similarity among the data processing contents, and taking the data processing contents corresponding to the target similarity larger than a similarity threshold as target data processing contents;

And identifying the same data processing content of any two target data processing contents, and optimizing the sub-data processing flows corresponding to any two target data processing contents by adopting the same data processing content to obtain the sub-data processing flow of each target chip.

In one embodiment, the optimizing the sub-data processing flows corresponding to any two target data processing contents by using the same data processing contents to obtain the sub-data processing flows of each target chip includes:

Determining optimal data processing contents in any two target data processing contents according to the data processing rates of the chips corresponding to any two target data processing contents and the optimal data processing amounts of the chips corresponding to any two target data processing contents;

and deleting the same data processing content in the optimized data processing content to obtain the sub-data processing flow of the target chip corresponding to the optimized data processing content.

In one embodiment, the determining the data processing node of each target chip according to the sub-data processing flow of each target chip includes:

based on the data processing flow of any target chip, identifying the data processing function of the any target chip, and dividing the data processing flow into a plurality of data processing function sequences which are sequentially arranged;

and according to the data processing function of any target chip, inquiring the sequence position corresponding to the data processing function of any target chip in the data processing function sequence to obtain the data processing node of any target chip.

In one embodiment, the determining, based on the data processing node and the data processing time period corresponding to each target chip, a data transmission time point of each target chip to each piece of data to be processed includes:

calculating the data processing duration of each target chip according to the data processing time of each target chip and the sub-data processing flow of the data processing node of each target chip in the data processing flow aiming at each data processing flow;

According to the data processing nodes corresponding to the target chips, the transmission time length of the unit data quantity and the data processing time length of the target chips, calculating the data transmission time point of each target chip to the data to be processed.

In one embodiment, the obtaining, according to the data transmission time point of each target chip to each piece of data to be processed and each piece of channel information of each target chip, the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip includes:

Determining a target transmission time point with unit data transmission amount larger than the sum of unit target data transmission amounts of all the channel information in the data transmission distribution information of each target chip based on the unit target data transmission amount of each channel information in each target chip;

Identifying each piece of to-be-processed data transmitted at each target transmission time point and a transmission process of each piece of to-be-processed data, and adjusting the transmission time point of each piece of to-be-processed data according to the transmission process of each piece of to-be-processed data to obtain the target transmission time point of each piece of to-be-processed data;

According to the target transmission time point of each piece of data to be processed and the target channel information of each piece of data to be processed, determining the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip.

In one embodiment, the adjusting the transmission time point of each piece of the data to be processed according to the transmission process of each piece of the data to be processed to obtain the target transmission time point of each piece of the data to be processed includes:

Identifying the percentage of the transmission process of each piece of data to be processed to all transmission processes, obtaining the process ratio of each piece of data to be processed, and taking the data to be processed corresponding to the process ratio smaller than the process ratio threshold value as the data to be processed to be adjusted;

Acquiring the comprehensive data transmission quantity of each channel information of transmission time points adjacent to the target transmission time point, and calculating the data quantity difference between the comprehensive data transmission quantity of each channel information and the unit target data transmission quantity of each channel information;

and determining a target transmission time point of each piece of to-be-adjusted processing data according to the data quantity difference value and the data quantity of each to-be-adjusted processing data in the non-transmission process.

In a second aspect, the present application further provides a chip multichannel cooperative transmission system, including:

The data acquisition module is used for acquiring a plurality of pieces of data to be processed which are processed by the multi-chip and data processing tasks of the pieces of data to be processed, and determining a data processing flow corresponding to each data processing task;

The data processing node identification module is used for identifying each target chip corresponding to the data processing flow and each data processing node of each target chip and collecting the information of each channel of each target chip for data transmission;

The data transmission time point determining module is used for determining the data transmission time point of each target chip for each piece of data to be processed based on the corresponding data processing node and the data processing timeliness of each target chip;

The target channel information determining module is used for obtaining target channel information of each target chip corresponding to each piece of data to be processed and a target transmission time point of each piece of data to be processed in each target chip according to the data transmission time point of each piece of data to be processed and the channel information of each target chip;

And the cooperative transmission module is used for carrying out cooperative transmission processing on the data to be processed by adopting the target channel information of each target chip corresponding to the data to be processed and the target transmission time point of each target chip.

In a third aspect, the present application also provides a computer device, including a memory and a processor, where the memory stores a computer program, and the processor implements the steps of the chip multichannel cooperative transmission method according to the first aspect when the processor executes the computer program.

In a fourth aspect, the present application also provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the chip multi-channel co-transmission method according to the first aspect.

In a fifth aspect, the present application also provides a computer program product comprising a computer program which, when executed by a processor, implements the steps of the chip multi-channel cooperative transmission method as described in the first aspect.

According to the chip multichannel cooperative transmission method, the system, the computer equipment, the storage medium and the computer program product, the data processing flow corresponding to each data processing task is determined by acquiring the data to be processed of the plurality of chips to be processed and the data processing task of each data to be processed, the target chip corresponding to each data processing flow and the data processing node of each target chip are identified, channel information of each target chip for data transmission is acquired, then the data transmission time point of each target chip for each data to be processed is determined based on the data processing node and the data processing timeliness corresponding to each target chip, the target channel information of each target chip corresponding to each data to be processed and the target transmission time point of each data to be processed are obtained according to the data transmission time point of each target chip, the target channel information of each data to be processed of each target chip is further adopted, the target transmission time point of each data to be processed of each target chip is further, the cooperative transmission processing is carried out on each data to be processed, and accordingly, the problem of the data to be processed is not accumulated and the data can be effectively transmitted through the iterative transmission time of each chip is avoided, and the data can be effectively transmitted through the chip.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the embodiments or the related technical descriptions will be briefly described, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.

FIG. 1 is a flow chart of a method for chip multi-channel cooperative transmission in an embodiment;

FIG. 2 is a flow chart of a method for chip multi-channel cooperative transmission in another embodiment;

FIG. 3 is a flow diagram of data processing node identification steps in one embodiment;

FIG. 4 is a schematic diagram of a chip multichannel cooperative transmission system according to an embodiment;

fig. 5 is an internal structural diagram of a computer device in one embodiment.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.

The chip multichannel cooperative transmission method provided by the embodiment of the application can be applied to application environments of the Internet of things chip and the integrated circuit chip. The method can be applied to the terminal, the server and a system comprising the terminal and the server, and is realized through interaction of the terminal and the server. The terminal may be, but not limited to, various personal computers, notebook computers, smart phones, tablet computers, and the like. The terminal determines the data transmission time point of each target chip for each data to be processed by identifying the data processing node of the target chip corresponding to the data processing task of each data to be processed based on the data processing timeliness of each target chip, and further carries out data interaction transmission processing by adjusting the target channel information of each target chip corresponding to each data to be processed and the target transmission time point of each data to be processed in each target chip through the channel information of the chip, so that the cooperative transmission efficiency of the chip for the data is comprehensively improved.

In one embodiment, as shown in fig. 1, a chip multi-channel cooperative transmission method is provided, and the method is applied to a terminal for illustration in this embodiment, and includes the following steps 101 to 105. Wherein:

Step 101, acquiring a plurality of pieces of data to be processed by a multi-chip and data processing tasks of the pieces of data to be processed, and determining a data processing flow corresponding to each data processing task;

The terminal can detect the data transmitted by each port of the integrated circuit chip in real time, and screen the data (i.e. the data to be processed) which needs to be processed by the multiple chips in unit time, and the data processing task of each data.

As an example, the unit time may be a preset time period, which may include, but is not limited to, 10s, 30s, etc.

In practical application, a data processing flow corresponding to each data processing task may be identified, where the data processing flow may include a plurality of flow nodes corresponding to the sub-data processing flows, each flow node may represent a data processing starting point of a chip, and the flow nodes may also represent a chip executing the sub-data processing flows.

102, Identifying target chips corresponding to each data processing flow and data processing nodes of each target chip, and collecting channel information of each target chip for data transmission;

in a specific implementation, each target chip corresponding to each data processing flow and each data processing node of each target chip can be identified, and each channel information of each target chip for data transmission can be collected.

For example, the channel information may be parameter information of a channel employed for data transmission by the target chip, and the parameter information may include an optimal data transmission amount per unit time of the channel.

Step 103, determining a data transmission time point of each target chip to each piece of data to be processed based on a data processing node and data processing timeliness corresponding to each target chip;

In an example, for each target chip, a data transmission time point of each data by the chip may be determined based on a data processing node of each data corresponding to the chip and a data processing age of the chip.

Alternatively, the data processing aging may be the data throughput of the chip per unit time; the data transmission time point may be a time point corresponding to a start point of data transmission from the chip to the next chip.

104, Obtaining target channel information of each target chip corresponding to each piece of data to be processed and a target transmission time point of each piece of data to be processed in each target chip according to the data transmission time point of each piece of data to be processed and the channel information of each target chip;

in practical application, the target channel information of each target chip corresponding to each data and the target transmission time point of each data at each target chip may be determined based on the data transmission time point of each chip to each data and the channel information of each chip.

For example, the process of determining the target channel information and the target transmission time point may be a channel information adjustment process and a transmission time point adjustment process of each data at the chip.

Step 105, performing cooperative transmission processing on each piece of data to be processed by using the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip.

In a specific implementation, cooperative transmission processing may be performed on each data based on the target channel information of each target chip corresponding to each data, and the target transmission time point of each data at each target chip.

In the chip multichannel cooperative transmission method, the data processing flow corresponding to each data processing flow is determined by acquiring the plurality of data to be processed of the plurality of chips and the data processing task of each data to be processed, the target chip corresponding to each data processing flow and the data processing node of each target chip are identified, the channel information of each target chip for data transmission is acquired, then the data transmission time point of each target chip for each data to be processed is determined based on the data processing node corresponding to each target chip and the data processing timeliness, the data transmission time point of each target chip for each data to be processed is obtained according to the data transmission time point of each target chip for each data to be processed and the channel information of each target chip, the target channel information of each target chip for each data to be processed is obtained, and then the target channel information of each target chip for each data to be processed and the target transmission time point of each target chip are adopted, so that cooperative transmission processing is carried out on each data to be processed, the problem of data iterative accumulation is avoided, meanwhile, the data transmission time point of each channel of each chip is adjusted, the data can be effectively transmitted, the normal transmission efficiency of each data is guaranteed, and the data can be effectively transmitted, and the normal transmission time point of each data is guaranteed.

In an exemplary embodiment, the determining the data processing flow corresponding to each data processing task may include the following steps:

Inquiring historical processing progress information of any data processing task in a database, and identifying processing duration of each piece of historical processing progress information and the number of chips participating in each piece of historical processing progress information; in the historical processing process information, the processing duration is smaller than the preset processing duration, and the number of the participated chips is smaller than the number of the preset chips, the historical processing process information corresponding to the minimum processing duration is used as target historical processing process information corresponding to any data processing task; and identifying the sub-data processing flow of each chip and the processing sequence of each chip in the target historical processing process information to obtain the data processing flow corresponding to any data processing task.

In an example, each history process information of the data processing task may be queried in the database based on the data processing task for each data processing task, and a processing duration of each history process information, and a number of participating chips of each history process information may be identified. Specifically, the database may contain process information corresponding to different data processing tasks of different data within the history period.

In yet another example, the processing duration and the number of chips may be preset, and historical processing progress information corresponding to the minimum processing duration in each piece of historical processing progress information that has a processing duration lower than the preset processing duration and participates in the chip data lower than the number of the preset chips may be screened, for example, the historical processing progress information may be historical processing progress information that has a lower processing duration and a smaller number of chips, and the screening of the historical processing progress information may be used to promote processing timeliness of the data processing task; then the history processing process information can be used as target history processing process information corresponding to the data processing task; and the sub-data processing flow of each chip and the processing sequence of each chip in the target historical processing process information can be identified, so that the data processing flow corresponding to the data processing task is obtained. Therefore, the processing speed of the data processing task can be improved by screening the low processing time length and the historical processing progress information with low chip number as the target historical processing progress information.

In an exemplary embodiment, as shown in fig. 2, the identifying a target chip corresponding to each data processing flow, and a data processing node of each target chip may include the following steps:

Step 201, based on the sub-data processing flows of each chip corresponding to any data processing flow, identifying the data processing content of each chip in any data processing flow, and determining the similarity between the data processing contents;

step 202, optimizing the sub-data processing flow of each chip according to the target similarity between the data processing contents to obtain the sub-data processing flow of each target chip;

Step 203, determining the data processing node of each target chip according to the sub-data processing flow of each target chip.

In practical application, for each data processing flow, based on the sub-data processing flow of each chip corresponding to the data processing flow, identifying the data processing content of each chip in the data processing flow, and identifying the similarity between each data processing content; the data processing content can be information of each step of data processing of the chip on the data information; the similarity between the data processing contents can be used to characterize the similarity between the sub-data processing flows performed by the chip.

In an example, the sub-data processing flows of each chip may be optimized based on the similarity between the data processing contents, so as to obtain the sub-data processing flows of each target chip, and further, the data processing nodes of each target chip may be determined based on the sub-data processing flows of each target chip. Therefore, the sub-data processing flow of each target chip can be optimized by identifying the similarity among the data processing contents, and the processing efficiency of the sub-data processing flow of each chip is effectively improved.

In an exemplary embodiment, the optimizing the sub-data processing flow of each of the chips according to the target similarity between the data processing contents to obtain the sub-data processing flow of each of the target chips may include the following steps:

Determining a first similarity between the data processing contents according to the data processing type of the data processing contents, and determining a second similarity between the data processing contents according to the data processing characteristics of the data processing contents; based on the first similarity and the second similarity, obtaining target similarity among the data processing contents, and taking the data processing contents corresponding to the target similarity larger than a similarity threshold as target data processing contents; and identifying the same data processing content of any two target data processing contents, and optimizing the sub-data processing flows corresponding to any two target data processing contents by adopting the same data processing content to obtain the sub-data processing flow of each target chip.

In a specific implementation, the data processing type of each data processing content can be identified, and the data processing characteristics of each data processing content can be extracted; the data processing features may be feature information corresponding to the processing steps of each chip, for example, the data processing features corresponding to the classifying steps may be data classification, the data processing features corresponding to the data summing calculating steps may be data calculation, and the like.

In an example, a first similarity between the data processing contents may be determined based on a data processing type of the data processing contents, which may be used to characterize a type of data processing, such as data classification, data calculation, data invocation, data derivation, and the like.

For example, the first similarity may include 1 and 0, and when the data processing types of the two data processing contents are the same, the first similarity of the two data processing contents is 1; when the data processing types of the two data processing contents are different, the first similarity of the two data processing contents is 0. Then, based on the data processing characteristics of each data processing content, calculating a second similarity between each data processing content, wherein the second similarity can be a similarity corresponding to a similarity distance between two data processing contents; the similarity distance algorithm may include, but is not limited to, euclidean distance algorithm, and Mahalanobis distance algorithm.

In still another example, the average sum of the first similarity between the data processing contents and the second similarity between the data processing contents may be calculated to obtain the similarity between the data processing contents, then each data processing content corresponding to the similarity greater than the similarity threshold value preset in the average sum may be filtered to be used as the target data processing content, and further the same data processing content in every two target data processing contents may be identified, and the sub-data processing flows corresponding to the two target data processing contents may be optimized based on the same data processing content to obtain the sub-data processing flows of each target chip. Therefore, the similarity between the data processing contents is determined through the first similarity corresponding to the data type and the second similarity corresponding to the data processing characteristics of the data processing contents, and the accuracy of the determined similarity is improved.

In an exemplary embodiment, the optimizing the sub-data processing flows corresponding to any two target data processing contents by using the same data processing contents to obtain the sub-data processing flow of each target chip may include the following steps:

Determining optimal data processing contents in any two target data processing contents according to the data processing rates of the chips corresponding to any two target data processing contents and the optimal data processing amounts of the chips corresponding to any two target data processing contents; and deleting the same data processing content in the optimized data processing content to obtain the sub-data processing flow of the target chip corresponding to the optimized data processing content.

In one example, a data processing rate of a chip corresponding to each data processing content and an optimal data processing amount of a chip corresponding to each data processing content may be identified, and then, for each two target data processing contents, the optimal data processing content may be screened out among the two target data processing contents based on the data processing rates of the chips corresponding to the two target data processing contents and the optimal data processing amounts of the chips corresponding to the two target data processing contents.

For example, the optimized data processing content may be a data processing content whose data processing rate is slow and whose optimal data processing amount is small among the two target data processing contents. And then the same data processing content in the optimized data processing content can be deleted, and the sub-data processing flow of the target chip corresponding to the optimized data processing content is obtained. Therefore, the data processing connection of the data processing content of the chip can be reduced by optimizing the same data processing content, and the data processing efficiency of the chip is improved.

In an exemplary embodiment, the determining the data processing node of each target chip according to the sub-data processing flow of each target chip may include the following steps:

Based on the data processing flow of any target chip, identifying the data processing function of the any target chip, and dividing the data processing flow into a plurality of data processing function sequences which are sequentially arranged; and according to the data processing function of any target chip, inquiring the sequence position corresponding to the data processing function of any target chip in the data processing function sequence to obtain the data processing node of any target chip.

In practical application, the data processing function of the target chip can be identified based on the data processing flow of the target chip for each target chip, and the data processing flow can be divided into a plurality of data processing function sequences which are sequentially arranged, so that the data processing node of the target chip can be obtained by inquiring the sequence position corresponding to the data processing function of the target chip in the data processing function sequence based on the data processing function of the target chip. Therefore, the data processing node of the chip is determined by identifying the data processing function, and the accuracy of determining the data processing node can be improved

In an exemplary embodiment, the determining, based on the data processing node and the data processing time period corresponding to each target chip, a data transmission time point of each target chip to each piece of data to be processed may include the following steps:

Calculating the data processing duration of each target chip according to the data processing time of each target chip and the sub-data processing flow of the data processing node of each target chip in the data processing flow aiming at each data processing flow; according to the data processing nodes corresponding to the target chips, the transmission time length of the unit data quantity and the data processing time length of the target chips, calculating the data transmission time point of each target chip to the data to be processed.

In a specific implementation, for each data processing flow, calculating the data processing duration of each chip based on the data processing time of each chip and the sub-data processing flow of the data processing node of each chip in the data processing flow; then, a data transmission time point of each chip to the data processing flow can be calculated for each data processing node, the transmission time length of the unit data amount and the data processing time length of each chip.

Specifically, the data processing duration of each chip can be ordered according to the sequence of the data processing of the chips, and the data transmission duration corresponding to the data processing information can be added between the two data processing durations, so that the data transmission time points of each chip can be sequentially identified. Therefore, the data transmission time point of each chip is determined by calculating the data processing market of each chip, and the accuracy of determining the data transmission time point is improved.

In an exemplary embodiment, the obtaining, according to the data transmission time point of each target chip to each piece of data to be processed and the channel information of each target chip, the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip may include the following steps:

Determining a target transmission time point with unit data transmission amount larger than the sum of unit target data transmission amounts of all the channel information in the data transmission distribution information of each target chip based on the unit target data transmission amount of each channel information in each target chip; identifying each piece of to-be-processed data transmitted at each target transmission time point and a transmission process of each piece of to-be-processed data, and adjusting the transmission time point of each piece of to-be-processed data according to the transmission process of each piece of to-be-processed data to obtain the target transmission time point of each piece of to-be-processed data; according to the target transmission time point of each piece of data to be processed and the target channel information of each piece of data to be processed, determining the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip.

In an example, a unit target data transfer amount of each channel information of a chip may be identified for each chip, and data transfer distribution information of the chip may be identified based on the chip-to-data transfer time points. The abscissa of the data transmission distribution information may be time, and the ordinate may be the data transmission amount corresponding to the chip. The target transmission time point at which the unit data transmission amount is greater than the sum of the unit target data transmission amounts of all the channel information can then be screened in the data transmission distribution information of the chip based on the data transmission distribution information of the chip and the unit target data transmission amount of each channel information of the chip.

In yet another example, each target data information transmitted at each target transmission time point and a transmission process of each target data information may be identified, and the transmission time point of each target data information may be adjusted based on the transmission process of each target data information to obtain the target transmission time point of each target data information. Then, the channel information corresponding to each data can be identified to obtain the target channel information corresponding to each data, and the target channel information of each target chip corresponding to each data and the target transmission time point of each data in each target chip are determined based on the target transmission time point of each data and the target channel information of each data. Therefore, the target transmission time point and the target channel information of each data information are adjusted through the data transmission distribution information, and the problems of data transmission waiting and data transmission delay can be avoided.

In an exemplary embodiment, the adjusting the transmission time point of each piece of the data to be processed according to the transmission process of each piece of the data to be processed to obtain the target transmission time point of each piece of the data to be processed may include the following steps:

Identifying the percentage of the transmission process of each piece of data to be processed to all transmission processes, obtaining the process ratio of each piece of data to be processed, and taking the data to be processed corresponding to the process ratio smaller than the process ratio threshold value as the data to be processed to be adjusted; acquiring the comprehensive data transmission quantity of each channel information of transmission time points adjacent to the target transmission time point, and calculating the data quantity difference between the comprehensive data transmission quantity of each channel information and the unit target data transmission quantity of each channel information; and determining a target transmission time point of each piece of to-be-adjusted processing data according to the data quantity difference value and the data quantity of each to-be-adjusted processing data in the non-transmission process.

In practical application, the percentage of each transmission process of the target data information to all transmission processes of the target data information can be identified, the process ratio of the target data information can be obtained, the data information corresponding to the process ratio smaller than the process ratio threshold can be screened and used as data to be adjusted (i.e. the processed data to be adjusted), and the process ratio can be used for representing the ratio of the transmitted data quantity of the data information to all data quantities of the data information.

In an example, the integrated data transmission amount of each channel information of transmission time points adjacent to the target transmission time point may be identified, and a data amount difference between the integrated data transmission amount of each channel information and the unit target data transmission amount of each channel information may be calculated, and then the target transmission time point of each data to be adjusted may be determined based on the data amount difference and the data amount of the untransmitted process of each data to be adjusted. The adjacent transmission time point may be a transmission time point corresponding to a next transmission time point after the target transmission time point, and the adjacent transmission time point may not include a transmission time point corresponding to a previous transmission time point of the target transmission time point. Therefore, the transmission fluency of the data information is ensured by adjusting the transmission time point of each data information, and the problem of data transmission interruption can be avoided.

In one embodiment, as shown in fig. 3, a flow diagram of another method for chip multichannel cooperative transmission is provided. In this embodiment, the method includes the steps of:

In step 301, a plurality of data to be processed by a multi-chip and a data processing task of each data to be processed are acquired. In step 302, the database is queried for historical process information of any data processing task, and the processing duration of each historical process information and the number of participating chips of each historical process information are identified. In step 303, in the plurality of history process information having the processing duration less than the preset processing duration and the number of participating chips less than the preset number of chips, the history process information corresponding to the minimum processing duration is used as the target history process information corresponding to any data processing task. In step 304, the sub-data processing flow of each chip and the processing sequence of each chip in the target historical processing process information are identified, so as to obtain a data processing flow corresponding to any data processing task. In step 305, the target chip corresponding to each data processing flow and the data processing node of each target chip are identified, and the channel information of each target chip for data transmission is collected. In step 306, a data transmission time point of each target chip for each data to be processed is determined based on the data processing node and the data processing age corresponding to each target chip. In step 307, the target channel information of each target chip corresponding to each data to be processed and the target transmission time point of each data to be processed in each target chip are obtained according to the data transmission time point of each target chip to each data to be processed and the channel information of each target chip. In step 308, the cooperative transmission processing is performed on each data to be processed by using the target channel information of each target chip corresponding to each data to be processed and the target transmission time point of each data to be processed in each target chip. It should be noted that, the specific limitation of the above steps may be referred to the specific limitation of a chip multi-channel cooperative transmission method, which is not described herein.

It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.

Based on the same inventive concept, the embodiment of the application also provides a chip multichannel cooperative transmission system for realizing the above related chip multichannel cooperative transmission method. The implementation of the solution provided by the system is similar to the implementation described in the above method, so the specific limitation in the embodiments of the one or more chip multichannel cooperative transmission systems provided below may be referred to the limitation of the chip multichannel cooperative transmission method hereinabove, and will not be repeated herein.

In one exemplary embodiment, as shown in fig. 4, there is provided a chip multichannel cooperative transmission system, including:

the data acquisition module 401 is configured to acquire a plurality of data to be processed by the multi-chip, and data processing tasks of each data to be processed, and determine a data processing flow corresponding to each data processing task;

The data processing node identification module 402 is configured to identify a target chip corresponding to each data processing flow, and a data processing node of each target chip, and collect information of each channel of each target chip for data transmission;

a data transmission time point determining module 403, configured to determine a data transmission time point of each target chip for each piece of data to be processed based on a data processing node and a data processing age corresponding to each target chip;

A target channel information determining module 404, configured to obtain, according to a data transmission time point of each target chip for each piece of data to be processed and each channel information of each target chip, target channel information of each target chip corresponding to each piece of data to be processed and a target transmission time point of each piece of data to be processed in each target chip;

and the cooperative transmission module 405 is configured to perform cooperative transmission processing on each piece of data to be processed by using the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed at each target chip.

In one embodiment, the data obtaining module 401 is specifically configured to perform querying historical processing process information of any data processing task in a database, and identify a processing duration of each piece of the historical processing process information, and a number of participating chips of each piece of the historical processing process information; in the historical processing process information, the processing duration is smaller than the preset processing duration, and the number of the participated chips is smaller than the number of the preset chips, the historical processing process information corresponding to the minimum processing duration is used as target historical processing process information corresponding to any data processing task; and identifying the sub-data processing flow of each chip and the processing sequence of each chip in the target historical processing process information to obtain the data processing flow corresponding to any data processing task.

In one embodiment, the data processing node identifying module 402 is specifically configured to execute a sub-data processing flow based on each chip corresponding to any data processing flow, identify data processing contents of each chip in any data processing flow, and determine a similarity between the data processing contents; optimizing the sub-data processing flow of each chip according to the target similarity among the data processing contents to obtain the sub-data processing flow of each target chip; and determining the data processing nodes of the target chips according to the sub-data processing flow of the target chips.

In one embodiment, the data processing node identification module 402 is further specifically configured to determine a first similarity between the data processing contents according to the data processing type of each data processing content, and determine a second similarity between the data processing contents according to the data processing characteristics of each data processing content; based on the first similarity and the second similarity, obtaining target similarity among the data processing contents, and taking the data processing contents corresponding to the target similarity larger than a similarity threshold as target data processing contents; and identifying the same data processing content of any two target data processing contents, and optimizing the sub-data processing flows corresponding to any two target data processing contents by adopting the same data processing content to obtain the sub-data processing flow of each target chip.

In one embodiment, the data processing node identification module 402 is specifically further configured to determine an optimized data processing content from any two target data processing contents according to a data processing rate of a chip corresponding to any two target data processing contents and an optimal data processing amount of a chip corresponding to any two target data processing contents; and deleting the same data processing content in the optimized data processing content to obtain the sub-data processing flow of the target chip corresponding to the optimized data processing content.

In one embodiment, the data processing node identification module 402 is specifically further configured to perform a data processing flow based on any target chip, identify a data processing function of the any target chip, and divide the data processing flow into a plurality of data processing function sequences arranged in sequence; and according to the data processing function of any target chip, inquiring the sequence position corresponding to the data processing function of any target chip in the data processing function sequence to obtain the data processing node of any target chip.

In one embodiment, the data transmission time point determining module 403 is specifically configured to execute, for each data processing flow, calculate, based on a data processing time period of each target chip and a sub-data processing flow of a data processing node of each target chip in the data processing flow, a data processing duration of each target chip; according to the data processing nodes corresponding to the target chips, the transmission time length of the unit data quantity and the data processing time length of the target chips, calculating the data transmission time point of each target chip to the data to be processed.

In one embodiment, the target channel information determining module 404 is specifically configured to perform a target transmission time point based on a unit target data transmission amount of each channel information in each target chip, where the unit data transmission amount is greater than a sum of the unit target data transmission amounts of all the channel information in the data transmission distribution information of each target chip; identifying each piece of to-be-processed data transmitted at each target transmission time point and a transmission process of each piece of to-be-processed data, and adjusting the transmission time point of each piece of to-be-processed data according to the transmission process of each piece of to-be-processed data to obtain the target transmission time point of each piece of to-be-processed data; according to the target transmission time point of each piece of data to be processed and the target channel information of each piece of data to be processed, determining the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed in each target chip.

In one embodiment, the target channel information determining module 404 is specifically further configured to identify a percentage of the transmission process of each piece of data to be processed to the total transmission process, obtain a process ratio of each piece of data to be processed, and use the data to be processed corresponding to the process ratio smaller than the process ratio threshold value as the data to be processed to be adjusted; acquiring the comprehensive data transmission quantity of each channel information of transmission time points adjacent to the target transmission time point, and calculating the data quantity difference between the comprehensive data transmission quantity of each channel information and the unit target data transmission quantity of each channel information; and determining a target transmission time point of each piece of to-be-adjusted processing data according to the data quantity difference value and the data quantity of each to-be-adjusted processing data in the non-transmission process.

The above-mentioned modules in the chip multichannel cooperative transmission system may be implemented in whole or in part by software, hardware, and a combination thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one exemplary embodiment, a computer device is provided, which may be a terminal, and an internal structure diagram thereof may be as shown in fig. 5. The computer device includes a processor, a memory, an input/output interface, a communication interface, a display unit, and an input means. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input/output interface. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The input/output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program, when executed by a processor, implements a chip multichannel cooperative transmission method.

It will be appreciated by those skilled in the art that the structure shown in FIG. 5 is merely a block diagram of some of the structures associated with the present inventive arrangements and is not limiting of the computer device to which the present inventive arrangements may be applied, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.

In one exemplary embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:

In one embodiment, the processor, when executing the computer program, further implements the steps of the chip multi-channel cooperative transmission method in the other embodiments described above.

In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:

In one embodiment, the computer program when executed by the processor also implements the steps of the chip multi-channel cooperative transmission method in the other embodiments described above.

In one embodiment, a computer program product is provided comprising a computer program which, when executed by a processor, performs the steps of:

It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and the data (including but not limited to data for analysis, stored data, presented data, etc.) related to the present application are information and data authorized by the user or sufficiently authorized by each party, and the collection, use and processing of the related data need to comply with the related laws and regulations and standards of the related country and region.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magneto-resistive random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (PHASE CHANGE Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in various forms such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc. The databases referred to in the embodiments provided herein may include at least one of a relational database and a non-relational database. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processor referred to in the embodiments provided in the present application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, or the like, but is not limited thereto.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims

1. A chip multichannel cooperative transmission method, characterized in that the method comprises:

2. The method of claim 1, wherein determining the data processing flow corresponding to each of the data processing tasks comprises:

3. The method of claim 1, wherein the identifying the target chip corresponding to each of the data processing flows, and the data processing node of each of the target chips, comprises:

4. The method of claim 3, wherein optimizing the sub-data processing flows of the chips according to the target similarity between the data processing contents to obtain the sub-data processing flows of the target chips comprises:

5. The method of claim 4, wherein optimizing the sub-data processing flows corresponding to any two of the target data processing contents using the same data processing contents to obtain the sub-data processing flows of each of the target chips comprises:

6. The method of claim 3, wherein determining the data processing node of each target chip according to the sub-data processing flow of each target chip comprises:

7. The method of claim 1, wherein determining a data transmission time point of each target chip for each data to be processed based on the corresponding data processing node and the data processing age of each target chip comprises:

8. The method of claim 1, wherein the obtaining, according to the data transmission time point of each target chip for each piece of data to be processed and the channel information of each target chip, the target channel information of each target chip corresponding to each piece of data to be processed and the target transmission time point of each piece of data to be processed at each target chip includes:

9. The method of claim 8, wherein adjusting the transmission time point of each piece of the data to be processed according to the transmission process of each piece of the data to be processed to obtain the target transmission time point of each piece of the data to be processed comprises:

10. A chip multichannel cooperative transmission system, the system comprising: