CN117930731A - Control method and system for display of liquid crystal display instrument - Google Patents
Control method and system for display of liquid crystal display instrument Download PDFInfo
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Abstract
The invention discloses a control method and a control system for displaying a liquid crystal display instrument, and relates to the technical field of aviation. The method for using the multichannel liquid crystal display instrument is independently completed by the FPGA, does not need to add extra circuit design, reduces complexity and design cost, and has small volume and light weight. The real-time performance and the reliability are high; the method has the advantages that multiple VGA resolution display modes can be configured by parameters, the method is suitable for different display requirements, the code occupies small logic resources, the method can be suitable for most FPGA models in the market, the method is not limited by peripheral display devices, the application range is wide, and the display content is rich; based on FPGA parallel time sequence control development, the device can respond to multipath asynchronous display data in real time, synchronously control liquid crystal line and field scanning, and realize time sequence display driving, thereby ensuring design reliability, flexible configuration and wide applicability.
Description
Technical Field
The invention relates to the technical field of aviation, in particular to a control method and a control system for displaying a liquid crystal display instrument.
Background
With the high-speed development of avionics technology and liquid crystal display technology, the performance and complexity of the aircraft are gradually improved, and the number of aviation instruments is rapidly increased; this results in crowded display panels due to limited instrument panel space in the cockpit of the aircraft, and also presents information retrieval difficulties for the pilot. The host manufacturer has higher and higher requirement on instrument display, the digital liquid crystal display information is accurate and visual, can bear richer contents, is convenient for a driver to interpret, has small volume, low cost and low failure rate, so that the method of replacing the traditional mechanical instrument by the digital liquid crystal instrument is widely used in industry. The digital liquid crystal instrument has the main tasks of comprehensive display and decision making, and functions of information processing, comprehensive display, early warning and the like. Often there are multiple asynchronous data information display requirements on board, requiring parallel processing capabilities from the display device. The current method for realizing the display of the digital liquid crystal instrument mainly comprises the following two methods. The DSP and the FPGA are used as a core control mode, in the mode, the DSP realizes aviation bus interface data receiving and analyzing processing and display information transmitting to the FPGA, the FPGA realizes RGB coding and liquid crystal display control of display data, extra device cost is caused, the space of a printing plate is enlarged, and the cost is high. The MCU control mode is realized, in the mode, the display real-time performance is not high, the liquid crystal driving which needs to be adapted is realized, and the application range is narrow.
Disclosure of Invention
Aiming at the defects in the prior art, the control method and the system for the display of the liquid crystal display instrument provided by the invention solve the problems of low display instantaneity, liquid crystal drive needing adaptation, narrow application range and high cost in the display of the conventional digital liquid crystal instrument.
In order to achieve the aim of the invention, the invention adopts the following technical scheme:
there is provided a control method for a liquid crystal display meter display, comprising the steps of:
Step S1, starting a liquid crystal display instrument;
S2, detecting the communication state according to the required detection time and the handshake mark, and detecting the communication state of the liquid crystal display instrument through the FPGA to obtain corresponding communication state information;
S3, acquiring dynamic data and static data through an FPGA; carrying out data analysis processing on the dynamic data according to the communication state information to obtain dynamic display information data;
S4, acquiring pixel point data of a display diagram of the liquid crystal instrument; dividing and controlling the intervals of the pixel point data according to the resolution of the display pictures of the liquid crystal instrument to obtain corresponding display intervals; the pixel points comprise dynamic pixel points and static pixel points;
s5, scanning the dynamic pixel points and the static pixel points according to the display interval to determine an effective display area;
And S6, inputting dynamic display information data and static data into the liquid crystal through a VGA interface of the FPGA, and displaying the dynamic display information data and the static data in an effective display interval to complete control of liquid crystal display.
Further, the communication status information in step S2 includes a communication abnormal status and a communication normal status; when the communication abnormal state is displayed, the pixel is set to be red; when the communication is in a normal state, the pixel is set to be green.
Further, the dynamic data includes a dynamic display value and a dynamic display ring; the static data includes the instrument disc, the numerical value and scale, the channel identification, the unit symbol, i.e. the loading data of the ROM area.
Further, step S3 further includes:
S3-1, acquiring dynamic data in real time through an aviation bus interface of the FPGA; carrying out serial conversion and analysis processing on dynamic data according to Manchester codes and communication states to obtain dynamic display numerical values and communication state identifiers;
S3-2, acquiring static data through a ROM region of the FPGA;
the dynamic display information data comprises dynamic display numerical values and communication state identifiers.
Further, the display interval comprises a static display area and a dynamic display area; the dynamic display area comprises a first channel data display area, a second channel data display area, a dynamic numerical value display area, a communication state display area and a dynamic display circular ring; the static display area comprises an instrument disc, numerical values, scales, a channel identifier and a unit symbol.
Step S4 further comprises:
s4-1, according to display requirements, utilizing a drawing tool to formulate a display diagram of a liquid crystal instrument and converting the display diagram into pixel point data through MATLAB;
s4-2, according to the resolution of a display diagram of the liquid crystal instrument, an X-Y axis coordinate system is established by taking a central pixel point as an origin, two concentric circles with different radiuses are established, and the formed circular ring is a dynamic display circular ring;
S4-3, determining the circular rings displayed in the two quadrants and the three quadrants as a first channel data display area, the circular rings displayed in the two quadrants and the four quadrants as a second channel data display area, setting a communication state display area in the area defined by the circle with the smallest radius, wherein the area set by the square frame is a dynamic numerical display area, and the rest instrument area is a static display area by utilizing a constraint method combining the quadrants, the slopes and the figures of the coordinate system.
Further, the FPGA comprises arinc429_rx function modules, LCD_display function modules, LCD_driver function modules and PLL phase-locked loops;
arinc429_rx function module, which is used for arinc429 bus data acquisition and analysis, and as aviation bus interface, through configuration baud rate and check mode, converting differential serial data into parallel data, realizing dynamic data real-time acquisition;
The LCD_display function module is used for completing integral data to float data, float data division operation, comparison operation and data reading by using the float-Point IP and the ROM IP, and realizing the division of the display interval of pixel Point data and the reading of static data;
the LCD_driver functional module is used for completing the driving of the liquid crystal display according to the corresponding VESA standard and VGA scanning time sequence;
And the PLL is used for realizing clock frequency division and reset synchronization processing.
The control system for the display of the liquid crystal display instrument comprises a communication state acquisition module, a dynamic display information data acquisition module, a pixel division module, a driving module and a liquid crystal display;
The liquid crystal display is used for displaying dynamic display information data through a VGA interface of the FPGA;
The communication state acquisition module is used for displaying dynamic display information data and static data through the FPGA;
the dynamic display information data acquisition module is used for acquiring and analyzing arinc429 bus data by utilizing a arinc429_rx functional module of the FPGA, and acquiring dynamic display values in real time by taking the dynamic display information data acquisition module as an aviation bus interface; acquiring static data by utilizing ROM of FPGA;
the pixel dividing module is used for up-driving and static pixel point data and dividing display intervals of the pixel point data by utilizing an LCD_display function module of the FPGA;
And the driving module is used for completing the liquid crystal display driving by utilizing the LCD_driver function module of the FPGA according to the corresponding VESA standard and VGA scanning time sequence.
The beneficial effects of the invention are as follows: the method for using the multichannel liquid crystal display instrument is independently completed by the FPGA, does not need to add extra circuit design, reduces complexity and design cost, and has small volume and light weight. The real-time performance and the reliability are high; the method has the advantages that multiple VGA resolution display modes can be configured by parameters, the method is suitable for different display requirements, the code occupies small logic resources, the method can be suitable for most FPGA models in the market, the method is not limited by peripheral display devices, the application range is wide, and the display content is rich; the system is developed based on FPGA parallel time sequence control, can respond to multipath asynchronous display data in real time, synchronously control liquid crystal line and field scanning, and realize time sequence display driving, thereby ensuring design reliability, flexible configuration and wide applicability.
Drawings
FIG. 1 is a flow chart of the method of the present invention;
FIG. 2 is a block diagram of a hardware system for a liquid crystal instrument display developed based on an FPGA;
FIG. 3 is a VGA line field timing diagram;
FIG. 4 is a Schematic view of a programmable logic device software FPGA;
FIG. 5 is a liquid crystal meter display;
Wherein: 1. a channel identifier; 2. dynamically displaying the circular ring; 3. a unit symbol; 4. a communication state identifier; 5. the numerical values are dynamically displayed.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
As shown in fig. 1 and 2, a control method for a liquid crystal display meter display includes the steps of:
Step S1, starting a liquid crystal display instrument;
S2, detecting the communication state according to the required detection time and the handshake mark, and detecting the communication state of the liquid crystal display instrument through the FPGA to obtain corresponding communication state information;
The communication state information in step S2 includes a communication abnormal state and a communication normal state; when the communication abnormal state is displayed, the pixel is set to be red; when the communication is in a normal state, the pixel is set to be green.
S3, acquiring dynamic data and static data through an FPGA; carrying out data analysis processing on the dynamic data according to the communication state information to obtain dynamic display information data;
the dynamic data comprises a dynamic display numerical value 5 and a dynamic display circular ring 2; the static data includes the instrument disc, the numerical value and scale, the channel identifier 1, the unit symbol 3, i.e. the loading data of the ROM area.
Step S3 further comprises:
S3-1, acquiring dynamic data in real time through an aviation bus interface of the FPGA; carrying out serial conversion and analysis processing on dynamic data according to Manchester codes and communication states to obtain a dynamic display numerical value 5 and a communication state identifier 4;
S3-2, acquiring static data through a ROM region of the FPGA;
the dynamic display information data comprises a dynamic display numerical value 5 and a communication state identifier 4.
S4, acquiring pixel point data of a display diagram of the liquid crystal instrument by utilizing MATLAB; dividing and controlling the intervals of the pixel point data according to the resolution of the liquid crystal display instrument picture to obtain corresponding display intervals; the pixel points comprise dynamic pixel points and static pixel points;
The display interval comprises a static display area and a dynamic display area; the dynamic display area comprises a first channel data display area, a second channel data display area, a dynamic numerical value display area, a communication state display area and a dynamic display circular ring 2; the static display area comprises an instrument disc, numerical values and scales, a channel identifier 1 and a unit symbol 3.
Step S4 further comprises:
s4-1, according to display requirements, utilizing a drawing tool to formulate a display diagram of a liquid crystal instrument and converting the display diagram into pixel point data through MATLAB;
S4-2, according to the resolution of a display diagram of the liquid crystal instrument, an X-Y axis coordinate system is established by taking a central pixel point as an origin, two concentric circles with different radiuses are established, and the formed circular ring is the dynamic display circular ring 2;
S4-3, determining the circular rings displayed in the two quadrants and the three quadrants as a first channel data display area, the circular rings displayed in the two quadrants and the four quadrants as a second channel data display area, setting a communication state display area in the area defined by the circle with the smallest radius, wherein the area set by the square frame is a dynamic numerical display area, and the rest instrument area is a static display area by utilizing a constraint method combining the quadrants, the slopes and the figures of the coordinate system. The constraint method comprises the following steps: the dynamic display area is obtained by dividing the circular ring through a scale boundary and a coordinate axis boundary. Constraining the scale boundary of the dynamic display ring 2 by using the boundary slope to be displayed to a specific scale value, and determining the display area of the dynamic display ring 2 by combining the coordinate axis boundary and the ring area formed in the step S4-2;
s5, scanning the dynamic pixel points and the static pixel points according to the display interval to determine an effective display area;
And S6, inputting dynamic display information data and static data into the liquid crystal through a VGA interface of the FPGA, and displaying the dynamic display information data and the static data in an effective display interval to complete control of liquid crystal display.
The FPGA comprises arinc429_rx functional modules, LCD_display functional modules, LCD_driver functional modules and a PLL phase-locked loop;
arinc429_rx function module, which is used for arinc429 bus data acquisition and analysis, and as aviation bus interface, through configuration baud rate and check mode, converting differential serial data into parallel data, realizing dynamic data real-time acquisition;
The LCD_display function module is used for completing integral data to float data, float data division operation, comparison operation and data reading by using the float-Point IP and the ROM IP, and realizing the division of the display interval of pixel Point data and the reading of static data;
the LCD_driver functional module is used for completing the driving of the liquid crystal display according to the corresponding VESA standard and VGA scanning time sequence;
As shown in fig. 3, the synchronization time, the display back shoulder time, the display front shoulder time, and the active video constitute one complete cycle. And uploading corresponding display data in the divided dynamic and static display areas in the effective display interval. And simultaneously, the arbitration scanning of static data and dynamic data is completed. The dynamic ring color interval control is realized by comparing the display numerical value with the scale interval, so that the threshold value area dynamic ring color bar distinguishing prompt is realized.
And the PLL is used for realizing clock frequency division and reset synchronization processing.
As shown in fig. 4, the i_ arinc429_parity [1 … 0] port of the arinc429_rx functional module is grounded; the i_ arinc429_clk port of the arinc429_rx functional module is connected with the inclk0 port of the PLL phase-locked loop and serves as an FPGA_clk port; the i_ arinc429_rst_n of the arinc429_rx functional module is respectively connected with the aresrt port and the pin 1 of the rst_n of the PLL phase-locked loop and is used as a RESET port; the o_ arinc429rx data [31 … 0] port of the arinc429_rx functional module is connected with the o_ arinc429rx data [31 … 0] port of the LCD_display functional module; the c0 port of the PLL phase-locked loop is respectively connected with the LCD_CLK port of the LCD_driver functional module and the LCD_CLK port of the LCD_display functional module; the locked port of the PLL is connected with pin 2 of rst_n;
The H_Resolution [10 … ] port of the LCD_display functional module is connected with the H_Resolution [10 … ] port of the LCD_driver functional module; the pixel_ Xpos [10 … ] port of the LCD_display function module is connected with the pixel_ Xpos [10 … ] port of the LCD_driver function module; the pixel_ Ypos [10 … ] port of the LCD_display function module is connected with the pixel_ Ypos [10 … ] port of the LCD_driver function module; the V_Resolution [10 … ] port of the LCD_display functional module is connected with the V_Resolution [10 … 0] port of the LCD_driver functional module; the Xpos [10 … 0] port of the LCD_display functional module is connected with the Xpos [10 … 0] port of the LCD_driver functional module; the Ypos [10 … 0] port of the LCD_display functional module is connected with the Ypos [10 … 0] port of the LCD_driver functional module; the rst_n port of the LCD_display function module is respectively connected with the rst_n port and the pin 3 of rst_n of the LCD_driver function module; the pixel_Data [15 … 0] port of the LCD_display function module is connected to the pixel_Data [15 … ] port of the LCD_driver function module.
As shown in fig. 5, the channel logo 1 includes display areas of logo 1# and logo 2 #; the dynamic display ring 2 is divided into a left semicircular ring and a right semicircular ring, wherein the left semicircular ring is a dynamic ring indication of 1 channel, and the right semicircular ring is a dynamic ring indication of 2 channels; the unit symbol 3 is the pressure; the communication state identifier 4 comprises a first channel data display area and a second channel data display area; the dynamic display value 5 displays real-time data. In fig. 5, the left semicircle shows a value of 15.0 and the right semicircle shows a value of 13.0.
The control system for the display of the liquid crystal display instrument comprises a communication state acquisition module, a dynamic display information data acquisition module, a pixel division module, a driving module and a liquid crystal display;
The liquid crystal display is used for displaying dynamic display information data and static data through the FPGA;
the communication state acquisition module is used for detecting the communication state of the liquid crystal display instrument through the FPGA to obtain a corresponding communication state;
The dynamic display information data acquisition module is used for acquiring and analyzing arinc429 bus data by utilizing a arinc429_rx functional module of the FPGA, and acquiring a dynamic display numerical value 5 in real time by taking the dynamic display information data acquisition module as an aviation bus interface; acquiring static data by utilizing ROM of FPGA;
the pixel dividing module is used for up-driving and static pixel point data and dividing display intervals of the pixel point data by utilizing an LCD_display function module of the FPGA;
And the driving module is used for completing the liquid crystal display driving by utilizing the LCD_driver function module of the FPGA according to the corresponding VESA standard and VGA scanning time sequence.
In summary, the method of using the multichannel liquid crystal display instrument is independently completed by the FPGA, and does not need to add additional circuit design, thereby reducing complexity and design cost, and having small volume and light weight. The real-time performance and the reliability are high; the method has the advantages that multiple VGA resolution display modes can be configured by parameters, the method is suitable for different display requirements, the code occupies small logic resources, the method can be suitable for most FPGA models in the market, the method is not limited by peripheral display devices, the application range is wide, and the display content is rich; the system is developed based on FPGA parallel time sequence control, can respond to multipath asynchronous display data in real time, synchronously control liquid crystal line and field scanning, and realize time sequence display driving, thereby ensuring design reliability, flexible configuration and wide applicability.
Claims (8)
1. A control method for the display of a liquid crystal display instrument is characterized in that: the method comprises the following steps:
Step S1, starting a liquid crystal display instrument;
S2, detecting the communication state according to the required detection time and the handshake mark, and detecting the communication state of the liquid crystal display instrument through the FPGA to obtain corresponding communication state information;
S3, acquiring dynamic data and static data through an FPGA; carrying out data analysis processing on the dynamic data according to the communication state information to obtain dynamic display information data;
S4, acquiring pixel point data of a display diagram of the liquid crystal instrument; dividing and controlling the intervals of the pixel point data according to the resolution of the display pictures of the liquid crystal instrument to obtain corresponding display intervals; the pixel point data comprises dynamic pixel points and static pixel points;
s5, scanning the dynamic pixel points and the static pixel points according to the display interval to determine an effective display area;
And S6, inputting dynamic display information data and static data into the liquid crystal through a VGA interface of the FPGA, and displaying the dynamic display information data and the static data in an effective display interval to complete control of liquid crystal display.
2. The control method for a liquid crystal display meter display according to claim 1, wherein: the communication state information in the step S2 includes a communication abnormal state and a communication normal state; when the communication abnormal state is displayed, the pixel is set to be red; when the communication is in a normal state, the pixel is set to be green.
3. The control method for a liquid crystal display meter display according to claim 2, wherein: the dynamic data comprises a dynamic display numerical value (5) and a dynamic display circular ring (2); the static data comprises the loading data of the instrument disc, the numerical value and scale, the channel identifier (1) and the unit symbol (3), namely the ROM area.
4. The control method for a liquid crystal display meter display according to claim 3, wherein: the step S3 further includes:
S3-1, acquiring dynamic data in real time through an aviation bus interface of the FPGA; carrying out serial conversion and analysis processing on dynamic data according to Manchester codes and communication states to obtain dynamic display numerical values (5) and communication state identifiers (4);
S3-2, acquiring static data through a ROM region of the FPGA;
the dynamic display information data comprises a dynamic display numerical value (5) and a communication state identifier (4).
5. The control method for a liquid crystal display meter display according to claim 3, wherein: the display interval comprises a static display area and a dynamic display area; the dynamic display area comprises a first channel data display area, a second channel data display area, a dynamic numerical value display area, a communication state display area and a dynamic display circular ring (2); the static display area comprises an instrument disc, numerical values, scales, a channel identifier (1) and a unit symbol (3).
6. The control method for a liquid crystal display meter display according to claim 5, wherein: the step S4 further includes:
s4-1, according to display requirements, utilizing a drawing tool to formulate a display diagram of a liquid crystal instrument and converting the display diagram into pixel point data through MATLAB;
s4-2, according to the resolution of a display diagram of the liquid crystal instrument, an X-Y axis coordinate system is established by taking a central pixel point as an origin, two concentric circles with different radiuses are established, and the formed circular ring is the dynamic display circular ring (2);
S4-3, determining the circular rings displayed in the two quadrants and the three quadrants as a first channel data display area, the circular rings displayed in the two quadrants and the four quadrants as a second channel data display area, setting a communication state display area in the area defined by the circle with the smallest radius, wherein the area set by the square frame is a dynamic numerical display area, and the rest instrument area is a static display area by utilizing a constraint method combining the quadrants, the slopes and the figures of the coordinate system.
7. The control method for a liquid crystal display meter display according to claim 6, wherein: the FPGA comprises arinc429_rx function modules, LCD_display function modules, LCD_driver function modules and a PLL phase-locked loop;
The arinc429_rx functional module is used for arinc429 bus data acquisition and analysis, and is used as an aviation bus interface to convert differential serial data into parallel data by configuring a baud rate and a verification mode, so that real-time acquisition of dynamic data is realized;
The LCD_display function module is used for completing integral data to float data, float data division operation, comparison operation and data reading by using the Floating-Point IP and the ROM IP, and realizing the division of the display interval of pixel Point data and the reading of static data;
The LCD_driver functional module is used for completing the driving of the liquid crystal display according to the corresponding VESA standard and VGA scanning time sequence, and an IP core is not used;
The PLL is used for realizing clock frequency division and reset synchronization processing.
8. A control system based on the control method for liquid crystal display meter display according to any one of claims 1 to 7, characterized in that: the device comprises a communication state acquisition module, a dynamic display information data acquisition module, a pixel division module, a driving module and liquid crystal display;
the liquid crystal display is used for displaying dynamic display information data and static data through the FPGA;
The communication state acquisition module is used for detecting the communication state of the liquid crystal display instrument through the FPGA to obtain a corresponding communication state;
The dynamic display information data acquisition module is used for acquiring and analyzing arinc bus data by utilizing a arinc429_rx functional module of the FPGA and acquiring a dynamic display numerical value (5) in real time by taking the dynamic display information data acquisition module as an aviation bus interface; acquiring static data by utilizing ROM of FPGA;
the pixel dividing module is used for up-driving and static pixel point data and dividing a display interval of the pixel point data by utilizing an LCD_display function module of the FPGA;
The driving module is used for completing the liquid crystal display driving by utilizing the LCD_driver function module of the FPGA according to the corresponding VESA standard and VGA scanning time sequence.
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