CN117917858A

CN117917858A - Method and system for early termination of iterative detection and decoding

Info

Publication number: CN117917858A
Application number: CN202311027856.3A
Authority: CN
Inventors: 莫塔巴·拉马迪; 裵东运; 权赫准
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 2022-10-21
Filing date: 2023-08-15
Publication date: 2024-04-23

Abstract

A method and system for early termination of iterative detection and decoding is disclosed, as is a system and method for determining early termination during an Iterative Detection and Decoding (IDD) process. The method may include: one or more log-likelihood ratios (LLRs) of one or more Cyclic Redundancy Checks (CRCs) are calculated during the IDD process, and at least one of the LLRs is determined to predict a CRC check failure, and in response, the IDD process is terminated.

Description

Method and system for early termination of iterative detection and decoding

The present application claims priority from U.S. provisional application serial No. 63/418,346, filed on day 2022, 10, 21, and U.S. patent application serial No. 18/074,372, filed on day 2022, 12, 2, the disclosures of which are incorporated herein by reference in their entireties as if fully set forth herein.

Technical Field

The present disclosure relates generally to reducing power consumption in a communication system. More particularly, the subject matter disclosed herein relates to methods and systems for early termination of iterative detection and decoding.

Background

In digital communication systems, such as those utilized in Long Term Evolution (LTE) and/or fifth generation new radio (5G NR) technologies, multiple Input and Multiple Output (MIMO) systems transmit coded modulation symbols from one device to another, e.g., from one User Equipment (UE) to another UE. In 5G NR, information exchange may be between an LDPC decoder and a symbol detector, and in LTE, information exchange may be between a Turbo decoder and a symbol detector. Thus, the UE demodulates and decodes the received symbols in order to utilize the received information.

Disclosure of Invention

Efforts are currently underway to improve the quality of the received symbols while reducing power consumption. Thus, the methods and systems described throughout this disclosure relate to terminating an Iterative Detection and Decoding (IDD) when further iterations of the IDD are determined to be unlikely to improve decoding symbols.

According to some embodiments of the present disclosure, a method may include: during an Iterative Detection and Decoding (IDD) process, computing one or more Log Likelihood Ratios (LLRs) for one or more Cyclic Redundancy Checks (CRCs); and determining that at least one of the one or more LLRs failed a predictive CRC check and, in response, terminating the IDD process.

The one or more LLRs may be calculated for each code block of the transmit block in response to the transmit block failing a CRC check after a global iteration of the IDD process.

The terminating the IDD process may be performed for all code blocks of the transmit block including at least one code block for which the LLR prediction passes a CRC check.

The terminating the IDD process is performed for one or more code blocks for which the LLR predicts a CRC check failure, and wherein the IDD process continues for at least one code block for which the LLR predicts passed a CRC check.

The one or more LLRs may be calculated for a transmit block in response to the transmit block failing a CRC check after a global iteration of the IDD process.

The LLR prediction of the CRC check failure may be based on calculating mutual information between the transmitted bits and the LLR at the output of the decoder, and wherein the mutual information is less than a threshold.

The LLR prediction of the CRC check failure may be based on calculating an average of magnitudes of all of the LLRs, and wherein the average of magnitudes is less than a threshold.

The LLR prediction of the CRC check failure may be based on calculating a sign-change ratio (SCR) between the LLR at the input of the decoder and the LLR at the output of the decoder, and wherein the SCR is less than a threshold.

The LLR prediction of the CRC check failure may be based on calculating a number of zero LLRs at an input of the decoder and at an output of the decoder, and wherein the number of zero LLRs is less than a threshold.

The IDD may be performed to reduce power consumption in a New Radio (NR) or Long Term Evolution (LTE) communication system.

According to some embodiments of the present disclosure, a receiver is disclosed. The receiver may include: processing circuitry comprising a detector and a decoder coupled to the detector, wherein the processing circuitry is configured to: during an Iterative Detection and Decoding (IDD) process, computing one or more Log Likelihood Ratios (LLRs) for one or more Cyclic Redundancy Checks (CRCs); and determining that at least one of the one or more LLRs failed a predictive CRC check and, in response, terminating the IDD process.

The one or more LLRs may be calculated for each code block of a transmit block in response to the transmit block failing a CRC check after a global iteration of the IDD process.

The terminating the IDD process may be performed for one or more code blocks for which the LLR predicts a CRC check failure, and wherein the IDD process continues for at least one code block for which the LLR predicts a CRC check.

Drawings

In the following sections, aspects of the subject matter disclosed herein will be described with reference to exemplary embodiments shown in the drawings, in which:

fig. 1 is a block diagram of a symbol detector and decoder of an electronic device according to an embodiment of the present disclosure.

Fig. 2 is a flowchart of a method for determining early termination of an IDD process, according to an embodiment of the disclosure.

Fig. 3 is a flowchart of a method for determining early termination of an IDD process according to another embodiment of the present disclosure.

Fig. 4 is a flow chart of a method for determining premature termination of an IDD according to various embodiments of the disclosure.

Fig. 5 is a flowchart of a method for determining premature termination of an IDD when performing two or more global iterations of the IDD, according to various embodiments of the disclosure.

Fig. 6 is a block diagram of an electronic device in a network environment according to an embodiment.

Fig. 7 is a system block diagram of a first electronic device in communication with a second electronic device in accordance with various embodiments of the present disclosure.

Detailed Description

In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be understood by those skilled in the art that the disclosed aspects may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to obscure the subject matter disclosed herein.

Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment disclosed herein. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" or "according to one embodiment" (or other phrases having similar meanings) in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In this regard, as used herein, the word "exemplary" means "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. Furthermore, depending on the context discussed herein, singular terms may include the corresponding plural forms and plural terms may include the corresponding singular forms. Similarly, hyphenated terms (e.g., "two-dimensional," "pre-determined," "pixel-specific," etc.) may be occasionally used interchangeably with corresponding non-hyphenated versions (e.g., "two-dimensional," "pre-determined," "pixel-specific," etc.), and uppercase entries (e.g., "Counter Clock," "Row Select," "pixel output (PIXOUT)" etc.) may be used interchangeably with corresponding non-uppercase versions (e.g., "Counter Clock," "Row Select," "pixel output (pixout)" etc.). Such occasional interchangeable uses should not be considered inconsistent with each other.

It should also be noted that the various figures (including component figures) shown and discussed herein are for illustrative purposes only and are not drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the figures to indicate corresponding and/or analogous elements.

The terminology used herein is for the purpose of describing some example embodiments only and is not intended to limit the claimed subject matter. As used herein, the singular is intended to include the plural as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It will be understood that when an element or layer is referred to as being "on," "connected to" or "coupled to" another element or layer, it can be directly on, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers present. Like numbers refer to like elements throughout. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

As used herein, the terms "first," "second," and the like are used as labels for nouns following them, and do not imply any type of ordering (e.g., spatial, temporal, logical, etc.), unless so defined explicitly. Furthermore, the same reference numbers may be used throughout two or more drawings to refer to parts, components, blocks, circuits, units, or modules having the same or similar functionality. However, such use is merely for simplicity of illustration and ease of discussion; it is not intended that the construction or architectural details of such components or units be the same in all embodiments, or that such commonly referred parts/modules be the only way to implement some example embodiments disclosed herein.

Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

As used herein, the term "module" refers to any combination of software, firmware, and/or hardware configured to provide the functionality described herein in connection with the module. For example, software may be implemented as a software package, code and/or instruction set or instructions, and the term "hardware" as used in any of the embodiments described herein may include, for example, assemblies, hardwired circuitry, programmable circuitry, state machine circuitry, and/or firmware that stores instructions executed by the programmable circuitry, either alone or in any combination. Modules may be implemented collectively or individually as circuitry forming part of a larger system, such as, but not limited to, an Integrated Circuit (IC), a system-on-a-chip (SoC), a component, etc.

The terms "success," "successful," "pass," and "fail," as used herein, are all intended to be synonymous. The terms "fail", "failed", "unsuccessful" and "failed" as used herein are intended to be synonymous.

Fig. 1 is a block diagram showing information flow of devices implementing an IDD message switching structure. In some embodiments, the signal is transmitted from a transmitting device (such as a transmitting UE) that is encoded into symbols and modulated. The apparatus shown in fig. 1 may be, for example, a receiving UE that performs detection and decoding of a received signal. As shown, the received signal (Y), channel estimate (H), and noise variance are provided as inputs to the symbol detector 100, and the output of the symbol detector 100 (APP LLR) is provided as an input to the decoder 102 (dec_in). Here, the symbol detector 100 may be configured to demodulate the received signal (Y) and generate a Log Likelihood Ratio (LLR) (APP LLR) of the detected symbol at the output to assign a confidence score to each bit detected. The confidence score may be a confidence that the bit will be a1 or 0. The LLR may be APP or External (EXT), depending on the application. For example, the output of decoder 102 may be an APP LLR, but dec_out is an EXT LLR as shown IN fig. 1, which may be expressed as EXT lrr=app LLR-dec_in. Thus, the LLRs may then be provided to decoder 102 where they are decoded to generate 1's and 0's, and a CRC check is applied to determine if the decoded bits were successful. Thus, in some cases, the decoding process may fail. That is, the decoding process may not generate the correct result because the decoder, if successful, should generate the same symbol encoded by the transmitter side when the symbol is encoded and modulated, and should also pass the CRC check. Thus, if the decoding is unsuccessful, the decoding process can be performed again and again by utilizing or employing available information such as LLRs. Thus, a feedback path from the decoder to the detector can be created to improve the results in the next iteration of detection and decoding. These further iterations may yield improved results because the first iteration does not have the decoder feedback, but future iterations have the decoder feedback.

Thus, the output from decoder 102 may be provided back to detector 100 as feedback, and the feedback may be used to improve detection by detector 100 according to a technique known as Iterative Detection and Decoding (IDD). IDD is a technique that can improve the performance gain in any coded modulation scheme, such as the one described above. This may be particularly useful in cellular communication systems such as 4G LTE and 5G NR. However, iterative operation of IDD is power consuming and, while performing many iterations may improve the quality of decoded symbols, performing too many iterations may negatively impact battery life and/or memory usage. Accordingly, techniques for performing IDDs with early termination to stop or reduce the iterative process to reduce power consumption while still achieving improved results are desired. In this disclosure, one iteration of detection and decoding is referred to as a Global Iteration (GI).

To reduce the impact on battery life, memory, and/or time caused by performing the IDD, the IDD may be terminated. However, it may not be desirable to blindly terminate the IDD without properly considering the increased value due to the IDD performing multiple iterations. In other words, if another iteration of IDD is performed, which may improve the next result, the benefit may exceed the cost of power consumption, time, and/or memory usage. On the other hand, if another iteration of performing the IDD is less likely to improve the next result, it may be more beneficial to terminate the IDD and not consume further power, time, and/or memory.

In accordance with various embodiments of the present disclosure, techniques for predicting success or failure after IDD will be disclosed. Thus, if success can be predicted after the IDD, it may be beneficial to continue to execute the IDD, or if a prediction failure can occur after the IDD, to terminate the IDD (i.e., not continue the IDD). Accordingly, waste of resources can be reduced (e.g., avoided or prevented).

In some embodiments, the confidence factor for a code block or a transmitted block may be determined taking into account the LLRs for that block. More specifically, confidence factors from the LLR may be used to determine or predict the likelihood of a Cyclic Redundancy Check (CRC) passing or failing. For example, as known to those skilled in the art, a CRC is an error detection scheme in which a successful CRC indicates no error symbols, while an unsuccessful CRC indicates that there may be an error in the symbols. Thus, if predicting the CRC based on the LLR confidence factor is successful, the IDD may continue. On the other hand, if predicting the CRC based on the LLR confidence factor is unsuccessful, the IDD may be terminated (e.g., early termination). In the present disclosure, the prediction may be determined or calculated from various metrics, as will be described in more detail below. In some embodiments, a metric may be determined at the output of decoder 102 based on the LLR, and the metric may be compared to a threshold to predict whether the IDD will succeed or fail.

In some embodiments, the bits are constructed as blocks. That is, bits may be grouped into code blocks, where each code block includes several bits. Several Code Blocks (CBs) may be grouped together to form a Transmit Block (TB). Each code block may be encoded and decoded independently of the other. Thus, for example, if there is an error in one of several code blocks in a transmitted block, the error is independent of that code block and does not necessarily affect or cause an error in another code block. On the other hand, if there is an error in one code block, the entire transmission block can be considered to have an error.

Thus, because the code blocks are independent of each other, if one code block is successful and another code block is unsuccessful after one iteration of the IDD is performed, no further iteration is performed on the successful code block because the code block has passed and power can be saved by terminating the IDD of the code block. However, if further iterations of performing IDD can be predicted to be successful, further iterations of IDD can be performed on the failed code block. If it predicts that further iterations still will not result in success, the IDD may be terminated. Accordingly, various techniques for performing such intelligent prediction will be described.

According to embodiments of the present disclosure, code block level early termination may be performed during operation of a first iteration of detection and decoding, for example, by the system shown in fig. 1.

Fig. 2 is a flow chart of a code block level early termination technique according to an embodiment of the present disclosure. At step 200, the CRC of the transmit block is determined. If the CRC of the transmit block passes, the detection and decoding process may be terminated at step 202, as a successful CRC indicates that the transmission was received correctly and decoded correctly. In other words, the detection and decoding may terminate after the first iteration, so multiple iterations, such as IDD, do not have to be performed.

If the CRC of the transmitted block fails, a further evaluation of the code block level may be performed. Thus, in step 204, the code block index is set to 1, which indicates that the first code block of the transmit block is to be checked independently of the other code blocks. At step 206, the CRC of the code block is determined. If the CRC of the code block fails, then the entire LLR of the failed code block is checked to obtain an early termination decision metric in step 208. Thus, at step 210, the metric may be used to predict whether the CRC check of the code block will be successful if another iteration of the IDD is performed. If it is predicted that future CRC will fail after another IDD iteration, then the IDD operation may be terminated at step 202.

If the CRC check of step 206 is successful, then the code block index is incremented to the next index (e.g., 2) at step 212. In step 214, if the code block index is less than the total number of code blocks in the transmitted block, the next code block is checked. Thus, step 206 is repeated, wherein the CRC of the next code block (e.g., code block of index 2) is calculated to determine whether it is a success or failure, and the remaining steps are repeated as already explained above.

Returning to step 214, if the code block index is greater than the total number of code blocks in the transmit block, this indicates that all code blocks have been checked and that there are no more code blocks in the transmit block that need to be checked. Thus, at step 216, IDD may continue.

Thus, the metric of the code block of the failed transmit block may be calculated by using the LLR of the code block, and may be compared to some threshold (which may be a predetermined or preset threshold) to predict whether the CRC of the code block will pass or fail in the next or further iteration of the IDD. If the prediction is that the CRC will fail, the IDD is terminated because it is preferable to terminate and save resources (e.g., power, memory) if further iterations will not produce the desired result (i.e., pass the CRC).

According to this technique, if the CRC of even one code block is predicted to fail, the IDD of the entire transmission block will be terminated. However, if the prediction of the CRC for the first code block is predicted to be successful, the next code block is checked, and if they continue to be predicted to be successful, and so on. When all code blocks are checked and all code blocks are predicted to be successful, then the IDD will continue. Otherwise, when one code block is predicted to fail, the IDD of the entire transmission block is terminated.

For example, in the case of a MIMO transmission including a1 codeword transmission of only one codeword, the LLRs of all CBs that failed the CRC may be checked independently, and then the IDD is terminated even if one code block is predicted to fail, but if all code blocks are predicted to pass, the second global iteration is continued. An example pseudo code for CB level Early termination for the 1 codeword case (e.g., 5G-NR) is shown below in table 1, where Early Terminate Func represents the operation of different possible Early termination schemes using different Early termination decision metrics, as will be described in more detail below.

TABLE 1

For the 2 codeword case where the MIMO transmission includes transmission of two codewords, the difference between NR-MIMO (up to rank 4) and LTE-MIMO is codeword to layer mapping, where in NR a single codeword (e.g., TB) may be mapped to all layers (up to 4 layer case) and in LTE two codewords (e.g., two TBs) may be mapped to all available layers. It can be assumed that a parallel IDD structure is used for parallel detection of 2 codeword cases for all layers (corresponding to two codewords). Thus, instead of declaring premature termination per codeword, premature termination may be declared for two codewords, or IDD operations may continue for two codewords. Thus, the early termination decision for each codeword is first determined and IDD early termination is declared only if both codewords declare early termination. Further, for codeword decisions, LLR features corresponding to two codewords may be utilized. An example pseudocode summarizing the operation of CB class early termination for LTE is shown in table 2.

TABLE 2

According to another embodiment of the present disclosure, a per code block early termination technique may be performed. Similar to the code block level early termination technique described above, the CRC at the transmit block level is calculated and evaluated to determine whether the CRC passed or failed. If the CRC of the transmitted block passes, the detection and decoding process may terminate, as a successful CRC indicates that the transmission was received correctly and decoded correctly. In other words, the detection and decoding may terminate after the first iteration, so multiple iterations, such as IDD, do not have to be performed.

If the CRC of the transmitted block fails, a further evaluation of the code block level may be performed. Thus, the metric of the code block of the failed transmit block may be calculated by using the LLR to determine whether the CRC of the code block will pass or fail prediction in the next or further iteration. It should be noted that the procedure for per-code-block early termination and code-block-level early termination is so far the same.

However, if the prediction is that the CRC will pass, then the IDD of the code block may continue to operate independently. Thus, metrics of the next code block may be calculated and considered, and if the predicted CRC fails, the IDD is terminated for the code block predicted to fail the CRC, and the IDD may continue to operate for any code block predicted to pass. Thus, in this per-code-block early termination technique, metric computation is performed on a code-block basis, and early termination is also performed at the code-block level. This may be helpful during retransmission and less decoding is performed in retransmission.

For example, in the HARQ on mode, the goal may be to pass as many code block CRCs as possible in the first transmission, regardless of the expected result of the transmit block CRC check. For HARQ on, code block CRC passing may be beneficial to reduce decoding overhead in retransmissions even if the transmit block CRC fails. Therefore, according to the early termination per code block technique, the LLRs of all the code blocks whose CRCs failed can be checked independently, but the IDD processing is continued for the code blocks predicted to pass the code block CRCs, and the IDD processing for the code blocks whose CRCs were predicted to fail is terminated. Example pseudo codes for Early termination per code block of NR are shown in table 3 below, where Early Terminate Func represents the operation of different possible Early termination schemes (such as MI-based, average LLR-based, and SCR-based).

TABLE 3 Table 3

According to another embodiment of the present disclosure, a transmit block level early termination technique may be performed. Fig. 3 is a flow chart of a transmit block level early termination technique according to an embodiment of the present disclosure. Also, similar to the code block level early termination technique and the per code block early termination technique described above, at step 300, a transmit block level CRC is calculated and evaluated to determine whether the CRC passed or failed. If the CRC of the transmit block passes, then the detection and decoding process may terminate at step 302, as a successful CRC indicates that the transmission was received correctly and decoded correctly. In other words, the detection and decoding may terminate after the first iteration, so multiple iterations, such as IDD, do not have to be performed.

However, if the CRC at the transmit block level fails, LLRs for the entire transmit block are calculated and metrics are calculated based on these LLRs in step 304. If the CRC of the transport block is predicted to fail in step 306, the IDD of the entire transport block is terminated in step 302. On the other hand, if the CRC of the transport block is predicted to pass at step 306, IDD is continued for the entire transport block at step 308. Thus, the technique examines the metrics at the transmit block level and if the condition for early termination is met, the IDD is also terminated at the transmit block level. An example of pseudocode summarizing the operation of the transmit block level early termination is shown in table 4 below.

TABLE 4 Table 4

Next, techniques for calculating metrics that may be used by the early termination techniques described above will be described in more detail in accordance with various embodiments of the present disclosure. According to some embodiments, the metrics may be calculated by terminating the metrics in advance based on mutual information. The metric may be calculated by obtaining mutual information between the transmitted bits and the external LLRs at the output of the decoder. Mutual Information (MI) can be represented by the following formula:

Where χ is the ith transmission bit, and

(Or equivalently LLR _i) are LLRs at the output of the decoder, and i corresponds to a bit position index. That is, mutual information may be determined by calculating LLR metrics for each bit position at the output of the decoder, and then averaging all of these LLRs over the peak positions. Once the mutual information is calculated, the MI may be compared to a preset or predetermined threshold to predict the status of the CRC check in the next global iteration (e.g., whether the CRC may pass or fail). For example, if MI (cb _idx)<Thr_MI), the prediction may be that the CRC will fail and thus the IDD may terminate, whereas if MI (cb _idx)≥Thr_MI), the prediction may be that the CRC will pass and thus the IDD may continue.

According to another embodiment, the metric may be calculated by an early termination metric based on the average LLR. The average LLR-based early termination metric may be obtained as an average of the LLR magnitudes according to the following equation:

Wherein the average of the magnitudes of all LLRs is calculated and then compared to a preset or predetermined threshold to predict CRC check in the next global iteration. Thus, thousands of LLRs may be scaled down to only one metric, i.e., the average LLR from all LLRs, which is then compared to a threshold. Otherwise, if mean_LLR (cb _idx)≥Thr_meanLLR, then the prediction CRC will succeed, so the IDD can continue.

According to another embodiment, the metric may be calculated by an early termination technique based on a sign-on-change ratio (SCR). The number of LLR symbol changes at the decoder output relative to the LLR symbol changes at the decoder input is calculated based on the SCR-based early termination metric. Thus, the ratio of sign changes of the total number of bits can be calculated according to the following equation:

Where LLR is the LLR at the output of the decoder and i is the bit position index. Note that bit positions where the decoder input is zero LLR or where the decoder output is zero extrinsic LLR are excluded. The calculated SCR metric may then be compared to a preset or predetermined threshold to predict whether the CRC check in the next global iteration will pass or fail. If SCR (cb _idx)>Thr_SCR) would fail to predict CRC and thus idd can be terminated if SCR (cb _idx)≤Thr_SCR) would be expected to pass and thus idd can continue, thus, even if there are many LLRs, various metrics can be used to determine prediction.

According to another embodiment, the metric may be calculated by an early termination technique based on Zero LLR Ratio (ZLR). The ZLR based early termination metric may be based on the number of zero LLRs at both the decoder input LLR and the decoder output extrinsic LLR. Based on this count, the ratio of zero LLR to total number of bits is calculated using the following equation:

Once ZLR is calculated, the ratio may be calculated and the resulting metric may be compared to a preset or predetermined threshold to predict whether the CRC check will pass or fail in the next global iteration. If LR (cb _idx)>Thr_ZLR), the prediction of CRC fails, so IDD can be terminated, on the other hand, if ZLR (cb _idx)≤Thr_ZLR), the prediction of CRC passes, so IDD can continue.

As described above, various early termination policies may be implemented by predicting and determining whether an IDD should be terminated using various metrics. When many global iterations of IDD are performed, the processing budget (e.g., based on power consumption) may become an even greater problem. For example, performing one or two global iterations may not consume too much power, but performing six global iterations may have a greater impact on power. Thus, in case more than two global iterations are performed, the availability of the processing budget is further considered.

Thus, in some embodiments, the first CRC failure code block after one global iteration is checked to predict the state of the CRC check after the 2 nd, 3 rd, … th, and nth global iterations. In other words, predictions are made independently as to whether the CRC will pass or fail after the 2 nd, 3 rd, 4 th, … th, and N th global iterations. For example, using SCR metrics, if SCR _{cb_idx}>scr_thr_{gi_idx}, the corresponding code block (CB _{cb_idx}) is predicted to fail CRC after gi=gi_idx, where cb_idx represents the code block index, SCR _{cb_idx} represents the SCR corresponding to CB _{cb_idx}, and gi_idx represents the GI index.

After the predictions are determined for each of the 2 nd through nth global iterations, the number of CRC failure code blocks after gi_idx global iterations is estimated to be cb_fail_cnt _{gi_idx}＝∑_{cb_idx}I(SCR_{cb_idx}>scr_thr_{gi_idx}, where I (-) represents an indicator function having I (TRUE) =1 and I (FALSE) =0.

Finally, premature termination may be declared even if only one of the following conditions is violated:

b_fail_cnt₁>G

cb_fail_cnt₂>G-cb_fail_cnt₁

cb_fail_cnt₃>G-cb_fail_cnt₁-cb_fail_cnt₂

cb_fail_cnt₄>G-cb_fail_cnt₁-cb_fail_cnt₂-cb_fail_cnt₃

cb_fail_cnt₅>G-cb_fail_cnt₁-cb_fail_cnt₂-cb_fail_cnt₃-

cb_fail_cnt₄，

Where G represents the remaining code block processing budget after the first global iteration and cb _ fail _ cnt represents the consumed processing budget from the previous global iteration. Thus, if the predicted consumed processing budget is greater than the remaining code block processing budget, an early termination is declared. For a subsequent global iteration, the predicted consumed processing budget is compared to the remaining code block processing budget subtracted from the predicted consumed processing budget from the previous global iteration, and so on. Thus, predictions may be determined independently for each scene, and if the predictions determine that premature termination should be declared, the IDD is terminated.

Fig. 4 is a flow chart of a method for determining premature termination of an IDD according to various embodiments of the disclosure. Thus, according to the techniques described in the embodiments, IDD may be terminated when it is determined that further execution of IDD is unlikely to improve the output of the decoder. According to step 402, one or more LLRs for one or more CRCs may be calculated during an IDD process. Then, at step 404, it may be determined whether at least one of the calculated LLRs predicts a CRC check failure. In other words, the calculated LLR may be used to predict whether the next or subsequent CRC check will pass or fail. If the predicted CRC check will likely fail, the IDD process may be terminated because further processing of the IDD process will consume and waste more resources (e.g., consume more power and more time), potentially not obtaining much benefit therefrom.

Fig. 5 is a flowchart of a method for determining premature termination of an IDD when performing two or more global iterations of the IDD, according to various embodiments of the disclosure. Thus, at step 502, at least two global iterations of the IDD are performed. The LLR for each code block of the transmit block may then be calculated in step 504 in response to the transmit block failing the CRC check after the first global iteration of the IDD process. In other words, if the CRC check of a transmit block fails in the first global iteration, LLR for each code block of the transmit block may be calculated. Next, in step 506, in response to determining that at least one of the LLRs failed the predictive CRC check, it may be determined that the processing budget for the second global iteration of the IDD is greater than the remaining code block processing budget, and in response, the IDD process is terminated. Thus, if sufficient processing budget is no longer available, the IDD may be terminated in the event that there are two or more global iterations.

Fig. 6 is a block diagram of an electronic device in a network environment 600 according to an embodiment.

Referring to fig. 6, an electronic device 601 in a network environment 600 may communicate with an electronic device 602 via a first network 698 (e.g., a short-range wireless communication network) or with an electronic device 604 or server 608 via a second network 699 (e.g., a long-range wireless communication network). Electronic device 601 may communicate with electronic device 604 via server 608. The electronic device 601 may include a processor 620, a memory 630, an input device 650, a sound output device 655, a display device 660, an audio module 670, a sensor module 676, an interface 677, a connection 678, a haptic module 679, a camera module 680, a power management module 688, a battery 689, a communication module 690, a Subscriber Identity Module (SIM) 696, or an antenna module 697. In one embodiment, at least one of the components (e.g., display device 660 or camera module 680) may be omitted from electronic device 601, or one or more other components may be added to the electronic device. Some of the components may be implemented as a single Integrated Circuit (IC). For example, the sensor module 676 (e.g., a fingerprint sensor, iris sensor, or illuminance sensor) may be implemented as embedded in the display device 660 (e.g., a display).

The processor 620 may run software (e.g., program 640) to control at least one other component (e.g., a hardware component or a software component) of the electronic device 601 that is connected to the processor 620 and may perform various data processing or calculations.

As at least part of the data processing or calculation, the processor 620 may load commands or data received from another component (e.g., the sensor module 676 or the communication module 690) into the volatile memory 632, process the commands or data stored in the volatile memory 632, and store the resulting data in the non-volatile memory 634. The processor 620 may include a main processor 621 (e.g., a Central Processing Unit (CPU) or an Application Processor (AP)) and an auxiliary processor 623 (e.g., a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a sensor hub processor, or a Communication Processor (CP)) that is operatively independent of or combined with the main processor 621. Additionally or alternatively, the auxiliary processor 623 may be adapted to consume less power than the main processor 621 or to perform certain functions. The auxiliary processor 623 may be implemented separately from the main processor 621 or as part of the main processor 621.

The auxiliary processor 623 (rather than the main processor 621) may control at least some of the functions or states associated with at least one of the components of the electronic device 601 (e.g., the display device 660, the sensor module 676, or the communication module 690) when the main processor 621 is in an inactive (e.g., sleep) state, or the auxiliary processor 623 may control at least some of the functions or states associated with at least one of the components of the electronic device 601 (e.g., the display device 660, the sensor module 676, or the communication module 690) with the main processor 621 when the main processor 621 is in an active state (e.g., running an application). The auxiliary processor 623 (e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., a camera module 680 or a communication module 690) functionally associated with the auxiliary processor 623.

The memory 630 may store various data used by at least one component of the electronic device 601 (e.g., the processor 620 or the sensor module 676). The various data may include, for example, software (e.g., program 640) and input data or output data for commands associated therewith. Memory 630 may include volatile memory 632 or nonvolatile memory 634. The non-volatile memory 634 may include an internal memory 636 and an external memory 638.

Program 640 may be stored as software in memory 630 and program 640 may include, for example, an Operating System (OS) 642, middleware 644, or applications 646.

The input device 650 may receive commands or data from outside the electronic device 601 (e.g., a user) to be used by other components of the electronic device 601 (e.g., the processor 620). The input device 650 may include, for example, a microphone, a mouse, or a keyboard.

The sound output device 655 may output sound signals to the outside of the electronic device 601. The sound output device 655 may include, for example, a speaker or a receiver. The speaker may be used for general purposes such as playing multimedia or audio recordings and the receiver may be used to receive incoming calls. The receiver may be implemented as a separate speaker, or as part of a speaker.

The display device 660 may provide information visually to the outside (e.g., user) of the electronic device 601. The display device 660 may comprise, for example, a display, a holographic device, or a projector, and control circuitry for controlling a respective one of the display, holographic device, and projector. The display device 660 may include touch circuitry adapted to detect touches or sensor circuitry (e.g., pressure sensors) adapted to measure the strength of forces caused by touches.

The audio module 670 may convert sound into an electrical signal and vice versa. The audio module 670 may obtain sound via the input device 650, or output sound via the sound output device 655 or headphones of an external electronic device (e.g., the electronic device 602) that is directly (e.g., wired) or wirelessly connected to the electronic device 601.

The sensor module 676 may detect an operational state (e.g., power or temperature) of the electronic device 601 or an environmental state (e.g., a state of a user) external to the electronic device 601 and then generate an electrical signal or data value corresponding to the detected state. The sensor module 676 may include, for example, a gesture sensor, a gyroscope sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an Infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

The interface 677 may support one or more specific protocols that will be used to connect the electronic device 601 with the external electronic device 602 directly (e.g., wired) or wirelessly. The interface 677 may include, for example, a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital (SD) card interface, or an audio interface.

The connection end 678 may include a connector via which the electronic device 601 may be physically connected with the external electronic device 602. The connection end 678 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

The haptic module 679 may convert the electrical signal into a mechanical stimulus (e.g., vibration or motion) or an electrical stimulus that may be recognized by a user via touch or kinesthetic sense. The haptic module 679 may include, for example, a motor, a piezoelectric element, or an electro-stimulator.

The camera module 680 may capture still images or moving images. The camera module 680 may include one or more lenses, image sensors, image signal processors, or flash lamps.

The power management module 688 may manage power to the electronic device 601. The power management module 688 may be implemented as at least part of, for example, a Power Management Integrated Circuit (PMIC).

The battery 689 may power at least one component of the electronic device 601. The battery 689 may include, for example, a primary non-rechargeable battery, a rechargeable battery, or a fuel cell.

The communication module 690 may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 601 and an external electronic device (e.g., the electronic device 602, the electronic device 604, or the server 608) and performing communication via the established communication channel. The communication module 690 may include one or more communication processors capable of operating independently of the processor 620 (e.g., an AP) and support direct (e.g., wired) or wireless communication. The communication module 690 may include a wireless communication module 692 (e.g., a cellular communication module, a short-range wireless communication module, or a Global Navigation Satellite System (GNSS) communication module) or a wired communication module 694 (e.g., a Local Area Network (LAN) communication module or a Power Line Communication (PLC) module). A respective one of these communication modules may communicate with external electronic devices via a first network 698 (e.g., a short-range communication network such as bluetooth, wireless fidelity (Wi-Fi) direct, or infrared data association (IrDA) standard) or a second network 699 (e.g., a long-range communication network such as a cellular network, the internet, or a computer network (e.g., a LAN or Wide Area Network (WAN)). These various types of communication modules may be implemented as a single component (e.g., a single IC), or may be implemented as multiple components (e.g., multiple ICs) separate from one another. The wireless communication module 692 may identify and authenticate the electronic device 601 in a communication network, such as the first network 698 or the second network 699, using user information (e.g., an International Mobile Subscriber Identity (IMSI)) stored in the user identification module 696.

The antenna module 697 may transmit signals or power to or receive signals or power from outside of the electronic device 601 (e.g., an external electronic device). According to an embodiment, the antenna module 697 may include one or more antennas and at least one antenna suitable for a communication scheme used in a communication network, such as the first network 698 or the second network 699, may be selected from the one or more antennas, for example, by the communication module 690 (e.g., the wireless communication module 692). Signals or power may then be transmitted or received between the communication module 690 and the external electronic device via the selected at least one antenna.

Commands or data may be sent or received between the electronic device 601 and the external electronic device 604 via a server 608 connected to the second network 699. Each of the electronic device 602 and the electronic device 604 may be the same type of device as the electronic device 601 or a different type of device from the electronic device 601. According to an embodiment, all or some of the operations to be performed at the electronic device 601 may be performed at one or more of the external electronic device 602, the external electronic device 604, or the server 608. For example, if the electronic device 601 should automatically perform a function or service or should perform a function or service in response to a request from a user or another device, the electronic device 601 may request the one or more external electronic devices to perform at least part of the function or service instead of or in addition to the function or service, or the electronic device 601 may request the one or more external electronic devices to perform at least part of the function or service. The one or more external electronic devices that received the request may perform the requested at least part of the function or service or perform another function or another service related to the request and transmit the result of the performing to the electronic device 601. The electronic device 601 may provide the results as at least a partial reply to the request with or without further processing of the results. For this purpose, cloud computing technology, distributed computing technology, or client-server computing technology, for example, may be used.

Fig. 7 illustrates a system including a first electronic device (e.g., a first User Equipment (UE) 705) and a second electronic device (e.g., a second UE 700) that may act as a receiver and/or transmitter in communication with each other. The first UE 705 and the second UE 700 may include radios 715, 710 and processing circuitry (or means for processing) 725, 720 including detectors and decoders, which may perform various methods such as the IDD process disclosed herein.

Embodiments of the subject matter and the operations described in this specification can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Embodiments of the subject matter described in this specification can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a computer storage medium for execution by, or to control the operation of, data processing apparatus. Alternatively or additionally, the program instructions may be encoded on a manually generated propagated signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) that is generated to encode information for transmission to suitable receiver apparatus for execution by data processing apparatus. The computer storage medium may be or be included in a computer readable storage device, a computer readable storage substrate, a random or serial access memory array or device, or a combination thereof. Furthermore, while the computer storage medium is not a propagated signal, the computer storage medium may be a source or destination of computer program instructions encoded in an artificially generated propagated signal. Computer storage media may also be or be included in one or more separate physical components or media (e.g., multiple CDs, disks, or other storage devices). In addition, the operations described in this specification may be implemented as operations performed by a data processing apparatus on data stored on one or more computer readable storage devices or received from other sources.

While this specification may contain many specific implementation details, these should not be construed as limitations on the scope of any claimed subject matter, but rather as descriptions of features specific to particular embodiments. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

Similarly, although operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

Thus, particular embodiments of the subject matter have been described herein. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. Additionally, the processes depicted in the accompanying drawings do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may be advantageous.

As will be recognized by those skilled in the art, the innovative concepts described herein can be modified and varied over a wide range of applications. Accordingly, the scope of the claimed subject matter should not be limited to any of the specific exemplary teachings discussed above, but is instead defined by the following claims.

Claims

1. A method, comprising:

During the iterative detection and decoding IDD process, computing one or more log-likelihood ratios LLR for one or more cyclic redundancy check CRCs; and

At least one of the one or more LLRs is determined to be predictive CRC check failed and, in response, the IDD process is terminated.

2. The method of claim 1, wherein the one or more LLRs are computed for each code block of a transmit block in response to the transmit block failing a CRC check after a global iteration of the IDD process.

3. The method of claim 2, wherein the terminating the IDD process is performed for all code blocks of the transmit block, the all code blocks including at least one code block for which the LLR prediction passes a CRC check.

4. The method according to claim 2,

Wherein said terminating said IDD process is performed on one or more code blocks for which said LLR predicts a CRC check failure, and

Wherein the IDD process continues for at least one code block for which the LLR prediction passes a CRC check.

5. The method of claim 1, wherein the one or more LLRs are computed for a transmit block in response to the transmit block failing a CRC check after a global iteration of the IDD process.

6. The method according to claim 1,

Wherein the LLR prediction of the CRC check failure is based on calculating mutual information between the transmitted bits and the LLR at the output of the decoder, and

Wherein the mutual information is less than a threshold.

7. The method according to claim 1,

Wherein the LLR prediction of the CRC check failure is based on calculating an average of magnitudes of all of the LLRs, and

Wherein the average value of the magnitudes is less than a threshold value.

8. The method according to claim 1,

Wherein the LLR prediction of the CRC check failure is based on calculating a sign change ratio SCR between LLR at the input of the decoder and LLR at the output of the decoder, and

Wherein the SCR is less than a threshold.

9. The method according to claim 1,

Wherein the LLR prediction of the CRC check failure is based on calculating the number of zero LLRs at the input to the decoder and at the output of the decoder, and

Wherein the number of zero LLRs is less than the threshold.

10. The method of claim 1, wherein the IDD is performed to reduce power consumption in a new radio NR or long term evolution, LTE, communication system.

11. A receiver, comprising:

processing circuitry comprising a detector and a decoder coupled to the detector, wherein the processing circuitry is configured to:

12. The receiver of claim 11, wherein the one or more LLRs are computed for each code block of a transmit block in response to the transmit block failing a CRC check after a global iteration of the IDD process.

13. The receiver of claim 12, wherein the terminating the IDD process is performed for all code blocks of the transmit block, the all code blocks including at least one code block for which the LLR prediction passes a CRC check.

14. The receiver according to claim 12,

15. The receiver of claim 11, wherein the one or more LLRs are computed for a transmit block in response to the transmit block failing a CRC check after a global iteration of the IDD process.

16. The receiver according to claim 11,

Wherein the mutual information is less than a threshold.

17. The receiver according to claim 11,

Wherein the average value of the magnitudes is less than a threshold value.

18. The receiver according to claim 11,

Wherein the SCR is less than a threshold.

19. The receiver according to claim 11,

Wherein the number of zero LLRs is less than the threshold.

20. The receiver of claim 11, wherein the IDD is performed to reduce power consumption in a new radio NR or long term evolution LTE communication system.