CN117917101A

CN117917101A - Electronic device, method, and computer-readable storage medium for managing transmissions to external electronic devices in a wireless environment

Info

Publication number: CN117917101A
Application number: CN202280060605.2A
Authority: CN
Inventors: 郑求泌; 姜斗锡; 刘炯承; 陈周妍
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 2021-09-08
Filing date: 2022-08-05
Publication date: 2024-04-19

Abstract

An electronic device according to one embodiment may include: at least one processor configured to: acquiring a first Connection Isochronous Stream (CIS) event including a first sub-event and a Connection Isochronous Group (CIG) event including a second CIS event, wherein the second CIS event includes a plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events; and transmitting second data to the second external electronic device through a third sub-event among the plurality of second sub-events based on receiving an acknowledgement signal for first data transmitted to the first external electronic device through the first sub-event among the plurality of first sub-events from the first external electronic device through the first sub-event among the plurality of first sub-events, wherein the third sub-event overlaps with a second sub-event immediately after the first sub-event among the plurality of first sub-events.

Description

Electronic device, method, and computer-readable storage medium for managing transmissions to external electronic devices in a wireless environment

Technical Field

The present disclosure relates to electronic devices, methods, and non-transitory computer-readable storage media for managing transmissions to external electronic devices within a wireless environment.

Background

Bluetooth (TM) low energy (BLE) may provide reduced power consumption compared to conventional bluetooth (TM) (or classical bluetooth) and at least similar or generally greater communication range between connected devices. BLE may be provided on the industrial, scientific and medical (ISM) radio band.

Disclosure of Invention

Technical proposal

The processor 120 can identify whether the first data or the second data is associated with the multimedia content. In another example, the processor 120 may identify whether the first data or the second data is associated with multimedia content in order to identify whether to provide multi-stream audio through the first external electronic device and the second external electronic device. However, it is not limited thereto.

The processor 120 may perform operation 1104 on the condition that the first data or the second data is associated with the multimedia content, and in accordance with an aspect of the present disclosure, an electronic device is provided. The electronic device includes: a communication circuit for Bluetooth Low Energy (BLE); and a processor operably associated with the communication circuit, the processor configured to: obtaining a Connection Isochronous Group (CIG) event including a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event includes a plurality of first sub-events, the second CIS event includes a plurality of second sub-events that at least partially overlap with at least a portion of the plurality of first sub-events, and based on receiving an Acknowledgement (ACK) signal for first data transmitted to a first external electronic device via a first sub-event of the plurality of first sub-events, transmitting second data to a second external electronic device via a third sub-event of the plurality of second sub-events, wherein the third sub-event overlaps with a second sub-event immediately following the first sub-event of the plurality of first sub-events.

According to another aspect of the present disclosure, a method for operating an electronic device having a communication circuit for Bluetooth Low Energy (BLE) is provided. The method comprises the following steps: obtaining a Connection Isochronous Group (CIG) event including a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event includes a plurality of first sub-events, the second CIS event includes a plurality of second sub-events that at least partially overlap with at least a portion of the plurality of first sub-events, and based on receiving an Acknowledgement (ACK) signal for first data transmitted to a first external electronic device via a first sub-event of the plurality of first sub-events, transmitting second data to a second external electronic device via a third sub-event of the plurality of second sub-events, wherein the third sub-event overlaps with a second sub-event immediately following the first sub-event of the plurality of first sub-events.

According to another aspect of the present disclosure, a non-transitory computer-readable storage medium is provided. The non-transitory computer-readable storage medium includes one or more programs comprising instructions, wherein the instructions, when executed by at least one processor of an electronic device with communication circuitry for BLE, cause the electronic device to: obtaining a Connection Isochronous Group (CIG) event including a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event includes a plurality of first sub-events, the second CIS event includes a plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events, and based on receiving an Acknowledgement (ACK) signal regarding first data transmitted to a first external electronic device via a first sub-event of the plurality of first sub-events, transmitting second data to a second external electronic device via a third sub-event of the plurality of second sub-events, wherein the third sub-event overlaps with a second sub-event immediately following the first sub-event of the plurality of first sub-events.

According to another aspect of the present disclosure, an electronic device is provided. The electronic device includes a communication circuit for Bluetooth Low Energy (BLE) and a processor operably coupled with the communication circuit. The processor is configured to: transmitting a first packet to a first external electronic device via a second sub-event preceding the first sub-event, wherein the first packet is a last packet of at least one target packet allocated for transmission to the first external electronic device within a first Connection Isochronous Stream (CIS) event of a Connection Isochronous Group (CIG) event, the second sub-event ending the first CIS event, transmitting the second packet to the second external electronic device via one of a plurality of sub-events of the second CIS event in response to receiving an Acknowledgement (ACK) signal for the first packet from the first external electronic device via the second sub-event, and retransmitting the first packet to the first external electronic device via the first sub-event following the second sub-event or a third sub-event immediately following the second sub-event in response to receiving a Negative Acknowledgement (NACK) signal for the first packet from the first external electronic device via the second sub-event.

According to another aspect of the present disclosure, a method for operating an electronic device having a communication circuit for Bluetooth Low Energy (BLE) is provided. The method comprises the following steps: transmitting a first packet to a first external electronic device via a second sub-event preceding the first sub-event, wherein the first packet is a last packet of at least one target packet allocated for transmission to the first external electronic device within a first Connection Isochronous Stream (CIS) event of a Connection Isochronous Group (CIG) event, the second sub-event ending the first CIS event, transmitting the second packet to the second external electronic device via one of a plurality of sub-events of the second CIS event in response to receiving an Acknowledgement (ACK) signal for the first packet from the first external electronic device via the second sub-event, and retransmitting the first packet to the first external electronic device via the first sub-event following the second sub-event or a third sub-event immediately following the second sub-event in response to receiving a Negative Acknowledgement (NACK) signal for the first packet from the first external electronic device via the second sub-event.

According to another aspect of the present disclosure, a non-transitory computer-readable storage medium is provided. The non-transitory computer-readable storage medium stores one or more programs comprising instructions, wherein the instructions, when executed by at least one processor of an electronic device with communication circuitry for BLE, cause the electronic device to: transmitting a first packet to a first external electronic device via a second sub-event preceding the first sub-event, wherein the first packet is a last packet of at least one target packet allocated for transmission to the first external electronic device within a first Connection Isochronous Stream (CIS) event of a Connection Isochronous Group (CIG) event, the second sub-event ending the first CIS event, transmitting the second packet to the second external electronic device via one of a plurality of sub-events of the second CIS event in response to receiving an Acknowledgement (ACK) signal for the first packet from the first external electronic device via the second sub-event, and retransmitting the first packet to the first external electronic device via the first sub-event following the second sub-event or a third sub-event immediately following the second sub-event in response to receiving a Negative Acknowledgement (NACK) signal for the first packet from the first external electronic device via the second sub-event.

Drawings

FIG. 1 is a block diagram of an electronic device in a network environment according to an embodiment of the present disclosure;

fig. 2 illustrates an example of a wireless environment including an electronic device according to an embodiment of the disclosure;

FIG. 3 is a simplified block diagram of an electronic device according to an embodiment of the present disclosure;

fig. 4a is a timing diagram illustrating a group of connection and the like (CIG) events with a sequential arrangement;

fig. 4b is a timing diagram illustrating CIG events with staggered arrangement;

fig. 5a, 5b, and 5c are timing diagrams illustrating CIG events with a hybrid arrangement according to various embodiments of the present disclosure;

fig. 6 is a timing diagram illustrating anchor points of CIG events with a hybrid arrangement according to an embodiment of the present disclosure;

Fig. 7a illustrates a method of transmitting data through a CIG event with a hybrid arrangement according to an embodiment of the present disclosure;

fig. 7b illustrates an example of transmitting data through a CIG event based on identification of a specified event according to an embodiment of the present disclosure;

Fig. 8 is a flowchart illustrating a method of transmitting data via a CIG event including a first CIS event and a second CIS event arranged in a hybrid manner according to an embodiment of the present disclosure;

Fig. 9a is a flowchart illustrating a method of obtaining a CIG event including first and second CIS events in a mixed arrangement based on synchronization of an anchor point of each first sub-event of the first CIS events and an anchor point of each second sub-event of the second CIS events according to an embodiment of the present disclosure;

fig. 9b is a flowchart illustrating a method of obtaining a CIG event including first and second CIS events in a mixed arrangement based on a length of each of the first and second sub-events in the first and second CIS events according to an embodiment of the present disclosure;

fig. 10 is a flowchart illustrating a method of transmitting data during a time interval in which at least a portion of a first CIS event overlaps at least a portion of a second CIS event, according to an embodiment of the present disclosure;

Fig. 11 is a flowchart illustrating a method of obtaining a CIG event including a first CIS event and a second CIS event in a mixed arrangement based on a data attribute according to an embodiment of the present disclosure;

Fig. 12 is a flowchart illustrating a method of obtaining a CIG event including a first CIS event and a second CIS event in a mixed arrangement based on a quality of a link between a first external electronic device and an electronic device according to an embodiment of the present disclosure;

Fig. 13 is a flowchart illustrating a method of distributing an initial CIS event among CIG events according to an embodiment of the present disclosure;

Fig. 14 is a flowchart illustrating a method of initiating a CIS event in a CIG event based on a quality of a first link between a first external electronic device and an electronic device and a quality allocation of a second link between a second external electronic device and an electronic device according to an embodiment of the present disclosure; and

Fig. 15 is a flowchart illustrating a method of transmitting packets via CIG events with a hybrid arrangement according to an embodiment of the present disclosure.

Detailed Description

Fig. 1 is a block diagram of an electronic device in a network environment according to various embodiments of the present disclosure.

Referring to fig. 1, an electronic device 101 in a network environment 100 may communicate with the electronic device 102 via a first network 198 (e.g., a short-range wireless communication network) or with at least one of the electronic device 104 or the server 108 via a second network 199 (e.g., a long-range wireless communication network). According to embodiments of the present disclosure, the electronic device 101 may communicate with the electronic device 104 via the server 108. According to embodiments of the present disclosure, the electronic device 101 may include a processor 120, a memory 130, an input module 150, a sound output module 155, a display module 160, an audio module 170, a sensor module 176, an interface 177, a connection 178, a haptic module 179, a camera module 180, a power management module 188, a battery 189, a communication module 190, a Subscriber Identity Module (SIM) 196, or an antenna module 197. In some embodiments of the present disclosure, at least one of the components (e.g., connection end 178) may be omitted from electronic device 101, or one or more other components may be added to electronic device 101. In some embodiments of the present disclosure, some of the components (e.g., sensor module 176, camera module 180, or antenna module 197) may be implemented as a single component (e.g., display module 160).

The processor 120 may run, for example, software (e.g., program 140) to control at least one other component of the electronic device 101 (e.g., a hardware component or a software component) in conjunction with the processor 120, and may perform various data processing or calculations. According to one embodiment of the present disclosure, as at least part of the data processing or calculation, the processor 120 may store commands or data received from another component (e.g., the sensor module 176 or the communication module 190) into the volatile memory 132, process the commands or data stored in the volatile memory 132, and store the resulting data in the non-volatile memory 134. According to embodiments of the present disclosure, the processor 120 may include a main processor 121 (e.g., a Central Processing Unit (CPU) or an Application Processor (AP)) or an auxiliary processor 123 (e.g., a Graphics Processing Unit (GPU), a Neural Processing Unit (NPU), an Image Signal Processor (ISP), a sensor hub processor, or a Communication Processor (CP)) that is operatively independent of or combined with the main processor 121. For example, when the electronic device 101 comprises a main processor 121 and a secondary processor 123, the secondary processor 123 may be adapted to consume less power than the main processor 121 or to be dedicated to a particular function. The auxiliary processor 123 may be implemented separately from the main processor 121 or as part of the main processor 121.

The auxiliary processor 123 (instead of the main processor 121) may control at least some of the functions or states related to at least one of the components of the electronic device 101 (e.g., the display module 160, the sensor module 176, or the communication module 190) when the main processor 121 is in an inactive (e.g., sleep) state, or the auxiliary processor 123 may control at least some of the functions or states related to at least one of the components of the electronic device 101 (e.g., the display module 160, the sensor module 176, or the communication module 190) with the main processor 121 when the main processor 121 is in an active state (e.g., running an application). According to embodiments of the present disclosure, the auxiliary processor 123 (e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., the camera module 180 or the communication module 190) functionally related to the auxiliary processor 123. According to embodiments of the present disclosure, the auxiliary processor 123 (e.g., a neural processing unit) may include hardware structures dedicated to artificial intelligence model processing. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, by the electronic device 101 where artificial intelligence is performed or via a separate server (e.g., server 108). The learning algorithm may include, but is not limited to, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning. The artificial intelligence model may include a plurality of artificial neural network layers. The artificial neural network may be a Deep Neural Network (DNN), a Convolutional Neural Network (CNN), a Recurrent Neural Network (RNN), a boltzmann machine limited (RBM), a Deep Belief Network (DBN), a bi-directional recurrent deep neural network (BRDNN), a deep Q network, or a combination of two or more thereof, but is not limited thereto. Additionally or alternatively, the artificial intelligence model may include software structures in addition to hardware structures.

The memory 130 may store various data used by at least one component of the electronic device 101 (e.g., the processor 120 or the sensor module 176). The various data may include, for example, software (e.g., program 140) and input data or output data for commands associated therewith. Memory 130 may include volatile memory 132 or nonvolatile memory 134.

The program 140 may be stored as software in the memory 130, and the program 140 may include, for example, an Operating System (OS) 142, middleware 144, or applications 146.

The input module 150 may receive commands or data from outside the electronic device 101 (e.g., a user) to be used by another component of the electronic device 101 (e.g., the processor 120). The input module 150 may include, for example, a microphone, a mouse, a keyboard, keys (e.g., buttons) or a digital pen (e.g., a stylus).

The sound output module 155 may output a sound signal to the outside of the electronic device 101. The sound output module 155 may include, for example, a speaker or a receiver. Speakers may be used for general purposes such as playing multimedia or playing a record. The receiver may be used to receive an incoming call. According to embodiments of the present disclosure, the receiver may be implemented separate from the speaker or as part of the speaker.

Display module 160 may visually provide information to the outside (e.g., user) of electronic device 101. The display module 160 may include, for example, a display, a holographic device, or a projector, and a control circuit for controlling a corresponding one of the display, the holographic device, and the projector. According to embodiments of the present disclosure, the display module 160 may include a touch sensor adapted to detect a touch or a pressure sensor adapted to measure the strength of a force caused by a touch.

The audio module 170 may convert sound into electrical signals and vice versa. According to embodiments of the present disclosure, the audio module 170 may obtain sound via the input module 150, or output sound via the sound output module 155 or headphones of an external electronic device (e.g., the electronic device 102) that is directly (e.g., wired) or wirelessly coupled with the electronic device 101.

The sensor module 176 may detect an operational state (e.g., power or temperature) of the electronic device 101 or an environmental state (e.g., a state of a user) external to the electronic device 101 and then generate an electrical signal or data value corresponding to the detected state. According to embodiments of the present disclosure, the sensor module 176 may include, for example, a gesture sensor, a gyroscope sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an Infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

Interface 177 may support one or more specific protocols that will be used to directly (e.g., wired) bond electronic device 101 with an external electronic device (e.g., electronic device 102) or wirelessly bond. According to embodiments of the present disclosure, interface 177 may include, for example, a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital (SD) card interface, or an audio interface.

The connection end 178 may include a connector via which the electronic device 101 may be physically connected with an external electronic device (e.g., the electronic device 102). According to embodiments of the present disclosure, the connection end 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

The haptic module 179 may convert the electrical signal into a mechanical stimulus (e.g., vibration or motion) or an electrical stimulus that may be recognized by the user via his sense of touch or kinesthetic sense. According to embodiments of the present disclosure, haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrostimulator.

The camera module 180 may capture still images or moving images. According to embodiments of the present disclosure, the camera module 180 may include one or more lenses, image sensors, image signal processors, or flash lamps.

The power management module 188 may manage power supply to the electronic device 101. According to one embodiment, the power management module 188 may be implemented as at least part of, for example, a Power Management Integrated Circuit (PMIC).

Battery 189 may power at least one component of electronic device 101. According to embodiments of the present disclosure, battery 189 may include, for example, a primary non-rechargeable battery, a rechargeable battery, or a fuel cell.

The communication module 190 may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 101 and an external electronic device (e.g., the electronic device 102, the electronic device 104, or the server 108) and performing communication via the established communication channel. The communication module 190 may include one or more communication processors capable of operating independently of the processor 120 (e.g., an Application Processor (AP)) and supporting direct (e.g., wired) or wireless communication. According to embodiments of the present disclosure, the communication module 190 may include a wireless communication module 192 (e.g., a cellular communication module, a short-range wireless communication module, or a Global Navigation Satellite System (GNSS) communication module) or a wired communication module 194 (e.g., a Local Area Network (LAN) communication module or a Power Line Communication (PLC) module). A respective one of these communication modules may communicate with external electronic devices via a first network 198 (e.g., a short-range communication network such as Bluetooth ^TM, wi-Fi direct, or infrared data association (IrDA)) or a second network 199 (e.g., a long-range communication network such as a conventional cellular network, a 5 th generation (5G) network, a next generation communication network, the internet, or a computer network (e.g., a LAN or Wide Area Network (WAN)). These various types of communication modules may be implemented as a single component (e.g., a single chip), or may be implemented as multiple components (e.g., multiple chips) separate from each other. The wireless communication module 192 may identify and authenticate the electronic device 101 in a communication network, such as the first network 198 or the second network 199, using user information (e.g., an International Mobile Subscriber Identity (IMSI)) stored in the user identification module 196.

The wireless communication module 192 may support a 5G network following a4 th generation (4G) network as well as next generation communication technologies (e.g., new Radio (NR) access technologies). The NR access technology can support enhanced mobile broadband (eMBB), large-scale machine type communications (mMTC), or ultra-reliable low-latency communications (URLLC). The wireless communication module 192 may support a high frequency band (e.g., millimeter-wave band) to try to address, for example, high data transmission rates. The wireless communication module 192 may support various techniques for ensuring performance over high frequency bands, such as, for example, beamforming, massive multiple-input multiple-output (massive MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, or massive antennas. The wireless communication module 192 may support various requirements specified in the electronic device 101, an external electronic device (e.g., electronic device 104), or a network system (e.g., second network 199). According to embodiments of the present disclosure, the wireless communication module 192 may support a U-plane delay (e.g., 0.5ms or less, or 1ms or less round trips for each of the Downlink (DL) and Uplink (UL)) for achieving a peak data rate of eMBB (e.g., 20Gbps or more), for achieving a lost coverage of mMTC (e.g., 164dB or less), or for achieving URLLC.

The antenna module 197 may transmit signals or power to the outside of the electronic device 101 (e.g., an external electronic device) or receive signals or power from the outside of the electronic device 101 (e.g., an external electronic device). According to embodiments of the present disclosure, the antenna module 197 may include an antenna including a radiating element including a conductive material or a conductive pattern formed in or on a substrate (e.g., a Printed Circuit Board (PCB)). According to embodiments of the present disclosure, the antenna module 197 may include a plurality of antennas (e.g., array antennas). In this case, at least one antenna suitable for a communication scheme used in a communication network, such as the first network 198 or the second network 199, may be selected from the plurality of antennas, for example, by the communication module 190 (e.g., the wireless communication module 192). Signals or power may then be transmitted or received between the communication module 190 and the external electronic device via the selected at least one antenna. According to embodiments of the present disclosure, further components (e.g., a Radio Frequency Integrated Circuit (RFIC)) other than radiating elements may additionally be formed as part of the antenna module 197.

Antenna module 197 may form a millimeter wave antenna module in accordance with various embodiments of the present disclosure. According to embodiments of the present disclosure, a millimeter wave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., a bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., a millimeter wave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., a top surface or a side surface) of the printed circuit board and capable of transmitting or receiving signals of the specified high frequency band.

At least some of the above components may be coupled to each other and communicate signals (e.g., commands or data) therebetween via an inter-peripheral communication scheme (e.g., bus, general Purpose Input Output (GPIO), serial Peripheral Interface (SPI), or Mobile Industrial Processor Interface (MIPI)).

According to embodiments of the present disclosure, commands or data may be sent or received between the electronic device 101 and the external electronic device 104 via the server 108 in combination with the second network 199. Each of the electronic device 102 or the electronic device 104 may be the same type of device as the electronic device 101 or a different type of device from the electronic device 101. According to embodiments of the present disclosure, all or some of the operations to be performed at the electronic device 101 may be performed at one or more of the external electronic device 102, the external electronic device 104, or the external electronic device 108. For example, if the electronic device 101 should automatically perform a function or service or should perform a function or service in response to a request from a user or another device, the electronic device 101 may request one or more external electronic devices to perform at least part of the function or service instead of or in addition to the function or service, or the electronic device 101 may request the one or more external electronic devices to perform at least part of the function or service. The one or more external electronic devices that received the request may perform the requested at least part of the function or service or perform another function or another service related to the request and transmit the result of the performing to the electronic device 101. The electronic device 101 may provide the result as at least a partial reply to the request with or without further processing of the result. For this purpose, for example, cloud computing, distributed computing, mobile Edge Computing (MEC), or client-server computing techniques may be used. The electronic device 101 may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment of the present disclosure, the external electronic device 104 may comprise an internet of things (IoT) device. Server 108 may be an intelligent server using machine learning and/or neural networks. According to embodiments of the present disclosure, the external electronic device 104 or the server 108 may be included in the second network 199. The electronic device 101 may be applied to smart services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology or IoT-related technology.

An electronic device using isochronous logical transmission, referred to as a Connection Isochronous Stream (CIS), may transmit data (or packets) including information about multimedia content to each of a plurality of external electronic devices over an isochronous link between each of the plurality of external electronic devices and the electronic device. For example, the CIS may be configured as a Connected Isochronous Group (CIG) event including a plurality of CIS events.

In addition, the quality of a link (e.g., CIS link) between each of the plurality of external electronic devices and the electronic device may vary according to a change in a wireless environment including the electronic device. For example, when an electronic device communicates with each of a plurality of external electronic devices through a CIG event including a plurality of CIS events arranged in sequence or staggered, the communication quality with each of the plurality of external electronic devices may be degraded according to a change in link quality according to a change in wireless environment.

Fig. 2 illustrates an example of a wireless environment including an electronic device according to an embodiment of the disclosure.

Referring to fig. 2, a wireless environment 200 may include an electronic device 101, a first external electronic device 201, and a second external electronic device 202.

The electronic device 101 in the wireless environment 200 may be an audio source device such as, for example, a smart phone, a laptop computer, or a tablet Personal Computer (PC). The electronic device 101 may transmit data regarding audio played in the electronic device 101 to each of the first external electronic device 201 and the second external electronic device 202. For example, data may be available within each of the first external electronic device 201 and the second external electronic device 202 to output audio from each of the first external electronic device 201 and the second external electronic device 202. The electronic device 101 may be referred to as a master device.

The first external electronic device 201 and the second external electronic device 202 in the wireless environment 200 may be audio receiving devices (SINK DEVICE) such as, for example, earbuds or headphones. For example, the first external electronic device 201 and the second external electronic device 202 may be configured as a pair, but are not limited thereto. Each of the first external electronic device 201 and the second external electronic device 202 may receive data from the electronic device 101, and based on the data, output audio through a speaker of each of the first external electronic device 201 and the second external electronic device 202. Each of the first external electronic device 201 and the second external electronic device 202 may be referred to as a slave device.

The electronic device 101, the first external electronic device 201, and the second external electronic device 202 may support multi-stream audio. For example, multiple audio streams that are synchronized and independent may be sent between the electronic device 101 and the first external electronic device 201 and/or between the electronic device 101 and the second external electronic device 202. For example, to support multi-stream audio, a Connection Isochronous Group (CIG) 203 including a Connection Isochronous Stream (CIS) may be used.

CIG 203 may be composed of two or more CIS having the same ISO (isochronous) interval. For example, the CIG 203 may include a first CIS204 and a second CIS205. Each of the first CIS204 and the second CIS205 may be a logic transmission to enable the electronic device 101, the first external electronic device 201, and the second external electronic device 202 to transmit isochronous data unidirectionally or bidirectionally. Each of the first CIS204 and the second CIS205 may be associated with an Asynchronous Connection (ACL). Each of the first CIS204 and the second CIS205 may support variable-sized packets and support transmission of one or more packets during an isochronous event.

The first CIS204 may be used to transmit at least one packet from the electronic device 101 to the first external electronic device 201. For example, at least one packet may be used to output audio played in the electronic device 101 through a speaker of the first external electronic device 201. The first CIS204 may be used to transmit an acknowledgement signal for at least one packet or a negative acknowledgement signal for at least one packet from the first external electronic device 201 to the electronic device 101. For example, an acknowledgement signal may be sent from the first external electronic device 201 to the electronic device 101 through the first CIS204 to indicate that the first external electronic device 201 successfully received the at least one packet, and a negative acknowledgement signal may be sent from the first external electronic device 201 to the electronic device 101 through the first CIS204 to indicate that the first external electronic device 201 failed to receive the at least one packet.

The second CIS205 is operable to transmit at least one packet from the electronic device 101 to the second external electronic device 202. For example, at least one packet may be used to output audio played in the electronic device 101 through a speaker of the second external electronic device 202. The audio output through the speaker of the first external electronic device 201 and the audio output through the speaker of the second external electronic device 202 may provide stereo sound, but are not limited thereto. The second CIS205 may be used to transmit an acknowledgement signal for at least one packet or a negative acknowledgement signal for at least one packet from the second external electronic device 202 to the electronic device 101.

Fig. 3 is a simplified block diagram of an electronic device according to an embodiment of the present disclosure. The components indicated by the block diagrams may be included in the electronic device 101 shown in fig. 1 or the electronic device 101 shown in fig. 2.

Fig. 4a is a timing diagram illustrating a Connection Isochronous Group (CIG) event with a sequential arrangement according to an embodiment of the present disclosure.

Fig. 4b is a timing diagram illustrating CIG events with staggered arrangement according to an embodiment of the present disclosure.

Fig. 5a, 5b, and 5c are timing diagrams illustrating CIG events with a hybrid arrangement according to various embodiments of the present disclosure.

Fig. 6 is a timing diagram illustrating anchor points of CIG events with a hybrid arrangement according to an embodiment of the present disclosure.

Fig. 7a illustrates a method of transmitting data through a CIG event with a hybrid arrangement according to an embodiment of the present disclosure.

Fig. 7b illustrates an example of transmitting data through a CIG event based on identification of a specified event according to an embodiment of the present disclosure.

Referring to fig. 3, the electronic device 101 may include a processor 120, a memory 130, and a communication circuit 190.

Processor 120 may include processor 120 of fig. 1. Memory 130 may include memory 130 of fig. 1. The communication circuit 190 may include the communication module 190 of fig. 1 for communicating with an external electronic device (e.g., the first external electronic device 201 or the second external electronic device 202 shown in fig. 2) through the first network 198.

The processor 120 in the electronic device 101 may obtain, configure, or set CIG events (e.g., events of the CIG 203 shown in fig. 2) including a first CIS event for the first external electronic device 201 (e.g., events of the first CIS204 shown in fig. 2) and a second CIS event for the second external electronic device 202 (e.g., events of the second CIS205 shown in fig. 2) in order to transmit data or at least one packet to each of the first external electronic device 201 and the second external electronic device 202. For example, a CIG event including a first CIS event and a second CIS event may start at a start timing of a start sub-event of a start-scheduled CIS, and may end at an end timing of a last sub-event within an ISO interval. For example, the anchor of the CIG event may occur concurrently with the anchor of the first of the CIG events.

Each of the first CIS event and the second CIS event may be composed of one or more sub-events. For example, a sub-event in the first CIS event may be used to send a packet from the electronic device 101 and a response packet from the first external electronic device 201 (e.g., an acknowledgement signal defined by the description of fig. 2 or a negative acknowledgement signal defined by the description of fig. 2). The sub-events in the second CIS event may be used to send packets from the electronic device 101 and to send response packets from the second external electronic device 202.

Each of the first CIS event and the second CIS event may be arranged in a sequential arrangement or a staggered arrangement within the CIG event. For example, referring to fig. 4a, as shown in a timing diagram 400, the processor 120 may arrange a first CIS event 402 and a second CIS event 403 in a CIG event 401 in a sequential arrangement, wherein the first CIS event 402 includes a first sub-event 404 and a second sub-event 405, and the second CIS event 403 includes a first sub-event 406 and a second sub-event 407. As shown in timing diagram 400, processor 120 may acquire, configure, or set a CIG event 401 including a first CIS event 402 and a second CIS event 403 arranged in sequence by arranging a second CIS event 403 immediately after the first CIS event 402. Since the first CIS event 402 and the second CIS event 403 are arranged next to each other in the sequential arrangement, the first CIS event 402 and the second CIS event 403 do not overlap each other in the sequential arrangement. In another example, referring to fig. 4b, as shown in timing diagram 450, the processor 120 may arrange first and second CIS events 402 and 403 in a CIG event 401 in a staggered arrangement, wherein the first CIS event 402 includes first and second sub-events 404 and 405, and the second CIS event 403 includes first and second sub-events 406 and 407. As shown in timing diagram 450, processor 120 may obtain, configure, or set a CIG event 401 including first and second CIS events 402, 403 in a staggered arrangement by arranging first and second sub-events 406, 406 in first and second CIS events 402, 403 immediately after first sub-event 404 in first CIS event 402, and arranging second sub-event 405 in second CIS event 403 immediately after second sub-event 405 in first CIS event 402. For example, in the timing chart 450, since the first CIS event 402 starts at the start timing of the first sub event 404 and ends at the end timing of the second sub event 405 without including the first sub event 406, and the second CIS event 403 starts at the start timing of the first sub event 406 and ends at the end timing of the second sub event 407 without including the sub event 405, the first CIS event 402 and the second CIS event 403 do not overlap each other in the staggered arrangement. In each of the sequential arrangement and the staggered arrangement, since the processor 120 may transmit the packet through each of the first sub-event 404, the second sub-event 405, the first sub-event 406, and the second sub-event 407 once, the processor 120 may transmit the packet to the first external electronic device 201 at most twice through the first CIS event 402 and transmit the packet to the second external electronic device 202 at most twice through the second CIS event 403 in each of the sequential arrangement and the staggered arrangement. In other words, in each of the sequential arrangement and the staggered arrangement, the opportunity to transmit a packet through the first CIS event 402 is fixed, and the opportunity to transmit a packet through the second CIS event 403 is fixed. For example, in each of the sequential arrangement and the staggered arrangement, the processor 120 may not adaptively change the number of times packets are transmitted through the first CIS event 402 and the number of times packets are transmitted through the second CIS event 403 according to the quality of the first link between the first external electronic device 201 and the electronic device 101 and the quality of the second link between the second external electronic device 202 and the electronic device 101.

Referring back to fig. 3, the processor 120 may obtain, configure or set the CIG event to adaptively change the number of times packets are transmitted through the first CIS event and the number of times packets are transmitted through the second CIS event by arranging the second CIS event at least partially overlapping with at least a portion of the first CIS event. For example, by arranging an anchor point for a second CIS event within a first CIS event, the processor 120 may obtain a CIG event that includes the first CIS event and the second CIS event that at least partially overlaps with at least a portion of the first CIS event. The processor 120 may obtain a CIG event comprising a first CIS event and a second CIS event comprising the following sub-events: the sub-event at least partially overlaps at least a portion of the plurality of sub-events in the first CIS event. The overlapping of at least a portion of the first CIS event with at least a portion of the second CIS event may be referred to as a hybrid arrangement, depending on having both the characteristics of a sequential arrangement and the characteristics of a staggered arrangement.

The processor 120 may arrange the first CIS event and the second CIS event among the CIG events in a mixed arrangement based on the specified condition being satisfied.

For example, the processor 120 may arrange the first CIS event and the second CIS event of the CIG events in a mixed arrangement based on identifying that at least one external electronic device (e.g., the first external electronic device 201 and the second external electronic device 202) supports the mixed arrangement. The processor 120 may arrange the first CIS event and the second CIS event among the CIG events in a mixed arrangement based on identifying data indicating support of the mixed arrangement from capability information of at least one external electronic device received from the at least one external electronic device. The processor 120 may arrange the first CIS event and the second CIS event in the CIG event according to the hybrid arrangement based on identifying that the modulation scheme of the signal received from the at least one external electronic device indicates that the hybrid arrangement is supported.

For example, the processor 120 may obtain a CIG event including a second CIS event including a plurality of sub-events at least partially overlapping with at least a portion of the plurality of sub-events in the first CIS event, on condition that anchor points of at least some of the sub-events in the first CIS event correspond to anchor points of at least some of the sub-events in the second CIS event. The processor 120 may obtain a CIG event including a second CIS event including a plurality of sub-events at least partially overlapping with at least a portion of the plurality of sub-events in the first CIS event on condition that a time interval between an anchor point of a first sub-event among the plurality of sub-events in the first CIS event and an anchor point of a second sub-event among the plurality of sub-events in the first CIS event is a multiple of a time interval between an anchor point of a third sub-event among the plurality of sub-events in the second CIS event and an anchor point of a fourth sub-event among the plurality of sub-events immediately after the third sub-event. The processor 120 may obtain a CIG event including a second CIS event including a plurality of sub-events at least partially overlapping with at least a portion of the plurality of sub-events in the first CIS event on condition that a time interval between an anchor point of a third sub-event of the plurality of sub-events in the second CIS event and an anchor point of a fourth sub-event of the plurality of sub-events in the second CIS event is a multiple of a time interval between an anchor point of a first sub-event of the plurality of sub-events in the first CIS event and an anchor point of a second sub-event of the plurality of sub-events in the first CIS event. The processor 120 may obtain a CIG event including a second CIS event including a plurality of sub-events at least partially overlapping with at least a portion of the plurality of sub-events in the first CIS event on condition that a length of each of the plurality of sub-events in the first CIS event is a multiple of a length of each of the plurality of sub-events in the second CIS event or that a length of each of the plurality of sub-events in the second CIS event is a multiple of a length of each of the plurality of sub-events in the first CIS event. For example, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event including a plurality of sub-events at least partially overlapping with at least a portion of the plurality of sub-events in the first CIS event, under a condition that a length of each of the plurality of sub-events in the first CIS event is the same as a length of each of the plurality of sub-events in the second CIS event.

Referring to fig. 5a, as shown in timing diagram 500, the processor 120 may set or obtain a CIG event 501 including a first CIS event 502 and a second CIS event 503, the second CIS event 503 partially overlapping a portion of the first CIS event 502. For example, the processor 120 may set or obtain the CIG event 501 by: the first and second CIS events 502 and 503 are arranged such that each of the k-th sub-event 502-k (k is a natural number greater than 1 and less than n) in the first CIS event 502 to the n-th sub-event 502-n overlaps each of the first to n-k+1-th sub-events 503- (n-k+1) in the second CIS event 503. Since the first CIS event 502 includes the kth to nth sub-events 502-k to 502-n each overlapping the first to nth to k+1 th sub-events 503- (n-k+1), and the first to kth-1 th sub-events 502-1 to 502- (k-1) not overlapping the second CIS event 503, the number of times of transmitting the packet through the first CIS event 502 may be k-1 times to n times. In the timing diagram 500, since the second CIS event 503 includes first to n-k+1-th sub-events 503-1 to (n-k+1) -th sub-events 503- (n-k+2) -n-th sub-events 503-n each overlapping with the k-th sub-event 502-k to n-th sub-event 502-n, and n-k+2-th sub-events 503- (n-k+2) -n-th sub-events 503-n not overlapping with the first CIS event 502, the number of times of transmitting packets through the second CIS event 503 may be k-1 times to n times. For example, the processor 120 may send the packet 505 for the first external electronic device 201 over at least a portion of the time interval of the first CIS event 502 that does not overlap with the second CIS event 503 (e.g., the first through k-1 sub-events 502-1 through 502- (k-1)); and transmitting one of the packet 505 for the first external electronic device 201 and the packet 506 for the second external electronic device 202 over at least a portion of the time interval of the first CIS event 502 that overlaps with the second CIS event 503 (e.g., the kth sub-event 502-k to the nth sub-event 502-n) (or the time interval of the second CIS event 503 that overlaps with the first CIS event 502 (e.g., the first sub-event 503-1 to the nth-k +1 sub-event 503- (n-k + 1)) and transmitting a last target packet for the second external electronic device 201 over the kth sub-event 502-k to the first external electronic device 502 (e.g., the last target packet to the first external electronic device 201 over the kth sub-event 502-k, and receiving a signal from the first external electronic device 201 over the kth sub-event 502-k to the second external device 506 for the first external electronic device 502-k, and transmitting a packet 506 for the second external electronic device over at least a portion of the second CIS event 503 that does not overlap with the first CIS event 502 (e.g., the nth-k +2 sub-event 503- (n-k + 2) to the nth sub-event 503-n) packets 506 for the second external electronic device 202. For example, a last target packet of the first external electronic device 201 to be transmitted over the first sub-event 502-k to the first sub-event 502-1 to the first external electronic device 201 and a last target packet of the first target packet to the first external electronic device 201 over the kth sub-event 502-k to be transmitted over the first sub-event 1 to the first sub-k and a last target packet to the first target packet for the first sub-event 1 to the first sub-event 1 device for the first device (n-t sub-event 1 and a first device can be a positive packet, the packet is transmitted to the first external electronic device 201 in the first CIS event 502 based on the Burst Number (BN) and refresh timeout (FT) of the first CIS event 502. The processor 120 may adaptively change the number of times packets are transmitted to the first external electronic device 201 through the CIG event 501 and the number of times packets are transmitted to the second external electronic device 202 through the CIG event 501 by obtaining the CIG event 501 including the first CIS event 502 and the second CIS event 503 partially overlapping a portion of the first CIS event 502. For example, when the quality of the first link between the first external electronic device 201 and the electronic device 101 is much better than the quality of the second link between the second external electronic device 202 and the electronic device 101, the processor 120 may enhance the quality of the multi-stream audio by assigning the time interval of the second CIS event 503 that partially overlaps with a portion of the first CIS event 502 as the time interval for transmitting packets to the second external electronic device 202.

Fig. 5a illustrates an example in which the length of each of the first to n-th sub-events 502-1 to 502-n in the first CIS event 502 is the same as the length of the first to n-th sub-events 503-1 to 503-n in the second CIS event 503, but this is for convenience of description only. For example, although not shown in fig. 5a, even when the length of each of the first to n-th sub-events 502-1 to 502-n in the first CIS event 502 is different from the length of each of the first to n-th sub-events 503-1 to 503-n in the second CIS event 503, the processor 120 may obtain a CIG event 501 including the first CIS event 502 and the second CIS event 503 at least partially overlapping with at least a portion of the first CIS event 502 under the condition that each of anchor points of the first to n-th sub-events 502-1 to 502-n (e.g., k-th sub-event 502-k to n) in the first to n-th sub-events 502-n corresponds to at least a portion of the first to n-th sub-events 503-1 to 503-n ((e.g., first to n-k+1) sub-th sub-event 503 of the second CIS event 503). Although not shown in fig. 5a, the processor 120 may obtain a CIG event 501 including a first CIS event 502 and a second CIS event 503 at least partially overlapping with at least a portion of the first CIS event 502, on condition that an interval between anchor points of the first through nth sub events 502-1 through 502-n in the first CIS event 502 is a multiple of an interval between anchor points of the first through nth sub events 503-1 through 503-n in the second CIS event 503, and an offset of the anchor point of each of the first through nth sub events 502-1 through 502-n in the first CIS event 502 corresponds to an offset of the anchor point of each of the first through nth sub events 503-1 through 503-n in the second CIS event 503. Although not shown in fig. 5a, the processor 120 may obtain a CIG event 501 including a first CIS event 502 and a second CIS event 503 at least partially overlapping with at least a portion of the first CIS event 502 on condition that an interval between anchor points of the first sub event 503-1 to n-th sub event 503-n in the second CIS event 502 is a multiple of an interval between anchor points of the first sub event 502-1 to n-th sub event 502-n in the first CIS event 502, and an offset of the anchor point of each of the first sub event 502-1 to n-th sub event 502-n in the first CIS event 502 corresponds to an offset of the anchor point of each of the first sub event 503-1 to n-th sub event 503-n in the second CIS event 503.

In another example, referring to fig. 5b, as shown in timing diagram 550, the processor 120 may obtain a CIG event 551 including a first CIS event 552 and a second CIS event 553 that completely overlaps the first CIS event 552. For example, the processor 120 may obtain the CIG event 551 by: the first and second CIS events 552 and 553 are arranged such that each of the first through fourth sub-events 552-1 through 552-4 of the first CIS event 552 overlaps each of the first through fourth sub-events 553-1 through 553-4 of the second CIS event 553. Since the first CIS event 552 and the second CIS event 553 completely overlap each other within the CIG event 551, the processor 120 may adaptively change the number of times a packet may be transmitted through the first CIS event 552 and the number of times a packet may be transmitted through the second CIS event 553. For example, based on the last target packet transmitted to the first external electronic device 201 through the first sub-event 552-1 being transmitted to the first external electronic device 201 through the first CIS event 552-1 and the acknowledgement signal for the last target packet being received from the first external electronic device 201 through the first sub-event 552-1, the processor 120 may stop transmitting packets to the first external electronic device 201 through the second through fourth sub-events 552-2 through 552-4, which are the remaining sub-events of the first CIS event 552, and transmit packets to the second external electronic device 202 through at least a portion of the second through fourth sub-events 553-2 through 553-4. The processor 120 may enhance the quality of the multi-stream audio by adaptively changing the time interval for transmitting packets for the first external electronic device 201 and the time interval for transmitting packets for the second external electronic device 202 within the CIG event 551 according to the difference between the quality of the first link and the quality of the second link.

Fig. 5b illustrates an example in which the length of each of the first through fourth sub-events 552-1 through 552-4 of the first CIS event 552 is the same as the length of each of the first through fourth sub-events 553-1 through 553-4 of the second CIS event 553, but this is for convenience of description only. For example, although not shown in fig. 5b, even when the length of each of the first through fourth sub-events 552-1 through 552-4 of the first CIS event 552 and the length of each of the first through fourth sub-events 553-1 through 553-4 of the second CIS event 552 are different from each other, the processor 120 may obtain the CIG event 551 including the first CIS event 552 and the second CIS event 553 overlapping the first CIS event 552 under a condition that an anchor point of each of the first through fourth sub-events 552-1 through 552-4 of the first CIS event corresponds to an anchor point of each of the first through fourth sub-events 553-1 through 553-4 of the second CIS event 553. For example, although not shown in fig. 5b, the processor 120 may obtain the CIG event 551 including the first CIS event 552 and the second CIS event 553 overlapping the first CIS event 552 on the condition that the interval between the anchor points of the first through fourth sub-events 552-1 through 552-4 of the first CIS event 552 is a multiple of the interval between the anchor points of the first through fourth sub-events 553-1 through 553-4 of the second CIS event 553, and the offset of each of the anchor points of the first through fourth sub-events 552-1 through 552-4 of the first CIS event 552 corresponds to the offset of each of the anchor points of the first through fourth sub-events 553-1 through 553-4 of the second CIS event 553. Such a CIG event 551 is described below with reference to fig. 5 c.

For example, although not shown in fig. 5b, the processor 120 may obtain a CIG event 551 including a first CIS event 552 and a second CIS event 553 overlapping the first CIS event 552 on the condition that an interval between anchor points of the first through fourth sub events 553-1 through 553-4 of the second CIS event 553 is a multiple of an interval between anchor points of the first through fourth sub events 552-1 through 552-4 of the first CIS event 552, and an offset of each of the anchor points of the first through fourth sub events 552-1 through 552-4 of the first CIS event 552 corresponds to an offset of each of the anchor points of the first through fourth sub events 553-1 through 553-4 of the second CIS event 553.

Referring to fig. 5c, as shown in timing diagram 570, the processor 120 may obtain a CIG event 571 including a first CIS event 572 and a second CIS event 573 that completely overlaps the first CIS event 572. For example, the processor 120 may obtain the CIG event 571 by: the first and second CIS events 572 and 573 are arranged such that the first sub-event 572-1 of the first CIS event 572 overlaps the first and second sub-events 573-1 and 573-2 of the second CIS event 573, the second sub-event 572-2 of the first CIS event 572 overlaps the third and fourth sub-events 573-3 and 573-4 of the second CIS event 573, the third sub-event 572-3 of the first CIS event 572 overlaps the fifth and sixth sub-events 573-5 and 573-6 of the second CIS event, and the fourth sub-event 572-4 of the first CIS event 572 overlaps the seventh and eighth sub-events 573-7 and 573-4 of the second CIS event 573. Unlike the CIG event 501 and the CIG event 551 shown in fig. 5a and 5b, respectively, the number of sub-events of the first CIS event 572 of the CIG event 571 may be different from the number of sub-events of the second CIS event 573 of the CIG event 571. For example, the interval between anchor points of sub-events of a first CIS event 572 of the CIG event 571 may be longer than the interval between anchor points of sub-events of a second CIS event 573 of the CIG event 571, unlike the CIG event 501 and the CIG event 551 shown in fig. 5a and 5b, respectively. Unlike the CIG event 501 and the CIG event 551 shown in fig. 5a and 5b, respectively, the number of times packets can be transmitted through the first CIS event 572 can be different from the number of times packets can be transmitted through the second CIS event 573. For example, the spacing between the anchors of the sub-events of the first CIS event 572 of the CIG event 571 may be a multiple of the spacing between the anchors of the sub-events of the second CIS event 573 of the CIG event 571. The offset of the anchor point for each of the sub-events of the first CIS event 572 of the CIG event 571 may be the same as the offset of the anchor point for each of the sub-events of the second CIS event 573 of the CIG event 571. For example, the position of the anchor point of the first sub-event 572-1 of the first CIS event 572 may be the same as the position of the anchor point of the first sub-event 573-1 of the second CIS event 573, the position of the anchor point of the second sub-event 572-2 of the first CIS event 572 may be the same as the position of the anchor point of the third sub-event 573-3 of the second CIS event 573, the position of the anchor point of the third sub-event 572-3 of the first CIS event 572 may be the same as the position of the anchor point of the fifth sub-event 573-5 of the second CIS event 573, and the position of the anchor point of the fourth sub-event 572-4 of the first CIS event 572 may be the same as the position of the anchor point of the seventh sub-event 573-7 of the second CIS event 573. For example, the anchor point of the second sub-event 573-2 of the second CIS event 573 may be within the first sub-event 572-1 of the first CIS event 572, the anchor point of the fourth sub-event 573-4 of the second CIS event 573 may be within the second sub-event 572-2 of the first CIS event 572, the anchor point of the sixth sub-event 573-6 of the second CIS event 573 may be within the third sub-event 572-3 of the first CIS event 572, and the anchor point of the eighth sub-event 573-8 of the second CIS event 573 may be within the fourth sub-event 572-4 of the first CIS event 572. For example, the sub-event of the first CIS event 572 may be synchronized with the sub-event of the second CIS event 573.

Since the interval between the anchors of the sub-events for the first CIS event 572 within the time interval for the CIG event 571 is longer than the interval between the anchors of the sub-events for the second CIS event 573 within the time interval, the time interval may be such: for each sub-event of the first CIS event 572, any one of the transmission to the first external electronic device 201 and the transmission to the second external electronic device 202 may be adaptively selected.

Referring back to fig. 3, the processor 120 may adaptively change an initial CIS event (e.g., a CIS event that first occurs between the first CIS event and the second CIS event) among CIGs events including the first CIS event and the second CIS event, so as to uniformly distribute time resources provided for the first CIS event and time resources provided for the second CIS event that at least partially overlaps with at least a portion of the first CIS event. For example, the processor 120 may schedule the first and second CIS events in the first CIG event such that an anchor point of the first CIS event in the first CIG event occurs simultaneously with and before an anchor point of the second CIS event in the first CIG event, and may schedule the first and second CIS events in the second CIG event such that an anchor point of the first CIS event in the second CIG event immediately after the first CIG event occurs simultaneously with and before an anchor point of the second CIS event in the second CIG event. The processor 120 may uniformly distribute the time resources provided for the first CIS event and the time resources provided for the second CIS event at least partially overlapping with at least a portion of the first CIS event by assigning a starting CIS event of the 2k-1CIG events (where k is a natural number greater than or equal to 1) as the first CIS event and assigning a starting CIS event of the 2k CIG events as the second CIS event. Referring to fig. 6, as shown in a timing diagram 600, the processor 120 may schedule a CIS event starting from an anchor point 605 of a kth CIG event 601-k as a first CIS event 602 among a first CIS event 602 and a second CIS event 603 partially overlapping a portion of the first CIS event 602, and schedule a CIS event starting from an anchor point 607 of a kth+1cig event 601- (k+1) immediately following the kth CIG event 601-k as a second CIS event 603 among the first CIS event 602 and the second CIS event 603 partially overlapping a portion of the first CIS event 602.

Referring back to fig. 3, the attribute of data in a packet that may be transmitted through a first CIS event that is a starting CIS event of the CIG events may correspond to the attribute of data included in a packet that may be transmitted through a second CIS event that at least partially overlaps with at least a portion of the first CIS event. The processor 120 may obtain a first CIS event for a first packet to be sent to the first external electronic device 201 and obtain a second CIS event for a second packet to be sent to a second external electronic device 202 associated with the first external electronic device 201, wherein the second packets correspond to the first packet, respectively. For example, since the first packet corresponds to the second packet, the processor 120 may transmit the first packet and the second packet in various schemes through the first CIS event and the second CIS event at least partially overlapping with at least a portion of the first CIS event.

The processor 120 may transmit the second packet through at least a portion of the second CIS event on condition that the transmission of the first packet is completed through at least a portion of the first CIS event that is the initiating CIS event among the CIG events. Unlike transmitting the first packet and the second packet using the sequential arrangement, such an arrangement that the second packet is transmitted after the transmission of the first packet is completed makes it possible to change the number of sub-events in the first CIS event for the transmission of the first packet and to change the number of sub-events in the second CIS event for the transmission of the second packet, and thus, transmitting the second packet after the transmission of the first packet is completed in the hybrid arrangement makes it possible to provide enhanced services than transmitting the first packet and the second packet using the sequential arrangement.

Referring to fig. 7a, after the transmission of the first packets 713-1, 713-2, and 713-3 to the first external electronic device 201 is completed in the CIG event 710 through at least a portion of the first CIS event 711, the processor 120 may transmit the second packet to the second external electronic device 202 through at least a portion of the second CIS event 712 at least partially overlapping with at least a portion of the first CIS event 711. In this case, the number of sub-events available for transmitting the second packet in the second CIS event 712 may be changed according to when the transmission of the first packet is completed. For example, as shown in timing diagram 700, when the first packet 713-3 is retransmitted differently than the first packet 713-1 and the first packet 713-2, the processor 120 may transmit the second packet to the second external electronic device 202 through the portion 714 of the second CIS event 712 that includes four sub-events. As shown in timing diagram 701, when transmission of a plurality of first packets including first packet 713-1, first packet 713-2, and first packet 713-3 is completed without retransmission, processor 120 may send the second packet to second external electronic device 202 through portion 715 of second CIS event 712 including five sub-events. Because the hybrid arrangement allows for changing transmission opportunities as opposed to the sequential arrangement, the hybrid arrangement may provide more adaptive transmission opportunities than the sequential arrangement.

The processor 120 may transmit one of the first packet or the second packet in an alternating manner and then continue to transmit the other on condition that either of the transmission of the first packet and the transmission of the second packet is completed. For example, since such a transmission arrangement enables continuous transmission as well as alternate transmission, transmitting the first and second packets in a mixed arrangement makes it possible to provide more enhanced services than transmitting the first and second packets using an interleaved arrangement.

Referring to fig. 7a, the processor 120 may alternately perform transmission of a first packet (e.g., a first packet 723-1, a first packet 723-2, and a first packet 723-3) to the first external electronic device 201 and transmission of a second packet (e.g., a second packet 724-1, a second packet 724-2, and a second packet 724-3) to the second external electronic device 202 in sub-event units using a first CIS event 721 of the CIG events 720 and a second CIS event 722 of the CIG events 720 overlapping the first CIS event 721. For example, as shown in timing diagram 702, processor 120 may send second packet 724-1 to second external electronic device 202 through second CIS event 722 after first packet 723-1 is sent to first external electronic device 201 through first CIS event 721, send first packet 723-2 to first external electronic device 201 through first CIS event 721 after second packet 724-1 is sent, re-send second packet 724-1 to second external electronic device 202 through second CIS event 722 after first packet 723-2 is sent, and send first packet 723-3 to first external electronic device 201 after second packet 724-1 is re-sent. On the condition that the transmission of the first packet 723-3 is successful and the retransmission of the second packet 724-1 is successful, the processor 120 may send the second packet 724-2 and the second packet 724-3 to the second external electronic device 202 through the portion 725 of the second CIS event 722 that includes three sub-events. Unlike the staggered arrangement in which the second packets 724-2 and 724-3 have to be sent over two sub-events due to sub-events (e.g., sub-event 726) in the first CIS event 721, even though the transmission of the first packet has been completed, the hybrid arrangement allows the second packets 724-2 and 724-3 to be sent over the portion 725 of the second CIS event 722 that includes three sub-events. For example, a hybrid arrangement may provide more adaptive transmission opportunities than a staggered arrangement.

Referring back to fig. 3, the attribute of data in a packet that can be transmitted through a first CIS event that is a starting CIS event among the CIG events can be distinguished from the attribute of data included in a packet that can be transmitted through a second CIS event that at least partially overlaps with at least a portion of the first CIS event. For example, when both the first CIS event and the second CIS event are obtained, set, or arranged for a packet to be transmitted to the external electronic device, the processor 120 may transmit a packet including data obtained in each cycle to the external electronic device through the first CIS event started before the second CIS event, and transmit a packet including data obtained based on the identification of the designated event to the external electronic device through the second CIS event. The size of the buffer for data transmitted through the first CIS event may be larger than the size of the buffer for data transmitted through the second CIS event, but is not limited thereto. The processor 120 may transmit a packet for audio continuously provided through a first CIS event that starts before a timing of starting a second CIS event, and transmit a packet for audio provided under a condition that a designated event is recognized through the second CIS event.

Referring to fig. 7b, the processor 120 may display a user interface 730 of a game executing in the electronic device 101 through a display of the electronic device 101 (e.g., the display module 160 shown in fig. 1). Using the external electronic device 735, while the user interface 730 is displayed, in order to output background music (BGM) of a game and sound effects provided based on user inputs received through the user interface 730, the processor 120 may obtain a first CIG event 750 including a first CIS event 751 and a second CIS event 752 partially overlapping a portion of the first CIS event 751, and obtain a second CIG event 760 including the first CIS event 761 and a second CIS event 762 partially overlapping a portion of the first CIS event 761, as shown in the timing diagram 740. For example, the processor 120 may transmit the packet 770 for BGM continuously output while the game is being executed to the external electronic device 735 through each of the first and second CIS events 751 and 761, which are start CIS events of each of the first and second CIG events 750 and 760, and transmit the packet 771 for sound effects provided under the condition that user input is received to the external electronic device 735 through each of the second and second CIS events 752 and 762. For example, when no user input to generate a sound effect is received for the first CIG event 750, as shown in the timing diagram 740, the processor 120 may send the packet 770 to the external electronic device 735 through the first CIS event 751 in the first CIG event 750 and not send the packet through the second CIS event 752 in the first CIG event 750 or send the dummy packet 772 through the second CIS event 752 in the first CIG event 750. In another example, when a user input 780 is received to generate a sound effect for the second CIG event 760, as shown in the timing diagram 740, the processor 120 may send the packet 770 to the external electronic device 735 through a portion of the first CIS event 761 in the second CIG event 760 and send the packet 771 to the external electronic device 735 through an overlap of the second CIS event 762 in the second CIG event 760 with a portion of the first CIS event 761. The priority of packet 771 associated with user input 780 may be higher than the priority of packet 770. For example, even when the transmission of the packet 770 through a portion of the first CIS event 761 is not completed, the processor 120 may transmit the packet 771 through a portion of the second CIS event 762 that overlaps a portion of the first CIS event 761 in response to receiving the user input 780. In other words, the processor 120 may assign a plurality of CIS events for respectively transmitting packets having different priorities to a single external electronic device (such as the external electronic device 735), and arrange the plurality of CIS events to entirely overlap or partially overlap each other.

Fig. 8 is a flowchart illustrating a method of transmitting data via a CIG event including a first CIS event and a second CIS event arranged in a hybrid manner according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Referring to fig. 8, in operation 802, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event at least partially overlapping with at least a portion of the first CIS event. The CIG event may include a first CIS event and a second CIS event in a hybrid arrangement. The first CIS event may be an event for transmitting data to a first external electronic device (e.g., the first external electronic device 201 shown in fig. 2), and the second CIS event may be an event for transmitting data to a second external electronic device (e.g., the second external electronic device 202 shown in fig. 2). The first CIS event may include a plurality of first sub-events, and the second CIS event may include a plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events. The processor 120 may obtain a CIG event including a first CIS event including the plurality of first sub-events and a second CIS event including a plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events by configuring an anchor point of the second CIS event within the first CIS event initiated from the anchor point of the first CIS event, but is not limited thereto.

In accordance with an embodiment of the present disclosure, the processor 120 may perform operation 802 based on identifying that the first and second external electronic devices support including the first and second CIS events in a CIG event in a hybrid arrangement. For example, based on receiving the capability information of the first external electronic device from the first external electronic device and the capability information of the second external electronic device from the second external electronic device, the processor 120 may determine to include the first CIS event and the second CIS event in a mixed arrangement in the CIG event, and perform operation 802 based on the determination. However, it is not limited thereto.

At operation 804, the processor 120 may transmit the first data to the first external electronic device through a first sub-event in the first CIS event. The first sub-event may be one of the plurality of first sub-events in a first CIS event. The first sub-event may overlap one of the plurality of second sub-events in the second CIS event, or may not overlap all of the plurality of second sub-events. When the first sub-event is not overlapped with all the second sub-events, a last sub-event of the second sub-event may not be overlapped with all the plurality of first sub-events.

At operation 806, the processor 120 may receive an acknowledgement signal from the first external electronic device through the first sub-event in the first CIS event. For example, the first external electronic device may set NESN (nextExpectedSeqNum) of the packets to SN (transmitSeqNum) based on receiving the packet including the first data through the first sub-event, and transmit a response packet including the set SN as an acknowledgement signal to the electronic device 101 through the first sub-event. The processor 120 may identify that the first external electronic device normally receives the first data through the first sub-event based on receiving the acknowledgement signal.

At operation 808, the processor 120 may transmit the second data to the second external electronic device through a third sub-event of the second CIS event based on receiving an acknowledgement signal from the first external electronic device through the first sub-event. For example, the third sub-event of the second CIS event may be a sub-event overlapping with the second sub-event immediately after the first sub-event among the plurality of first sub-events of the second CIS event. The third sub-event in the second CIS event may be a sub-event from which the second CIS event is initiated, but is not limited thereto. The processor 120 may transmit at least one packet including the second data to the second external electronic device through at least one sub-event including the third sub-event among the second CIS events, but is not limited thereto.

Although not shown in fig. 8, the processor may terminate transmitting data to the first external electronic device through all remaining sub-events of the first CIS event of the CIG events based on receiving an acknowledgement signal from the first external electronic device through the first sub-event.

As described above, the electronic device 101 may adaptively distribute the time resources for transmitting data to the first external electronic device and the time resources for transmitting data to the second external electronic device according to a change in at least one of the state of the first link between the first external electronic device and the electronic device 101 or the state of the second link between the second external electronic device and the electronic device 101 by configuring the CIG event including the first CIS event and the second CIS event in a mixed arrangement. For example, the electronic device 101 may configure CIG events including the first CIS event and the second CIS event in a mixed arrangement, thereby increasing the amount of time resources that may be allocated to each of the first CIS event and the second CIS event.

Fig. 9a is a flowchart illustrating a method of obtaining a CIG event including a first CIS event and a second CIS event in a mixed arrangement based on synchronization of an anchor point of each of a plurality of first sub-events in the first CIS event and an anchor point of each of a plurality of second sub-events in the second CIS event according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Operations 902 through 904 of fig. 9a may be associated with operation 802 of fig. 8.

Referring to fig. 9a, in operation 902, the processor 120 may identify whether an anchor point of each of a plurality of first sub-events in a first CIS event defined by the description of fig. 8 is synchronized with an anchor point of each of a plurality of second sub-events in a second CIS event defined by the description of fig. 8. When the anchor point of each of the plurality of first sub-events is synchronized with the anchor point of each of the plurality of second sub-events, it may mean that the offset of the anchor point of each of the plurality of first sub-events coincides with the offset of the anchor point of each of the plurality of second sub-events, and that the interval between the anchor points of the plurality of first sub-events is a multiple of the interval between the anchor points of the plurality of second sub-events. When the anchor point of each of the plurality of first sub-events is synchronized with the anchor point of each of the plurality of second sub-events, it may mean that the offset of the anchor point of each of the plurality of first sub-events coincides with the offset of the anchor point of each of the plurality of second sub-events, and that the interval between the anchor points of the plurality of second sub-events is a multiple of the interval between the anchor points of the plurality of first sub-events. When the anchor point of each of the plurality of first sub-events is synchronized with the anchor point of each of the plurality of second sub-events, this may mean that the arrangement of at least a portion of the plurality of first sub-events and at least a portion of the plurality of second sub-events overlapping may be performed regardless of (or independent of) the length of each of the plurality of first sub-events and the length of each of the plurality of second sub-events, and thus, the processor 120 may identify whether the anchor point of each of the plurality of first sub-events is synchronized with the anchor point of each of the plurality of second sub-events. The processor 120 may perform operation 904 if the anchor point of each of the plurality of first sub-events is synchronized with the anchor point of each of the plurality of second sub-events, and the processor 120 may perform operation 906 if the anchor point of each of the plurality of first sub-events is not synchronized with the anchor point of each of the plurality of second sub-events.

At operation 904, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event partially overlapping at least a portion of the first CIS event based on identifying that an anchor point of each of the plurality of first sub-events is synchronized with an anchor point of each of the plurality of second sub-events. For example, the processor 120 may obtain CIG events including a first CIS event and a second CIS event in a mixed arrangement.

At operation 906, the processor 120 may obtain a CIG event including first and second CIS events arranged in sequence or staggered based on identifying that an anchor point of each of the plurality of first sub-events is not synchronized with an anchor point of each of the plurality of second sub-events.

Fig. 9b is a flowchart illustrating a method of obtaining a CIG event including a first CIS event and a second CIS event in a mixed arrangement based on a length of each of a plurality of first sub-events in the first CIS event and a length of each of a plurality of second sub-events in the second CIS event according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Operations 912 through 914 of fig. 9b may be associated with operation 802 of fig. 8.

Referring to fig. 9b, in operation 912, the processor 120 may identify whether the length of each of the plurality of first sub-events in the first CIS event defined by the description of fig. 8 is the same as the length of each of the plurality of second sub-events in the second CIS event defined by the description of fig. 8. When the length of each of the plurality of first sub-events is the same as the length of each of the plurality of second sub-events, this may mean that an arrangement in which at least a portion of the plurality of first sub-events and at least a portion of the plurality of second sub-events overlap may be performed, and thus, the processor 120 may identify whether the length of each of the plurality of first sub-events is the same as the length of each of the plurality of second sub-events. The processor 120 may identify whether the length of each of the plurality of first sub-events is the same as the length of each of the plurality of second sub-events by identifying a parameter (e.g., se_length) of the first CIS event indicating the length of each of the plurality of first sub-events of the first CIS event and a parameter of the second CIS event indicating the length of each of the plurality of second sub-events of the second CIS event. The processor 120 may perform operation 914 if the length of each of the plurality of first sub-events is the same as the length of each of the plurality of second sub-events, and the processor 120 may perform operation 916 if the length of each of the plurality of first sub-events is different from the length of each of the plurality of second sub-events.

The processor 120 may also identify whether the start timing of each of the plurality of first sub-events is synchronized with the start timing of each of the plurality of second sub-events at operation 912. For example, when the length of each of the plurality of first sub-events is the same as the length of each of the plurality of second sub-events, and the start timing of each of the plurality of first sub-events is synchronized with the start timing of each of the plurality of second sub-events, this may mean that an arrangement in which at least a portion of the plurality of first sub-events and at least a portion of the plurality of second sub-events overlap may be performed, and thus, the processor 120 may perform a comparison between the length of each of the plurality of first sub-events and the length of each of the plurality of second sub-events, and a comparison between the start timing of each of the plurality of first sub-events and the start timing of each of the plurality of second sub-events. The processor 120 may perform operation 914 on the condition that the length of each of the plurality of first sub-events is the same as the length of each of the plurality of second sub-events and the start timing of each of the plurality of first sub-events is synchronized with the start timing of each of the plurality of second sub-events, otherwise the processor 120 may perform operation 916.

At operation 914, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event at least partially overlapping with at least a portion of the first CIS event based on identifying that a length of each of the plurality of first sub-events is the same as a length of each of the plurality of second sub-events. For example, the processor 120 may obtain CIG events including a first CIS event and a second CIS event in a mixed arrangement.

At operation 916, the processor 120 may obtain a CIG event including first and second CIS events arranged in a sequence or in a staggered arrangement based on identifying that a length of each of the plurality of first sub-events is different from a length of each of the plurality of second sub-events.

Fig. 10 is a flowchart illustrating a method of transmitting data during a time interval in which at least a portion of a first CIS event overlaps at least a portion of a second CIS event, according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Operations 1002 and 1006 of fig. 10 may be associated with operation 808 of fig. 8.

Referring to fig. 10, in operation 1002, after performing operation 806, the processor 120 may recognize whether the first data transmitted through operation 804 is last target data transmitted to the first external electronic device through the first CIS event. For example, when an acknowledgement signal for the first data, which is the last target data, is received, this may mean that transmission of all data scheduled for the first CIS event is completed in operation 806. When the transmission of all of the scheduled data for the first CIS event is completed, it is not necessary to transmit the data through the second sub event in the first CIS event immediately after the first sub event, and thus, the processor 120 can recognize whether the first data is the last target data. The processor 120 may perform operation 1004 if the first data is the last target data, and the processor 120 may perform operation 1006 if the first data is not the last target data.

In operation 1004, based on identifying the first data as the last target data, the processor 120 may transmit the second data through a third sub-event of a second CIS event that at least partially overlaps with at least a portion of the first CIS event. For example, operation 1004 may correspond to operation 808 of fig. 8.

At operation 1006, based on identifying that the first data is not the last target data, the processor 120 may send another data after the first data through a second sub-event in the first CIS event.

As described above, when the transmission of all data scheduled for the first CIS event has been completed before the end of the first CIS event, the electronic device 101 may transmit data to the second external electronic device through a sub event in the second CIS event overlapping with the remaining sub event in the first CIS event, instead of through the remaining sub event in the first CIS event. In other words, the electronic device 101 may increase the number of transmissions to the second external electronic device through the second CIS event using the CIG event including the first CIS event and the second CIS event arranged in a mixed manner.

Fig. 11 is a flowchart illustrating a method of obtaining a CIG event including a first CIS event and a second CIS event in a mixed arrangement based on a data attribute according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Operations 1102-1104 of fig. 11 may be associated with operation 802 of fig. 8.

Referring to fig. 11, in operation 1102, the processor 120 may identify whether the first data or the second data is associated with multimedia content. For example, the processor 120 may identify whether the first data or the second data is associated with the multimedia content in order to identify whether the size of the first data to be transmitted through the first CIS event or the size of the second data to be transmitted through the second CIS event needs to configure a CIG event including the first CIS event and the second CIS event in a mixed arrangement. In another example, the processor 120 may identify whether the first data or the second data is associated with multimedia content in order to identify whether a load of a first external electronic device for processing the first data to be transmitted through the first CIS event or a load of a second external electronic device for processing the second data to be transmitted through the second CIS event needs to configure a CIG event including the first CIS event and the second CIS event in a mixed arrangement. In another example, the processor 120 may identify whether the first data or the second data is associated with multimedia content in order to identify whether quality of service (QoS) of the first data to be transmitted through the first CIS event or quality of service (QoS) of the second data to be transmitted through the second CIS event needs to configure a CIG event including the first CIS event and the second CIS event in a mixed arrangement. In another example, the processor 120 may identify whether the first data or the second data is associated with multimedia content in order to identify whether to provide multi-stream audio through the first external electronic device and the second external electronic device. However, it is not limited thereto. The processor 120 may perform operation 1104 if the first data or the second data is associated with the multimedia content, and the processor 120 may perform operation 1106 if the first data and the second data are not associated with the multimedia content.

At operation 1104, based on identifying that the first data or the second data is associated with the multimedia content, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event at least partially overlapping with at least a portion of the first CIS event. For example, the processor 120 may obtain CIG events including a first CIS event and a second CIS event in a mixed arrangement.

In operation 1106, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event arranged in a sequence or in a staggered arrangement based on identifying that the first data and the second data are not associated with the multimedia content. For example, when the sizes of the first data and the second data are relatively small, the processor 120 may obtain CIG events arranged in a sequential order or in a staggered arrangement.

Fig. 12 is a flowchart illustrating a method of obtaining a CIG event including a first CIS event and a second CIS event in a hybrid arrangement based on a quality of a link between a first external electronic device and an electronic device according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Operations 1202 through 1204 of fig. 12 may be associated with operation 802 of fig. 8.

Referring to fig. 12, in operation 1202, the processor 120 may identify whether the quality of the link between the first external electronic device and the electronic device 101 (or the quality of the link between the second external electronic device and the electronic device 101) is equal to or greater than a reference quality. For example, when the quality of the link between the first external electronic device and the electronic device 101 is lower than the reference quality, this may mean that the number of times data is transmitted through the second CIS event overlapped with at least a portion of the first CIS event is limited, and thus, the processor 120 may recognize whether the quality of the link between the first external electronic device and the electronic device 101 is equal to or greater than the reference quality. The processor 120 may perform operation 1204 on a condition that the quality of the link between the first external electronic device and the electronic device 101 is equal to or higher than the reference quality, and the processor 120 may perform operation 1206 on a condition that the quality of the link between the first external electronic device 101 and the electronic device 101 is lower than the reference quality.

In operation 1204, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event at least partially overlapping with at least a portion of the first CIS event based on identifying that a quality of a link between the first external electronic device and the electronic device 101 is equal to or greater than a reference quality. For example, the processor 120 may obtain CIG events including a first CIS event and a second CIS event in a mixed arrangement.

In operation 1206, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event arranged in sequence or in a staggered arrangement based on identifying that the quality of the link between the first external electronic device and the electronic device 101 is lower than a reference quality.

As described above, the electronic device 101 may obtain a CIG event including the first CIS event and the second CIS event arranged in a mixed manner based on recognizing that the quality of the link between the first external electronic device and the electronic device 101 is equal to or greater than the reference quality, so as to uniformly distribute the time resources for transmission from the electronic device 101 to the first external electronic device and the time resources for transmission from the electronic device 101 to the second external electronic device.

Fig. 13 is a flowchart illustrating a method of distributing an initial CIS event among CIG events according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Referring to fig. 13, in operation 1302, the processor 120 may obtain a CIG event including a first CIS event and a second CIS event partially overlapping a portion of the first CIS event. For example, the first CIS event may be a CIS event that occurs before the second CIS event in the CIG event.

At operation 1304, the processor 120 may obtain a next CIG event immediately following the CIG event, in which a second CIS event partially overlapping a portion of the first CIS event occurs before the first CIS event. For example, when the anchor point of the CIG event obtained in operation 1302 is the anchor point of the first CIS event, the processor 120 may arrange the anchor point of the next CIG event obtained in operation 1304 as the anchor point of the second CIS event so as to uniformly distribute the time resources allocated for the first CIS event and the time resources allocated for the second CIS event. When the initial CIS event of the CIG event is the first CIS event, the processor 120 may set the initial CIS event of the next CIG event to the second CIS event.

As described above, the electronic device 101 may perform uniform distribution of different CIS events by arranging the start CIS event of the kth CIG event and the start CIS event of the k+1th CIG event immediately after the kth CIG event as different CIS events.

Fig. 14 is a flowchart illustrating a method of initiating a CIS event in a CIG event based on a quality of a first link between a first external electronic device and an electronic device and a quality of a second link between a second external electronic device and an electronic device, according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Referring to fig. 14, in operation 1402, the processor 120 may identify whether a value indicating a quality of a first link between a first external electronic device and the electronic device 101 is equal to or greater than a value indicating a quality of a second link between a second external electronic device and the electronic device 101. For example, the processor 120 may identify whether the value indicative of the quality of the first link is equal to or greater than the value indicative of the quality of the second link, so as to further ensure time resources for transmission over the second link when the quality of the first link is better than the quality of the second link, and to further ensure time resources for transmission over the first link when the quality of the second link is better than the quality of the first link. The processor 120 may perform operation 1404 if the value indicative of the quality of the first link is equal to or greater than the value indicative of the quality of the second link, and the processor 120 may perform operation 1406 if the value indicative of the quality of the first link is less than the value indicative of the quality of the second link.

At operation 1404, the processor 120 may set an anchor point for a CIS event (e.g., a first CIS event) of the first external electronic device as an anchor point for a next CIG event based on identifying that the value indicative of the quality of the first link is equal to or greater than the value indicative of the quality of the second link. For example, to further ensure time resources for transmission over the second link (e.g., transmission over the second CIS event), the processor 120 may set the starting CIS event of the next CIG event to the first CIS event.

At operation 1406, the processor 120 may set an anchor point for a CIS event (e.g., a second CIS event) of the second external electronic device to an anchor point of a next CIG event based on identifying that the value indicative of the quality of the first link is less than the value indicative of the quality of the second link. For example, to further ensure time resources for transmission over the first link (e.g., transmission over the first CIS event), the processor 120 may set the starting CIS event of the next CIG event to the second CIS event.

As described above, by identifying a CIS event having better link quality from the first CIS event and the second CIS event and setting the identified CIS event as a start event of the CIG event, the electronic device 101 may complete data transmission through the identified CIS event before the CIS event ends and transmit data through another CIS event. In other words, the electronic device 101 may control transmission via a CIG event including a first CIS event and a second CIS event arranged in a mixed manner according to the state of links, thereby allocating time resources for data transmission according to the quality of each link.

According to various embodiments of the present disclosure, unlike the illustration of fig. 14, the processor 120 may perform operation 1406 if the value indicating the quality of the first link is equal to or greater than the value indicating the quality of the second link in operation 1402, and the processor 120 may perform operation 1404 if the value indicating the quality of the first link is less than the value indicating the quality of the second link.

Fig. 15 is a flowchart illustrating a method of transmitting packets through a CIG event with a hybrid arrangement according to an embodiment of the present disclosure. The method may be performed by the electronic device 101 shown in fig. 1, the electronic device 101 shown in fig. 2, the electronic device 101 shown in fig. 3, or the processor 120 of the electronic device 101.

Referring to fig. 15, in operation 1502, the processor 120 may transmit a first packet to the first external electronic device through a second sub-event preceding the first sub-event, wherein the first packet is a last packet allocated to be transmitted to at least one target packet of the first external electronic device in a first CIS event among CIG events arranged in a mixed manner, and the second sub-event ends the first CIS event. For example, the second sub-event may be a sub-event overlapping one of a plurality of sub-events in a second CIS event in the CIG event.

At operation 1504, the processor 120 may receive a signal from the first external electronic device through the second sub-event in the first CIS event. For example, the signal may be a response packet to the first packet. For example, the signal may be an acknowledgement signal or a negative acknowledgement signal.

At operation 1506, the processor 120 may identify whether the signal is an acknowledgement signal. For example, the processor 120 may identify whether the signal is an acknowledgement signal or a negative acknowledgement signal by responding to the SN in the packet. The processor 120 may perform operation 1508 if the signal is an acknowledgement signal, and the processor 120 may perform operation 1510 if the signal is a negative acknowledgement signal.

In response to identifying that the signal is an acknowledgement signal, the processor 120 may send a second packet to the second external electronic device through one of a plurality of sub-events in the second CIS event, operation 1508. For example, when the signal is an acknowledge signal, it may mean that the transmission scheduled for the first CIS event is completed before the first CIS event ends, and thus, the processor 120 may transmit the second packet to the second external electronic device through the sub-event.

In response to identifying that the signal is a negative acknowledgement signal, the processor 120 may retransmit the first packet to the first external electronic device through the first sub-event following the second sub-event or a third sub-event immediately following the second sub-event at operation 1510. For example, when the signal is a negative acknowledgement signal, the processor 120 may retransmit the first packet to complete the transmission scheduled for the first CIS event.

According to embodiments of the present disclosure, an electronic device, method, and computer-readable storage medium may provide a robust service against a change in quality of at least one of a link between the electronic device and a first external electronic device or a link between the electronic device and a second external electronic device by communicating with each of the first external electronic device and the second external electronic device via a Connection Isochronous Group (CIG) event, the Connection Isochronous Group (CIG) event including a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event includes a plurality of first sub-events, the second CIS event including a plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events.

As described above, according to embodiments of the present disclosure, an electronic device (e.g., electronic device 101) may include: communication circuitry (e.g., communication circuitry 190) for Bluetooth Low Energy (BLE); at least one memory (e.g., memory 130) configured to store instructions; and at least one processor (e.g., processor 120) operably associated with the communication circuitry and the at least one memory, wherein the at least one processor, when executing the instructions, is configured to: obtaining a Connection Isochronous Group (CIG) event comprising a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event comprises a plurality of first sub-events and the second CIS event comprises a plurality of second sub-events that at least partially overlap with at least a portion of the plurality of first sub-events; and transmitting second data to the second external electronic device via a third sub-event among the plurality of second sub-events based on receiving an Acknowledgement (ACK) signal regarding the first data transmitted to the first external electronic device via the first sub-event among the plurality of first sub-events, wherein the third sub-event overlaps with a second sub-event immediately after the first sub-event among the plurality of first sub-events.

The at least one processor, when executing the instructions, may be configured to: a CIG event including a first CIS event including the plurality of first sub-events and a second CIS event including the plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events is obtained based on identifying that an anchor point of each of the plurality of first sub-events is synchronized with an anchor point of each of the plurality of second sub-events. The at least one processor, when executing the instructions, may be further configured to: based on identifying that the anchor point of each of the plurality of first sub-events is not synchronized with the anchor point of each of the plurality of second sub-events, a CIG event including first and second CIS events arranged in sequence or a CIG event including first and second CIS events arranged in a staggered manner is obtained.

The at least one processor, when executing the instructions, may be further configured to: based on identifying that a length of each of the plurality of first sub-events is the same as a length of each of the plurality of second sub-events, a CIG event including a first CIS event including the plurality of first sub-events and a second CIS event including the plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events is obtained. The at least one processor, when executing the instructions, may be further configured to: based on identifying that the length of each of the plurality of first sub-events is different from the length of each of the plurality of second sub-events, a CIG event including first and second CIS events arranged in sequence or a CIG event including first and second CIS events arranged in a staggered manner is obtained.

The at least one processor, when executing the instructions, may be configured to: obtaining a CIG event including a first CIS event and a second CIS event by configuring an anchor point of the second CIS event within the first CIS event initiated from the anchor point of the first CIS event, wherein the first CIS event includes the plurality of first sub-events and the second CIS event includes the plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events.

The at least one processor, when executing the instructions, may be configured to: based on receiving an acknowledgement signal for first data from the first external electronic device via the first sub-event, second data is sent to the second external electronic device via the third sub-event of the plurality of second sub-events, wherein the first data is last target data sent to the first external electronic device via the first CIS event.

The third sub-event overlapping the second sub-event may be a sub-event initiated by a second CIS event. A portion of the plurality of second sub-events may not overlap all of the plurality of first sub-events.

The at least one processor, when executing the instructions, may be configured to: based on receiving capability information of a first external electronic device from a first external electronic device and receiving capability information of a second external electronic device from a second external electronic device, a CIG event including a first CIS event including the plurality of first sub-events and a second CIS event including the plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events is obtained.

The at least one processor, when executing the instructions, may be configured to: a CIG event including a first CIS event including the plurality of first sub-events and a second CIS event including the plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events is obtained based on identifying that the first data or the second data is associated with the multimedia content.

The at least one processor, when executing the instructions, may be configured to: based on identifying that a quality of a link between a first external electronic device and an electronic device is equal to or greater than a reference quality, a CIG event is obtained that includes a first CIS event that includes the plurality of first sub-events and a second CIS event that includes the plurality of second sub-events that at least partially overlap with at least a portion of the plurality of first sub-events.

The first CIS event may be assigned for the first external electronic device, the second CIS event may be assigned for the second external electronic device, the anchor of the first CIS event from among the anchor of the first CIS event and the anchor of the second CIS event may be the anchor of the CIG event, and the at least one processor, when executing the instructions, may be further configured to: obtaining another CIG event immediately adjacent to the CIG event, wherein the another CIG event may include a third CIS event including a plurality of third sub-events and allocated for the first external electronic device, and a fourth CIS event including a plurality of fourth sub-events at least partially overlapping with at least a portion of the plurality of third sub-events and allocated for the second external electronic device, and wherein an anchor point of the fourth CIS event among an anchor point of the third CIS event and an anchor point of the fourth CIS event is an anchor point of the another CIG event.

The at least one processor, when executing the instructions, may be configured to: based on receiving the acknowledgement signal via the first sub-event, sending data to the first external electronic device via all remaining sub-events in the first CIS event is terminated.

The first sub-event may be a sub-event that does not overlap with the plurality of second sub-events, and the priority of the first service provided through the first data may be higher than the priority of the second service provided using the second data.

As described above, a method for operating an electronic device having a communication circuit for Bluetooth Low Energy (BLE) according to an embodiment of the present disclosure may include: obtaining a Connection Isochronous Group (CIG) event comprising a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event comprises a plurality of first sub-events and the second CIS event comprises a plurality of second sub-events that at least partially overlap with at least a portion of the plurality of first sub-events; and transmitting second data to the second external electronic device via a third sub-event of the plurality of second sub-events based on receiving an Acknowledgement (ACK) signal for the first data transmitted to the first external electronic device via the first sub-event of the plurality of first sub-events, wherein the third sub-event overlaps with a second sub-event of the plurality of first sub-events immediately following the first sub-event.

A non-transitory computer-readable storage medium according to an embodiment of the present disclosure may store one or more programs comprising instructions, wherein the instructions, when executed by at least one processor of an electronic device with communication circuitry for bluetooth low energy, cause the electronic device to: obtaining a Connection Isochronous Group (CIG) event comprising a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event comprises a plurality of first sub-events and the second CIS event comprises a second sub-event that at least partially overlaps with at least a portion of the plurality of first sub-events; and transmitting second data to the second external electronic device via a third sub-event of the plurality of second sub-events based on receiving an Acknowledgement (ACK) signal for the first data transmitted to the first external electronic device via the first sub-event of the plurality of first sub-events, wherein the third sub-event overlaps with a second sub-event of the plurality of first sub-events immediately following the first sub-event.

An electronic device according to an embodiment of the present disclosure may include a communication circuit for Bluetooth Low Energy (BLE) and a processor, wherein the processor is configured to: transmitting a first packet to the first external electronic device via a second sub-event preceding the first sub-event, wherein the first packet is a last packet of at least one target packet allocated for transmission to the first external electronic device within a first Connection Isochronous Stream (CIS) event of a Connection Isochronous Group (CIG) event, the second sub-event ending the first CIS event; in response to receiving an Acknowledgement (ACK) signal for the first packet from the first external electronic device via the second sub-event, transmitting the second packet to the second external electronic device via one of a plurality of sub-events in a second CIS event of the CIG events; and resending the first packet to the first external electronic device via the first sub-event following the second sub-event or a third sub-event immediately following the second sub-event in response to a Negative Acknowledgement (NACK) signal for the first packet from the first external electronic device via the second sub-event.

According to embodiments of the present disclosure, a method for operating an electronic device having a communication circuit for Bluetooth Low Energy (BLE) may include: transmitting a first packet to the first external electronic device via a second sub-event preceding the first sub-event, wherein the first packet is a last packet of at least one target packet allocated for transmission to the first external electronic device within a first Connection Isochronous Stream (CIS) event of a Connection Isochronous Group (CIG) event, the second sub-event ending the first CIS event; in response to receiving an Acknowledgement (ACK) signal for the first packet from the first external electronic device via the second sub-event, transmitting the second packet to the second external electronic device via one of a plurality of sub-events in a second CIS event of the CIG events; and resending the first packet to the first external electronic device via the first sub-event following the second sub-event or a third sub-event immediately following the second sub-event in response to a Negative Acknowledgement (NACK) signal for the first packet from the first external electronic device via the second sub-event.

According to an embodiment of the present disclosure, a non-transitory computer-readable storage medium may store one or more programs comprising instructions, wherein the instructions, when executed by at least one processor of an electronic device with communication circuitry for BLE, cause the electronic device to: transmitting a first packet to the first external electronic device via a second sub-event preceding the first sub-event, wherein the first packet is a last packet of at least one target packet allocated for transmission to the first external electronic device within a first Connection Isochronous Stream (CIS) event of a Connection Isochronous Group (CIG) event, the second sub-event ending the first CIS event; in response to receiving an Acknowledgement (ACK) signal for the first packet from the first external electronic device via the second sub-event, transmitting the second packet to the second external electronic device via one of a plurality of sub-events in a second CIS event of the CIG events; and resending the first packet to the first external electronic device via the first sub-event following the second sub-event or a third sub-event immediately following the second sub-event in response to a Negative Acknowledgement (NACK) signal for the first packet from the first external electronic device via the second sub-event.

The electronic device according to various embodiments disclosed herein may be one of various types of electronic devices. The electronic device may include, for example, a portable communication device (e.g., a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a household appliance. The electronic device is not limited to those described above.

It should be understood that the various embodiments of the disclosure and the terminology used therein are not intended to limit the technical features set forth herein to the particular embodiments, but rather include various modifications, equivalents or alternatives to the respective embodiments. For the description of the drawings, like reference numerals may be used to refer to like or related elements. As used herein, each of the phrases such as "a or B", "at least one of a and B", "at least one of a or B", "A, B or C", "at least one of A, B and C", and "at least one of A, B or C" may include any or all possible combinations of the items listed with the corresponding one of the plurality of phrases. As used herein, terms such as "1 st" and "2 nd" or "first" and "second" may be used to simply distinguish a corresponding component from another component and not to limit the components in other respects (e.g., importance or order). It will be understood that if the terms "operatively" or "communicatively" are used or the terms "operatively" or "communicatively" are not used, then if an element (e.g., a first element) is referred to as being "coupled to," "connected to," or "connected to" another element (e.g., a second element), it is intended that the element may be directly (e.g., wired) coupled to, wireless coupled to, or coupled to the other element via a third element.

As used in connection with various embodiments of the present disclosure, the term "module" may include an element implemented in hardware, software, or firmware, and may be used interchangeably with other terms (e.g., "logic," "logic block," "portion," or "circuitry"). A module may be a single integrated component adapted to perform one or more functions or a minimal unit or portion of the single integrated component. For example, according to embodiments of the present disclosure, a module may be implemented in the form of an Application Specific Integrated Circuit (ASIC).

The various embodiments set forth herein may be implemented as software (e.g., program 140) comprising one or more instructions stored in a storage medium (e.g., internal memory 136 or external memory 138) readable by a machine (e.g., electronic device 101). For example, under control of a processor, a processor (e.g., processor 120) of the machine (e.g., electronic device 101) may invoke and execute at least one instruction of the one or more instructions stored in the storage medium with or without the use of one or more other components. This enables the machine to operate to perform at least one function in accordance with the at least one instruction invoked. The one or more instructions may include code generated by a compiler or code capable of being executed by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. The term "non-transitory" merely means that the storage medium is a tangible device and does not include signals (e.g., electromagnetic waves), but the term does not distinguish between data being semi-permanently stored in the storage medium and data being temporarily stored in the storage medium.

According to embodiments of the present disclosure, methods according to various embodiments of the present disclosure may be included and provided in a computer program product. The computer program product may be used as a product for conducting transactions between sellers and buyers. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disk read only memory (CD-ROM)), or may be distributed (e.g., downloaded or uploaded) online via an application Store (e.g., play Store ^TM), or may be distributed (e.g., downloaded or uploaded) directly between two user devices (e.g., smart phones). At least some of the computer program product may be temporarily generated if published online, or at least some of the computer program product may be stored at least temporarily in a machine readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a forwarding server.

According to various embodiments of the present disclosure, each of the above-described components (e.g., a module or a program) may include a single entity or a plurality of entities, and some of the plurality of entities may be separately provided in different components. According to various embodiments of the present disclosure, one or more of the above components may be omitted, or one or more other components may be added. Alternatively or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In this case, according to various embodiments of the present disclosure, the integrated component may still perform the one or more functions of each of the plurality of components in the same or similar manner as the corresponding one of the plurality of components performed the one or more functions prior to integration. Operations performed by a module, a program, or another component may be performed sequentially, in parallel, repeatedly, or in a heuristic manner, or one or more of the operations may be performed in a different order or omitted, or one or more other operations may be added, according to various embodiments of the present disclosure.

Claims

1. An electronic device, comprising:

a communication circuit for Bluetooth Low Energy (BLE); and

A processor configured to:

obtaining a Connection Isochronous Group (CIG) event comprising a first Connection Isochronous Stream (CIS) event and a second CIS event, wherein the first CIS event comprises a plurality of first sub-events, the second CIS event comprises a plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events, and

Based on receiving an Acknowledgement (ACK) signal for first data transmitted to the first external electronic device via a first sub-event of the plurality of first sub-events, transmitting second data to the second external electronic device via a third sub-event of the plurality of second sub-events,

Wherein the third sub-event overlaps with a second sub-event immediately after the first sub-event among the plurality of first sub-events.

2. The electronic device of claim 1, wherein the processor is further configured to: the CIG event is obtained based on identifying that the anchor point of each of the plurality of first sub-events is synchronized with the anchor point of each of the plurality of second sub-events.

3. The electronic device of claim 2, wherein the processor is further configured to: based on identifying that the anchor point of each of the plurality of first sub-events is not synchronized with the anchor point of each of the plurality of second sub-events, obtaining the CIG event comprising first and second CIS events arranged in sequence or the CIG event comprising first and second CIS events arranged in a staggered manner.

4. The electronic device of claim 1, wherein the processor is further configured to: the CIG event is obtained by configuring an anchor point of a second CIS event within a first CIS event initiated from an anchor point of the first CIS event.

5. The electronic device of claim 1, wherein the processor is further configured to: based on receiving the ACK signal for first data from the first external electronic device via the first sub-event, second data is transmitted to the second external electronic device via the third sub-event of the plurality of second sub-events, wherein the first data is last target data transmitted to the first external electronic device via the first CIS event.

6. The electronic device of claim 1, wherein the third sub-event overlapping the second sub-event is a sub-event initiated by a second CIS event.

7. The electronic device of claim 6, wherein at least a portion of the plurality of second sub-events do not overlap any of the plurality of first sub-events.

8. The electronic device of claim 1, wherein the processor is further configured to: the CIG event is obtained based on receiving capability information of a first external electronic device from the first external electronic device and receiving capability information of a second external electronic device from the second external electronic device.

9. The electronic device of claim 1, wherein the processor is further configured to: the CIG event is obtained based on identifying that the first data or the second data is associated with multimedia content.

10. The electronic device of claim 1, wherein the processor is further configured to: the CIG event is obtained based on identifying that a quality of a link between a first external electronic device and the electronic device is higher than a reference quality.

11. The electronic device according to claim 1,

Wherein a first CIS event is assigned for a first external electronic device,

Wherein a second CIS event is assigned for a second external electronic device,

Wherein the anchor point of the first CIS event is the anchor point of the CIG event among the anchor point of the first CIS event and the anchor point of the second CIS event,

Wherein the processor is further configured to: another CIG event is obtained immediately adjacent to the CIG event,

Wherein the another CIG event includes a third CIS event and a fourth CIS event,

Wherein the third CIS event includes a plurality of third sub-events and is assigned for the first external electronic device,

Wherein the fourth CIS event comprises a plurality of fourth sub-events at least partially overlapping with at least a portion of the plurality of third sub-events, and the fourth CIS event is distributed for the second external electronic device, and

Wherein the anchor point of the fourth CIS event from among the anchor point of the third CIS event and the anchor point of the fourth CIS event is the anchor point of the other CIG event.

12. The electronic device of claim 1, wherein the processor is further configured to: based on receiving the ACK signal via the first sub-event, data transmission to the first external electronic device via all remaining sub-events in the first CIS event is terminated.

13. The electronic device according to claim 1,

Wherein the first sub-event is a sub-event that does not overlap with the plurality of second sub-events, an

Wherein the priority of the first service provided by the first data is higher than the priority of the second service provided by the second data.

14. A method for operating an electronic device having communication circuitry for Bluetooth Low Energy (BLE), the method comprising:

Obtaining a Connection Isochronous Group (CIG) event comprising a first Connection Isochronous Stream (CIS) event and a second CIS event, the first CIS event comprising a plurality of first sub-events, the second CIS event comprising a plurality of second sub-events at least partially overlapping with at least a portion of the plurality of first sub-events; and

15. The method of claim 14, wherein obtaining the CIG event comprises: the CIG event is obtained based on identifying that the anchor point of each of the plurality of first sub-events is synchronized with the anchor point of each of the plurality of second sub-events.