CN117915690A

CN117915690A - Display panel, manufacturing method thereof and display device

Info

Publication number: CN117915690A
Application number: CN202410077411.4A
Authority: CN
Inventors: 王铸; 石领
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd; Beijing BOE Technology Development Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd; Beijing BOE Technology Development Co Ltd
Priority date: 2024-01-18
Filing date: 2024-01-18
Publication date: 2024-04-19

Abstract

The embodiment of the disclosure provides a display panel, a manufacturing method thereof and a display device, and belongs to the technical field of display. The display panel includes a substrate base plate, a driving circuit layer and a light emitting function layer. The substrate has a plurality of sub-pixel regions. The driving circuit layer is positioned on the first surface of the substrate and comprises a plurality of pixel driving circuits and a plurality of photosensitive units, the pixel driving circuits are respectively positioned in a sub-pixel area, and at least one sub-pixel area is provided with at least one photosensitive unit. The light emitting function layer is located at one side of the driving circuit layer far away from the substrate base plate and comprises a plurality of light emitting units, the light emitting units are respectively located in one sub-pixel area and are respectively electrically connected with one pixel driving circuit, and the orthographic projection of the photosensitive unit on the first surface is located at one side of the orthographic projection of the light emitting units of the same sub-pixel area on the first surface. The embodiment of the disclosure can enable the display panel to have a photosensitive function and a higher integration level.

Description

Display panel, manufacturing method thereof and display device

Technical Field

The embodiment of the disclosure relates to the technical field of display, in particular to a display panel, a manufacturing method thereof and a display device.

Background

The display device has wide application scenes in life, such as electronic equipment of mobile phones, tablet computers and the like. The display panel is an important component of the display device.

In the related art, there is a display panel having a light sensing function, which includes a base substrate, and a driving circuit layer, a light sensing layer, and a light emitting function layer sequentially stacked on a first surface of the base substrate. The light-emitting functional layer comprises a plurality of light-emitting units distributed in an array, the photosensitive layer comprises a plurality of photosensitive units distributed in an array, and the orthographic projection of the photosensitive units on the first surface is not overlapped with the orthographic projection of the plurality of light-emitting units on the first surface.

However, since the photosensitive units are disposed in a single layer, the thickness of the display panel is large.

Disclosure of Invention

The embodiment of the disclosure provides a display panel, a manufacturing method thereof and a display device, wherein a photosensitive unit can be arranged on the premise of not affecting the thickness of a product as much as possible, so that the display panel has a photosensitive function. The technical scheme is as follows:

In one aspect, a display panel is provided, the display panel including a substrate base plate, a driving circuit layer, and a light emitting function layer; the substrate base plate is provided with a plurality of sub-pixel areas; the driving circuit layer is positioned on the first surface of the substrate base plate and comprises a plurality of pixel driving circuits and a plurality of photosensitive units, the pixel driving circuits are respectively positioned in one sub-pixel area, and at least one sub-pixel area is provided with at least one photosensitive unit; the light-emitting functional layer is located on one side of the driving circuit layer far away from the substrate base plate and comprises a plurality of light-emitting units, the light-emitting units are respectively located in one sub-pixel area and are respectively electrically connected with one pixel driving circuit, and orthographic projection of the light-sensing units on the first surface is located on one side of orthographic projection of the light-emitting units of the same sub-pixel area on the first surface.

Optionally, the driving circuit layer further includes a first power line and a plurality of second power lines, the first power line is electrically connected to first ends of the plurality of photosensitive cells, and the first power line is electrically connected to the plurality of pixel driving circuits, and a first end of each of the second power lines is electrically connected to a second end of at least one of the photosensitive cells.

Optionally, the photosensitive unit includes a photosensitive layer and an electrode layer sequentially stacked on the first surface, the photosensitive layer includes a first doped region, a photosensitive region, and a second doped region sequentially arranged in a direction parallel to the first surface, and the electrode layer includes a first electrode and a second electrode; the first electrode is electrically connected with the first doped region, and the first electrode is electrically connected with the first power line; the second electrode is electrically connected with the second doped region, and the second electrode is electrically connected with the second power line.

Optionally, the display panel includes a light shielding layer, a first active layer, a first source drain layer, a second source drain layer and a third source drain layer sequentially stacked on the first surface, the first power line is located on the light shielding layer, the photosensitive layer and the first active layer are in the same layer, the electrode layer and the first source drain layer are in the same layer, and the second power line is located on the third source drain layer.

Optionally, the driving circuit layer further includes a plurality of data lines, an extension direction of the plurality of data lines is the same as an extension direction of the plurality of second power lines, the data lines are located on the third source drain layer, each of the photosensitive units and the second power lines electrically connected to the second end of the photosensitive unit are located between orthographic projections of two adjacent data lines on the first surface.

Optionally, the display panel further includes a color film layer, the color film layer is located on a side, far away from the driving circuit layer, of the light-emitting functional layer, the color film layer includes a plurality of color blocks, the plurality of color blocks are located in sub-pixel areas having the photosensitive units at least partially, in the same sub-pixel areas having the photosensitive units and the color blocks, at least a portion of orthographic projections of the photosensitive units on the first surface are located in orthographic projections of the color blocks on the first surface.

Optionally, the plurality of color blocks include a plurality of first color blocks, a plurality of second color blocks, and a plurality of third color blocks with different colors, the plurality of light sensing units includes a plurality of first light sensing units, a plurality of second light sensing units, and a plurality of third light sensing units, orthographic projections of the plurality of first light sensing units on the first surface are located within orthographic projections of the plurality of first color blocks on the first surface, orthographic projections of the plurality of second light sensing units on the first surface are located within orthographic projections of the plurality of second color blocks on the first surface, orthographic projections of the plurality of third light sensing units on the first surface are located within orthographic projections of the plurality of third color blocks on the first surface; the extending directions of the second power lines are all in a first direction, the extending directions of the second power lines comprise a first line group, a second line group and a third line group, the first ends of the second power lines in the first line group are electrically connected with the second ends of the first photosensitive units arranged along the first direction, the second ends of the second power lines in the first line group are electrically connected with the second ends of the second photosensitive units arranged along the first direction, the first ends of the second power lines in the second line group are electrically connected with the second ends of the second photosensitive units arranged along the first direction, and the first ends of the second power lines in the third line group are electrically connected with the third ends of the third photosensitive units arranged along the first direction.

Optionally, the display panel further includes a first switch, a second switch, and a third switch, wherein the second ends of the second power lines in the first line group are electrically connected to the first switch, the second ends of the second power lines in the second line group are electrically connected to the second switch, and the second ends of the second power lines in the third line group are electrically connected to the third switch.

Optionally, the plurality of light sensing units further includes a plurality of fourth light sensing units, the display panel further includes a plurality of light shielding structures, each of the fourth light sensing units and one of the light shielding structures are located in the same sub-pixel area, the light shielding structures are located at a side of the fourth light sensing units away from the first surface, and an orthographic projection of the fourth light sensing units on the first surface is located in the same sub-pixel area, and the light shielding structures are located in an orthographic projection of the first surface.

Optionally, the plurality of photosensitive units further includes a plurality of fifth photosensitive units: the color block further comprises a blank area, the fifth photosensitive unit and one blank area are located in the same sub-pixel area, and the orthographic projection of the fifth photosensitive unit on the first surface is located in the same sub-pixel area, and the blank area is located in the orthographic projection of the first surface; and/or the sub-pixel area where the fifth photosensitive unit is located does not comprise the color block.

Optionally, each of the sub-pixel regions has one of the photosensitive units therein; or the plurality of sub-pixel areas are divided into a plurality of sub-pixel area groups, each sub-pixel area group comprises a plurality of adjacent sub-pixel areas, and each sub-pixel area group is internally provided with one photosensitive unit.

Optionally, the light emitting functional layer further includes a pixel defining layer including a plurality of first openings, and each of the light emitting units is located in the first opening in one of the sub-pixel regions; the pixel definition layer is made of transparent materials; or the pixel defining layer is made of an opaque material, and the pixel defining layer further comprises a plurality of second openings, and the orthographic projection of at least part of the photosensitive units on the first surface is positioned in the orthographic projection of one second opening on the first surface.

In another aspect, a method for manufacturing a display panel is provided, the method including: providing a substrate, wherein the substrate is provided with a plurality of sub-pixel areas; manufacturing a driving circuit layer on the first surface of the substrate, wherein the driving circuit layer comprises a plurality of pixel driving circuits and a plurality of photosensitive units, the pixel driving circuits are respectively positioned in one sub-pixel area, and at least one sub-pixel area is provided with at least one photosensitive unit; and manufacturing a light-emitting functional layer on one side of the driving circuit layer far away from the substrate, wherein the light-emitting functional layer comprises a plurality of light-emitting units, the light-emitting units are respectively positioned in one sub-pixel area and are respectively electrically connected with one pixel driving circuit, and the orthographic projection of the photosensitive units on the first surface is positioned on one side of the orthographic projection of the light-emitting units on the first surface in the same sub-pixel area.

In yet another aspect, a display device is provided that includes a power supply circuit and any of the foregoing display panels, the power supply circuit supplying power to the display panels.

Optionally, the display device further includes a flexible circuit board and a control circuit board, and the control circuit board is electrically connected with the photosensitive unit through the flexible circuit board.

The beneficial effects that this disclosure provided technical scheme brought include at least: by arranging the photosensitive unit in the driving circuit layer, the display panel has a photosensitive function and a high integration level, so that the thickness of the display panel can be reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.

Fig. 1 is a schematic cross-sectional structure of a display panel according to an embodiment of the present disclosure;

Fig. 2 is a schematic plan view of a display panel according to an embodiment of the disclosure;

FIG. 3 is a schematic diagram of a circuit connection relationship provided by an embodiment of the present disclosure;

FIG. 4 is a schematic diagram of a distribution of a plurality of second power lines provided by embodiments of the present disclosure;

fig. 5 is a schematic plan view of another display panel according to an embodiment of the present disclosure;

Fig. 6 is a schematic plan view of another display panel according to an embodiment of the present disclosure;

Fig. 7 is a schematic cross-sectional structure of a driving circuit layer according to an embodiment of the present disclosure;

FIG. 8 is a schematic plan view of a photosensitive unit and a data line according to an embodiment of the present disclosure;

FIG. 9 is a schematic plan view of a plurality of film layers in a photosensitive unit of FIG. 8;

FIG. 10 is a schematic cross-sectional view of a drive backplate according to embodiments of the present disclosure;

fig. 11 is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of the disclosure;

Fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.

Legend description:

1. Substrate 10, sub-pixel region 100, sub-pixel region group 1a, first surface x, first direction y, second direction

2. Drive circuit layer

21. The photosensitive units 21a, 21b, 21c, 21d, 21e, 211a, 211b, 211c, 212a, 212b, and electrode layer

22. A first power supply line 23, a second power supply line 23a, a second power supply line 23b in the first line group, a second power supply line 23c in the second line group, a second power supply line 23d in the third line group, a fourth wiring 23e, a fifth wiring 24, a switch 24a, a first switch 24b, a second switch 24c, a third switch

25. Pixel driving circuit

261. Light shielding layer 262, first active layer 263, first source drain layer 264, second source drain layer 264a, switching structure 265, third source drain layer 265a, data line 266, buffer layer 267, first gate layer 268, second gate layer 269, second active layer 270, third gate layer 271, first gate insulating layer 272, first insulating layer 273, second gate insulating layer 274, third gate insulating layer 275, interlayer dielectric layer 276, passivation layer 277, first planarization layer 278, second planarization layer 279a, first via 279b, second via 279c, third via 279d, fourth via

3. A light emitting functional layer 30, a light emitting unit 30a, a first light emitting unit (R) 30B, a second light emitting unit (B) 30c, a third light emitting unit (G) 31, a first electrode 32, a light emitting layer 33, a second electrode 34, a pixel defining layer 34a, a first opening 34B, a second opening

4. Color film 41, color block 41a, first color block 41b, second color block 41c, third color block 42, light shielding structure 43, blank area 44, black matrix

5. Protective layer (OC layer) 6, flexible printed circuit board 7, transparent planarization layer

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present disclosure more apparent, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

The terminology used in the description of the embodiments of the disclosure is for the purpose of describing the embodiments of the disclosure only and is not intended to be limiting of the disclosure. Unless defined otherwise, technical or scientific terms used in the embodiments of the present disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which the present disclosure belongs. The terms "first," "second," "third," and the like in the description and in the claims, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, is intended to mean that elements or items that are present in front of "comprising" or "comprising" are included in the word "comprising" or "comprising", and equivalents thereof, without excluding other elements or items. References to directional terms in this disclosure, such as "top", "bottom", "upper", "lower", "left" or "right", etc., are merely with reference to the orientation of the drawings, and thus are used in order to better and more clearly illustrate and understand the disclosed embodiments, rather than to indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the disclosed embodiments.

Fig. 1 is a schematic cross-sectional structure of a display panel according to an embodiment of the present disclosure. As shown in fig. 1, the display panel includes a substrate base 1, a driving circuit layer 2, and a light emitting function layer 3. The driving circuit layer 2 is located on the first surface 1a of the substrate 1. The driving circuit layer 2 includes a plurality of pixel driving circuits 25 and a plurality of photosensitive units 21. The light emitting functional layer 3 is located on the side of the driving circuit layer 2 remote from the substrate 1.

Fig. 2 is a schematic plan view of a display panel according to an embodiment of the disclosure, and fig. 1 is a cross-sectional view along AA section line in fig. 2. As shown in fig. 1 and 2, the substrate 1 has a plurality of sub-pixel regions 10. The plurality of pixel driving circuits 25 are respectively located in one sub-pixel region 10, that is, each pixel driving circuit 25 is located in a different sub-pixel region 10, and one pixel driving circuit 25 is provided in each sub-pixel region 10. The plurality of photosensitive units 21 are respectively located in one sub-pixel region 10, that is, each photosensitive unit 21 is located in a different sub-pixel region 10, and one photosensitive unit 21 is disposed in each sub-pixel region 10.

The light emitting functional layer 3 includes a plurality of light emitting units 30, the plurality of light emitting units 30 are respectively located in one sub-pixel region 10 and are respectively electrically connected with one pixel driving circuit 25, that is, the respective light emitting units 30 are located in different sub-pixel regions 10, and one light emitting unit 30 is disposed in each sub-pixel region 10. Orthographic projection of the photosensitive unit 21 on the first surface 1a is located on one side of the orthographic projection of the first surface 1a of the light emitting unit 30 in the same sub-pixel region 10. That is, the front projection of the photosensitive element 21 on the first surface 1a does not overlap with the front projection of the light emitting element 30 located in the same sub-pixel region 10 on the first surface 1a, so that the photosensitive element 21 is prevented from being affected by the light emitted from the light emitting element 30.

The light sensing unit can sense the ambient light condition, and other structures (such as a processing chip) electrically connected with the light sensing unit can adjust the brightness of the display panel according to the light sensing signal output by the light sensing unit, so that the power consumption of the product is reduced. For example, in mobile devices such as mobile phones, notebooks, tablet computers and the like, the electricity consumed by the display panel is up to 30% of the total electric quantity of the battery, and the working time of the device can be remarkably prolonged by arranging the photosensitive unit.

Meanwhile, the light sensing unit is beneficial to the display panel to adjust the self-luminous brightness according to the light intensity of the external environment light, so that a user can conveniently use the display panel in different environments, and the user experience is improved. When the light sensing unit senses that the external environment is brighter, the display panel may reduce the voltage received by the light emitting unit 30 by, for example, reducing the voltage in the data line in the driving circuit layer 2, thereby reducing the brightness of the light emitted from the light emitting unit 30. When the external environment is dark, the display panel can increase the voltage received by the light emitting unit 30 by, for example, increasing the voltage in the data line in the driving circuit layer 2, thereby increasing the brightness of the light emitted by the light emitting unit 30.

According to the embodiment of the disclosure, the photosensitive unit 21 is arranged in the driving circuit layer 2 instead of independently arranging the photosensitive unit 21 in another layer, so that the photosensitive unit 21 is conveniently integrally manufactured in the driving circuit layer 2, the display panel has a photosensitive function and has high integration level, and the influence on the thickness of the display panel can be reduced as much as possible. In addition, the photosensitive units 21 are disposed in the plurality of sub-pixel regions 10 of the display panel, and the amount of the photosensitive signals is large, so that the processing of the photosensitive signals is facilitated.

Illustratively, a plurality of arrays of light emitting units 30 are distributed on the first surface 1a.

Illustratively, the plurality of light emitting units 30 includes a first light emitting unit 30a, a second light emitting unit 30b, and a third light emitting unit 30c that emit light of different colors. For example, as shown in fig. 2, the colors of the light emitted from the first, second, and third light emitting units 30a, 30B, and 30c are Red (Red, R), blue (Blue, B), and Green (Green, G), respectively.

Alternatively, as shown in fig. 2, the plurality of first light emitting units 30a and the plurality of second light emitting units 30b are alternately arranged in the first direction x, and the plurality of first light emitting units 30a and the plurality of second light emitting units 30b are alternately arranged in the second direction y. The plurality of third light emitting units 30a are distributed in an array along the first direction x and the second direction y, and each third light emitting unit 30a is surrounded by two first light emitting units 30a and two second light emitting units 30 b. The first direction x is perpendicular to the second direction y.

Alternatively, as shown in fig. 2, two third light emitting units 30c adjacent in the first direction x, one first light emitting unit 30a adjacent to the two third light emitting units 30c at the same time, and one second light emitting unit 30b adjacent to the two third light emitting units 30c at the same time are located within one pixel region p.

In other possible embodiments, a plurality of pixel regions p may be arranged in an array along the first direction x and the second direction y, and each pixel region p includes three light emitting units 30 (first light emitting unit 30a, second light emitting unit 30b, and third light emitting unit 30c, respectively) sequentially arranged along the second direction y, and three pixel driving circuits electrically connected to the three light emitting units 30, respectively.

Illustratively, as shown in fig. 1, each light emitting unit 30 includes a first electrode 31, a light emitting layer 32, and a second electrode 33 sequentially stacked on a first surface 1 a.

Alternatively, the first electrode 31 is an anode and the second electrode 33 is a cathode. Alternatively, the second electrodes 33 of the plurality of light emitting units 30 are connected as one body to form an entire surface structure. In other possible embodiments, two adjacent second electrodes 33 are electrically connected by a strip electrode, and the plurality of second electrodes 33 and the strip electrode located between the two adjacent second electrodes 33 are connected to form a net-shaped integral structure.

Illustratively, as shown in fig. 1, the light emitting functional layer 3 further includes a pixel defining layer 34, the pixel defining layer 34 having a plurality of first openings 34a, the plurality of first openings 34a being respectively located in one sub-pixel region 10, at least part of each light emitting unit 30 being located in the first opening 34a in the same sub-pixel region 10, thereby exposing the first electrode 31 of the light emitting unit 30 such that the first electrode 31 is in contact with the light emitting layer 32.

Illustratively, as shown in FIG. 1, the pixel defining layer 34 is made of an opaque material, and the pixel defining layer 34 further includes a plurality of second openings 34b. The front projection of each photosensitive element 21 on the first surface 1a is located in the front projection of one second opening 34b on said first surface 1 a. The light transmission hole 34a is provided so that the photosensitive unit 21 can receive external ambient light. Alternatively, as shown in fig. 1, the plurality of second openings 34b is the same as the plurality of photosensitive cells 21.

Optionally, the second opening 34b is filled with a thinner light emitting layer material and a second electrode material, which have a higher transmittance without affecting the receiving of ambient light by the light sensing unit 21 through the second opening 34 b.

In other possible embodiments, the pixel defining layer 34 is made of a transparent organic material, such as a resin, and may be made of a transparent inorganic material, such as silicon nitride. The pixel defining layer 34 may have only the first opening 34a and no second opening 34b.

Illustratively, in conjunction with fig. 1 and 2, the display panel further includes a color film layer 4, where the color film layer 4 is located on a side of the light-emitting functional layer 3 away from the driving circuit layer 2, and the color film layer 4 includes a plurality of color blocks 41.

Illustratively, as shown in fig. 1, each color block 41 is located within one sub-pixel region 10, and in some examples, the number of color blocks 41 is the same as the number of light emitting units 30. In the same sub-pixel region 10, the color of the light emitted from the light emitting unit 30 is the same as that of the color block 41.

Illustratively, as shown in fig. 1, each of the light sensing units 21 is located on the left side of the light emitting unit 30 within the same sub-pixel region 10. In other possible embodiments, the light sensing units 21 may be located at one side of the light emitting unit 30 in different directions in different sub-pixel regions 10, for example, a part of the light sensing units 21 in one sub-pixel region 10 is located at the left side of the light emitting unit 30, and another part of the light sensing units 21 in another sub-pixel region 10 is located at the right side of the light emitting unit 30.

Illustratively, the plurality of photosensitive units includes a plurality of first photosensitive units 21a, a plurality of second photosensitive units 21b, and a plurality of third photosensitive units 21c. The first light sensing unit 21a and the first light emitting unit 30a are located in the same sub-pixel region 10, the second light sensing unit 21b and the second light emitting unit 30b are located in the same sub-pixel region 10, and the third light sensing unit 21c and the third light emitting unit 30c are located in the same sub-pixel region 10.

That is, in the embodiment shown in fig. 1, one color block 41 is provided in each sub-pixel region 10 having the photosensitive cells 21. The front projection of each photosensitive element 21 on the first surface 1a is located in the front projection of the color block 41 on the first surface 1a in the same sub-pixel area 10. By providing the color film layer 4, different light-sensing units 21 can be made to sense light of different colors, for example, the light-sensing units 21 are made to sense red light, blue light or green light.

Illustratively, in conjunction with fig. 1 and 2, the plurality of color blocks 41 includes a plurality of first color blocks 41a, a plurality of second color blocks 41b, and a plurality of third color blocks 41c having different colors, the orthographic projection of the plurality of first photosensitive cells 21a on the first surface 1a is located within the orthographic projection of the plurality of first color blocks 41a on the first surface 1a, the orthographic projection of the plurality of second photosensitive cells 21b on the first surface 1a is located within the orthographic projection of the plurality of second color blocks 41b on the first surface 1a, and the orthographic projection of the plurality of third photosensitive cells 21c on the first surface 1a is located within the orthographic projection of the plurality of third color blocks 41c on the first surface 1 a.

Illustratively, in the embodiment shown in fig. 1, the color film layer 4 further includes a black matrix 44, and the orthographic projection of the black matrix 44 on the first surface 1a is located between orthographic projections of any two adjacent color blocks 41 on the first surface 1a, so as to prevent crosstalk of light in different sub-pixel areas 10.

Alternatively, as shown in fig. 1, the black matrix 44 is located on a side of the plurality of color blocks 41 near the first surface 1 a. In other possible embodiments, the black matrix 44 is located between any adjacent two of the color blocks 41, or the black matrix 44 is located on a side of the plurality of color blocks 41 remote from the first surface 1 a.

Illustratively, as shown in fig. 1, the display panel further comprises a protective layer 5, also referred to as OC (over coat) layer. The protective layer 5 is located between the light-emitting functional layer 3 and the color film layer 4. Alternatively, the protective layer is made of an organic material, such as a resin.

Illustratively, as shown in fig. 1, the display panel further includes a transparent planarization layer 7, where the transparent planarization layer 7 is located on a side of the color film layer away from the first surface 1 a.

Fig. 3 is a schematic diagram of a circuit connection relationship provided in an embodiment of the disclosure. As shown in fig. 3, the driving circuit layer 2 further includes a first power line 22 and a plurality of second power lines 23, the first power line 22 is electrically connected to first ends of the plurality of photosensitive cells 21, and the first power line 22 is electrically connected to the plurality of pixel driving circuits 25. Referring to fig. 2 and 3, the broken line in fig. 2 illustrates the positions of the second power lines 23, and each of the second power lines 23 is electrically connected to the second ends of the plurality of photosensitive cells 21 arranged in the first direction x. Wherein, the first power line supplies power to the photosensitive unit 21 and the pixel driving circuit 25 at the same time, so that the wiring space is saved and the work of the normal light emitting unit is not affected; one second power line 23 is electrically connected to the second ends of the plurality of light sensing units 21 arranged in the first direction x, and not one second power line is electrically connected to only the second ends of one light sensing unit 21, so that a wiring space can be saved.

Illustratively, the first power line 22 is configured to simultaneously supply a first voltage to the plurality of pixel driving circuits 25 and the plurality of light sensing units 21, and the second power line 23 is configured to supply a second voltage to the electrically connected light sensing units 21, the first voltage being greater than the second voltage.

In other possible embodiments, one second power line may be electrically connected to only the second end of one photosensitive cell 21, and the second power lines connected to different photosensitive cells 21 may be different.

Each pixel driving circuit 25 includes at least two tfts (Thin Film Transistor, thin film transistors), and the pixel driving circuit may be a 3T1C, 4T1C, 5T2C, 6T1C, 7T1C, or 8T1C structure according to the number of tfts and the number of capacitors included in each pixel driving circuit 25, and the structure of the pixel driving circuit is not limited in the embodiments of the present disclosure. The pixel driving circuit is used to control the connected light emitting unit 30 to emit light.

Illustratively, as shown in fig. 3, the display panel includes a display area M and a peripheral area N surrounding the display area M. The sub-pixel regions 10 are all located in the display area M. By controlling the light emitting units 30 in the respective sub-pixel regions 10 to emit light, an image can be displayed in the display area M.

The first power lines 22 are meshed, and can be uniformly distributed in the display area M, so that the difference of the signals of the first voltages received by the different photosensitive units 21 is smaller. Illustratively, the first power cord 22 includes a plurality of longitudinal traces extending in the first direction x and a plurality of transverse traces extending in the second direction y, the plurality of longitudinal traces and the plurality of transverse traces being cross-connected to form a mesh structure. Optionally, the front projection of the first power line 22 in mesh form a plurality of grids on the first surface 1a, and the front projection of each sub-pixel area 10 on the first surface 1a at least partially coincides with one of the grids.

Illustratively, the peripheral region N has a pad, and the first power line 22 is electrically connected to the pad, so that the outside world can conveniently supply the first voltage to the first power line 22 through the pad.

Illustratively, the plurality of second power lines 22 transmit the light sensing signals of the plurality of light sensing units 21 to other structures (e.g., analog-to-digital converters) for processing.

Fig. 4 is a schematic distribution diagram of a plurality of second power lines according to an embodiment of the disclosure. Referring to fig. 2 and 4, the plurality of second power lines 23 extend in the same direction and include a first line group, a second line group, and a third line group, a first end of each of the second power lines 23a in the first line group is electrically connected to a second end of the plurality of first photosensitive cells 21a arranged in the first direction x, a second end of each of the second power lines 23a in the first line group is electrically connected to a second end of the plurality of second photosensitive cells 21b arranged in the first direction x, a first end of each of the second power lines 23b in the second line group is electrically connected to a second end of each of the second power lines 23b in the first direction x, and a first end of each of the third line groups 23c is electrically connected to a second end of the plurality of third photosensitive cells 21c arranged in the first direction x.

Of the plurality of photosensitive units 21, the first photosensitive unit 21a is capable of photosensitive red light, the second photosensitive unit 21b is capable of photosensitive blue light, and the third photosensitive unit is capable of photosensitive green light. The second ends of the second power lines 23a in the plurality of first line groups are electrically connected, and the second ends of the second power lines 23b in the plurality of second line groups are electrically connected, so that the structure (e.g., analog-to-digital converter) receiving the light sensing signals of the light sensing unit 21 can distinguish the light sensing signals of different colors.

Optionally, the orthographic projection of the second power lines 23a in the first line groups on the first surface 1a coincides with the orthographic projection of the plurality of first light emitting units on the first surface 1a, the orthographic projection of the second power lines 23b in the second line groups on the first surface 1a coincides with the orthographic projection of the plurality of second light emitting units on the first surface 1a, and the orthographic projection of the second power lines 23c in the third line groups on the first surface 1a coincides with the orthographic projection of the plurality of third light emitting units on the first surface 1 a.

Illustratively, as shown in fig. 4, the display panel further includes a plurality of switches 24, the plurality of switches 24 includes a first switch 24a, a second switch 24b, and a third switch 24c, a second end of the second power line 23a in the plurality of first line groups is electrically connected to the first switch 24a, a second end of the second power line 23b in the plurality of second line groups is electrically connected to the second switch 24b, and a second end of the second power line 23c in the plurality of third line groups is electrically connected to the third switch 24c. By providing the switch 24 for the second power supply lines 23a in the plurality of first line groups, the second power supply lines 23b in the plurality of second line groups, and the second power supply lines 23c in the plurality of third line groups, respectively, the switch 24 can be turned on or off as needed. The first switch 24a, the second switch 24b and the third switch 24c are turned on, for example, when light sensing of red, blue and green light in the ambient light is required. When light sensing of red and blue in the ambient light is required and light sensing of green in the ambient light is not required, the first switch 24a and the second switch 24b are turned on, and the third switch 24c is turned off. When ambient light is not required to be sensed, the first switch 24a, the second switch 24b, and the third switch 24c are turned off.

Illustratively, as shown in fig. 4, the switch 24 is a TFT, the gate of which is used to control whether or not conduction is between the source and drain of the TFT. When a turn-on signal is supplied to the gate of the switch 24, the TFT is turned on between the source and the drain, i.e., the switch 24 is turned on; when no on signal is provided to the gate of switch 24, the TFT is not on between its source and drain, i.e., the switch is off. Illustratively, the source or drain of the switch 24 is electrically connected to the second power line 23.

Illustratively, as shown in FIG. 4, the switch 24 is located in the peripheral region N.

Illustratively, the driving circuit layer further includes a plurality of third power lines located in the peripheral region N and connected to the gates of the plurality of switches 24 in a one-to-one correspondence, and the third power lines are configured to provide on signals to the gates of the switches 24.

Fig. 5 is a schematic plan view of another display panel according to an embodiment of the disclosure. In comparison with the embodiment shown in fig. 2, in the embodiment shown in fig. 5, the plurality of light sensing units 21 further includes a plurality of fourth light sensing units 21d, and the display panel further includes a plurality of light shielding structures 42, each of the fourth light sensing units 21d and one of the light shielding structures 42 are located in the same sub-pixel area 10, the light shielding structures 42 are located at a side of the fourth light sensing units 21d away from the first surface 1a, and the orthographic projection of the fourth light sensing units 21d on the first surface 1a is located in the orthographic projection of the light shielding structures 42 on the first surface 1a in the same sub-pixel area 10. The light shielding structure 42 is disposed above the fourth light sensing unit 21d, and the light shielding structure 42 shields the fourth light sensing unit 21d, so that external light can be prevented from being irradiated to the fourth light sensing unit 21d, and the fourth light sensing unit 21d located below the light shielding structure 42 has smaller leakage current although not sensing external visible light. When the other photosensitive units 21 without the light shielding structure 42 above are sensitive to the external environment light, the leakage current generated by the fourth photosensitive unit 21d can be used as a reference to eliminate noise and obtain more accurate sensitive signals.

Illustratively, the number of light shielding structures 42 is equal to the number of fourth photosensitive cells 21 d.

In one possible embodiment, the light shielding structure 42 is located in the driving circuit layer 2 and on a side of the fourth photosensitive element 21d away from the first surface 1 a. The light shielding structure 42 may be made of a light-impermeable metallic material.

In another possible embodiment, the pixel defining layer 34 is made of an opaque material, and the second opening 34b is not disposed above the fourth photosensitive element 21d, and in this embodiment, the portion of the pixel defining layer material corresponding to the portion of the second opening 34b that is not removed is equivalent to the light shielding structure 42, that is, the light shielding structure 42 is located in the pixel defining layer 34. In this embodiment, the orthographic projection of the other photosensitive cells 21 except the fourth photosensitive cell 21d on the first surface 1a is located in the orthographic projection of one second opening 34b on the first surface 1a, and there are no second openings 34b above the two fourth photosensitive cells 21d, i.e., the number of second openings 34b is greater than the number of photosensitive cells 21.

In another possible embodiment, the black matrix 44 is located on the side of the color block 41 close to or far from the first surface 1a, and the light shielding structure 42 is in the same layer as the black matrix 44.

In another possible embodiment, the light shielding structure 34 and the color block 41 are formed in the same layer, for example, the color block may be formed first, then a partial region of the color block is removed, and the light shielding structure 34 is formed in the removed region.

As shown in fig. 5, the plurality of second power lines 23 further includes a fourth wire 23d, and a first end of the fourth wire 23d is electrically connected to the fourth photosensitive unit 21d for transmitting the light sensing signal of the fourth photosensitive unit 21d to other structures (such as an analog-to-digital converter) for processing.

Illustratively, the plurality of switches 24 further includes a fourth switch, and the second end of the plurality of fourth wires 23d is connected to the fourth switch, and the fourth switch may be turned on or off as needed.

In comparison with the embodiment shown in fig. 2, in the embodiment shown in fig. 5, the plurality of photosensitive units 21 further includes a plurality of fifth photosensitive units 21e, the color block 41 includes a blank area 43, each of the fifth photosensitive units 21e and one of the blank areas 43 is located in the same sub-pixel area 10, and the orthographic projection of the fifth photosensitive units 21e on the first surface 1a is located in the orthographic projection of the blank area 43 on the first surface 1a in the same sub-pixel area 10. That is, among the plurality of color blocks 41, at least a partial region of the color block 41 is removed to form a blank region 43, and the fifth photosensitive unit 21e is disposed below the blank region 43. A blank area 43 may be provided in the color film layer as needed, so that the portion of the photosensitive units 21 located below the blank area 43 can be sensitized to ambient light, so that, among the plurality of photosensitive units 21, red light, blue light, green light, and white light, for example, can be sensitized, respectively.

Illustratively, as shown in fig. 5, the sub-pixel region 10 where the fifth photosensitive unit 21e is located has a color block 41, and the blank region 43 is surrounded by the color block.

Optionally, the blank area 43 is filled with the aforementioned transparent planarization layer material.

In the embodiment shown in fig. 5, the color block 41 including the blank area 43 is disposed above all the fifth photosensitive cells 21e, and in other possible embodiments, all the fifth photosensitive cells 21e are located in the sub-pixel area 10 without the color block 41.

In other possible embodiments, a portion of the fifth photosensitive cells 21e do not have a color block 41 above, and another portion of the fifth photosensitive cells 21e have a color block 41 above that includes a blank area 43.

As shown in fig. 5, the plurality of second power lines 23 further includes a fifth wire 23e, and a first end of the fifth wire 23e is electrically connected to the fifth photosensitive unit 21e for transmitting the light sensing signals of the fifth photosensitive unit 21e to other structures (such as an analog-to-digital converter) for processing.

Illustratively, the plurality of switches 24 further includes a fifth switch, and the second end of the plurality of fifth wires 23e is electrically connected to the fifth switch, and the fifth switch may be turned on or off as needed.

In the embodiment shown in fig. 5, the orthographic projection of the black matrix 44 on the first surface 1a is located between the orthographic projections of the adjacent two color blocks 41 on the first surface 1a, and the orthographic projection of the black matrix 44 on the first surface 1a is not coincident with the orthographic projections of the plurality of light emitting units 30, the first light sensing unit 21a, the second light emitting unit 21b, the third light emitting unit 21c, the fourth light emitting unit 21d, and the fifth light emitting unit 21e on the first surface 1 a.

In the embodiment shown in fig. 2 and 5, each sub-pixel area 10 has a photosensitive unit 21 therein. Fig. 6 is a schematic plan view of another display panel according to an embodiment of the disclosure. In comparison with the embodiments shown in fig. 2 and 5, in the embodiment shown in fig. 6, the plurality of sub-pixel regions 10 are divided into a plurality of sub-pixel region groups 100, the sub-pixel region groups 100 include a plurality of adjacent sub-pixel regions 10, the plurality of sub-pixel region groups 100 are distributed in an array, and each sub-pixel region group 100 has one photosensitive unit 21 therein. That is, in the embodiment shown in fig. 6, a part of the sub-pixel region 10 has the photosensitive unit 21, and a part of the sub-pixel region 10 does not have the photosensitive unit 21 therein. The light sensing units may be arranged according to different distribution densities as desired, for example, according to the requirements for the amount of light sensing signals. Illustratively, as shown in fig. 6, one sub-pixel region group 100 includes 6 sub-pixel regions 10, and in other possible embodiments, one sub-pixel region group 100 may include more or fewer sub-pixel regions 10. Illustratively, as shown in fig. 6, the plurality of sub-pixel region groups 100 may be arrayed along a third direction z intersecting both the first direction x and the second direction y and a fourth direction w intersecting the third direction z.

In the embodiment shown in fig. 6, the sub-pixel region 10 may have the color block 41 or may not have the color block 41 for the sub-pixel region 10 without the photosensitive unit 21.

In other possible embodiments, the display panel may not include the color film layer 4 and the light shielding structure 42, and in such embodiments, each light sensing unit 21 may sense light of all colors in the ambient light, which is equivalent to each light sensing unit 21 being the fifth light sensing unit 21e.

In other possible embodiments, the display panel may not include the color film layer 4 but includes the light shielding structure 42, and in such embodiments, a portion of the light sensing units 21 is not provided with the light shielding structure 42, and the portion of the light sensing units 21 is equivalent to the fifth light sensing unit 21e; a light shielding structure 42 is provided above the other part of the photosensitive cells 21, and this part of the photosensitive cells 21 corresponds to the fourth photosensitive cell 21d.

In summary, the plurality of light sensing units 21 in the display panel may include any one, two, three, or four of the first light sensing unit 21a, the second light sensing unit 21b, the third light sensing unit 21c, and the fifth light sensing unit 21e, and may further include the fourth light sensing unit 21d.

It should be noted that in the foregoing embodiments, only one photosensitive unit 21 is provided in each sub-pixel region 10 having photosensitive units 21, and in other possible embodiments, there is at least one sub-pixel region 10, and the sub-pixel region 10 includes two or more photosensitive units 21. A plurality of light sensing units 21 may be disposed in one sub-pixel region 10 according to the need for the light sensing signal amount and the size of the actual wiring space.

The internal structure of the photosensitive unit is exemplarily described below. Fig. 7 is a schematic cross-sectional structure of a driving circuit layer according to an embodiment of the present disclosure, fig. 8 is a schematic plan view of a photosensitive unit and a data line according to an embodiment of the present disclosure, and fig. 7 is a schematic cross-sectional structure along a BB section line in fig. 8. As shown in fig. 7 and 8, the photosensitive unit 21 includes a photosensitive layer 211 and an electrode layer 212 sequentially stacked on the first surface 1 a. The photosensitive layer 211 includes a first doped region 211a, a photosensitive region 211b, and a second doped region 211c sequentially arranged along a third direction, and the electrode layer 212 includes a first electrode 212a and a second electrode 212b. The first electrode 212a is electrically connected to the first doped region 211a, and the first electrode 212a is electrically connected to the first power line 22. The second electrode 212b is electrically connected to the second doped region 211c, and the second electrode 212b is electrically connected to the second power line 23. Wherein the third direction is parallel to the first surface 1a, which may be the same as or different from the first direction x, in the embodiment shown in fig. 7 the third direction is the same as the first direction x. The light sensing unit can convert the optical signal into an electrical signal, wherein the light sensing region 211b can absorb the optical signal to generate carriers, and form a current flow with the first doped region 211a and the second doped region 211 c.

Illustratively, the photosensitive element 21 is a photodiode. For example, the photosensitive unit 21 is a PIP type photodiode in which the first doped region 211a and the second doped region 211c are both P-type semiconductors and the photosensitive region 211b is an intrinsic (intrinsic) semiconductor. The intrinsic semiconductor is positioned between the P-type semiconductor and the P-type semiconductor, so that the width of the depletion region can be effectively enlarged, the influence of diffusion motion is reduced, and the response speed, namely the response sensitivity, is improved. Alternatively, the photosensitive unit 21 may be a PIN-type photodiode in which the first doped region 211a is a P-type semiconductor, the photosensitive region 211b is an intrinsic (intrinsic) semiconductor, and the second doped region 211c is an N-type semiconductor.

Fig. 9 is a schematic plan view of a plurality of film layers in a photosensitive unit in fig. 8. Referring to fig. 7 to 9, the display panel includes a light shielding layer 261, a first active layer 262, a first source drain layer 263, a second source drain layer 264 and a third source drain layer 265 sequentially stacked on a first surface 1a, a first power line 22 is located on the light shielding layer 261, a photosensitive layer 211 is co-layered with the first active layer 262, an electrode layer 212 is co-layered with the first source drain layer 263, and a second power line 23 is located on the third source drain layer 265. The photosensitive layer is fabricated in the first active layer 262, so that the first doped region 211a and the second doped region 211c are fabricated conveniently, the first power line is disposed on the light shielding layer 261, the second power line 23 is disposed on the third source drain layer 265, and the first source drain layer 263 is disposed between the light shielding layer 261 and the third source drain layer 265, so that the electrode layer 212 is disposed on the first source drain layer 263, and the first electrode 212a and the second electrode 212b are electrically connected with the first power line 22 disposed below the photosensitive unit 21 and the second power line 23 disposed above the photosensitive unit 21, respectively.

Illustratively, as shown in fig. 9 (b) and 9 (c), the first electrode 212a and the first power line 22 are electrically connected through a first via 279a between the first source-drain layer 263 and the light-shielding layer 261, the first electrode 212a and the first doped region 211a are electrically connected through a second via 279b between the first source-drain layer 263 and the first active layer 262, and the second electrode 212b and the second doped region 211c are electrically connected through a second via 279b between the first source-drain layer 263 and the first active layer 262.

Illustratively, as shown in part (c) of fig. 9, part (d) of fig. 9, and part (e) of fig. 9, the second electrode 212b, the switching structure 264a, and the second power line 23 are electrically connected in sequence, wherein the switching structure 264a is located at the second source-drain layer 264. The second electrode 212b and the switching structure 264a are electrically connected through a third via 279c between the first source-drain layer 263 and the second source-drain layer 264, and the switching structure 264 and the second power line 23 are electrically connected through a fourth via 279d between the second source-drain layer 264 and the third source-drain layer 265.

Illustratively, the front projection of the photosensitive layer 211 of the photosensitive unit 21 on the first surface 1a does not coincide with the front projection of the active regions of the plurality of thin film transistors in the pixel driving circuit on the first surface 1 a. Optionally, the orthographic projection of each photosensitive layer 211 on the first surface 1a is located in a grid surrounded by the orthographic projection of the net-shaped first power line 22 on the first surface 1 a. Optionally, the photosensitive layer 211 is located between two adjacent longitudinal wires of the first power line 22 extending along the first direction x, the photosensitive layer 211 is located between two adjacent lateral wires of the first power line 22 extending along the second direction y, and the photosensitive layer 211 is close to one of the lateral wires. The driving circuit layer 2 further includes a plurality of data lines extending along the first direction x, where the data lines are located on the third source-drain electrode layer 265, and each of the photosensitive cells 21 and the second power line 23 electrically connected to the second end of the photosensitive cell 21 are located between the orthographic projections of two adjacent data lines on the first surface 1 a. Alternatively, for the second power supply line 23 and two data lines located at both sides of the second power supply line 23, the two data lines are symmetrical with respect to the second power supply line 23.

The hierarchical relationship of other layers in the display panel is exemplified below. Fig. 10 is a schematic cross-sectional structure of a driving backplate according to an embodiment of the present disclosure, and as shown in fig. 10, the driving circuit layer 2 includes a light shielding layer 261, a buffer layer 266, a first active layer 262, a first gate insulating layer 271, a first gate layer 267, a first insulating layer 272, a second gate layer 268, a second gate insulating layer 273, a second active layer 269, a third gate insulating layer 274, a third gate layer 270, an interlayer dielectric layer 275, a first source drain layer 263, a passivation layer 276, a second source drain layer 264, a first planarization layer 277, a third source drain layer 265, and a second planarization layer 278, which are sequentially stacked on the first surface 1a of the substrate 1.

For the fourth photosensitive unit 21d, if the light shielding structure 42 is located in the driving circuit layer 2, the light shielding structure 42 may be located in the second source/drain layer 264 or the third source/drain layer 265.

Optionally, the first source drain layer 263, the second source drain layer 264 and the third source drain layer 265 are single-layer metal layers, and are made of molybdenum or aluminum, for example; or is formed by laminating a plurality of metal layers, for example, a molybdenum layer, an aluminum layer and a molybdenum layer which are laminated, or a titanium layer, an aluminum layer and a titanium layer which are laminated, etc.

Illustratively, the substrate 1 may be any transparent substrate, such as a glass substrate, a quartz substrate, a plastic substrate, other transparent hard substrate, or other transparent flexible substrate, which may be a single-layer or multi-layer structure. Taking a multilayer structure as an example, the substrate 1 comprises a first PI (polyimide) layer, a first protection layer, a second PI (polyimide) layer and a second protection layer which are sequentially laminated from bottom to top, wherein the two protection layers are used for protecting the PI layer and preventing the PI layer from being damaged by a subsequent process. The second protective layer is also covered with a buffer layer which can block water and oxygen and block alkaline ions.

Illustratively, the light shielding layer 261 may be made of a metal material, including but not limited to molybdenum, aluminum, titanium, copper, etc., and the light shielding layer 261 may reduce light exposure to the TFT while also being conductive. The light shielding layer 261 may also be referred to as a BSM (bottom shielding metal) layer.

Illustratively, the first active layer 262 is made of a low temperature polysilicon material, and the second active layer 269 is made of a metal oxide semiconductor material such as IGZO (Indium Gallium Zinc Oxide ). The driving back plane including the first active layer 262 and the second active layer 269 is also referred to as LTPO (Low Temperature Polycrystalline Oxide, low-temperature polycrystalline oxide) driving back plane.

Illustratively, the materials for forming the first gate insulating layer 1207, the first insulating layer 1209, the second gate insulating layer 1241, the third gate insulating layer 1243, the interlayer dielectric layer 1245, the second insulating layer and the passivation layer 1246 may be silicon oxide or silicon nitride, silicon oxynitride, or the like.

Illustratively, the first gate layer 267, the second gate layer 268, and the third gate layer 270 are made of a metallic material, such as one or more of molybdenum, copper, and aluminum.

Illustratively, the first and second planarization layers 277 and 278 are made of an organic insulating material, such as a resin or the like.

In other possible embodiments, the drive backplate may be a LTPS (Low Temperature Poly-silicon, low temperature polysilicon) drive backplate instead of LTPO drive backplate. For the LTPS back plane, the driving circuit layer may include a buffer layer, a first gate insulating layer, a first active layer, a second gate insulating layer, a second gate layer, an interlayer dielectric layer, a first source drain layer, a passivation layer, a second source drain layer, and a first planarization layer, which are sequentially stacked on the first surface. The first active layer is made of low-temperature polycrystalline silicon material.

Alternatively, when the driving back plate is an LTPS driving back plate, the photosensitive layer 211 is located on the first active layer, the electrode layer 212 is located on the first source/drain layer, and the second power line 23 is located on the second source/drain layer.

Fig. 11 is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of the disclosure. As shown in fig. 11, the method includes:

in step S1, a substrate base plate is provided. The substrate base plate is provided with a plurality of sub-pixel areas.

In step S2, a driving circuit layer is formed on a first surface of a substrate. The driving circuit layer comprises a plurality of pixel driving circuits and a plurality of photosensitive units, the pixel driving circuits are respectively located in a sub-pixel area, and at least one sub-pixel area is provided with at least one photosensitive unit.

In step S3, a light emitting functional layer is formed on a side of the driving circuit layer away from the substrate. The light-emitting functional layer comprises a plurality of light-emitting units, the light-emitting units are respectively located in a sub-pixel area and are respectively electrically connected with a pixel driving circuit, and orthographic projection of the photosensitive unit on the first surface is located on one side of orthographic projection of the light-emitting unit on the first surface in the same sub-pixel area.

Step S2 will be exemplarily described below taking the structure shown in fig. 2 as an example. Illustratively, this step S2 may include:

First, a light shielding metal layer is obtained on a substrate by a deposition method, and patterning treatment is performed on the light shielding metal layer to obtain the light shielding layer. The shading layer comprises a first power line.

And secondly, forming a buffer layer on the shading layer in a deposition mode. Then, a first semiconductor material layer is formed on the buffer layer by deposition, for example, and patterning is performed on the first semiconductor material layer to obtain a first active layer. Wherein the first active layer comprises a photosensitive layer of the photosensitive unit.

Third, a first gate insulating layer and an initial first gate material layer are sequentially formed on the first active layer by, for example, deposition. The first gate insulating layer covers the first active layer. And patterning the initial first gate material layer to obtain a first gate layer.

A fourth step of forming a first insulating layer and an initial second gate material layer on the first gate layer in sequence by, for example, deposition. The first insulating layer covers the first gate layer. And patterning the initial second gate material layer to obtain a second gate layer.

And a fifth step of forming a second gate insulating layer and a second semiconductor material layer on the second gate layer sequentially by, for example, deposition. The second gate insulating layer covers the first gate layer. And patterning the second semiconductor material layer to obtain a second active layer.

And a sixth step of forming a third gate insulating layer and a third gate material layer on the second active layer sequentially by, for example, deposition. The third gate insulating layer covers the second active layer. And patterning the third gate material layer to obtain a third gate layer.

Seventh, an interlayer dielectric layer and a first metal material layer are sequentially formed on the third gate layer by, for example, deposition. The interlayer dielectric layer covers the third gate layer. And patterning the first metal material layer to obtain a first source drain electrode layer. The first source-drain electrode layer comprises a first electrode and a second electrode of the photosensitive unit.

And eighth, forming a passivation layer and a second metal material layer on the first source-drain electrode layer in sequence through a deposition mode. The passivation layer covers the first source drain layer. And patterning the second metal material layer to obtain a second source drain electrode layer. The second source drain electrode layer comprises a switching structure.

And a ninth step of forming a first planarization layer and a third metal material layer on the second source/drain layer sequentially by, for example, deposition. The first planarization layer covers the second source drain layer. And patterning the third metal material layer to obtain a third source drain electrode layer. The third source drain electrode layer comprises a second power line.

And a tenth step of forming a second planarization layer on the third source/drain layer by, for example, deposition.

The materials of each layer are referred to the foregoing embodiments, and will not be described herein.

Optionally, the patterning process includes photoresist coating, exposure, development, etching, stripping, and the like.

The manufacturing method of the display panel further comprises the step of sequentially manufacturing a protective layer, a color film layer and a transparent planarization layer on the light-emitting functional layer. After the protective layer is manufactured, a plurality of grooves are formed on the upper surface of the protective layer, which is far away from the first surface, by means of etching, and then a black matrix is formed in the grooves by means of deposition and patterning. In other possible embodiments, the grooves may not be formed on the upper surface of the protective layer remote from the first surface, but the black matrix may be formed directly by means of, for example, deposition and patterning.

The embodiment of the disclosure also provides a display device, which comprises any one of the display panels and a power supply circuit, wherein the power supply circuit is used for supplying power to the display panels.

The display device provided by the embodiment of the disclosure may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

The display device has the same effects as the aforementioned display panel, and will not be described herein.

Fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present disclosure. As shown in fig. 12, the display device further includes a flexible circuit board 6 and a control circuit board electrically connected to the photosensitive unit through the flexible circuit board 6.

In the embodiment of the present disclosure, the plurality of second power lines 23 are electrically connected with the flexible circuit board 6. A flexible circuit board is provided so that the second power line 23 is electrically connected with other structures through the flexible circuit board, thereby transmitting the light sensing signal. Illustratively, the light sensing signal sent by the light sensing unit 21 is sequentially sent to the analog-to-digital converter through the second power line 23 and the flexible circuit board 6, and then is sent to the control chip, the control chip can process the light sensing signal, when the ambient light is sensed to be too strong or too weak, the control chip can send a regulating signal, and the regulating signal can be sent to the data line through the other analog-to-digital converter, so that the brightness of the display panel is increased or decreased in a manner of increasing or decreasing the voltage on the data line.

Illustratively, the control circuit board is located on a side of the substrate 1 remote from the first surface 1a, and both the analog-to-digital converter and the control chip are disposed on the control circuit board.

Optionally, the flexible circuit board 6 includes a fixed end and a movable end, the fixed end is located in a peripheral area of the display panel, and the movable end is used for being connected with the control circuit board.

The foregoing is merely an alternative embodiment of the present disclosure, and is not intended to limit the present disclosure, any modification, equivalent replacement, improvement, etc. that comes within the spirit and principles of the present disclosure are included in the scope of the present disclosure.

Claims

1. A display panel, characterized in that the display panel comprises a substrate base plate, a driving circuit layer and a light-emitting functional layer;

The substrate base plate is provided with a plurality of sub-pixel areas;

the driving circuit layer is positioned on the first surface of the substrate base plate and comprises a plurality of pixel driving circuits and a plurality of photosensitive units, the pixel driving circuits are respectively positioned in one sub-pixel area, and at least one sub-pixel area is provided with at least one photosensitive unit;

The light-emitting functional layer is located on one side of the driving circuit layer far away from the substrate base plate and comprises a plurality of light-emitting units, the light-emitting units are respectively located in one sub-pixel area and are respectively electrically connected with one pixel driving circuit, and orthographic projection of the light-sensing units on the first surface is located on one side of orthographic projection of the light-emitting units of the same sub-pixel area on the first surface.

2. The display panel of claim 1, wherein the driving circuit layer further comprises a first power line and a plurality of second power lines, the first power line being electrically connected to first ends of the plurality of light sensing units, and the first power line being electrically connected to the plurality of pixel driving circuits, a first end of each of the second power lines being electrically connected to a second end of at least one of the light sensing units.

3. The display panel according to claim 2, wherein the light sensing unit includes a light sensing layer and an electrode layer sequentially stacked on the first surface, the light sensing layer including a first doped region, a light sensing region, and a second doped region sequentially arranged in a direction parallel to the first surface, the electrode layer including a first electrode and a second electrode;

the first electrode is electrically connected with the first doped region, and the first electrode is electrically connected with the first power line;

the second electrode is electrically connected with the second doped region, and the second electrode is electrically connected with the second power line.

4. The display panel according to claim 3, wherein the display panel includes a light shielding layer, a first active layer, a first source drain layer, a second source drain layer, and a third source drain layer sequentially stacked on the first surface, the first power line is located in the light shielding layer, the photosensitive layer is co-layer with the first active layer, the electrode layer is co-layer with the first source drain layer, and the second power line is located in the third source drain layer.

5. The display panel of claim 4, wherein the driving circuit layer further comprises a plurality of data lines extending in the same direction as the plurality of second power lines, the data lines being located on the third source drain layer, each of the light sensing units and the second power lines electrically connected to the second ends of the light sensing units being located between the orthographic projections of two adjacent data lines on the first surface.

6. The display panel of any one of claims 3 to 5, further comprising a color film layer on a side of the light-emitting functional layer remote from the driving circuit layer, the color film layer comprising a plurality of color blocks located in the sub-pixel region having at least a portion of the light-sensing units, the orthographic projection of at least a portion of the light-sensing units on the first surface being located in the orthographic projection of the color blocks on the first surface in the same sub-pixel region having the light-sensing units and the color blocks.

7. The display panel of claim 6, wherein the plurality of color blocks includes a plurality of first color blocks, a plurality of second color blocks, and a plurality of third color blocks having different colors, the plurality of light sensing units includes a plurality of first light sensing units, a plurality of second light sensing units, and a plurality of third light sensing units, an orthographic projection of the plurality of first light sensing units on the first surface is located within an orthographic projection of the plurality of first color blocks on the first surface, an orthographic projection of the plurality of second light sensing units on the first surface is located within an orthographic projection of the plurality of second color blocks on the first surface, and an orthographic projection of the plurality of third light sensing units on the first surface is located within an orthographic projection of the plurality of third color blocks on the first surface.

The extending directions of the second power lines are all in a first direction, the extending directions of the second power lines comprise a first line group, a second line group and a third line group, the first ends of the second power lines in the first line group are electrically connected with the second ends of the first photosensitive units arranged along the first direction, the second ends of the second power lines in the first line group are electrically connected with the second ends of the second photosensitive units arranged along the first direction, the first ends of the second power lines in the second line group are electrically connected with the second ends of the second photosensitive units arranged along the first direction, and the first ends of the second power lines in the third line group are electrically connected with the third ends of the third photosensitive units arranged along the first direction.

8. The display panel of claim 7, further comprising a first switch, a second switch, and a third switch, wherein a second end of a second power line of the plurality of first line groups is electrically connected to the first switch, a second end of a second power line of the plurality of second line groups is electrically connected to the second switch, and a second end of a second power line of the plurality of third line groups is electrically connected to the third switch.

9. The display panel of claim 6, wherein the plurality of light sensing units further comprises a plurality of fourth light sensing units, the display panel further comprises a plurality of light shielding structures, each of the fourth light sensing units and one of the light shielding structures are located in a same one of the sub-pixel regions, the light shielding structures are located on a side of the fourth light sensing units away from the first surface, and an orthographic projection of the fourth light sensing units on the first surface is located in a same one of the sub-pixel regions, the light shielding structures are located in an orthographic projection of the first surface.

10. The display panel of any one of claim 6, wherein the plurality of light sensing units further comprises a plurality of fifth light sensing units:

The color block further comprises a blank area, the fifth photosensitive unit and one blank area are located in the same sub-pixel area, and the orthographic projection of the fifth photosensitive unit on the first surface is located in the same sub-pixel area, and the blank area is located in the orthographic projection of the first surface; and/or

The sub-pixel area where the fifth photosensitive unit is located does not include the color block.

11. A display panel according to any one of claims 7 to 10, wherein each of the sub-pixel regions has one of the light sensing units therein; or alternatively

The plurality of sub-pixel areas are divided into a plurality of sub-pixel area groups, each sub-pixel area group comprises a plurality of adjacent sub-pixel areas, and each sub-pixel area group is internally provided with one photosensitive unit.

12. The display panel according to any one of claims 3 to 4 and 6 to 9, wherein the light emitting functional layer further comprises a pixel defining layer comprising a plurality of first openings, each of the light emitting units being located in the first opening within one of the sub-pixel regions;

the pixel definition layer is made of transparent materials; or alternatively

The pixel defining layer is made of an opaque material, and the pixel defining layer further comprises a plurality of second openings, and the orthographic projection of at least part of the photosensitive units on the first surface is positioned in the orthographic projection of one second opening on the first surface.

13. A method for manufacturing a display panel, the method comprising:

Providing a substrate, wherein the substrate is provided with a plurality of sub-pixel areas;

Manufacturing a driving circuit layer on the first surface of the substrate, wherein the driving circuit layer comprises a plurality of pixel driving circuits and a plurality of photosensitive units, the pixel driving circuits are respectively positioned in one sub-pixel area, and at least one sub-pixel area is provided with at least one photosensitive unit;

And manufacturing a light-emitting functional layer on one side of the driving circuit layer far away from the substrate, wherein the light-emitting functional layer comprises a plurality of light-emitting units, the light-emitting units are respectively positioned in one sub-pixel area and are respectively electrically connected with one pixel driving circuit, and the orthographic projection of the photosensitive units on the first surface is positioned on one side of the orthographic projection of the light-emitting units on the first surface in the same sub-pixel area.

14. A display device comprising a power supply circuit and the display panel according to any one of claims 1 to 13, the power supply circuit supplying power to the display panel.

15. The device of claim 14, wherein the display device further comprises a flexible circuit board and a control circuit board, the control circuit board being electrically connected to the photosensitive unit through the flexible circuit board.