CN117914126A - Resonant flyback power converter and switching control circuit and method thereof - Google Patents

Abstract

A resonant flyback power converter and a switching control circuit and a switching control method thereof are provided. The switching control circuit is used for controlling the resonant flyback power converter, and the switching control circuit generates a first driving signal and a second driving signal. The first driving signal is used for conducting the first transistor to generate a first current, so as to excite the transformer and charge the resonant capacitor. The transformers and the resonance capacitors are connected in series with each other. The second driving signal is used for conducting the second transistor to generate a second current, so as to discharge the resonant capacitor. During the power-on period of the resonant flyback power converter, the second driving signal comprises a plurality of short pulses for turning on the second transistor, thereby discharging the resonant capacitor. The pulse width of the short pulses of the second drive signal is short to such an extent that the second current does not exceed a current limit.

Description

Resonant flyback power converter and switching control circuit and method thereof

Technical Field

The present invention relates to resonant flyback power converters, and more particularly to a resonant flyback power converter that avoids over-current during start-up of an electrical power supply. The invention also relates to a switching control circuit and a switching control method for controlling the resonant flyback power converter.

Background

FIG. 1A is a schematic diagram showing a conventional resonant flyback power converter with zero voltage switching to achieve high power conversion efficiency. Fig. 1B is a waveform diagram showing signal operations corresponding to the resonant flyback power converter shown in fig. 1A. As shown in fig. 1B, during the power-on period Tonw, the second driving signal SL is enabled for a long period of time to discharge the possible residual charges stored in the resonant capacitor. However, the negative current IPN will become too large in this prior art.

Therefore, in order to overcome the above-mentioned drawbacks of the conventional half-bridge flyback power converter, the present invention provides a resonant flyback power converter which has high efficiency in a light load state and can prevent over-current protection during power-up, and a switching control circuit and a method thereof.

Disclosure of Invention

In one aspect, the present invention provides a switching control circuit for controlling a resonant flyback power converter, the resonant flyback power converter including a first transistor and a second transistor, the first transistor and the second transistor forming a half-bridge circuit; the transformer and the resonance capacitor are mutually connected in series to the half-bridge circuit, and the half-bridge circuit is used for switching the transformer and the resonance capacitor to generate an output voltage; wherein the switching control circuit includes: an excitation control circuit for generating a first driving signal to switch the first transistor; and a resonance and zero voltage switching control circuit coupled to the excitation control circuit and used for generating a second driving signal to switch the second transistor; the switching control circuit is used for conducting the first transistor to generate a first current so as to excite the transformer and charge the resonant capacitor, and is used for conducting the second transistor to generate a second current so as to discharge the resonant capacitor; during the power-on period of the resonant flyback power converter, the switching control circuit generates a plurality of short pulses of the second driving signal to turn on the second transistor, thereby discharging the resonant capacitor.

In a preferred embodiment, the pulse width of the short pulse of the second driving signal is short to such an extent that the second current does not exceed a current limit.

In a preferred embodiment, the pulse width of the short pulse of the second driving signal is less than 1 microsecond.

In a preferred embodiment, the first driving signal is turned off during the power-on of the resonant flyback power converter.

In a preferred embodiment, the switching control circuit further includes a feedback circuit for controlling the first driving signal and the second driving signal to adjust the output voltage; wherein a feedback loop of the feedback circuit is controlled to be an open loop during the power-on of the resonant flyback power converter.

In a preferred embodiment, the first drive signal and the second drive signal are both turned off when the level of the second current exceeds a negative overcurrent threshold.

In a preferred embodiment, the polarities of the first current and the second current are opposite to each other.

In a preferred embodiment, a time interval between two successive ones of the short pulses is long enough that the second current does not exceed a current limit.

In a preferred embodiment, the switching control circuit further comprises a counter for counting the interval time.

In a preferred embodiment, the first driving signal enables a minimum pulse width after at least one of the short pulses of the second driving signal is turned off during the power-on of the resonant flyback power converter.

In a preferred embodiment, the pulse width of the short pulse of the second driving signal is related to the capacitance of the resonant capacitor, the capacitance of an output capacitor and/or the safe operating region of the second transistor.

In a preferred embodiment, the short pulse of the second driving signal is further used to charge a bootstrap capacitor, wherein the bootstrap capacitor is used to provide a power supply to an upper bridge gate driving circuit to generate the first driving signal for driving the first transistor.

In another aspect, the present invention provides a resonant flyback power converter, comprising: a first transistor and a second transistor, the first transistor and the second transistor forming a half-bridge circuit; a transformer and a resonance capacitor, wherein the transformer and the resonance capacitor are mutually connected in series with each other in the half-bridge circuit; and a switching control circuit for generating a first driving signal and a second driving signal, wherein the first driving signal and the second driving signal are used for respectively controlling the first transistor and the second transistor, thereby switching the transformer and the resonance capacitor to generate an output voltage; the switching control circuit is used for conducting the first transistor to generate a first current so as to excite the transformer and charge the resonant capacitor, and is used for conducting the second transistor to generate a second current so as to discharge the resonant capacitor; during the power-on period of the resonant flyback power converter, the switching control circuit generates a plurality of short pulses of the second driving signal to turn on the second transistor so as to discharge the resonant capacitor.

In yet another aspect, the present invention provides a method for controlling a resonant flyback power converter, wherein the resonant flyback power converter comprises a first transistor and a second transistor, the first transistor and the second transistor forming a half-bridge circuit; the transformer and the resonance capacitor are mutually connected in series in the half-bridge circuit; the half-bridge circuit is used for switching the transformer and the resonance capacitor to generate an output voltage; wherein the method comprises the steps of: generating a first driving signal for turning on the first transistor to generate a first current, thereby exciting the transformer and charging the resonant capacitor; and generating a second driving signal for turning on the second transistor to generate a second current, thereby discharging the resonant capacitor; during the power-on period of the resonant flyback power converter, the second driving signal comprises a plurality of short pulses for conducting the second transistor, thereby discharging the resonant capacitor.

The objects, technical contents, features and effects achieved by the present invention will be more readily understood by the following detailed description of specific embodiments.

Drawings

FIG. 1A is a schematic diagram showing a conventional resonant flyback power converter with zero voltage switching to achieve high power conversion efficiency.

Fig. 1B is a waveform diagram showing signal operations corresponding to the resonant flyback power converter shown in fig. 1A.

FIG. 2 is a schematic diagram of a resonant flyback power converter according to a preferred embodiment of the present invention.

Fig. 3 is a waveform diagram showing signal operation corresponding to the resonant flyback power converter shown in fig. 2 according to an embodiment of the present invention.

Fig. 4A is a signal operation waveform diagram of the resonant flyback power converter according to a preferred embodiment of the present invention when the resonant flyback power converter is operated under a condition that the output load is a medium load.

Fig. 4B is a signal operation waveform diagram of the resonant flyback power converter according to a preferred embodiment of the present invention when the output load is extremely light or even no output load.

FIG. 5 is a block diagram of a primary side controller of a resonant flyback power converter, according to a preferred embodiment of the present invention.

FIG. 6A shows a resonant flyback power converter operating during transformer excitation when the primary side switching current is positive, according to one embodiment of the present invention.

FIG. 6B is a diagram illustrating a resonant flyback power converter operating during resonance when the primary-side switching current is negative, according to one embodiment of the present invention.

FIG. 7 is a waveform diagram showing a preferred signal operation of the power-on control method according to the present invention.

FIG. 8 is a schematic diagram showing the excitation control circuit in the resonant flyback power converter, according to a preferred embodiment of the present invention.

FIG. 9 is a schematic diagram showing a resonant and zero voltage switching control circuit in a resonant flyback power converter, according to a preferred embodiment of the present invention.

FIG. 10 shows a resonant and zero voltage switching control circuit for generating a second driving signal in a resonant flyback power converter according to a preferred embodiment of the present invention.

FIG. 11 is a waveform diagram showing another preferred signal operation of the power-on control method according to the present invention.

FIG. 12 is a schematic diagram showing an excitation control circuit for generating a first driving signal according to the waveform shown in FIG. 11 in a resonant flyback power converter according to another preferred embodiment of the present invention.

Description of the symbols in the drawings

10: Transformer

100: Secondary side controller

20: Resonant capacitor

200: Primary side controller

201, 208, 2012: Excitation control circuit

202, 209, 2010: Resonance and zero voltage switching control circuit

210: Delay element

211: Inverter with a high-speed circuit

215, 312: Flip-flop

221: Transistor with a high-voltage power supply

223, 224, 225: Resistor

231, 232, 330: Comparator with a comparator circuit

235: AND gate

240: Upper bridge grid driver

241: Bootstrap diode

242: Bootstrap capacitor

250: Pulse generator

251, 252, 315: AND gate

253, 311, 321, 351, 352: Inverter with a high-speed circuit

257: OR gate

30: First transistor

300: Resonant (asymmetric half-bridge) flyback power converter

310: Delay time element

313, 313': OR gate

320: Pulse generator

331: Current source

335, 335': NOR gate

35, 45, 75: Body diode

350': Time-piece

353: Counter

380',381': Pulse generator

40: Second transistor

51, 52, 65: Resistor

60: Current sensing element

70: Synchronous rectifier

80: Capacitance device

90: Optical coupler

CLK: clock signal

HGND: bootstrap ground

IM: exciting current

IP: primary side switching current

IPN: negative current

IPP: positive current

IS: secondary side switching current

LX: switching node

PLS: pulse signal

PON, SX: signal signal

Pres: resonant pulse

Pwr_on: power supply start signal

Pzv: zero voltage switching pulse

SG: drive signal

SH: a first driving signal

SL: a second driving signal

SOCPn: negative value overcurrent protection signal

SOCPp: positive value overcurrent protection signal

SOFF: shut off signal

SWH: first switching control signal

SWL: second switching control signal

SZ: zero voltage switching control signal

T1 to t7: time point

Tblk: length of time

TDS: period of demagnetization

Tlsp: pulse width

TOFF: off period

Tonw: during power-on

Tresmin: shortest resonance period

TRH, TRL: during the air stagnation period

Tshp: minimum on time

TW: resonance pulse width

TW1, TW2: shortest harmonic oscillator period

TWr: during resonance period

TX: pulse width

TZ: zero voltage switching pulse width

VAUX: auxiliary signal

VCC: power supply (Voltage)

VCOM, VCOM': feedback signal

Vcr: cross-over pressure

VCS: current sense signal

VDD: power supply

VFB: feedback signal

VHB: switching node voltage

VIN: input voltage

VNA: reference coil signal

VO: output voltage

VTN: second current threshold voltage

VTP: first current threshold voltage

Vth_por: power-on reset threshold voltage

WA: reference coil

WP: primary side coil

WS: secondary side coil

Detailed Description

The drawings in the present invention are schematic and are mainly intended to represent coupling relationships between circuits and relationships between signal waveforms, which are not drawn to scale.

Fig. 2 is a schematic diagram showing a resonant flyback power converter according to an embodiment of the present invention. The resonant asymmetric half-bridge flyback power converter 300 includes: the first transistor 30 and the second transistor 40 are used to form a half-bridge circuit. The transformer 10 and the resonance capacitor 20, which are connected in series with each other, are coupled to a switching node LX of the half bridge circuit. The transformer 10 includes: primary winding WP, secondary winding WS and reference winding WA. The primary winding WP and the secondary winding WS have a turns ratio n=np/Ns therebetween, the reference winding WA and the secondary winding WS have a turns ratio m=na/Ns therebetween, and the reference winding WA and the primary winding WP have a turns ratio k=na/Np therebetween. Wherein Np, ns, na are the number of turns of the primary winding WP, the secondary winding WS, and the reference winding WA, respectively.

The primary side controller 200 is configured to generate a first driving signal SH and a second driving signal SL, wherein the driving signals SH and SL control the half-bridge circuit to switch the transformer 10, thereby generating the output voltage VO on the secondary side of the transformer 10. The first driving signal SH is used to drive the first transistor 30 to excite the excitation transformer 10. The second driving signal SL turns on the second transistor 40 during the demagnetization period of the transformer 10 and during the resonance period of the transformer 10. In an embodiment, the second driving signal SL is also used to turn on the second transistor 40, so that a circulating current is generated through the transformer 10, and the first transistor 30 is switched with zero voltage. The resistor 60 is coupled to the primary winding WP for generating a current sensing signal VCS according to the primary switching current IP of the transformer 10.

In one embodiment, the first driving signal SH and the second driving signal SL are generated according to a feedback signal VFB related to an output power source (e.g., an output voltage VO) of the resonant flyback power converter 300. In one embodiment, the secondary side controller 100 is coupled to the output voltage VO, thereby generating the feedback signal VFB. In one embodiment, the secondary side controller 100 couples the feedback signal VFB to the primary side controller 200 via the optocoupler 90. The secondary side controller 100 is also configured to generate a driving signal SG, wherein the driving signal SG is configured to drive the synchronous rectifier 70 during the demagnetization period TDS of the transformer 10. The reference coil WA generates a reference coil signal VNA when the transformer 10 is switched. Resistor 51 and resistor 52 attenuate the reference coil signal VNA to generate an auxiliary signal VAUX coupled to the primary side controller 200.

Fig. 3 is a waveform diagram showing signal operation corresponding to the resonant flyback power converter shown in fig. 2 according to an embodiment of the present invention. When the first driving signal SH is turned on (i.e., the first driving signal SH is enabled to a high level state, for example), the transformer 10 is excited, and the excitation current IM is generated. When the first driving signal SH is turned off (i.e., the first driving signal SH is disabled to, for example, a low level state), the transformer 10 is demagnetized. During the demagnetization period TDS of the transformer 10, the secondary-side switching current IS generated. The resonance pulse Pres of the second driving signal SL has a resonance pulse width TW, which is related to the demagnetization period TDS of the transformer 10. In an embodiment, the resonant pulse width TW of the second driving signal SL is configured to be equal to or longer than the demagnetization period TDS of the transformer 10, thereby avoiding the transformer 10 from operating in the continuous conduction mode (continuous conduction mode, CCM). During the demagnetization period TDS of the transformer 10, the reflected voltage VX is generated in the resonant capacitor 20, where the reflected voltage VX can be represented by the following relationship:

VX＝n*VO＝(Np/Ns)*VO

when the first driving signal SH is turned off, the second driving signal SL may be turned on. On the other hand, when the second driving signal SL is turned off, the first driving signal SH may be turned on. Between the first driving signal SH and the second driving signal SL may include: the dead time period (e.g., TRH and TRL).

The operation corresponding to the different periods shown in fig. 3 will be more clearly elucidated in the following paragraphs.

The period from time point t1 to time point t2 represents: during excitation of the transformer. During the period from time t1 to time t2, the first transistor 30 is turned on, and the second transistor 40 is turned off. In this case, the current IP in the transformer 10 increases, and the voltage in the resonance capacitor also increases. In other words, the transformer 10 is excited, and the resonance capacitor 20 is charged. On the other hand, the synchronous rectifier 70 on the secondary side is off, and the body diode 75 of the synchronous rectifier 70 on the secondary side is reverse biased. Therefore, no energy is transmitted to the secondary side.

The period from the time point t2 to the time point t3 means: during the first cycle of current. During the period from the time point t2 to the time point t3, both the first transistor 30 and the second transistor 40 are turned off. The circulating current of the transformer 10 drives the switching node voltage VHB of the half-bridge circuit to decrease, so that the body diode 45 of the second transistor 40 is turned on. The period from time t2 to time t3 is related to a quasi-resonant (quasi-resonant) period, which enables the second transistor 40 to achieve zero voltage switching. In this case, the voltage of the primary side of the transformer 10 at the time point t3 is the same as the voltage of the resonance capacitor 20 at the time point t 3.

The period from the time point t3 to the time point t4 means: during one resonance (positive current). During the period from time t3 to time t4, the first transistor 30 is turned off and the second transistor 40 is turned on in the case of zero-voltage switching. In this case, the output voltage VO is equal to the quotient of the voltage across the resonant capacitor 20 Vcr divided by the turns ratio n. Therefore, current starts to flow through the synchronous rectifier 70 on the secondary side, so that the energy stored in the transformer 10 is transferred to the output terminal to generate the output voltage VO. Since the inductance-capacitance resonant cavity (LC tank) IS composed of the leakage inductance Lr of the transformer 10 and the resonance capacitance Cr of the resonance capacitor 20, the frequency of the sinusoidal waveform of the secondary side switching current IS determined by the resonance frequency of the leakage inductance Lr and the resonance capacitance Cr. In this way, the primary side switching current IP of the transformer 10 is equal to the superposition of the exciting current IM and the reflected current of the secondary side switching current. In this case the current in the cavity is still positive, wherein this positive current in the cavity is driven mainly by the excitation of the excitation inductance of the transformer 10 and flows into the resonance capacitor 20.

The period from the time point t4 to the time point t5 means: during one resonance (negative current). During the period from time t4 to time t5, the first transistor 30 is turned off, and the second transistor 40 is continuously turned on. The energy stored in the transformer 10 is still continuously transferred to the secondary side, but in this case the current in the resonant cavity is back driven by the voltage in the resonant capacitor 20. When the second transistor 40 is continuously turned on, the energy in the resonance capacitor 20 is not only transferred to the secondary side (e.g., negative current during the period from the time point t4 to the time point t 5), but also the energy in the resonance capacitor 20 is used to change the exciting current IM of the transformer 10 into a current having a negative level.

The period from the time point t5 to the time point t6 means: during the excitation period (backward magnetized transformer cycle) of a flyback transformer (negative current). Wherein the flyback transformer excitation period starts at the end point of the demagnetization period TDS of the transformer 10 and ends at the turning-off point of the second transistor 40. In this case, the resonant capacitor 20 excites the transformer 10 in the reverse direction (inversely) and generates a negative current.

The period from the time point t6 to the time point t7 means: during the second cycle current. During this period, both the first transistor 30 and the second transistor 40 are off. During the period from time t5 to time t6, the negative current induced in the transformer 10 drives the switching node voltage VHB on the switching node LX of the half bridge circuit to increase until the switching node voltage VHB turns on the body diode 35 of the first transistor 30. In this way, zero voltage switching can be achieved when the first transistor 30 is turned on again at time t 7.

After the time point t7, another cycle starts again, similar to the period from the time point t1 to the time point t2, the first transistor 30 turns on in the case of zero voltage switching, and the second transistor 40 turns off. If the current in the resonant cavity in the transformer 10 is still negative, the excess energy stored in the resonant cavity is returned to the input voltage VIN.

Fig. 4A is a waveform diagram showing signal operation of the resonant flyback power converter when the resonant flyback power converter is operated under a condition that the output load is a medium load according to an embodiment of the present invention. Please refer to fig. 4A. The off period TOFF of the second driving signal SL starts at the off-time point of the second driving signal SL and ends at the on-time point of the next second driving signal SL, wherein the second driving signal SL turns on when the timer 350' (shown in fig. 9) is finished. In one embodiment, the off period TOFF of the second driving signal SL and the timing period of the timer 350' are prolonged with the reduction of the output load of the resonant flyback power converter 300 (at this time, the switching frequency is reduced with the reduction of the output load of the resonant flyback power converter 300), thereby saving power, wherein the output load is coupled to receive power from the output power. In an embodiment, as shown in fig. 4A, the demagnetization period TDS approaches the resonance period TWr, and the resonance pulse width TW of the second driving signal SL approaches the demagnetization period TDS and the resonance period TWr. Wherein the demagnetization period TDS refers to: during the period when the excitation current IM decreases from the peak value of its waveform to zero. The resonance period TWr refers to: the resonance period of the leakage inductance value of the resonance capacitor 20 and the transformer 10 is added to the period during which the primary side switching current IP decreases from the peak value of its waveform to zero. The resonant pulse width TW refers to: after the first driving signal SH is turned off, the first pulse (i.e., the resonance pulse Pres) of the second driving signal SL has a pulse width.

In an embodiment, as shown in fig. 4A, the resonance pulse width TW of the second driving signal SL has a shortest resonance period tres_min, wherein the shortest resonance period tres_min is equal to the shortest harmonic oscillator period TW1 with a fixed period plus the shortest harmonic oscillator period TW2 with an adjustable period. In the present embodiment, as shown in fig. 4A, since the output load is within the range of the intermediate load, the resonance pulse width TW is not limited by the shortest resonance period tres_min.

In one embodiment, the shortest harmonic oscillator period TW2 with adjustable period shortens with decreasing output load. Therefore, the shortest resonance period tresmin also shortens with a decrease in output load.

Please refer to fig. 4B. Fig. 4B is a signal operation waveform diagram of the resonant flyback power converter according to an embodiment of the present invention when the output load is extremely light or even no output load. In one embodiment, when the resonant flyback power converter 300 is operated under the condition that the output load is extremely light (extremely light load) or even no output load at all, the resonant pulse width TW is limited by the shortest resonant period tres_min. In the present embodiment, as shown in fig. 4B, as the output load is continuously reduced, the shortest harmonic oscillator period TW2 having an adjustable period is adjusted to zero. As a result, the resonant pulse width TW shown in fig. 4B is equal to the shortest harmonic oscillator period TW1 (i.e., tres_min=tw1+0) having a fixed period.

From one point of view, when the resonant flyback power converter 300 is operated under a condition that the output load is heavy, the first shortest resonant period tres_min1 can be expressed by the following relation when the shortest resonant sub-period TW2 with the adjustable period is not equal to zero: tres_min1=tw1+tw2. On the other hand, when the resonant flyback power converter 300 is operated under a condition that the output load is light such that the shortest harmonic oscillator period TW2 having an adjustable period is equal to zero, the second shortest harmonic oscillator period tres_min2 can be expressed by the following relation: tres_min2=tw1+0. Based on the above, in this case, the first shortest resonance period tres_min1 is longer than the second shortest resonance period tres_min2.

Fig. 5 is a block diagram of a primary side controller 200 of a resonant flyback power converter according to a preferred embodiment of the present invention. In one embodiment, as shown in fig. 5, the primary side controller 200 includes: excitation control circuit 201 and resonance and zero voltage switching control circuit 202. The excitation control circuit 201 is configured to generate a first driving signal SH according to the current sensing signal VCS, the feedback signal VFB, and the signal generated by the resonance and zero voltage switching control circuit 202. The resonance and zero voltage switching control circuit 202 is used for generating the second driving signal SL according to the signal generated by the excitation control circuit 201.

Fig. 6A is a schematic diagram showing an asymmetric half-bridge flyback power converter according to a preferred embodiment of the present invention operating during transformer excitation, when the primary side switching current IP is positive, for exciting the transformer. Fig. 6A shows a positive current IPP, which is a positive part of the primary-side switching current IP. The positive current IPP is generated during the period when the first transistor 30 is turned on and the second transistor 40 is turned off, and the resonant flyback power converter 300 operates during the excitation of the transformer, wherein the positive current IPP corresponds to the current during the period from the time point t1 to the time point t2 shown in fig. 3. The positive current IPP excites the transformer 10 and charges the resonant capacitor 20. In this case, if the output terminal of the resonant flyback power converter 300 is short-circuited, the magnetic flux of the transformer 10 will be saturated after a few switching cycles. In this case, the primary winding WP of the transformer 10 will be equivalent to a short circuit, and thus the first transistor 30 will be permanently destroyed. Therefore, when the positive current IPP of the primary-side switching current IP exceeds a positive-value over-current threshold (positive-over-current threshold), the present invention needs to perform an over-current protection mechanism for the first transistor 30 in order to protect the first transistor 30, i.e., the present invention will turn off the first transistor 30 immediately.

Fig. 6B shows a state of the resonant flyback power converter operating during resonance according to an embodiment of the present invention, when the primary-side switching current IP is negative. Fig. 6B shows the negative current IPN, which is the negative part of the primary-side switching current IP. The negative current IPN is generated during the period when the first transistor 30 is turned off and the second transistor 40 is turned on, and the resonant flyback power converter 300 operates during the resonance period, wherein the negative current IPN corresponds to the current during the period from the time point t4 to the time point t5 shown in fig. 3. The energy in the resonant capacitor 20 is transferred through the transformer 10 to the output of the resonant flyback power converter 300. In this case, if the output terminal of the resonant flyback power converter 300 is 0V or shorted, the resonant capacitor 20 will be equivalently shorted through the transformer 10, which may cause very high switching current stress to the second transistor 40 and may cause short-lived (reliability) problems or cause permanent damage. Therefore, when the negative current IPN of the primary-side switching current IP exceeds a negative over-current threshold (negative-over-current threshold), the present invention needs to perform an over-current protection mechanism for the second transistor 40 in order to protect the second transistor 40 from constant destruction, i.e. the present invention will turn off the second transistor 40 immediately.

The overcurrent protection mechanism during normal switching operation can be found, for example, in the parent of the U.S. partial serial No. 18/298340 corresponding to the present application, with application day 2023, 4, and 10. An over-current protection mechanism during power-up is presented herein.

FIG. 7 is a waveform diagram showing a preferred signal operation of the power-on control method according to the present invention. When the power VCC of the resonant flyback power converter 300 is enabled (e.g., the power supply voltage VCC is greater than the power-ON reset threshold voltage vth_por shown in fig. 1B), the primary-side controller 200 will generate a power-ON signal pwr_on (active low) to control the feedback loop of the resonant flyback power converter 300 to an open loop. During the power-ON period Tonw of the power-ON signal pwr_on, the primary-side controller 200 generates a plurality of short pulses of the second driving signal SL to briefly activate the second transistor 40, thereby discharging the resonant capacitor 20. In one embodiment, the short pulse of the second driving signal SL is also used to charge the bootstrap capacitor 242. Bootstrap capacitor 242 is used to provide power to upper bridge gate driver 240.

In an embodiment, the pulse width Tlsp of the short pulse of the second driving signal SL is short enough that the negative current IPN of the second transistor 40 does not exceed the current limit (e.g., negative over-current threshold) during the power-ON period Tonw of the power-ON signal pwr_on to prevent damage during the power-ON period. In a preferred embodiment, the pulse width Tlsp of the short pulse of the second driving signal SL is less than 1 microsecond. During the power-ON period Tonw of the power-ON signal pwr_on, both the first driving signal SH and the first transistor 30 are turned off.

Fig. 8 is a schematic diagram showing an excitation control circuit 208 for generating a first driving signal SH in a resonant flyback power converter according to a preferred embodiment of the present invention. The feedback signal VCOM is a level shift signal generated by the feedback signal VFB through the transistor 221. In one embodiment, the level of the feedback signal VFB is proportional to the level of the output load of the resonant flyback power converter. The falling edge of the zero-voltage switching control signal SZ enables the flip-flop 215 and the first driving signal SH after the delay time provided by the delay element 210, wherein the generation of the zero-voltage switching control signal SZ will be explained in detail later. In one embodiment, the delay time provided by the delay element 210 relates to a quasi-resonant delay for zero voltage switching, wherein the quasi-resonant delay relates to the resonant period of the excitation inductance of the primary winding WP and the total equivalent parasitic capacitance of the switching node LX.

The resistors 224, 225 generate a reduced feedback signal VCOM'. When the current sensing signal VCS is higher than the reduced feedback signal VCOM', the comparator 232 is used for resetting the flip-flop 215 and turning off the first driving signal SH. The output of the flip-flop 215 (i.e., the first switch control signal SWH) generates the first driving signal SH through the upper gate driver 240. Bootstrap capacitor 242 and bootstrap diode 241 are used to provide power to upper bridge gate driver 240.

The excitation control circuit 208 of fig. 8 further includes: comparator 231 and gate 235. The comparator 231 is configured to generate a positive over-current protection signal (positive-over-current protection signal) SOCPp, wherein when the level of the current sensing signal VCS exceeds a first current threshold voltage VTP, the positive over-current protection signal SOCPp resets the flip-flop 215 through the and gate 235, thereby turning off the first driving signal SH. The power-ON signal pwr_on is coupled to the and gate 235 for resetting the flip-flop 215 and turning off the first driving signal SH during the power-ON period Tonw of the power-ON signal pwr_on.

Fig. 9 is a schematic diagram showing a resonant and zero-voltage switching control circuit 209 for generating the second driving signal SL in the resonant flyback power converter according to an embodiment of the present invention. The second driving signal SL is composed of a second switching control signal SWL (having a resonance pulse width TW) and a zero-voltage switching control signal SZ (having a zero-voltage switching pulse width TZ). The second driving signal SL is generated by an or gate 313 and an and gate 315, wherein the or gate 313 and the and gate 315 are used for processing the second switching control signal SWL, the zero voltage switching control signal SZ and the off signal SOFF. It should be noted that the off signal SOFF generated by the timer 350' is used to represent the off period TOFF shown in fig. 4A to 4B. In addition, the off signal SOFF is used to ensure that the first driving signal SH (fig. 8) and the second driving signal SL (fig. 9) are turned off during the off period TOFF.

Please continue to refer to fig. 9. The falling edge of the first driving signal SH triggers the flip-flop 312 to enable the second switching control signal SWL after a period of quasi-resonant delay time provided by the delay-time cell 310. In one embodiment, the delay time element 310 is configured to provide a quasi-resonant delay to enable zero voltage switching of the second transistor 40. When the second switch control signal SWL is enabled, the pulse generator 320 is used for determining the pulse width (i.e. the resonant pulse width TW) of the second switch control signal SWL according to the level of the feedback signal VCOM. The pulse width of the second switching control signal SWL (i.e., the resonant pulse width TW) is shortened as the output load is reduced. At the end point of the pulse generated by the pulse generator 320, a reset signal is generated to reset the flip-flop 312, thereby turning off the second switching control signal SWL, and at this time, the second switching control signal SWL is turned off corresponding to the start point of the off period TOFF. A current source 331 associated with resistor 65 (e.g., as shown in fig. 6B) provides a bias voltage to current sense signal VCS. The comparator 330 is configured to receive the current sense signal VCS to generate a negative over-current protection signal (negative-over-current protection signal) SOCPn when the level of the current sense signal VCS exceeds a second current threshold voltage VTN. The negative over-current protection signal SOCPn is used to reset the flip-flop 312, the timer 350 'and the pulse generator 380', thereby ensuring that the second driving signal SL is turned off by the and gate 315 to achieve negative over-current protection.

In one embodiment, turning off the second switch control signal SWL (i.e., the second switch control signal SWL is at a low level) will cause the timer 350' to start counting to generate the off signal SOFF (which is a signal with a low level of true). In one embodiment, the off period TOFF of the timer 350' is inversely proportional to the level of the feedback signal VCOM. During the period when the resonant flyback power converter 300 operates in the discontinuous conduction mode, the off period TOFF is prolonged with a decrease in the output load (thus causing a decrease in the switching frequency). When the timer 350' is finished, the timer 350' enables the pulse generator 380' to generate the zero voltage switching control signal SZ. When the resonant flyback power converter 300 is operated in a condition in which the output load is heavy, the off period TOFF of the timer 350' is zero. When the timer 350' is reset by the negative over-current protection signal SOCPn, a predetermined off period is generated. During the resonant flyback power converter 300 operates in the discontinuous conduction mode, the zero-voltage switching control signal SZ is used to generate the circulating current, so that the first transistor 30 realizes zero-voltage switching.

Referring back to fig. 4A and 4B, in one embodiment, the pulse width TX of the first driving signal SH is shortened with the reduction of the output load. The resonant pulse width TW of the second driving signal SL is also shortened with the shortening of the pulse width TX of the first driving signal SH. However, the second driving signal SL still has the shortest on-time, wherein the second driving signal SL has the shortest on-time for discharging the resonant capacitor 20. In one embodiment, when the resonant flyback power converter 300 is operated under a condition that the output load is medium or light, the second driving signal SL is turned off (i.e. the second switching control signal SWL or the zero-voltage switching control signal SZ is turned off) once the condition that the current sensing signal VCS exceeds the second current threshold voltage VTN occurs. In addition, when the level of the negative current IPN exceeds the negative overcurrent threshold, both the first driving signal SH and the second driving signal SL are turned off for a preset off period.

Summarizing the above, the first driving signal SH and the second driving signal SL are used to control the switching of the first transistor 30 and the second transistor 40, respectively. The first transistor 30 and the second transistor 40 form a half-bridge circuit, and the half-bridge circuit switches the transformer 10 through the resonant capacitor 20 and the current sensing element 60 to generate the output voltage VO. The conducting state of the first drive signal SH generates a positive current IPP of the primary-side switching current IP, thereby exciting the transformer 10 and thereby charging the resonance capacitor 20. The on state of the second drive signal SL generates a negative current IPN of the primary-side switching current IP, thereby discharging the resonance capacitor 20. When the level of the positive current IPP exceeds the positive overcurrent threshold, the first transistor 30 is turned off. When the level of the negative current IPN exceeds a negative over-current threshold, the second transistor 40 is turned off. In one embodiment, the current sensing device 60 is a current sensing resistor, wherein the current sensing resistor is used for detecting the level of the positive current IPP of the primary side switching current IP and the level of the negative current IPN of the primary side switching current IP. The polarities of the positive current IPP and the negative current IPN are opposite to each other. Resistor 65 and current source 331 are coupled to current sensing element 60, thereby generating a current sense signal VCS. The current sense signal VCS is used to compare with the first current threshold voltage VTP or the second current threshold voltage VTN, respectively.

Referring to fig. 7 and 10, fig. 10 shows a resonant and zero-voltage switching control circuit 2010 for generating a second driving signal SL in a resonant flyback power converter according to another preferred embodiment of the present invention. The resonant and zero voltage switching control circuit 2010 is similar to the resonant and zero voltage switching control circuit 209. In this embodiment, as shown in fig. 10, the second driving signal SL is composed of the second switching control signal SWL (having the resonance pulse width TW) and the pulse signal PLS (having the pulse width Tlsp), and specifically, the second driving signal SL is generated through the or gate 313'. The falling edge of the first driving signal SH activates the flip-flop 312 and generates the second switching control signal SWL after the delay time element 310 (quasi-resonant delay for zero voltage switching). In this embodiment, when the resonant flyback power converter 300 is started, the power-ON signal pwr_on is used to generate a signal PON for resetting the flip-flop 312 (through the nor gate 335') and controlling the feedback loop of the resonant flyback power converter 300 to be open during power-ON. The power-ON signal pwr_on is further used for controlling the counter 353 to generate a plurality of trigger signals, which are coupled to the pulse generator 381' for generating a plurality of pulses of the pulse signal PLS. In one embodiment, the pulse width Tlsp of the pulse signal PLS is less than 1 microsecond. It should be noted that the signal PON is an inverted signal of the power-ON signal pwr_on.

Note that the time length Tblk of the interval time between two consecutive pulses among the short pulses of the second drive signal SL is counted by the counter 353. In one embodiment, the time duration Tblk of the interval is long to the extent that the negative current IPN does not exceed a current limit.

FIG. 11 is a waveform diagram showing another preferred signal operation of the power-on control method according to the present invention. When the power of the resonant flyback power converter 300 is started, the primary side controller 200 generates a power start signal pwr_on (active low) to control the feedback loop of the resonant flyback power converter 300 into an open loop. During the enable period (e.g., low state) of the power-ON signal pwr_on, the primary-side controller 200 is configured to generate a plurality of short pulses of the second driving signal SL to briefly activate the second transistor 40, thereby discharging the resonant capacitor 20 and charging the bootstrap capacitor 242. After the second driving signal SL (short pulse) is turned off, the minimum on-time Tshp of the first driving signal SH is generated to start the first transistor 30 for a minimum on-time.

Fig. 12 shows an excitation control circuit 2012 for generating a first driving signal SH corresponding to the waveform shown in fig. 11 in a resonant flyback power converter according to another preferred embodiment of the present invention. The excitation control circuit 2012 is similar to the excitation control circuit 208. In this embodiment, as shown in fig. 12, after the second driving signal SL is turned off (represented by the signal SX), the minimum on-time Tshp of the first driving signal SH is generated by the pulse generator 250 triggered by the signal SX. Inverter 253, AND gates 251, 252 and OR gate 257 are used to form a multiplexer. The multiplexer enables the minimum ON time Tshp of the first driving signal SH during the period of the power-ON signal PWR_ON. After the power enable signal pwr_on is disabled (e.g., high state), the output of the flip-flop 215 is selected to generate the first driving signal SH through the upper gate driver 240.

It should be noted that in one aspect, the switching control circuit of the present invention includes a feedback circuit including a pulse generator 320 that spans sub-circuits such as the excitation control circuit 208 shown in fig. 8 and the resonance and zero voltage switching control circuit 2010 shown in fig. 10, such as level shifters that generate feedback signals VCOM and VCOM', a comparator 232 that implements peak current control, and a pulse width (i.e., resonance pulse width TW) that determines the pulse width of the second switching control signal SWL according to the level of the feedback signal VCOM. During normal switching after power-on, the feedback loop of the feedback circuit is controlled to operate in a closed loop. ON the other hand, during the power-ON period, the power-ON signal pwr_on controls the feedback loop of the feedback circuit to be an open loop. The second drive signal SL is controlled to switch with the previously described short pulses. When the feedback loop is an open loop during the power start, the first driving signal SH is controlled to be turned off or switched with a minimum on time.

The present invention has been described in terms of the preferred embodiments, but the above description is only for the purpose of easily understanding the present invention by those skilled in the art, and is not intended to limit the scope of the claims of the present invention. The embodiments described are not limited to single applications but may be combined, for example, two or more embodiments may be combined, and portions of one embodiment may be substituted for corresponding components of another embodiment. In addition, various equivalent changes and various combinations will be apparent to those skilled in the art, and for example, the term "processing or calculating based on a signal or generating an output result" in the present invention is not limited to the processing or calculating based on the signal itself, but includes performing voltage-to-current conversion, current-to-voltage conversion, and/or scaling conversion of the signal, if necessary, and then processing or calculating based on the converted signal to generate an output result. It will thus be appreciated that those skilled in the art will be able to devise various arrangements which, although not explicitly described herein, embody the principles of the invention and are thus equally well suited to the particular use contemplated. Accordingly, the scope of the invention should be assessed as that of the above and all other equivalent variations.

Claims (26)

1. A switching control circuit is used for controlling a resonant flyback power converter, the resonant flyback power converter comprises a first transistor and a second transistor, and the first transistor and the second transistor form a half-bridge circuit; the transformer and the resonance capacitor are mutually connected in series to the half-bridge circuit, and the half-bridge circuit is used for switching the transformer and the resonance capacitor to generate an output voltage; wherein the switching control circuit comprises:

An excitation control circuit for generating a first driving signal to switch the first transistor; and

A resonant and zero voltage switching control circuit coupled to the excitation control circuit for generating a second driving signal to switch the second transistor;

The switching control circuit is used for conducting the first transistor to generate a first current so as to excite the transformer and charge the resonant capacitor, and is used for conducting the second transistor to generate a second current so as to discharge the resonant capacitor;

During the power-on period of the resonant flyback power converter, the switching control circuit generates a plurality of short pulses of the second driving signal to turn on the second transistor, thereby discharging the resonant capacitor.

2. The switching control circuit of claim 1, wherein the pulse width of the short pulse of the second driving signal is short to the extent that the second current does not exceed a current limit.

3. The switching control circuit of claim 2, wherein the pulse width of the short pulse of the second drive signal is less than 1 microsecond.

4. The switching control circuit of claim 1, wherein the first drive signal is turned off during the power-on of the resonant flyback power converter.

5. The switching control circuit of claim 1, wherein the switching control circuit further comprises a feedback circuit for controlling the first driving signal and the second driving signal to adjust the output voltage; wherein a feedback loop of the feedback circuit is controlled to be an open loop during the power-on of the resonant flyback power converter.

6. The switching control circuit of claim 1, wherein the first driving signal and the second driving signal are both turned off when the level of the second current exceeds a negative over-current threshold.

7. The switching control circuit of claim 1, wherein the polarities of the first current and the second current are opposite to each other.

8. The switching control circuit of claim 2 wherein a separation time between two consecutive ones of the short pulses is long enough that the second current does not exceed a current limit.

9. The switching control circuit of claim 8, wherein the switching control circuit further comprises a counter for counting the interval time.

10. The switching control circuit of claim 1, wherein the first drive signal enables a minimum pulse width after at least one of the short pulses of the second drive signal is turned off during the power-on of the resonant flyback power converter.

11. The switching control circuit according to claim 2, wherein the pulse width of the short pulse of the second driving signal is related to the capacitance of the resonant capacitor, the capacitance of an output capacitor and/or the safe operating region of the second transistor.

12. The switching control circuit of claim 1, wherein the short pulse of the second driving signal is further used to charge a bootstrap capacitor, wherein the bootstrap capacitor is used to provide a power supply to an upper bridge gate driving circuit to generate the first driving signal for driving the first transistor.

13. A resonant flyback power converter comprising:

A first transistor and a second transistor, the first transistor and the second transistor forming a half-bridge circuit;

A transformer and a resonance capacitor, wherein the transformer and the resonance capacitor are mutually connected in series with each other in the half-bridge circuit; and

A switching control circuit for generating a first driving signal and a second driving signal, wherein the first driving signal and the second driving signal are used for respectively controlling the first transistor and the second transistor, thereby switching the transformer and the resonance capacitor to generate an output voltage;

The switching control circuit is used for conducting the first transistor to generate a first current so as to excite the transformer and charge the resonant capacitor, and is used for conducting the second transistor to generate a second current so as to discharge the resonant capacitor;

During the power-on period of the resonant flyback power converter, the switching control circuit generates a plurality of short pulses of the second driving signal to turn on the second transistor so as to discharge the resonant capacitor.

14. The resonant flyback power converter of claim 13 wherein the pulse width of the short pulse of the second drive signal is short to the point that the second current does not exceed a current limit.

15. The resonant flyback power converter of claim 14 wherein the pulse width of the short pulse of the second drive signal is less than 1 microsecond.

16. The resonant flyback power converter of claim 13 wherein the switching control circuit further comprises a feedback circuit for controlling the first drive signal and the second drive signal to regulate the output voltage; wherein a feedback loop of the feedback circuit is controlled to be an open loop during the power-on of the resonant flyback power converter.

17. The resonant flyback power converter of claim 13 wherein both the first drive signal and the second drive signal are turned off when the level of the second current exceeds a negative overcurrent threshold.

18. The resonant flyback power converter of claim 13 wherein during the power-up of the resonant flyback power converter, the first drive signal enables a minimum pulse width after at least one of the short pulses of the second drive signal is turned off.

19. The resonant flyback power converter of claim 13 wherein the short pulse of the second drive signal is further used to charge a bootstrap capacitor that is used to provide a power supply to an upper bridge gate drive circuit to generate the first drive signal to drive the first transistor.

20. A method for controlling a resonant flyback power converter, wherein the resonant flyback power converter comprises a first transistor and a second transistor, the first transistor and the second transistor forming a half-bridge circuit; the transformer and the resonance capacitor are mutually connected in series in the half-bridge circuit; the half-bridge circuit is used for switching the transformer and the resonance capacitor to generate an output voltage; wherein the method comprises the steps of:

Generating a first driving signal for turning on the first transistor to generate a first current, thereby exciting the transformer and charging the resonant capacitor; and

Generating a second driving signal for turning on the second transistor to generate a second current, thereby discharging the resonant capacitor;

During the power-on period of the resonant flyback power converter, the second driving signal comprises a plurality of short pulses for conducting the second transistor, thereby discharging the resonant capacitor.

21. The method of claim 20, wherein the pulse width of the short pulse of the second driving signal is short to the extent that the second current does not exceed a current limit.

22. The method of claim 21, wherein the pulse width of the short pulse of the second drive signal is less than 1 microsecond.

23. The method of claim 20, further comprising:

Forming a feedback loop to control the first driving signal and the second driving signal so as to regulate the output voltage; and

During the power-on of the resonant flyback power converter, the feedback loop is controlled to be an open loop.

24. The method of claim 20, further comprising:

when the level of the second current exceeds a negative overcurrent threshold, the first driving signal and the second driving signal are turned off.

25. The method of claim 20, further comprising:

During the power-on of the resonant flyback power converter, a minimum pulse width of the first drive signal is enabled after at least one of the short pulses of the second drive signal is turned off.

26. The method of claim 20, further comprising:

Charging a bootstrap capacitor according to the short pulse of the second driving signal, wherein the bootstrap capacitor is used for providing a power supply to an upper bridge gate driving circuit to generate the first driving signal so as to drive the first transistor.