CN117908770A - System, method and apparatus for transferring programs for computing storage devices - Google Patents

Abstract

Systems, methods, and apparatus are provided for transferring programs from a host to a computing storage device. The method can include: the method includes determining a program to be transferred from a host to a computing storage device, determining that a size of the program exceeds a predetermined threshold, and transferring at least a portion of the program to the computing storage device based on the size.

Description

System, method and apparatus for transferring programs for computing storage devices

Cross Reference to Related Applications

The present application claims the benefit of U.S. provisional patent application Ser. No. 63/413,732, entitled "A MECHANISM TO DOWNLOAD LARGE PROGRAMS FOR COMPUTATIONAL STORAGE DEVICES", filed on 6 th 10 th 2022, and U.S. provisional patent application Ser. No. 63/417,683, entitled "A MECHANISM TO DOWNLOAD LARGE PROGRAMS FOR COMPUTATIONAL STORAGE DEVICES", filed on 19 th 10 th 2022, which are incorporated herein by reference for all purposes.

Technical Field

The present disclosure relates generally to storage systems, and more particularly to systems and methods for transferring programs for computing storage devices, particularly programs for exceeding a threshold size.

Background

This background section is intended to provide context only and the disclosure of any concepts in this section is not to be construed as an admission that such concepts are prior art.

With advances in technology, the size and number of data has grown rapidly as data is collected by devices such as mobile devices, internet of things devices, air (remote sensing) devices, software logs, cameras, microphones, radio Frequency Identification (RFID) readers, wireless sensor networks, and the like. In order to process and use information represented by collected data, storage devices, processing elements, and servers are typically used in data centers to filter, calculate, store, and perform related operations on the data. There remains a need for systems and methods that improve computing functionality in storage devices.

The above information disclosed in this background section is only for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not form the prior art.

Disclosure of Invention

In various embodiments, systems, methods, and apparatuses are described herein that include data transfer for a computing storage device. In particular, a method for transferring programs exceeding a threshold size from a host to a computing storage device is disclosed. The method can include: determining a program to be transferred from the host to the computing storage device; determining that the size of the program exceeds a predetermined threshold; and transmitting at least a portion of the program to a computing storage device based on the size.

In one aspect, transferring at least a portion of the program includes transferring at least a portion of the program to a computing namespace associated with a computing storage device. In another aspect, a computing namespace includes computing resources, wherein the computing resources include at least one of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Field Programmable Gate Array (FPGA), a Tensor Processing Unit (TPU), or an Application Specific Integrated Circuit (ASIC), and/or any other suitable accelerator device. In some aspects, the method further comprises dividing the program into a first portion and a second portion, and wherein transmitting at least a portion of the program further comprises transmitting the first portion and the second portion to the computing storage device and meeting the transmission requirements.

In one aspect, transmitting at least a portion of the program includes transmitting at least a portion of the program using an offset parameter, wherein the offset parameter specifies a location of the portion relative to a starting address of the program. In another aspect, transferring at least a portion of the program to the computing storage device is performed using at least one of an identifier of the namespace, a type associated with the program, an index specifying a location on the computing storage device, or a size of the program. In one aspect, transferring at least a portion of the program to the computing storage device via the management queue is performed, and the method further includes limiting a number of commands sent on the management queue to below a threshold. In some aspects, the computing storage device includes non-volatile memory express (NVMe) enabled storage devices.

Corresponding systems and computer-readable media are described.

As above, the disclosed mechanisms can be applied to computing storage devices (e.g., storage devices with processing functionality) and related systems. In other aspects, the disclosed systems can be used in conjunction with any suitable storage device, such as non-volatile memory express (NVMe), structural NVMe (NVMe-over fabric), and/or non-NVMe Solid State Drives (SSDs). Furthermore, the disclosed systems and methods can be standardized and applied to a range of storage devices and related systems while being agnostic to the vendor.

Drawings

The above-described and other aspects of the present technology will be better understood when the present application is read in light of the following drawings, in which like reference numerals refer to similar or identical elements. Furthermore, the drawings provided herein are for purposes of illustrating certain embodiments only; other embodiments that may not be explicitly shown are not excluded from the scope of the present disclosure.

These and other features and advantages of the present disclosure will be appreciated and understood with reference to the specification, claims and appended drawings, wherein:

FIG. 1 illustrates a system including a computing storage unit supporting maintenance on a storage device according to an embodiment of the present disclosure.

Fig. 2 shows details of the machine of fig. 1, according to an embodiment of the present disclosure.

Fig. 3A illustrates a first example arrangement of computing storage units that may be associated with the storage device of fig. 1, according to an embodiment of the disclosure.

Fig. 3B illustrates a second example arrangement of computing storage units that may be associated with the storage device of fig. 1, according to an embodiment of the disclosure.

Fig. 3C illustrates a third example arrangement of computing storage units that may be associated with the storage device of fig. 1, according to an embodiment of the disclosure.

Fig. 3D illustrates a fourth example arrangement of computing storage units that may be associated with the storage device of fig. 1, according to an embodiment of the disclosure.

FIG. 4 illustrates a computing storage device according to a disclosed example embodiment.

Fig. 5A depicts a download program command that can be used in association with a computing storage device in accordance with an embodiment of the present disclosure.

Fig. 5B illustrates another aspect of a download program command that can be used in association with a computing storage device according to an example embodiment of the present disclosure.

Fig. 6A shows a schematic diagram illustrating ordered multi-segment program transfers associated with the disclosed system, according to an embodiment of the present disclosure.

Fig. 6B shows a schematic diagram illustrating out-of-order multi-segment program transfers associated with the disclosed system, in accordance with an embodiment of the present disclosure.

Fig. 6C shows a schematic diagram illustrating multi-segment program delivery of two separate programs associated with the disclosed system, in accordance with an embodiment of the present disclosure.

Fig. 7 is a diagram illustrating an exemplary operational flow of an exemplary operation associated with the disclosed system in accordance with an exemplary embodiment of the present disclosure.

Fig. 8 shows an example schematic diagram of a system that can be used to practice embodiments of the present disclosure.

Fig. 9 illustrates an example schematic diagram of managing computing entities, according to an example embodiment of the disclosure.

Fig. 10 shows an example schematic diagram of a user device according to an example embodiment of the present disclosure.

While the technology is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described. The figures may not be drawn to scale. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the technology to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present technology as defined by the appended claims.

Detailed Description

The details of one or more embodiments of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, the drawings, and the claims.

Various embodiments of the present disclosure now will be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments are shown. Indeed, this disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. The term "or" is used herein in both the alternative and the connective sense, unless otherwise indicated. The terms "illustrative" and "example" are used as examples without quality level indications. Like numbers refer to like elements throughout. The arrows in each figure depict bi-directional data flow and/or bi-directional data flow capabilities. The terms "path," "pathway," and "route" are used interchangeably herein.

Embodiments of the present disclosure may be implemented in various ways, including as a computer program product comprising an article of manufacture. The computer program product may include a non-transitory computer-readable storage medium storing an application, a program component, a script, a source code, a program code, an object code, a byte code, a compiled code, an interpreted code, a machine code, an executable instruction, etc. (also referred to herein as executable instructions, instructions for execution, a computer program product, a program code, and/or similar terms are used interchangeably herein). Such non-transitory computer-readable storage media include all computer-readable media (including volatile and nonvolatile media).

In one embodiment, the non-volatile computer-readable storage medium may include a floppy disk, a flexible disk, a hard disk, a solid state storage device (SSS) (e.g., a Solid State Drive (SSD)), a Solid State Card (SSC), a Solid State Module (SSM), an enterprise flash drive, a magnetic tape, or any other non-transitory magnetic medium, etc. The non-volatile computer-readable storage medium may also include punch cards, paper tape, optical marking sheets (or any other physical medium having a hole pattern or other optically identifiable marking), compact disc read-only memory (CD-ROM), compact disc rewriteable (CD-RW), digital Versatile Discs (DVD), blu-ray discs (BD), any other non-transitory optical medium, etc. Such non-volatile computer-readable storage media may also include read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory (e.g., serial, NAND, NOR, etc.), multimedia Memory Cards (MMC), secure Digital (SD) memory cards, smart media cards, compact Flash (CF) cards, memory sticks, and the like. In addition, the non-volatile computer-readable storage medium may also include Conductive Bridge Random Access Memory (CBRAM), phase change random access memory (PRAM), ferroelectric random access memory (FeRAM), non-volatile random access memory (NVRAM), magnetoresistive Random Access Memory (MRAM), resistive Random Access Memory (RRAM), silicon-oxide-nitride-oxide-silicon memory (SONOS), floating gate random access memory (FJGRAM), huperzia memory, racetrack memory, and the like.

In one embodiment, the volatile computer-readable storage medium may include Random Access Memory (RAM), dynamic Random Access Memory (DRAM), static Random Access Memory (SRAM), fast page mode dynamic random access memory (FPM DRAM), extended data output dynamic random access memory (EDO DRAM), synchronous Dynamic Random Access Memory (SDRAM), double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), double data rate double-type synchronous dynamic random access memory (DDR 3 SDRAM), rambus Dynamic Random Access Memory (RDRAM), double transistor RAM (TTRAM), thyristor RAM (T-RAM), zero capacitor (Z-RAM), rambus direct memory component (RIMM), dual inline memory component (DIMM), single inline memory component (SIMM), video Random Access Memory (VRAM), cache memory (including various levels), flash memory, register memory, and the like. It will be appreciated that where embodiments are described as using a computer-readable storage medium, other types of computer-readable storage media may be used in place of, or in addition to, the computer-readable storage media described above.

It should be appreciated that various embodiments of the present disclosure may also be implemented as a method, apparatus, system, computing device, computing entity, or the like. As such, embodiments of the present disclosure may take the form of an apparatus, system, computing device, computing entity, or the like that executes instructions stored on a computer-readable storage medium to perform certain steps or operations. Accordingly, embodiments of the present disclosure may also take the form of an entirely hardware embodiment, an entirely computer program product embodiment and/or an embodiment containing a combination of computer program products and hardware performing certain steps or operations.

Embodiments of the present disclosure are described below with reference to block diagrams and flowchart illustrations. Accordingly, it should be understood that each block of the block diagrams and flowchart illustrations may be implemented in the form of computer program products, entirely hardware embodiments, combinations of hardware and computer program products, and/or apparatus, systems, computing devices, computing entities, etc. that perform instructions, operations, steps and similar words (e.g., executable instructions, instructions for execution, program code, etc.) on a computer readable storage medium for execution. For example, retrieval, loading, and execution of code may be performed sequentially, such that one instruction is retrieved, loaded, and executed at a time. In some example embodiments, the retrieving, loading, and/or executing may be performed in parallel such that multiple instructions are retrieved, loaded, and/or executed together. Such embodiments are therefore capable of producing a specially configured machine that performs the steps or operations specified in the block diagrams and flowchart illustrations. Accordingly, the block diagrams and flowchart illustrations support various combinations of embodiments for performing the specified instructions, operations or steps.

In various aspects, computing Storage (CS) can significantly affect the manner in which a storage device, such as non-volatile memory express (NVMe) enabled storage device, functions and operates. By adding the computations available to the CS device, various computing operations can be offloaded from the host to the storage device where the data resides. Because the data is calculated, some models may retrieve the data from the storage medium or network resource into the memory of the host, and then have the CPU run a calculation operation on the data (e.g., an operation to find a count of all zip codes with a trend virus infection, etc.). However, such an approach may become limited because the data has to traverse the fabric (e.g., via a directly attached peripheral component interconnect express (PCIe) bus or network fabric), which may increase latency. In addition, if multiple CS devices are occupied, the overall throughput of the system can be lower for each CS device than when a single CS device is occupied, for example, because the corresponding bus may not be able to take advantage of the overall performance provided by the CS devices.

In various aspects, as noted, the CS has the possibility to enhance storage usage with near data processing. The CS device can include a solid state drive and a corresponding processing element. Such CS devices can provide the capability for devices (e.g., storage devices, hosts, racks, etc.) to perform near data processing based at least in part on CS command processing within the device. In various aspects, such CS command processing may be performed in part or in whole by a host processor (e.g., CPU), a storage device, or the computing device itself, as configuration and applicability can vary. The computing program runs a computing operation on data provided as an input, and is capable of providing a result of the computing operation as an output. These programs may be located in the host CPU as software programs, in the device CPU as software programs, or they may be stored and executed as hardware programs.

In some aspects, programs and/or associated functions for execution within the device may be built differently based on the type of computation. For example, the program and/or associated functions can use bit files for FPGA-based computations, eBPF programs for embedded CPU applications, and so forth. That is, some programs may have a smaller computational size, while other programs (e.g., FPGA bit files) may be relatively large (e.g., hundreds of megabytes).

In various aspects, there may be limitations in the associated operating system and/or device (e.g., NVMe-based storage device) as to how large a program transfer can be performed. However, in some protocols (e.g., NVMe), the associated commands (e.g., NVMe program download commands) may not provide an option for modifying the specified protocol-based restrictions. Typically, large programs (e.g., programs exceeding a threshold size) may not be easily transferred between the host and the CS device based on restrictions imposed by software on the host side (e.g., OS software) or due to restrictions imposed by the CS device (which can be vendor specific). In some cases, the restriction can be enforced by a device-side controller (such as an NVMe-based controller). Such limitations may hamper the ability to deliver large programs, resulting in limited CS adoption.

In view of the foregoing, in various aspects, the present disclosure describes a mechanism for downloading large programs for computing storage devices that addresses these problems in addition to providing additional capabilities as described herein. In one aspect, the disclosed system describes a mechanism for transferring/downloading programs having a size above a predetermined threshold to a CS device. In some aspects, as noted, the download may not be supported by an associated Operating System (OS) device driver; thus, the disclosed system can provide a mechanism to allow transfer regardless of OS and/or driver-based limitations. In other aspects, the disclosed systems can include functionality to break up larger programs into smaller chunks and transfer programs through the chunks. Further, the disclosed system can include a function that specifies each block by an offset from the start of the program and the number of bytes transferred in the chunk. In various aspects, the disclosed systems and methods can include functionality that allows a compute namespace to support loading a program as multiple separate chunks (or segments). The disclosed system is also capable of assembling chunks in a device based on offset and/or downloaded chunk bytes.

In some aspects, the disclosed systems can enable program transfer/download where the transfer order need not be sequential (e.g., the disclosed systems can include support for out-of-order segment transfer). Further, the disclosed system can include functionality to: if certain characteristics are not supported (e.g., if the type of program being downloaded is not supported, if the total size of the entire program and/or the program index (slot) is not supported, and/or combinations thereof, etc.), the CS device can fail the transfer after the first chunk is received. In various aspects, the disclosed system can include a software program that runs on a host computer and facilitates the breakdown and transfer of large programs to devices. In addition, the disclosed system includes one or more Application Programming Interfaces (APIs) for interfacing with the downloading and use of these large programs.

The disclosed system can enable downloading of programs to CS-capable storage devices (e.g., NVMe-based storage devices). In addition, the disclosed system is capable of providing the ability to support different program types by program size, thereby expanding the supported computing and algorithm types.

In other aspects, as noted, the computing storage device enables running a computing near storage, saving transfer latency. Furthermore, in contrast to source data, which may be very large in some use cases, only the result needs to be replicated. Computing Storage (CS) has a number of benefits that can be derived based on use cases. The CS device derives its calculations through an embedded CPU, dedicated ASIC, FPGA, GPU, etc. Some calculations may be done more efficiently with CS devices, while other calculations may be better with host CPUs.

Furthermore, the CS-enabled device runs a program containing a specific algorithm within the device. These programs may be pre-built at the time of manufacture or may be downloaded later by the host user. These programs can be executed by a host user for data and can provide program-based results. In some aspects, the disclosed systems can include simple and/or complex programs that run in the device. Further, the downloadable program can be loaded into a computing namespace to execute on one or more Computing Engines (CEs) associated with the device.

Fig. 1 illustrates a system including a computing storage unit that supports various functions (e.g., transfer of downloadable programs) on a storage device, according to an embodiment of the present disclosure. In fig. 1, a machine 105 (which may also be referred to as a host or system) may include a processor 110, a memory 115, and a storage device 120. The processor 110 may be any of various types of processors (for ease of illustration, the processor 110 is shown as being external to the machine along with other components discussed below: embodiments of the present disclosure may include these components within the machine). Although FIG. 1 shows a single processor 110, machine 105 may include any number of processors, where each processor may be a single-core or multi-core processor, each processor may implement a Reduced Instruction Set Computer (RISC) architecture or a Complex Instruction Set Computer (CISC) architecture (among other possibilities), and may be mixed in any desired combination.

The processor 110 may be coupled to a memory 115. The memory 115 may be any of various types of memory such as flash memory, dynamic Random Access Memory (DRAM), static Random Access Memory (SRAM), persistent random access memory, ferroelectric random access memory (FeRAM), or non-volatile random access memory (NVRAM), such as Magnetoresistive Random Access Memory (MRAM), etc. The memory 115 may also be any desired combination of different memory types and may be managed by the memory controller 125. The memory 115 may be used to store data that may be referred to as "short term": that is, it is not expected to store data for an extended period of time. Examples of short-term data may include temporary files, data used locally by an application (which may have been copied from other storage locations), and so forth.

The processor 110 and memory 115 may also support an operating system under which various applications may run. These applications may issue requests (also referred to as commands) to read data from memory 115 or storage device 120 or to write data to memory 115 or storage device 120. The storage device 120 may be accessed using a device driver 130.

The storage device 120 may be associated with a computing storage unit 135. As discussed below with reference to fig. 3A-3D, the computing storage unit 135 may be part of the storage device 120 or it may be separate from the storage device 120. The phrase "associated with … …" is intended to encompass storage devices that include computing storage units and storage devices that are paired with computing storage units that are not part of the storage device itself. In other words, a storage device and a computing storage unit are "paired" when they are physically separate devices but connected in such a way that they can communicate with each other.

Furthermore, the connection between the storage device 120 and the paired computing storage unit 135 may enable the two devices to communicate, but may not enable one (or both) devices to work with different partners: that is, storage device 120 may not be able to communicate with another computing storage unit and/or computing storage unit 135 may not be able to communicate with another storage device. For example, the storage device 120 and paired computing storage unit 135 may be connected serially (in either order) to a structure such as a bus, such that the computing storage unit 135 can access information from the storage device 120 in a manner that another computing storage unit may not be capable of.

The processor 110 and the storage device 120 may be coupled to a structure. The structure may be any structure along which information may be transferred. The fabric may include a fabric that may be internal to machine 105 and may use interfaces such as peripheral component interconnect express (PCIe), serial AT attachment (SATA), small Computer System Interface (SCSI), etc. The architecture may also include an architecture that may be external to machine 105 and that may use interfaces such as ethernet, infiniband, or fibre channel, etc. In addition, the fabric may support one or more protocols, such as non-volatile memory (NVM) expression (NVMe), structural NVMe (NVMe-orf), or Simple Service Discovery Protocol (SSDP), among others. Accordingly, an architecture may be considered to encompass both internal and external network connections, wherein commands may be sent directly or indirectly to storage device 120 (and more specifically, a computing storage unit associated with storage device 120) through the internal and external network connections.

Although FIG. 1 shows one storage device 120 and one computing storage unit 135, any number of storage devices(s) and/or any number of computing storage units(s) may be present in machine 105.

Although fig. 1 uses the generic term "storage device," embodiments of the present disclosure may include any storage device format that may benefit from the use of computing storage units, examples of which may include hard disk drives and Solid State Drives (SSDs). Any reference below to an "SSD" should be understood to include such other embodiments of the present disclosure. In addition, while the discussion above (and below) focuses on storage device 120 associated with a computing storage unit, embodiments of the present disclosure may extend to devices other than storage devices that may include or be associated with a computing storage unit. Any reference above (and below) to a "storage device" may be understood to also encompass other devices that may be associated with a computing storage unit.

The host may be implemented with any type of device that may be configured as a host, including, for example, a server (such as a computing server, a storage node, a web server, etc.), a computer (such as a workstation, a personal computer, a tablet, a smart phone, etc.), or any combination thereof. The apparatus may be implemented with any type of device, wherein the apparatus may be configured as a device including, for example, an accelerator device, a storage device, a network device, a memory expansion and/or buffering device, a Graphics Processing Unit (GPU), a Neural Processing Unit (NPU), a Tensor Processing Unit (TPU), etc., or any combination thereof.

Any communication between devices (e.g., hosts, CS devices, and/or any intermediate devices) can occur through an interface, which can be implemented with any type oF wired and/or wireless communication medium, interface, protocol, etc., including PCIe, NVMe, ethernet, NVMe-orf, computing fast link (CXL) and/or coherence protocol (such as cxl.mem, cxl.cache, cxl.io, etc.), gen-Z, open coherence accelerator processor interface (OpenCAPI), cache coherence interconnect for accelerators (CCIX), advanced extensible interface (AXI), etc., or any combination thereof, transmission control protocol/internet protocol (TCP/IP), fiber channel, infiniband, serial AT attachment (SATA), small Computer System Interface (SCSI), serial Attached SCSI (SAS), iWARP, any generation wireless network (including 2G, 3G, 5G, etc.), any generation Near Field Communication (NFC), etc., or any combination thereof. In some embodiments, the communication interface may comprise a communication structure, wherein the communication structure comprises one or more links, buses, switches, hubs, nodes, routers, switches, repeaters (repeaters), and the like. In some embodiments, the systems shown herein may include one or more additional devices having one or more additional communication interfaces.

In embodiments where the device is implemented as a storage device, the storage device may include any type of non-volatile storage medium based on, for example, solid state media (e.g., solid State Drive (SSD)), magnetic media (e.g., hard Disk Drive (HDD)), optical media, and the like, or any combination thereof. For example, in some embodiments, the storage device may be implemented as a non-AND (NAND) flash based SSD, a persistent memory such as a cross-grid non-volatile memory, a memory with a change in bulk resistance, a Phase Change Memory (PCM), or the like, or any combination thereof. Any such storage device may be implemented in any form factor (such as 3.5 inches, 2.5 inches, 1.8 inches, m.2, enterprise and data center SSD form factors (EDSFF), NF1, etc.) using any connector configuration (such as SATA, SCSI, SAS, U.2, m.2, etc.). Any such storage devices may be implemented in whole or in part with and/or used in conjunction with a server chassis, a server rack, a data room, a data center, an edge data center, a mobile edge data center, and/or any combination thereof.

Any of the functions described herein, including any host functions, device functions, etc., may be implemented in hardware, software, firmware, or any combination thereof, including, for example, hardware and/or software combinational logic, sequential logic, timers, counters, registers, state machines, volatile memory (such as Dynamic Random Access Memory (DRAM) and/or Static Random Access Memory (SRAM)), non-volatile memory (including flash memory), persistent memory (such as cross-grid non-volatile memory), memory with changes in body resistance, phase Change Memory (PCM), etc., and/or any combination thereof, complex Programmable Logic Devices (CPLDs), field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), CPUs (including Complex Instruction Set Computer (CISC) processors (such as x86 processors) and/or Reduced Instruction Set Computer (RISC) processors (such as RISC-V and/or ARM processors)), graphics Processing Units (GPUs), neural Processing Units (NPUs), tensor the like, executing instructions stored in any type of memory.

FIG. 2 illustrates details of machine 105 of FIG. 1 according to embodiments of the present disclosure. In fig. 2, in general, machine 105 includes one or more processors 110 (which may include a memory controller 125 and a clock 205) that may be used to coordinate the operation of the components of the machine. The processor 110 may also be coupled to a memory 115, as an example, the memory 115 may include Random Access Memory (RAM), read Only Memory (ROM), or other state preserving medium. The processor 110 may also be coupled to the storage device 120 and the network connector 210, wherein the network connector 210 may be, for example, an ethernet connector or a wireless connector. The processor 110 may also be connected to a bus 215, and a user interface 220 and input/output (I/O) interface ports may be attached to the bus 215, wherein the I/O engine 225, as well as other components, may be used to manage the input/output (I/O) interface ports.

Fig. 3A-3D illustrate various arrangements of computing storage units 135 (which may also be referred to as "computing devices" or "devices") of fig. 1 that may be associated with the storage device 120 of fig. 1, according to embodiments of the present disclosure. In FIG. 3A, storage device 305 and computing device 310-1 are shown. Storage device 305 may include controller 315 and storage 320-1 and may be reachable across a queue pair: queue pair 325 may be used for both management of storage device 305 and controlling I/O of storage device 305.

Computing device 310-1 may be paired with storage device 305. Computing device 310-1 may include any number (one or more) of processors 330 that may provide one or more services 335-1 and 335-2. For greater clarity, each processor 330 may provide any number (one or more) of services 335-1 and 335-2 (although embodiments of the present disclosure may include computing device 310-1, computing device 310-1 includes exactly two services 335-1 and 335-2). Each processor 330 may be a single-core processor or a multi-core processor. Computing device 310-1 may be reachable across queue pair 340, where queue pair 340 may be used to manage computing device 310-1 and/or control I/O of computing device 310-1.

Processor(s) 330 may be considered as near storage processing: i.e., processing closer to storage device 305 than processor 110 of fig. 1. Because the processor(s) 330 are closer to the storage device 305, the processor(s) 330 may be able to execute commands on data stored in the storage device 305 faster than the processor 110 of fig. 1 executing such commands. Although not shown in fig. 3A, the processor(s) 330 may have associated memory (see, e.g., fig. 4 and related description) that may be used to execute commands locally to data stored in the storage device 305. The associated memory may include local memory similar to memory 115 of fig. 1, on-chip memory (which may be faster than memory such as memory 115, but may be more expensive to produce), or both.

Although fig. 3A shows storage device 305 and computing device 310-1 as individually reachable across fabric 345, embodiments of the disclosure may also include storage device 305 and computing device 310-1 connected in series (as shown in fig. 1). That is, commands directed to both storage device 305 and computing device 310-1 may be received at the same physical connection to fabric 345 and may reach one device to the other. For example, if computing device 310-1 is located between storage device 305 and fabric 345, computing device 310-1 may receive commands directed to both computing device 310-1 and storage device 305: computing device 310-1 may process commands directed to computing device 310-1 and may pass commands directed to storage device 305. Similarly, if storage device 305 is located between computing device 310-1 and fabric 345, storage device 305 may receive commands directed to both storage device 305 and computing device 310-1: storage device 305 may process commands directed to storage device 305 and may communicate commands directed to computing device 310-1.

Services 335-1 and 335-2 may provide a number of different functions (e.g., CSF) that may be performed on data stored in storage device 305. For example, services 335-1 and 335-2 may provide predefined functions, such as encryption, decryption, compression and/or decompression of data, erasure coding, and/or application of regular expressions. Or services 335-1 and 335-2 may provide more general functionality such as data search and/or SQL functionality. Services 335-1 and 335-2 may also support running specific application code. That is, applications using services 335-1 and 335-2 may provide custom code to be executed using data on storage device 305. Services 335-1 and 335-2 may also be any combination of such functions. Table 1 lists some examples of services that may be provided by the processor(s) 330.

Table 1: service type

The processor(s) 330 (and indeed the computing device 310-1) may be implemented in any desired manner. Example embodiments may include a local processor such as a Central Processing Unit (CPU) or some other processor, a Graphics Processing Unit (GPU), a General Purpose GPU (GPGPU), a Data Processing Unit (DPU), a Tensor Processing Unit (TPU), or a Neural Processing Unit (NPU), among other possibilities. Processor(s) 330 may also be implemented using a Field Programmable Gate Array (FPGA) or Application Specific Integrated Circuit (ASIC), among other possibilities. If computing device 310-1 includes more than one processor 330, each processor may be implemented as described above. For example, computing device 310-1 may have each of a CPU, TPU, and FPGA, or computing device 310-1 may have two FPGAs, or computing device 310-1 may have two CPUs, one ASIC, and so on.

Depending on the desired interpretation, computing device 310-1 or processor(s) 330 may be considered a computing storage unit.

Although fig. 3A shows storage device 305 and computing device 310-1 as separate devices, they may be combined in fig. 3B. Accordingly, computing device 310-2 may include a controller 315, a storage 320-1, and a processor(s) 330 providing services 335-1 and 335-2. As with storage device 305 and computing device 310-1 of FIG. 3A, management and I/O commands may be received via queue pair 340. Even though computing device 310-2 is shown as including both storage and processor(s) 330, fig. 3B may still be considered to include a storage device associated with a computing storage unit.

In yet another variation shown in FIG. 3C, computing device 310-3 is shown. Computing device 310-3 may include a controller 315 and storage 320-1, and processor(s) 330 providing services 335-1 and 335-2. But even though computing device 310-3 may be considered to be a single component including controller 315, storage 320-1, and processor(s) 330 (and also to be considered storage devices associated with a computing storage unit), unlike the embodiment shown in fig. 3B, controller 315 and processor(s) 330 may each include their own queue pairs 325 and 340 (again, which may be used for management and/or I/O). By including queue pair 325, controller 315 can provide transparent access to storage device 320-1 (rather than requiring all communication to occur through processor(s) 330).

In addition, the processor(s) 330 may have proxy storage access 350 to storage 320-1. Thus, instead of routing access requests through controller 315, processor(s) 330 may be able to directly access data from storage 320-1.

In fig. 3C, both the controller 315 and the proxy memory access 350 are shown with dashed lines to indicate that they are optional elements and may be omitted depending on the implementation.

Finally, fig. 3D shows a further embodiment. In FIG. 3D, computing device 310-4 is shown, which may include a controller 315 and proxy storage access 350 similar to FIG. 3C. Additionally, computing device 310-4 may include an array of one or more storage 320-1 through 320-4. Although fig. 3D shows four storage elements, embodiments of the present disclosure may include any number (one or more) of storage elements. In addition, the individual storage elements may be other storage devices, such as those shown in fig. 3A-3D.

Because computing device 310-4 may include more than one storage element 320-1 through 320-4, computing device 310-4 may include an array controller 355. Array controller 355 may manage how data is stored on storage elements 320-1 through 320-4 and how data is retrieved from storage elements 320-1 through 320-4. For example, if the storage elements 320-1 through 320-4 are implemented as a level of Redundant Array of Independent Disks (RAID), then the array controller 355 may be a RAID controller. If some form of erasure code is used to implement storage elements 320-1 through 320-4, array controller 355 may be an erasure code controller.

FIG. 4 illustrates a schematic diagram 400 of a computing storage device according to a disclosed example embodiment. In particular, the CS device 402 can include an NVMe controller 404, one or more computing namespaces 406, one or more subsystem local memory namespaces (device memory) 408, one or more storage namespaces 410, and a communication port 411 (to send and receive information with any suitable device using any suitable protocol, such as NVMe). In some aspects, the compute namespace 406 may be used as an abstraction that represents one or more compute engines running a program. Such a computing namespace may contain additional resources such as actual computing modules designated as Computing Engines (CEs) and programs. The compute engine resources may be comprised of one or more of CPU, ASIC, FPGA, GPU, TPU, etc. For example, the compute namespace 406 may include a CPU core and an FPGA. The utilization of each of these resources need not be exclusive. The CPU core may also be reused/mapped to another computing namespace and similarly reused/mapped to an ASIC or the like. The namespace abstraction can help hide computing details about the resource (i.e., the host may not see the CPU or FPGA directly).

The computing program can run on CEs (such as those shown in computing namespace 406) and can act on data available through device local memory or directly streamed to them, and can conform to one or more computing storage standards of NVMe devices. Any suitable usage model can be used to manage and use CS features available in the CS device. The computing resource can be customized as a namespace where it can be mapped directly into virtual machines in the virtual environment as desired.

As noted, the disclosed system features loading a downloadable program to a CS device. As discussed further in connection with fig. 5, the loader command can be defined as an NVMe command for loading a program from a host into a device. Such programs are downloaded into a computing namespace that is capable of supporting the program (e.g., from a resource perspective). In some aspects, support can be based on program types in a particular compute namespace (e.g., an FPGA kernel runs only on an FPGA and has FPGA program types). Similarly, eBPF programs are of the eBPF program type and run only on a CPU with eBPF capabilities. Multiple program types may be supported by the NVMe device and depend on the computing namespaces supporting the program types. The host user can determine what types of program types the device supports in advance or specifically through information provided by the device by the log page or manufacturer.

In some aspects, an NVMe device may require an NVMe driver in any given OS to access the NVMe device (as well as load and run downloaded programs). For some operating systems (e.g., linuxOS), the NVMe driver limits the maximum transmissible size to about 2 megabytes due to the specific implementation requirements of the data transfer and host memory buffers. This may be limiting because FPGA programs may run to a size of a few megabytes. In some cases, loader commands may run on management queues associated with the host and/or storage devices, which may further limit data transfer. In some aspects, the load command can include at least a portion of a program and/or a protocol-specific (e.g., NVMe-based) command.

Thus, changes may be required to support large downloadable programs. The large program may be divided into smaller chunks and transferred, where the chunk size transferred is set to a value lower than that supported by the OS device driver. By adding offset and chunk size fields of the transfer bytes to each transfer, a large downloadable program can be loaded into the compute namespace. The offset field may specify an absolute offset in bytes from the start of the full program being transferred, while the chunk size field specifies the length of the current transfer at the specified offset. The offset and chunk size fields control the transfer of the entire program. Large programs may be broken up into multiple chunks and transferred in separate commands. Since this transfer occurs on the management queue, the maximum number of outstanding IOs should be limited to be below the queue depth supported by the management queue.

The following figures and description describe the functionality associated with loader commands. Fig. 5A shows a schematic diagram 500 describing one aspect of a download program command, according to an example embodiment of the present disclosure. In particular, bits 502 used are from any suitable range, such as from bits 31:00. further, the description 504 of the Load Offset (LOFF) field can specify the number of bytes from the starting offset of the downloadable program being downloaded to the compute namespace. The offset field is used in conjunction with the transfer bytes in the NOLB field to assemble the downloadable program in the compute namespace. This field can be set to 0h for the start of the downloadable program. This field can also be set to 0h for downloadable programs that are small and do not require segmentation. The single segment download should set the LOFF and NOLB fields to 0h and can be reserved. This field may meet the granularity and alignment requirements specified by the namespace. This field can be valid for loader operations and reserved for unload operations. In some aspects, the LOFF can include an integer multiple of double bytes (dword).

Fig. 5B illustrates another diagram 510 of an aspect of a download program command according to an example embodiment of the present disclosure. In particular, bit 512 for the download program command comes from 31:00. further, the description 514 of the load byte Number (NOLB) field specifies the number of bytes to be transferred for a given LOFF. If the program being transferred contains only one segment, this field should be set to 0h. This field may need to meet the granularity and alignment requirements specified by the namespace. This field may be valid only for loader operations and reserved for unload operations.

Other fields that may be used for the load command can include: a computed namespace identifier (NSID) to which the program is being downloaded; program Type (PTYPE) for specifying the type of program being downloaded to the computing namespace; program Index (PIND) or slot that the program should be loaded; the total number of bytes contained in the whole program being downloaded (NUMB); a Data Pointer (DPTR) specifying the chunk or whole being transferred; a select field (SEL) specifying a loader option at a specified program index; and a Program Unique Identifier (PUID) providing a unique identifier describing the function of the program. In some aspects, the DPTR data pointer can include information about where the program and/or associated data to be transferred resides (e.g., in host memory), and the information can be formatted in accordance with a protocol-based method (e.g., an NVMe-based method). Further, the DPTR can indicate the location (e.g., in a continuous manner) of the next chunk/portion being transmitted with each subsequent command.

In some embodiments, as noted, for multi-segment downloads, a large program may be broken up into multiple segments or chunks and sent as separate commands. The DPTR field of each command contains a piece of program assembled using the LOFF and NOLB fields to find its location. Here, the LOFF field holds a unique value in each command (segment). In other aspects, NSID, PTYPE, PIND and NUMB fields may be filled in each segment for the entire transfer. That is, the field may be filled with the same value in each loader command in the multi-segment transfer. These fields help identify each program when it is received out of order, and when multiple programs are being transmitted simultaneously. In addition, these fields can provide enough information to pass it on to receive the next segment or to fail the command when the segment arrives. Failure may be due to invalid compute namespaces, unsupported program types, invalid program indexes, or programs being too large. The following examples demonstrate various loader commands that are in progress. Using the LOFF and NOLB fields, a multi-segment transmission can be assembled by the receiving device (NVMe controller) regardless of the order and number of programs being transmitted.

Fig. 6A shows a schematic diagram illustrating ordered multi-segment program transfers associated with the disclosed system, according to an example embodiment of the present disclosure. In diagram 600, we see that there are three segments (segment 1 602, segment 2604, and segment 3 606). In this example, three segments are received in order (segment 1 602, followed by segment 2604, followed by segment 3 606). Thus, the disclosed system includes LOFF and NOLB fields that match the order of the transferred chunks. Thus, the LOFF field of section 1 602 is 0, then the LOFF field of section 2604 is 1Mb, and the LOFF field of section 3 606 is 2Mb.

Fig. 6B shows a schematic diagram illustrating unordered multi-segment program transfers associated with the disclosed system according to an example embodiment of the disclosure. In the schematic 610, we see that there are again illustrative three segments but unordered (segment 2 612, segment 3 614, and segment 1 616). In this case, three segments are received out of order (segment 2 612, followed by segment 3 614, followed by segment 1 616). Thus, the disclosed system includes LOFF and NOLB fields that match the order of the transferred chunks. The LOFF field of segment 1 616 is 0MB, then the LOFF field of segment 2 612 is 1MB, and the LOFF field of segment 3 614 is 2MB, and the disclosed system is capable of reconstructing a multi-segment program based on the LOFF field.

Fig. 6C shows a schematic diagram illustrating multi-segment program delivery of two separate programs associated with the disclosed system, according to an example embodiment of the present disclosure. In particular, schematic 620 shows a first program comprising an unordered multi-segment program and a second program comprising an ordered multi-segment program. As shown, the unordered multi-segment procedure includes segments 622, 624, and 626 similar to schematic 610 of those 6B discussed above. Further, the second program is an ordered multi-segment program that includes segments 628 and 630 in order.

As noted, using the LOFF and NOLB fields, a multi-segment transmission can be assembled by the receiving device (NVMe controller) regardless of the order and number of programs being transmitted. It should be noted that for the entire program to be transmitted through multiple NVMe commands, the unique LOFF values must not overlap at any time. If the LOFF values overlap, the transfer may fail. The multi-chunk program download may alternatively be tracked by representing chunk positions with additional unique bits, where the bits provide the first, middle, and last positions of the chunks for each command. For single chunk program downloads, none of these bits may be set to represent smaller programs.

Thus, the disclosed systems and methods describe mechanisms that enable large programs to be downloaded by breaking them down into smaller chunks, as devices and operating systems may not support large program sizes. Providing such support enables the computing energy to perform more tasks in the future and support different computing engines.

The disclosed system can include a mechanism to transfer large programs into the device, and furthermore, programs need not be supported by a given OS device driver. In addition, the disclosed system can include a mechanism to break up larger programs into smaller chunks and transfer them in chunks. The disclosed system can include a mechanism to specify each chunk by an offset from the start of the program and the number of bytes being transferred in the chunk. Further, the disclosed system can include a compute namespace, wherein the compute namespace supports loading programs as multiple separate chunks (or segments). Additionally, the disclosed system can include a mechanism to assemble chunks in the device by offsetting and downloading the chunk bytes. The disclosed system can include a mechanism in which the order of transfer need not be sequential (e.g., the device supports out-of-order segment transfer). In addition, the disclosed system can include a mechanism in which a device may fail to transmit in the received first chunk if certain fields, such as the type of program being downloaded, the total size of the entire program, the program index (slot), may not be supported.

Fig. 7 shows a representative flow diagram 700 illustrating some example operations associated with the disclosed systems, in accordance with an embodiment of the present disclosure. At block 702, the disclosed system can determine a program to be transferred from a host to a computing storage device. The program can be determined via a user at the user application or via a host process that acts in an autonomous or semi-autonomous manner. The program can include any suitable code that can be executed at a device, such as a CS device. The code can include operations to perform computations associated with data residing at least partially on a host, CS device, or third device (e.g., user device). At block 704, the disclosed system can determine that the size of the program exceeds a predetermined threshold. The determination may be made using any suitable technique running on the host side (e.g., via a management application) or on the device side (e.g., on a processor associated with the CS device, or a second device associated with a housing that houses the CS device, or any other suitable device). Determining that the size of the program exceeds a predetermined threshold can be based on a comparison of the size of the program to a threshold specified by a protocol (e.g., NVMe protocol). In other aspects, the threshold can be a function of user input, network conditions, processing capabilities of the CS device, storage capabilities of the CS device, type of program, type of data, security level associated with the data or program, or both, combinations thereof, and the like. At block 706, the disclosed system can transfer at least a portion of the program to a computing storage device based on the size. As noted, the transfer of the portion can occur in successive chunks, as described herein in various ways. Chunks can arrive at the CS device in order or unordered, and the device can reconstruct the program as disclosed in connection with the above figures using various metadata (e.g., pointers as herein).

Fig. 8 shows an example schematic diagram of a system that can be used to practice embodiments of the present disclosure. As shown in fig. 8, this particular embodiment may include one or more management computing entities 800, one or more networks 805, and one or more user devices 810 (e.g., host devices, storage devices, additional devices, etc.). In various embodiments, the management computing entity 800 can be configured to perform operations associated with the disclosed systems and associated embodiments described throughout this disclosure, including but not limited to those described in connection with the example operations in fig. 7. Further, the management computing entity 800 can reside in any suitable portion of the disclosed system (e.g., such as a computing storage controller, a computing storage device manager, a host application, a remote host, another device, a combination thereof, etc.). Each of these components, entities, devices, systems, and similar terms, as used interchangeably herein, may communicate directly or indirectly with one another, for example, through the same or different wired or wireless networks. In addition, while fig. 8 shows the various system entities as separate, stand-alone entities, the various embodiments are not limited to this particular architecture. As noted, the communication may be performed using any suitable protocol as further described herein.

Fig. 9 illustrates an example schematic diagram 900 of managing computing entities, according to an example embodiment of the disclosure. As noted, the management computing entity can be configured to perform operations associated with the disclosed systems and associated embodiments described throughout this disclosure. Furthermore, the management computing entity 900 can reside in any suitable portion of the disclosed system. In particular, the content component can be used to determine a signal indicative of data (e.g., video, audio, text, data, combinations thereof, etc.) to be transmitted through the systems described herein. In another embodiment, the determination of the signal for transmission may be based on, for example, user input to the device, a predetermined schedule of data transmissions on a network associated with the system, a change in network conditions, and so forth. In one embodiment, the signal may include data that may be encapsulated in data frames and/or packets configured to be transmitted from a device on the network to one or more devices.

In another embodiment, the processing element 905 may be used to determine various parameters associated with data transmitted over a network associated with the disclosed system. As another example. The processing element 905 may be used to perform various acceleration operations, such as at least partial offloading functions, data pre-or post-processing, and/or combinations thereof, and the like.

In one embodiment, a transmitting component (not shown) may be used to transmit signals from one device to another device on a network. For example, a transmitting component may be used to prepare a transmitter (e.g., transmitter 1004 of fig. 10 below) for transmission of a signal over a network. For example, the sending component may queue the data in one or more buffers, may confirm that the sending device and associated transmitter are functional and have sufficient power to transmit signals over the network, may adjust one or more parameters associated with the transmission of the data (e.g., modulation type, signal amplification, signal power level, noise suppression, combinations thereof, etc.).

In general, the terms computing entity, computer, entity, device, system, and/or the like as used interchangeably herein may refer to, for example, one or more computers, computing entities, desktop computers, mobile phones, tablets, cell phones, laptops, distributed systems, gaming consoles (e.g., xbox, gaming stations, wii), watches, glasses, ibeacons, proximity beacons, key fobs, radio Frequency Identification (RFID) tags, headsets, scanners, televisions, dongles, cameras, bracelets, wearable items/devices, kiosks, input terminals, servers or server networks, blades, gateways, switches, processing devices, processing entities, set-top boxes, repeaters, routers, network access points, base stations, and the like, and/or any combination of devices or entities suitable for performing the functions, operations, and/or processes described herein. Such functions, operations, and/or procedures may include, for example, transmitting, receiving, operating, processing, displaying, storing, determining, creating/generating, monitoring, evaluating, comparing, and/or like terms as used interchangeably herein. In one embodiment, these functions, operations, and/or processes can be performed on data, content, information, and/or similar terms as used interchangeably herein.

As indicated, in one embodiment, the managing computing entity 900 may also include one or more communication interfaces 920 for communicating with various computing entities, such as by conveying data, content, information, and/or the like, which can be sent, received, manipulated, processed, displayed, stored, etc., as similarly used interchangeably herein. For example, the managing computing entity 900 may communicate with the user device 810 and/or various other computing entities.

As shown in fig. 9, in one embodiment, the management computing entity 900 may include or be in communication with one or more processing elements 905 (also referred to as processors, processing circuitry, and/or similar terms used interchangeably herein), wherein the processing elements 905 communicate with other elements within the management computing entity 900, for example, via a bus. As will be appreciated, the processing element 905 may be implemented in a number of different ways. For example, the processing element 905 may be implemented as one or more Complex Programmable Logic Devices (CPLDs), microprocessors, multi-core processors, co-processing entities, special-purpose instruction set processors (ASIPs), microcontrollers, and/or controllers. Furthermore, the processing element 905 may be implemented as one or more other processing devices or circuits. The term circuitry may refer to an entirely hardware embodiment or a combination of hardware and a computer program product. Thus, the processing element 905 may be implemented as an integrated circuit, application Specific Integrated Circuit (ASIC), field Programmable Gate Array (FPGA), programmable Logic Array (PLA), hardware accelerator, other circuitry, or the like. Thus, as will be appreciated, the processing element 905 may be configured for a particular use or to execute instructions stored in a volatile or non-volatile medium or otherwise accessible to the processing element 905. Thus, whether configured by hardware or a computer program product, or by a combination thereof, the processing element 905, when configured accordingly, may be capable of performing steps or operations in accordance with embodiments of the present disclosure.

In one embodiment, management computing entity 900 may also include or be in communication with non-volatile media (also referred to as non-volatile storage, memory storage, memory circuitry, and/or similar terms used interchangeably herein). In one embodiment, the non-volatile storage or memory may include one or more non-volatile storage or storage media 910 including, but not limited to, hard disk, ROM, PROM, EPROM, EEPROM, flash memory, MMC, SD memory card, memory stick, CBRAM, PRAM, feRAM, NVRAM, MRAM, RRAM, SONOS, FJG RAM, millipede memory, racetrack memory, and the like. As will be appreciated, the non-volatile storage or memory medium may store a database, database instance, database management system, data, application, program component, script, source code, object code, byte code, compiled code, interpreted code, machine code, executable instructions, and the like. The terms database, database instance, database management system, and/or similar terms as used interchangeably herein may refer to a collection of records or data stored in a computer-readable storage medium using one or more database models (such as hierarchical database models, network models, relational models, entity-relationship models, object models, document models, semantic models, graph models, etc.).

In one embodiment, management computing entity 900 may also include or be in communication with volatile media (also referred to as volatile storage, memory storage, memory circuitry, and/or similar terms used interchangeably herein). In one embodiment, the volatile storage or memory may also include one or more volatile storage or storage media 915, including but not limited to RAM、DRAM、SRAM、FPM DRAM、EDO DRAM、SDRAM、DDR SDRAM、DDR2 SDRAM、DDR3 SDRAM、RDRAM、TTRAM、T-RAM、Z-RAM、RIMM、DIMM、SIMM、VRAM、 caches, register memory, and the like. As will be appreciated, volatile storage or memory medium may be used to store at least a portion of a database, database instance, database management system, data, applications, programs, program components, scripts, source code, object code, byte code, compiled code, interpreted code, machine code, executable instructions, and the like that are being executed by, for example, the processing element 905. Thus, databases, database instances, database management systems, data, applications, programs, program components, scripts, source code, object code, byte code, compiled code, interpreted code, machine code, executable instructions, and the like may be used to control certain aspects of the operation of the management computing entity 900 with the aid of the processing elements 905 and the operating system.

As indicated, in one embodiment, the managing computing entity 900 may also include one or more communication interfaces 920 for communicating with various computing entities, such as by conveying data, content, information, and/or the like, which can be sent, received, manipulated, processed, displayed, stored, etc., as similarly used interchangeably herein. Such communication may be performed using a wired data transfer protocol, such as peripheral component interconnect express (PCIe), fiber Distributed Data Interface (FDDI), digital Subscriber Line (DSL), ethernet, asynchronous Transfer Mode (ATM), frame relay, data Over Cable Service Interface Specification (DOCSIS), or any other wired transfer protocol. Similarly, the management computing entity 900 may be configured to communicate via a wireless external communication network using any of a variety of protocols, such as General Packet Radio Service (GPRS), universal Mobile Telecommunications System (UMTS), code division multiple access 2000 (CDMA 2000), CDMA 2000X (1 xRTT), wideband Code Division Multiple Access (WCDMA), time division synchronous code division multiple access (TD-SCDMA), long Term Evolution (LTE), evolved universal terrestrial radio access network (E-UTRAN), evolved data optimized (EVDO), high Speed Packet Access (HSPA), high Speed Downlink Packet Access (HSDPA), IEEE 802.11 (Wi-Fi), wi-Fi direct, 802.16 (WiMAX), ultra Wideband (UWB), infrared (IR) protocols, near Field Communication (NFC) protocols, zigBee, bluetooth protocols, 5G protocols, wireless Universal Serial Bus (USB), and/or any other wireless protocol.

Although not shown, the management computing entity 900 can include or communicate with one or more input elements, such as keyboard input, mouse input, touch screen/display input, motion input, movement input, audio input, pointing device input, joystick input, keypad input, and the like. The management computing entity 900 may also include or be in communication with one or more output elements (not shown), such as audio output, video output, screen/display output, motion output, movement output, and the like.

As will be appreciated, one or more of the components of the managing computing entity 900 may be located remotely from the components of other managing computing entities 900, such as in a distributed system. Further, one or more components may be combined and additional components performing the functions described herein may be included in the management computing entity 900. Thus, the management computing entity 900 can be adapted to accommodate various needs and situations. As will be appreciated, these architectures and descriptions are provided for exemplary purposes only and are not limited to the various embodiments.

The user may be an individual, a household, a company, an organization, an entity, a department within an organization, a representative of an organization and/or individual, etc. In one example, the user may be an employee, resident, customer, or the like. For example, a user may operate user device 810, where user device 810 includes one or more components that are functionally similar to the components of management computing entity 900.

In various aspects, as shown and described herein in connection with fig. 8 and 9, a processing component, a transmitting component, and/or a receiving component (not shown) may be configured to operate one or more aspects of the functionality of management computing entity 900, which may include managing aspects of the functionality of computing entity 900. In particular, the processing component, the transmitting component, and/or the receiving component can be configured to communicate with one or more processing elements 905, memory 910, volatile memory 915, and can include a communication interface 920 (e.g., to facilitate communication between devices).

Fig. 10 shows an example schematic diagram of a user device according to an example embodiment of the present disclosure. Fig. 10 provides an illustrative diagram representing a user device 1010 (e.g., host device, storage device, peripheral device, etc.) that can be used in connection with embodiments of the present disclosure. In general, the terms device, system, computing entity, and/or the like, as used interchangeably herein, may refer to, for example, one or more computers, computing entities, desktops, mobile phones, tablets, cellphones, laptops, distributed systems, gaming consoles (e.g., xbox, gaming stations, wii), watches, glasses, key fob, radio Frequency Identification (RFID) tags, headphones, scanners, cameras, bracelets, kiosks, input terminals, servers or server networks, blades, gateways, switches, processing devices, processing entities, set top boxes, relays, routers, network access points, base stations, and the like, and/or any combination of devices or entities suitable for performing the functions, operations, and/or processes described herein. The user device 1010 is capable of being operated by parties. As shown in fig. 10, the user device 1010 can include an antenna 1012, a transmitter 1004 (e.g., radio), a receiver 1006 (e.g., radio), and a processing element 1008 (e.g., CPLD, FPGA, microprocessor, multi-core processor, co-processing entity, ASIP, microcontroller, and/or controller), wherein the processing element 1008 provides signals to and receives signals from the transmitter 1004 and receiver 1006, respectively.

The signals provided to and received from the transmitter 1004 and receiver 1006, respectively, may include signaling information in accordance with the air interface standard of the applicable wireless system. In this regard, the user device 1010 may be capable of operating with one or more air interface standards, communication protocols, modulation types, and access types. More specifically, the user device 1010 may operate in accordance with any of a number of wireless communication standards and protocols, such as those described above with respect to the management computing entity 900 of fig. 9. In particular embodiments, user device 1010 may operate in accordance with a number of wireless communication standards and protocols, such as the disclosed IoT DOCSIS protocol, UMTS, CDMA2000, 1xRTT, WCDMA, TD-SCDMA, LTE, E-UTRAN, EVDO, HSPA, HSDPA, 5G, wi-Fi, wi-Fi direct, wiMAX, UWB, IR, NFC, bluetooth, USB, and the like. Similarly, the user device 1010 may operate in accordance with a number of wired communication standards and protocols, such as those described above with respect to the management computing entity 900, via the network interface 1020.

Via these communication standards and protocols, the user equipment 1010 is able to communicate with various other entities using concepts such as Unstructured Supplementary Service Data (USSD), short Message Service (SMS), multimedia Message Service (MMS), dual tone multi-frequency signaling (DTMF), and/or subscriber identity component dialer (SIM dialer). The user device 1010 is also capable of downloading changes, additional components (add-ons) and updates to, for example, its firmware, software (e.g., including executable instructions, applications, program components) and operating system.

According to one embodiment, the user device 1010 may include location determining aspects, devices, components, functions, and/or similar terms that are used interchangeably herein. The location determination aspect may be used to inform a model used by the managing computing entity and one or more of the models and/or machine learning techniques described herein. For example, the user device 1010 may include an outdoor positioning aspect such as a location component adapted to obtain, for example, latitude, longitude, altitude, geocode, route, direction, forward, speed, universal Time (UTC), date, and/or various other information/data. In one embodiment, the location component can acquire data, sometimes referred to as ephemeris data, by identifying the number of satellites in view and the relative positions of those satellites. The satellites may be a variety of different satellites including Low Earth Orbit (LEO) satellite systems, department of defense (DOD) satellite systems, european union galileo positioning systems, chinese compass navigation systems, indian regional navigation satellite systems, etc. Alternatively, the location information can be determined by triangulating the location of the user device 1010 in conjunction with various other systems (including cellular towers, wi-Fi access points, etc.). Similarly, the user device 1010 may include indoor positioning aspects such as a location component adapted to obtain, for example, latitude, longitude, altitude, geocode, route, direction, heading, speed, time, date, and/or various other information/data. Some of the indoor systems may use various location or positioning technologies including RFID tags, indoor beacons or transmitters, wi-Fi access points, cellular towers, nearby computing devices (e.g., smartphones, laptops), etc. For example, such technologies may include iBeacons, universal proximity beacons, bluetooth Low Energy (BLE) transmitters, NFC transmitters, and the like. These indoor positioning aspects can be used in various settings to determine the position of someone or something within an inch or centimeter.

The user device 1010 may also include a user interface (which can include a display 1016 coupled to the processing element 1008) and/or a user input interface (coupled to the processing element 1008). For example, as described herein, the user interface may be a user application executing on the user device 1010 and/or accessible via the user device 1010, a browser, a user interface, and/or similar terms used interchangeably herein to interact with and/or cause display of information from the managing computing entity. The user input interface can include any of several devices or interfaces that allow the user device 1010 to receive data, such as a keypad 1018 (hard or soft), a touch display, a voice/language or motion interface, or other input device. In embodiments including keypad 1018, keypad 1018 can include (or cause to be displayed) conventional numbers (0-9) and associated keys (#) as well as other keys for operating user device 1010, and can include a complete set of alphabetic keys or a set of keys that can be activated to provide a complete set of alphanumeric keys. In addition to providing input, the user input interface can be used, for example, to activate or deactivate certain functions, such as a screen saver and/or sleep mode.

The user device 1010 can also include volatile storage or memory 1022 and/or nonvolatile storage or memory 1024, which can be embedded and/or can be removable. For example, the nonvolatile memory may be ROM, PROM, EPROM, EEPROM, flash memory, MMC, SD memory card, memory stick, CBRAM, PRAM, feRAM, NVRAM, MRAM, RRAM, SONOS, FJG RAM, huperzia memory, racetrack memory, and the like. The volatile memory may be RAM、DRAM、SRAM、FPM DRAM、EDO DRAM、SDRAM、DDR SDRAM、DDR2SDRAM、DDR3 SDRAM、RDRAM、TTRAM、T-RAM、Z-RAM、RIMM、DIMM、SIMM、VRAM、 cache memory, register memory, or the like. Volatile and nonvolatile storage or memory can store databases, database instances, database management systems, data, applications, programs, program components, scripts, source code, object code, byte code, compiled code, interpreted code, machine code, executable instructions, and the like to implement the functionality of the user device 1010. As indicated, this may include a user application residing on the entity or accessible through a browser or other user interface for communicating with the managing computing entity and/or various other computing entities.

In another embodiment, as described in more detail above, the user device 1010 may include one or more components or functions that are the same as or similar to the components or functions of the managing computing entity. As will be appreciated, these architectures and descriptions are provided for exemplary purposes only and are not limited to the various embodiments.

Some embodiments may be implemented in one or a combination of hardware, firmware, and software. Other embodiments may also be implemented as instructions stored on a computer-readable storage device, which may be read and executed by at least one processor to perform the operations described herein. A computer-readable storage device may include any non-transitory memory mechanism for storing information in a form readable by a machine (e.g., a computer). For example, computer-readable storage devices may include read-only memory (ROM), random-access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, and other storage devices and media.

The word "exemplary" is used herein to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The terms "computing device," "user device," "communication station," "handheld device," "mobile device," "wireless device," and "user device" (UE) as used herein refer to a wireless communication device, such as a cellular telephone, smart phone, tablet, netbook, wireless terminal, laptop, femtocell, high Data Rate (HDR) subscriber station, access point, printer, point-of-sale device, access terminal, or other Personal Communication System (PCS) device. The device may be mobile or stationary.

As used in this document, the term "communication" is intended to include transmission, or reception, or both transmission and reception. The term "communication" may be particularly useful in the claims when describing the organization of data sent by one device and received by another device, but only the function of one of these devices is required to infringe the claim. Similarly, when only the function of one of these devices is claimed, a two-way exchange of data between two devices (both devices transmitting and receiving during the exchange) may be described as "communication". The term "transmitting" as used herein with respect to wireless communication signals includes transmitting wireless communication signals and/or receiving wireless communication signals. For example, a wireless communication unit capable of transmitting wireless communication signals may include a wireless transmitter for transmitting wireless communication signals to at least one other wireless communication unit, and/or a wireless communication receiver for receiving wireless communication signals from at least one other wireless communication unit.

Some embodiments may be used in conjunction with various devices and systems, such as Personal Computers (PCs), desktop computers, mobile computers, laptop computers, notebook computers, tablet computers, server computers, handheld devices, personal Digital Assistant (PDA) devices, handheld PDA devices, in-vehicle devices, off-vehicle devices, hybrid devices, in-vehicle devices, off-vehicle devices, mobile or portable devices, consumer devices, non-mobile or non-portable devices, wireless communication stations, wireless communication devices, wireless Access Points (APs), wired or wireless routers, wired or wireless modems, video devices, audio-video (a/V) devices, wired or wireless networks, wireless area networks, wireless Video Area Networks (WVAN), local Area Networks (LANs), wireless Local Area Networks (LANs), private Area Networks (PANs), wireless Private Area Networks (WPANs), and the like.

Some embodiments may be used in conjunction with unidirectional and/or bidirectional radio communication systems, cellular radiotelephone communication systems, mobile telephones, cellular telephones, wireless telephones, personal Communication Systems (PCS) devices, PDA devices that incorporate a wireless communication device, mobile or portable Global Positioning System (GPS) devices, devices that incorporate a GPS receiver or transceiver or chip, devices that incorporate an RFID element or chip, multiple Input Multiple Output (MIMO) transceivers or devices, single Input Multiple Output (SIMO) transceivers or devices, multiple Input Single Output (MISO) transceivers or devices, devices with one or more internal and/or external antennas, digital Video Broadcasting (DVB) devices or systems, multi-standard radio devices or systems, wired or wireless handheld devices (e.g., smart phones), wireless Application Protocol (WAP) devices, and so forth.

Some embodiments may be used in conjunction with one or more types of wireless communication signals and/or systems that conform to one or more wireless communication protocols, such as, for example, radio Frequency (RF), infrared (IR), frequency Division Multiplexing (FDM), orthogonal FDM (OFDM), time Division Multiplexing (TDM), time Division Multiple Access (TDMA), extended TDMA (E-TDMA), general Packet Radio Service (GPRS), extended GPRS, code Division Multiple Access (CDMA), wideband CDMA (WCDMA), CDMA2000, single carrier CDMA, multi-carrier modulation (MDM), discrete multi-tone (DMT), bluetooth ^TM, global Positioning System (GPS), wi-Fi, wi-Max, zigBee ^TM, ultra Wideband (UWB), global system for mobile communications (GSM), 2G, 2.5G, 3G, 3.5G, 4G, fifth generation (5G) mobile networks, 3GPP, long Term Evolution (LTE), LTE-advanced, enhanced data rates for GSM evolution (EDGE). Other embodiments may be used in various other devices, systems, and/or networks.

Although an example processing system has been described above, embodiments of the subject matter and functional operations described herein can be implemented in other types of digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them.

Embodiments of the subject matter and operations described herein can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Embodiments of the subject matter described herein can be implemented as one or more computer programs, i.e., one or more components of computer program instructions, encoded on a computer storage medium for execution by, or to control the operation of, information/data processing apparatus. Alternatively or additionally, the program instructions can be encoded on a manually-generated propagated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information/data for transmission to suitable receiver apparatus for execution by information/data processing apparatus. The computer storage medium can be, or be included in, a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination of one or more of them. Furthermore, although the computer storage medium is not a propagated signal, the computer storage medium can be a source or destination of computer program instructions encoded in an artificially generated propagated signal. Computer storage media can also be or be included in one or more separate physical components or media (e.g., multiple CDs, disks, or other storage devices).

The operations described herein can be implemented as operations performed by an information/data processing apparatus on information/data stored on one or more computer-readable storage devices or received from other sources.

The term "data processing apparatus" encompasses all kinds of apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, a system-on-a-chip, or multiple ones or combinations of the foregoing. The apparatus can comprise dedicated logic circuits, such as an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit). In addition to hardware, the apparatus can include code that creates an execution environment for the computer program in question, such as code that constitutes processor firmware, a protocol stack, a database management system, an operating system, a cross-platform runtime environment, a virtual machine, or a combination of one or more of them. The apparatus and execution environment are capable of implementing a variety of different computing model infrastructures, such as web services, distributed computing, and grid computing infrastructures.

A computer program (also known as a program, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a component, part, subroutine, object, or other unit suitable for use in a computing environment. The computer program may, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or information/data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more components, sub-programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communication network.

The processes and logic flows described herein can be performed by one or more programmable processors executing one or more computer programs to perform actions by operating on input information/data and generating output. Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and information/data from a read-only memory or a random access memory or both. The essential elements of a computer are a processor for performing actions in accordance with instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive information/data from or transfer information/data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. However, the computer need not have such a device. Devices suitable for storing computer program instructions and information/data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disk; CDROM and DVD-ROM discs. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

To provide for interaction with a user, embodiments of the subject matter described herein can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information/data to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback; and can receive input from a user in any form, including acoustic, speech, or tactile input. In addition, the computer is able to interact with the user by sending and receiving documents to and from the device used by the user; for example, by sending web pages to a web browser on a user's client device in response to a request received from the web browser.

Embodiments of the subject matter described herein can be implemented in a computing system that includes a back-end component, e.g., as an information/data server, or that includes a middleware component, e.g., an application server, or that includes a front-end component, e.g., a client computer having a graphical user interface or a web browser through which a user can interact with an embodiment of the subject matter described herein, or any combination of one or more such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital information/data communication (e.g., a communication network). Examples of communication networks include local area networks ("LANs") and wide area networks ("WANs"), internetworks (e.g., the internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks).

The computing system can include clients and servers. The client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. In some embodiments, the server sends information/data (e.g., HTML pages) to the client device (e.g., for purposes of displaying information/data to and receiving user input from a user interacting with the client device). Information/data generated at the client device (e.g., results of user interactions) can be received at the server from the client device.

While this specification contains many specifics of particular embodiments, these should not be construed as limitations on the scope of any embodiments or of what may be claimed, but rather as descriptions of features specific to particular embodiments. Certain features that are described herein in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

Similarly, although operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

Thus, particular embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. Additionally, the processes depicted in the accompanying drawings do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may be advantageous.

Many modifications and other embodiments of the disclosure set forth herein will come to mind to one skilled in the art to which these embodiments pertain having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the embodiments are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims (20)

1. A method for computing storage, comprising:

Determining a program to be transferred from the host to the computing storage device;

determining that the size of the program exceeds a predetermined threshold; and

At least a portion of the program is transferred to the computing storage device based on the size.

2. The method of claim 1, wherein transferring at least a portion of the program comprises transferring at least a portion of the program to a computing namespace associated with the computing storage device.

3. The method of claim 2, wherein the computing namespace comprises a computing resource comprising at least one of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Field Programmable Gate Array (FPGA), a Tensor Processing Unit (TPU), or an Application Specific Integrated Circuit (ASIC).

4. The method of claim 1, wherein the method further comprises dividing the program into a first portion and a second portion, and wherein transmitting at least a portion of the program further comprises transmitting the first portion and the second portion to the computing storage device and meeting transmission requirements.

5. The method of claim 1, wherein transmitting at least a portion of the program comprises transmitting at least a portion of the program using an offset parameter, wherein the offset parameter specifies a location of the at least a portion relative to a starting address of the program.

6. The method of claim 1, wherein transferring at least a portion of the program to the computing storage device is performed using at least one of an identifier of a namespace, a type associated with the program, an index specifying a location on the computing storage device, or a size of the program.

7. The method of claim 1, wherein transferring at least a portion of the program to the computing storage device is performed via a management queue.

8. The method of claim 7, wherein performing the transferring of at least a portion of the program to the computing storage device via a management queue further comprises limiting a number of commands sent on the management queue to below a threshold.

9. The method of claim 1, wherein the computing storage device comprises a non-volatile memory express (NVMe) enabled storage device.

10. A system for managing functions, comprising:

A host device including a first memory and an application;

A computing storage device including a processing element and a second memory;

Wherein the system stores computer-executable instructions, wherein the computer-executable instructions, when executed by a processor, cause the processor to perform operations comprising:

Determining, via the application, a program to be transferred from a first memory of the host device to a second memory of the computing storage device;

determining that the size of the program exceeds a predetermined threshold; and

At least a portion of the program is transferred to the computing storage device based on the size.

11. The system of claim 10, wherein transmitting at least a portion of the program comprises transmitting at least a portion of the program to a computing namespace associated with the computing storage device.

12. The system of claim 11, wherein the computing namespace comprises a computing resource, wherein the computing resource comprises at least one of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Field Programmable Gate Array (FPGA), a Tensor Processing Unit (TPU), or an Application Specific Integrated Circuit (ASIC).

13. The system of claim 10, wherein the system further comprises operations, wherein the operations comprise: dividing the program into a first portion and a second portion, and wherein transmitting at least a portion of the program further comprises transmitting the first portion and the second portion to the computing storage device and meeting transmission requirements.

14. The system of claim 10, wherein transmitting at least a portion of the program comprises transmitting at least a portion of the program using an offset parameter, wherein the offset parameter specifies a location of the at least a portion relative to a starting address of the program.

15. The system of claim 10, wherein transferring at least a portion of the program to the computing storage device is performed using at least one of an identifier of a namespace, a type associated with the program, an index specifying a location on the computing storage device, or a size of the program.

16. The system of claim 10, wherein transferring at least a portion of the program to the computing storage device is performed via a management queue, and wherein a number of commands sent on the management queue is limited to below a threshold.

17. A computer-readable medium storing instructions that, when executed by a computer, cause the computer to perform operations comprising:

Determining a program to be transferred from the host to the computing storage device;

determining that the size of the program exceeds a predetermined threshold; and

At least a portion of the program is transferred to the computing storage device based on the size.

18. The computer-readable medium of claim 17, wherein transmitting at least a portion of the program comprises transmitting at least a portion of the program to a computing namespace associated with the computing storage device.

19. The computer-readable medium of claim 18, wherein the computing namespace comprises a computing resource, wherein the computing resource comprises at least one of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Field Programmable Gate Array (FPGA), a Tensor Processing Unit (TPU), or an Application Specific Integrated Circuit (ASIC).

20. The computer-readable medium of claim 17, wherein the operations further comprise: dividing the program into a first portion and a second portion, and wherein transmitting at least a portion of the program further comprises transmitting the first portion and the second portion to the computing storage device and meeting transmission requirements.