CN117897896A - Pseudo-bypass mode for power converter - Google Patents

Pseudo-bypass mode for power converter Download PDF

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Publication number
CN117897896A
CN117897896A CN202280057107.2A CN202280057107A CN117897896A CN 117897896 A CN117897896 A CN 117897896A CN 202280057107 A CN202280057107 A CN 202280057107A CN 117897896 A CN117897896 A CN 117897896A
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China
Prior art keywords
current
voltage
output voltage
input voltage
maximum current
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CN202280057107.2A
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Chinese (zh)
Inventor
哈斯南·阿克拉姆
格雷姆·G·麦凯
杰森·W·劳伦斯
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Cirrus Logic International Semiconductor Ltd
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Cirrus Logic International Semiconductor Ltd
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Priority claimed from US17/550,492 external-priority patent/US11843317B2/en
Application filed by Cirrus Logic International Semiconductor Ltd filed Critical Cirrus Logic International Semiconductor Ltd
Priority claimed from PCT/US2022/037855 external-priority patent/WO2023027837A1/en
Publication of CN117897896A publication Critical patent/CN117897896A/en
Pending legal-status Critical Current

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Abstract

A system may include: a boost converter configured to receive an input voltage and boost the input voltage to an output voltage; and a control circuit configured to enforce a maximum current limit to limit the current drawn by the boost converter, and to dynamically increase the current above the maximum current limit to approximately equal the output voltage to the input voltage in response to the output voltage decreasing below the input voltage.

Description

Pseudo-bypass mode for power converter
Cross Reference to Related Applications
The present disclosure claims priority from U.S. provisional patent application Ser. No. 63/236,739 filed 8/25 at 2021, which is incorporated herein by reference in its entirety.
Technical Field
The present disclosure relates generally to circuits for electronic devices, including but not limited to personal audio devices such as wireless telephones and media players, and more particularly to the implementation of an operating mode of a power converter that regulates an output voltage produced by the power converter to an input voltage provided to the power converter.
Background
Personal audio devices (including wireless telephones, such as mobile/cellular telephones, cordless telephones, mp3 players, and other consumer audio devices) are in widespread use. Such personal audio devices may include circuitry for driving a pair of headphones or one or more speakers. Such circuitry typically includes a speaker driver including a power amplifier for driving the audio output signal to the headphones or speakers. In general, a power converter may be used to provide a supply voltage to a power amplifier in order to amplify signals driven to a speaker, earphone or other transducer. A switching power converter is an electronic circuit that converts a power source from one Direct Current (DC) voltage level to another DC voltage level. Examples of such switching DC-DC converters include, but are not limited to, boost converters, buck-boost converters, inverting buck-boost converters, and other types of switching DC-DC converters. Thus, using a power converter, a DC voltage, such as provided by a battery, may be converted to another DC voltage for powering a power amplifier. A power converter may be used to provide a supply voltage rail to one or more components in the device. In addition to driving an audio transducer, the power converter may also be used for other applications, such as driving a haptic actuator or other electrical or electronic load.
The output voltage produced by the boost converter may fall below its set point under current limiting constraints that may be imposed on the boost converter. A system (e.g., a mobile device) that includes such a boost converter may require that the output voltage produced by the boost converter not drop below the input voltage of the boost converter, which is referred to herein as a "collapse condition. Typically, this requirement may be achieved by closing a switch between the input voltage and the output voltage during a collapse condition, resulting in a state transition between a regulation mode in which the boost converter regulates the output voltage and a bypass mode. However, such state transitions may increase design complexity and have other drawbacks.
Disclosure of Invention
One or more of the disadvantages and problems associated with previous methods of regulating the output voltage of a power converter may be reduced or eliminated in accordance with the teachings of the present disclosure.
According to an embodiment of the present disclosure, a system may include: a boost converter configured to receive an input voltage and boost the input voltage to an output voltage; and a control circuit configured to enforce a maximum current limit to limit the current drawn by the boost converter, and to dynamically increase the current above the maximum current limit to approximately equal the output voltage to the input voltage in response to the output voltage decreasing below the input voltage.
In accordance with these and other embodiments of the present disclosure, a method may include enforcing a maximum current limit to limit a current drawn by a boost converter configured to receive an input voltage and boost the input voltage to an output voltage, and in response to the output voltage decreasing below the input voltage, dynamically increasing the current above the maximum current limit to approximately equal the output voltage to the input voltage.
Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, descriptions, and claims included herein. The objects and advantages of the embodiments will be realized and attained by means of the elements, features and combinations particularly pointed out in the appended claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the claims as set forth in this disclosure.
Drawings
A more complete understanding of the embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:
FIG. 1 illustrates an example mobile device according to an embodiment of this disclosure;
FIG. 2 shows a block diagram of selected components inside a mobile device according to an embodiment of the present disclosure;
FIG. 3A illustrates a block diagram of selected components of an example boost converter having multiple modes of operation, depicting operation in bypass mode, in accordance with an embodiment of the present disclosure;
FIG. 3B illustrates a block diagram of selected components of an example boost converter having multiple modes of operation, depicting operation in a boost active mode, in accordance with an embodiment of the disclosure;
FIG. 3C illustrates a block diagram of selected components of an example boost converter having multiple modes of operation, depicting operation in a boost inactive mode, in accordance with an embodiment of the present disclosure;
FIG. 4 illustrates a block diagram of selected components of an example control circuit of a boost converter, according to an embodiment of the disclosure;
FIG. 5 depicts an example state machine that may be implemented by portions of a control circuit of a boost converter, in accordance with an embodiment of the present disclosure; and
fig. 6 shows a graph depicting the increase in maximum current over time in an attack state, according to an embodiment of the present disclosure.
Detailed Description
Fig. 1 shows an example mobile device 1 according to an embodiment of the disclosure. Fig. 1 depicts a mobile device 1 coupled to an earpiece 3 in the form of a pair of earpiece speakers 8A and 8B. The headset 3 depicted in fig. 1 is merely an example, and it is understood that the mobile device 1 may be used in connection with a variety of audio transducers, including but not limited to headphones, ear buds, in-ear headphones, and external speakers. The plug 4 may provide a connection of the headset 3 to an electrical terminal of the mobile device 1. The mobile device 1 may provide a display to a user and receive user input using the touch screen 2, or alternatively, a standard Liquid Crystal Display (LCD) may be combined with various buttons, sliders, and/or dials disposed on a surface and/or side of the mobile device 1.
Fig. 2 shows a block diagram of selected components integrated into the mobile device 1 according to an embodiment of the present disclosure. As shown in fig. 2, the mobile device 1 may include a boost converter 20 configured to boost the battery voltage V BAT Boosting to generate a supply voltage V to a plurality of downstream components 18 of the mobile device 1 SUPPLY . The downstream components 18 of the mobile device 1 may include any suitable functional circuitry or devices of the mobile device 1 including, but not limited to, processors, audio encoder/decoders, amplifiers, display devices, and so forth. As shown in fig. 2, the mobile device 1 may also include a battery charger 16 for charging the battery 22.
In some embodiments of the mobile device 1, the boost converter 20 and the battery charger 16 may comprise only those components of the mobile device 1 that are electrically coupled to the battery 22, and the boost converter 20 may electrically interface between the battery 22 and all downstream components of the mobile device 1. However, in other embodiments of the mobile device 1, some of the downstream components 18 may be directly electrically coupled to the battery 22.
Fig. 3A illustrates a block diagram of selected components of an example boost converter 20 having multiple modes of operation, depicting operation in a bypass mode, in accordance with an embodiment of the present disclosure. As shown in fig. 3A, the boost converter 20 may include a battery 22, a plurality of inductive boost phases (inductive boost phase) 24, a sense capacitor 26, a sense resistor 28, a bypass switch 30, and a control circuit 40. As shown in fig. 3A, each inductive boost phase 24 may include a power inductor 32, a charge switch 34, a rectifier switch 36, and an output capacitor 38.
Although fig. 3A-3C depict boost converter 20 having three inductive boost phases 24, embodiments of boost converter 20 may have any suitable number of inductive boost phases 24. In some embodiments, boost converter 20 may include three or more inductive boost phases 24. In other embodiments, boost converter 20 may include less than three phases (e.g., single phase or two phases).
Boost converter 20 may be powered at a supply voltage V generated by boost converter 20 SUPPLY Greater than a threshold minimum voltage V MIN When operating in bypass mode. In some embodiments, such a threshold minimum voltage V MIN May be a function of the current being monitored (e.g., the current through the sense resistor 28). In some embodiments, such a threshold minimum voltage V MIN Can be varied according to the variation of the monitored current in order to obtain a voltage V from the supply voltage SUPPLY The desired headroom is provided in the powered component. Accordingly, the control circuit 40 may be configured to sense the supply voltage V SUPPLY And will supply voltage V SUPPLY With a threshold minimum voltage V MIN Compare, and SENSE the voltage VDD_SENSE and supply the voltage V SUPPLY Compared to the voltage VDD SENSE. At the supply voltage V SUPPLY Greater than a threshold minimum voltage V MIN And the voltage VDD_SENSE across the SENSE capacitor 26 is greater than the supply voltage V SUPPLY The control circuit 40 may activate (e.g., enable, close, turn on) the bypass switch 30 and the one or more rectifier switches 36 and deactivate (e.g., disable, open, turn off) the charge switch 34. In this bypass mode, the resistances of the rectifier switch 36, the power inductor 32, and the bypass switch 30 may be combined to minimize the battery 22 and the supply voltage V SUPPLY The total effective resistance of the paths between. In some embodiments, bypass switch 30 may not be present and the bypass mode may be implemented by activating one or more of rectifier switches 26 and deactivating charge switch 34.
Fig. 3B illustrates a block diagram of selected components of an example boost converter 20 depicting operation in a boost active mode, in accordance with an embodiment of the present disclosure. At the position ofIn boost active mode, control circuit 40 may deactivate (e.g., disable, open, shut) bypass switch 30 and by generating appropriate control signal P 1P 2 、/>P 3 And->Charging switch 34 (e.g., during a charging state of inductive boost phase 24) and rectifying switch 36 (e.g., during a transfer state of inductive boost phase 24) of inductive boost phase 24 are periodically commutated (e.g., to be described in more detail below) to divert current I BAT And boosting battery voltage V BAT Delivered to a higher supply voltage V SUPPLY To supply voltage V SUPPLY Provides a programmed (or servo) desired current (e.g., average current) while maintaining a supply voltage V SUPPLY Above a threshold minimum voltage V MIN . For example, control circuit 40 may operate in a boost active mode to couple inductor current I L (e.g., I) L1 、I L2 、I L3 ) Between peak and valley currents as described in U.S. patent application Ser. No. 17/119,517 ("the 517 application"), filed on even date 11 at 12 in 2020, and incorporated herein by reference in its entirety. In boost active mode, control circuit 40 may operate boost converter 20 by operating inductive boost phase 24 in peak and valley detection operation, as described in more detail below. The resulting switching frequency of the charge switch 34 and the rectifier switch 36 of the inductive boost phase 24 may be determined by the SENSE voltage vdd_sense, the supply voltage V SUPPLY The inductance of power inductor 32A, and the programmed ripple parameter (e.g., inductor current I L A configuration of a target current ripple).
FIG. 3C illustrates a block diagram of selected components of boost converter 20 depicting an embodiment in accordance with the present disclosureOperation in boost inactive mode is described. When the supply voltage V generated by the boost converter 20 SUPPLY Rising to hysteresis voltage V HYST Above, and the SENSE voltage VDD_SENSE remains lower than the supply voltage V SUPPLY When the boost converter 20 may operate in the boost inactive mode. In boost inactive mode, control circuit 40 may deactivate (e.g., disable, open, shut) bypass switch 30, charge switch 34, and rectifier switch 36. Thus, when the SENSE voltage VDD_SENSE remains lower than the supply voltage V SUPPLY When the control circuit 40 prevents the boost converter 20 from entering the bypass mode so that no voltage V is supplied from SUPPLY Reverse power to battery 22. In addition, if the voltage V is supplied SUPPLY Drop to the threshold minimum voltage V MIN The control circuit 40 may then cause the boost converter 20 to reenter the boost active mode to supply the voltage V SUPPLY Maintained at a threshold minimum voltage V MIN And hysteresis voltage V HYST Between them.
Thus, via operation in the modes described above, boost converter 20 may operate to provide a voltage at the threshold minimum voltage V MIN And hysteresis voltage V HYST Supply voltage V between SUPPLY Is provided.
It should be appreciated that in some embodiments of the present disclosure, bypass switch 30 may not be present in boost converter 20. Thus, as described in more detail below, the boost converter 20 may be configured to supply the voltage V during a voltage collapse condition in addition to or in lieu of the bypass function provided by the bypass switch 30 SUPPLY Regulated to approximately the battery voltage V BAT The voltage collapse condition may exist at the supply voltage V due to current limiting of the boost converter 20 SUPPLY Where it is located.
As described in U.S. patent application serial No. 17/237,373 (application No. 373), filed on 22, 4, 2021, and incorporated herein by reference, one or more constraints may be imposed on the operation of the power converter, which may impose one or more limits on the current that may be drawn from the battery by the power converterAnd (5) preparing. In some instances, such current limiting as applied to boost converter 20 may result in a breakdown condition, in which the supply voltage V SUPPLY Drop to battery voltage V BAT Below, and therefore the power converter 20 cannot regulate the supply voltage V SUPPLY . As described in the background section, in conventional approaches, due to current limiting of the boost converter 20, the control circuit 40 may activate the bypass switch 30 (and/or one or more of the rectifier switches 36) to boost the battery voltage V BAT For supply voltage V SUPPLY And (5) bypassing. However, in accordance with the present disclosure, boost converter 20 may be configured to supply voltage V in the event of a breakdown condition SUPPLY Regulated to approximately equal the battery voltage V BAT
Fig. 4 shows a block diagram of selected components of an example control circuit 40, according to an embodiment of the present disclosure. As shown in fig. 4, the control circuit 40 may include a comparator 52, a collapse controller 54, a maximum block 56, a current controller 58, a minimum block 60, and a switch controller 62.
The comparator 52 may be configured to supply a voltage V SUPPLY And battery voltage V BAT A comparison is made to control the operation of the crash controller 54. For example, if the voltage V is supplied SUPPLY Greater than the battery voltage V BAT Comparator 52 may cause crash controller 54 to operate in a release mode in which it reduces crash condition current I COL . On the other hand, if the supply voltage V SUPPLY Less than the battery voltage V BAT Comparator 52 may cause crash controller 54 to operate in an attack mode in which it increases crash condition current I COL
Maximum block 56 may select protection current I PROT And breakdown condition current I COL To produce a maximum current I delivered to the minimum block 60 MAX . Protection current I PROT The maximum current that may be drawn by boost converter 20 may be expressed to meet any battery protection constraints and/or other protection constraints, for example, as described in the' 373 application. Thus, in the presence of a crash condition, the crash controller 54 incorporatesThe maximum block 56 may temporarily override this protection current I PROT To regulate the supply voltage V SUPPLY
The current controller 58 may be based on the supply voltage V SUPPLY Threshold minimum voltage V MIN Hysteresis voltage V HYST And/or any other suitable parameter to determine the target current I to be drawn by boost converter 20 TARGET So as to supply the voltage V SUPPLY Regulated at a desired voltage level. Based on supply voltage V SUPPLY Determining such a target current is beyond the scope of the present disclosure, but may be determined in any suitable manner, including but not limited to the method of determining a target average current as described in the' 517 application.
The minimum block 60 may select the target current I TARGET And maximum current I MAX And communicates the result to the switch controller 62. Based on the received current value, the switch controller 62 may generate an appropriate control signal P 1P 2 、/>P 3 And->To commutate the switches 34 and 36 of the boost converter 20 so as to draw such a target current I TARGET
In operation, the functionality of the crash controller 54 may be integrated with the maximum block 56 to implement a state machine to generate the maximum current I MAX . As noted above, maximum current I MAX May be based on a protection current I for satisfying battery protection constraints PROT And the output of comparator 52. Maximum current I when not in a crashed condition MAX Can be equal to the protection current I PROT . On the other hand, when in a crashed condition, maximum current I MAX Can exceed the protection current I PROT
FIG. 5 depicts an example state machine 70 that may be implemented by the crash controller 54 and the maximum block 56, according to an embodiment of the disclosure. As shown in fig. 5, state machine 70 may include four states: an idle state 72, an attack state 74, a release state 76, and a slow release state 78. The slow release state 78 is shown in phantom because such a state may not exist in some embodiments of the state machine 70.
In the idle state 72, maximum current I MAX Can be equal to the protection current I PROT . Responsive to battery voltage V BAT Exceeding the supply voltage V SUPPLY And supply voltage V SUPPLY Drop to minimum acceptable regulated voltage V UV (which may be equal to or lower than the threshold minimum voltage V MIN ) The state machine 70 may transition from the idle state 72 to the attack state 74 below.
Crash controller 54 may cause maximum current I MAX Continuously increasing while in the attack state 74. Responsive to maximum current I MAX Drop to protection current I PROT Below and battery voltage V BAT Drop to supply voltage V SUPPLY The state machine 70 may transition from the attack state 74 back to the idle state 72 below. In addition, in response to the supply voltage V SUPPLY Exceeding the battery voltage V BAT And supply voltage V SUPPLY Kept below a minimum acceptable regulation voltage V UV State machine 70 may transition from attack state 74 to release state 76. In addition, in response to the supply voltage V SUPPLY Exceeding the minimum acceptable regulating voltage V UV State machine 70 may transition from attack state 74 to slow release state 78.
Crash controller 54 may cause maximum current I MAX Continuously decreasing while in the released state 76. Responsive to maximum current I MAX Drop to protection current I PROT The state machine 70 may transition from the released state 76 back to the idle state 72. In addition, in response to the battery voltage V BAT Exceeding the supply voltage V SUPPLY And supply voltage V SUPPLY Kept below a minimum acceptable regulation voltage V UV State machine 70 may transition from release state 76 back to attack state 74. In additionResponsive to battery voltage V BAT Exceeding the supply voltage V SUPPLY And supply voltage V SUPPLY Rising to a minimum acceptable regulated voltage V UV The state machine 70 may transition from the released state 76 to the slow released state 78 as described above.
The slow release state 78 may only exist in embodiments where the boost converter 20 has a dedicated bypass switch 30, which bypass switch 30 may be at the supply voltage V SUPPLY Is equal to the battery voltage V BAT And supply voltage V SUPPLY Above a minimum acceptable regulation voltage V UV Is activated. If the crash controller 54 is engaged (e.g., I MAX >I PROT ) And supply voltage V SUPPLY Above a minimum acceptable regulation voltage V UV A control loop implemented by the crash controller 54 may be required to properly avoid adverse interactions with the bypass switch 30. This adverse interaction may be due to the maximum current I MAX Continuously decreasing while in the slow release state 78, but at a rate that may be slower than the maximum current I occurring in the release state 76 MAX Is reduced.
In the slow release state 78, the crash controller 54 may reduce the maximum current I at a programmable rate that is slower than the rate of reduction in the release state 76 MAX This can be reduced at a minimum acceptable regulated voltage V UV Supply voltage V near the boundary of (2) SUPPLY Is a jitter of (a).
Responsive to maximum current I MAX Drop to protection current I PROT The state machine 70 may transition from the slow release state 78 back to the idle state 72 below. In addition, in response to the battery voltage V BAT Exceeding the supply voltage V SUPPLY And supply voltage V SUPPLY Drop to minimum acceptable regulated voltage V UV The state machine 70 may transition from the slow release state 78 back to the attack state 74 below. In addition, in response to the supply voltage V SUPPLY Exceeding the battery voltage V BAT And supply voltage V SUPPLY Drop to minimum acceptable regulated voltage V UV The state machine 70 may transition from the slow release state 78 to the release state 76 below.
Notably, the minimum acceptable regulated voltage V UV May only be relevant in the state machine 70 in embodiments in which a dedicated bypass switch 30 is present. Thus, in embodiments where the dedicated bypass switch 30 is not present and the state machine 70 does not include the slow release state 78, the minimum acceptable regulated voltage V as shown in fig. 5 may be omitted UV Is a comparison of (c).
When entering the attack state 74, the crash controller 54 may continuously increase the maximum current I during the duration that the state machine 70 remains in the attack state 74 MAX . In some embodiments, as shown in FIG. 6, the maximum current I MAX May include a programmable linear term (e.g., linearly increasing over time), a programmable quadratic term (e.g., exponentially increasing over time), and a programmable time delay after the attack state 74 begins, where the quadratic term is added to the linear term to generate the maximum current I MAX Is a complex curve of (a). Such a compound ramp may allow steady state stability via the linear term and supply voltage V via the quadratic term SUPPLY And battery voltage V BAT Is provided. The crash controller 54 may generate a decrease in the maximum current I during the release state 76 and the slow release state 78 MAX Is a similar compound curve of (a).
In addition to the example waveforms described above, other waveforms may be used that depend on time, current, and/or voltage.
As used herein, when two or more elements are referred to as being "coupled" to each other, the term indicates that the two or more elements are in electronic or mechanical communication, whether indirectly connected or directly connected, with or without intervening elements, as appropriate.
The present disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that one of ordinary skill would understand. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person of ordinary skill in the art would understand. Furthermore, reference in the appended claims to an apparatus or system or component of an apparatus or system being adapted, arranged, capable, configured, enabled, operable, or operative to perform a particular function encompasses the apparatus, system, or component whether or not it or that particular function is activated, turned on, or unlocked, provided that the apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative. Accordingly, modifications, additions, or omissions may be made to the systems, apparatuses, and methods described herein without departing from the scope of the disclosure. For example, components of the systems and devices may be integrated or separated. Moreover, the operations of the systems and apparatus disclosed herein may be performed by more, fewer, or other components, and the described methods may include more, fewer, or other steps. In addition, the steps may be performed in any suitable order. As used in this document, "each" refers to each member of a collection or each member of a subset of a collection.
Although exemplary embodiments are shown in the drawings and described below, the principles of the present disclosure may be implemented using any number of techniques, whether currently known or not. The present disclosure should not be limited in any way to the exemplary embodiments and techniques illustrated in the drawings and described above.
The items depicted in the drawings are not necessarily drawn to scale unless specifically indicated otherwise.
All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the disclosure and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present disclosure have been described in detail, it should be understood that various changes, substitutions, and alterations can be made hereto without departing from the spirit and scope of the present disclosure.
Although specific advantages have been enumerated above, various embodiments may include some, none, or all of the enumerated advantages. In addition, other technical advantages may become apparent to one of ordinary skill in the art after having read the foregoing figures and description.
To assist the patent office and any reader of any patent issued in accordance with this application in interpreting the claims appended hereto, applicants wish to note that they do not intend any appended claims or claim elements to refer to 35u.s.c. ≡112 (f) unless the word "means for … …" or "steps for … …" is explicitly used in a particular claim.

Claims (18)

1. A system, comprising:
a boost converter configured to receive an input voltage and boost the input voltage to an output voltage; and
a control circuit configured to:
enforcing a maximum current limit to limit the current drawn by the boost converter; and is also provided with
In response to the output voltage decreasing below the input voltage, the current is dynamically increased above the maximum current limit to approximately equal the output voltage to the input voltage.
2. The system of claim 1, wherein the maximum current limit is based on a determination of a maximum current level that ensures protection of components of the boost converter or components electrically coupled to the boost converter.
3. The system of claim 1 or 2, wherein the control circuit implements a feedback loop that controls the current to regulate the output voltage based on the output voltage and the input voltage.
4. The system of any of claims 1-3, wherein the control circuit is further configured to:
continuously increasing the current when the output voltage is less than the input voltage and the current is greater than the maximum current limit; and
the current is continuously reduced when the output voltage is greater than the input voltage and the current is greater than the maximum current limit.
5. The system of claim 4, wherein:
when the output voltage is less than the input voltage and the current is greater than the maximum current limit, the rate of increase of the current is nonlinear; and
when the output voltage is greater than the input voltage and the current is greater than the maximum current limit, the rate of decrease of the current is nonlinear.
6. The system of claim 5, wherein:
the rate of increase is a function of an amount of time since the control circuit entered an attack state in which the output voltage was less than the input voltage and the current was greater than the maximum current limit; and
the rate of decrease is a function of an amount of time since the control circuit enters a released state in which the output voltage is greater than the input voltage and the current is greater than the maximum current limit.
7. The system of any of claims 4-6, wherein the control circuit is further configured to continuously increase the current when the output voltage is greater than the input voltage and the output voltage is less than a threshold voltage.
8. The system of any of claims 4-7, wherein the control circuit is further configured to continuously decrease the current when the output voltage is greater than a threshold voltage and the current is greater than the maximum current limit, wherein a second rate of decrease that occurs when the output voltage is greater than the threshold voltage and the current is greater than the maximum current limit is different than a rate of decrease when the output voltage is greater than the input voltage and the current is less than the maximum current limit.
9. The system of claim 8, further wherein a second rate of decrease that occurs when the output voltage is greater than the threshold voltage and the current is greater than the maximum current limit is less than a rate of decrease when the output voltage is greater than the input voltage and the current is less than the maximum current limit.
10. A method, comprising:
enforcing a maximum current limit to limit a current drawn by a boost converter configured to receive an input voltage and boost the input voltage to an output voltage; and is also provided with
In response to the output voltage decreasing below the input voltage, the current is dynamically increased above the maximum current limit to approximately equal the output voltage to the input voltage.
11. The method of claim 10, wherein the maximum current limit is based on a determination of a maximum current level that ensures protection of components of the boost converter or components electrically coupled to the boost converter.
12. The method of claim 10 or 11, further comprising implementing a feedback loop that controls the current to regulate the output voltage based on the output voltage and the input voltage.
13. The method of any of claims 10-12, further comprising:
continuously increasing the current when the output voltage is less than the input voltage and the current is greater than the maximum current limit; and
the current is continuously reduced when the output voltage is greater than the input voltage and the current is greater than the maximum current limit.
14. The method according to claim 13, wherein:
when the output voltage is less than the input voltage and the current is greater than the maximum current limit, the rate of increase of the current is nonlinear; and
when the output voltage is greater than the input voltage and the current is greater than the maximum current limit, the rate of decrease of the current is nonlinear.
15. The method according to claim 14, wherein:
the rate of increase is a function of the amount of time since the control circuit entered an attack state in which the output voltage was less than the input voltage and the current was greater than the maximum current limit; and
the rate of decrease is a function of an amount of time since the control circuit enters a released state in which the output voltage is greater than the input voltage and the current is greater than the maximum current limit.
16. The method of any of claims 13-15, further comprising continuously increasing the current when the output voltage is greater than the input voltage and the output voltage is less than a threshold voltage.
17. The method of any of claims 13-16, further comprising continuously reducing the current when the output voltage is greater than the threshold voltage and the current is greater than the maximum current limit, wherein a second rate of reduction that occurs when the output voltage is greater than the threshold voltage and the current is greater than the maximum current limit is different than a rate of reduction when the output voltage is greater than the input voltage and the current is less than the maximum current limit.
18. The method of claim 17, further wherein a second rate of decrease that occurs when the output voltage is greater than the threshold voltage and the current is greater than the maximum current limit is less than a rate of decrease when the output voltage is greater than the input voltage and the current is less than the maximum current limit.
CN202280057107.2A 2021-08-25 2022-07-21 Pseudo-bypass mode for power converter Pending CN117897896A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US63/236,739 2021-08-25
US17/550,492 2021-12-14
US17/550,492 US11843317B2 (en) 2021-08-25 2021-12-14 Pseudo-bypass mode for power converters
PCT/US2022/037855 WO2023027837A1 (en) 2021-08-25 2022-07-21 Pseudo-bypass mode for power converters

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CN117897896A true CN117897896A (en) 2024-04-16

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