CN117896894A - Circuit board, manufacturing method thereof and electronic equipment - Google Patents

Circuit board, manufacturing method thereof and electronic equipment Download PDF

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Publication number
CN117896894A
CN117896894A CN202410205050.7A CN202410205050A CN117896894A CN 117896894 A CN117896894 A CN 117896894A CN 202410205050 A CN202410205050 A CN 202410205050A CN 117896894 A CN117896894 A CN 117896894A
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CN
China
Prior art keywords
protrusion
circuit board
group
signal
signal lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202410205050.7A
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Chinese (zh)
Inventor
杨海凤
陈兵
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Lenovo Beijing Ltd
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Lenovo Beijing Ltd
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Publication date
Application filed by Lenovo Beijing Ltd filed Critical Lenovo Beijing Ltd
Priority to CN202410205050.7A priority Critical patent/CN117896894A/en
Publication of CN117896894A publication Critical patent/CN117896894A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The application provides a circuit board, a manufacturing method thereof and electronic equipment comprising the circuit board, wherein the circuit board comprises: at least one set of through holes including a plurality of through holes arranged in a first direction; a first group of signal lines and a second group of signal lines arranged in a second direction, the first group of signal lines and the second group of signal lines being located on opposite sides of the same group of through holes; the first group of signal wires are provided with a plurality of first bulges, the second group of signal wires are provided with a plurality of second bulges, the first bulges are positioned in gaps between two adjacent through holes arranged along the first direction and protrude inwards, and the second bulges are positioned in gaps between two adjacent through holes arranged along the first direction and protrude inwards; the first protrusions and the second protrusions are in one-to-one correspondence, the first protrusions and the second protrusions corresponding to the first protrusions are located in the same gap, and the first protrusions and the second protrusions corresponding to the first protrusions at least partially overlap in the first direction.

Description

Circuit board, manufacturing method thereof and electronic equipment
Technical Field
The present application relates to the field of electronic technology, and in particular, to a circuit board, a method for manufacturing the same, and an electronic device including the circuit board.
Background
With the development of electronic technology, electronic devices are increasingly commonly applied to various aspects of work and life of people, and accordingly, performance requirements of people on the electronic devices are higher and higher. Therefore, how to improve the performance of electronic devices has become a research hotspot for those skilled in the art.
Disclosure of Invention
In view of the above, the present application provides a circuit board and a manufacturing method thereof, and an electronic device including the circuit board, and the specific scheme is as follows:
A circuit board, comprising:
at least one set of through holes including a plurality of through holes arranged in a first direction;
a first group of signal lines and a second group of signal lines arranged in a second direction, the first group of signal lines and the second group of signal lines being located on opposite sides of the same group of through holes;
The first group of signal wires are provided with a plurality of first bulges, the second group of signal wires are provided with a plurality of second bulges, the first bulges are positioned in gaps between two adjacent through holes arranged along the first direction and protrude towards the inner side of the gaps, and the second bulges are positioned in gaps between two adjacent through holes arranged along the first direction and protrude towards the inner side of the gaps;
The first protrusions and the second protrusions are in one-to-one correspondence, the first protrusions and the second protrusions corresponding to the first protrusions are located in the same gap, and the first protrusions and the second protrusions corresponding to the first protrusions are at least partially overlapped in the first direction.
Optionally, overlapping portions of the first protrusion and its corresponding second protrusion are parallel to each other.
Optionally, the first protrusion and the second protrusion are rectangular protrusions, and an overlapping portion of the first protrusion and the second protrusion is a long side of the rectangle.
Optionally, the extending direction of the first protrusion is perpendicular to the contact surface of the first protrusion with the first group of signal lines; the extending direction of the second bulge is perpendicular to the contact surface of the second bulge and the second group of signal wires.
Optionally, the first group of signal lines are further provided with third protrusions, the second group of signal lines are further provided with fourth protrusions, the third protrusions extend along a direction away from the first protrusions, and the fourth protrusions extend along a direction away from the second protrusions.
Optionally, the first set of signal lines includes parallel first and second signal lines, and the second set of signal lines includes parallel third and fourth signal lines;
Wherein, in the second direction, the second signal line is located between the first signal line and the third signal line, and the third signal line is located between the second signal line and the fourth signal line; the first bulge is located on one side of the second signal line facing the third signal line, the second bulge is located on one side of the third signal line facing the second signal line, the third bulge is located on one side of the first signal line away from the second signal line, and the fourth bulge is located on one side of the fourth signal line away from the third signal line.
Optionally, the circuit board includes a pin area, and the first protrusion and the second protrusion are located in the pin area.
An electronic device comprising the circuit board of at least one of the above.
A method for manufacturing a signal wire on a circuit board, which is applied to any one of the circuit boards; the manufacturing method comprises the following steps:
Determining a target impedance;
Determining a target size combination of the first bump and the second bump based on the impedance of the signal line on the circuit board and the target impedance under different size combinations of the first bump and the second bump;
and manufacturing a signal wire of at least part of the area on the circuit board based on the target size combination of the first bulge and the second bulge.
Optionally, the different size combinations include at least one of the following different sizes differing in length between the first protrusion and the second protrusion;
the widths of the first protrusion and the second protrusion are different;
The distance between the first protrusion and the second protrusion is different.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings required for the description of the embodiments or the prior art will be briefly described below, and it is apparent that the drawings in the following description are only embodiments of the present application, and other drawings may be obtained according to the provided drawings without inventive effort to those skilled in the art.
The structures, proportions, sizes, etc. shown in the drawings are shown only in connection with the present disclosure, and therefore should not be construed as limiting the application, but rather as limiting the scope of the application, so that any structural modifications, proportional changes, or dimensional adjustments should fall within the scope of the application without affecting the efficacy or achievement thereof.
Fig. 1 is a schematic structural diagram of a circuit board according to an embodiment of the present application;
FIG. 2 is a schematic diagram showing a signal impedance of a circuit board according to an embodiment of the present application;
fig. 3 is a flowchart of a method for manufacturing a circuit board according to an embodiment of the application.
Detailed Description
Embodiments of the present application will now be described more fully hereinafter with reference to the accompanying drawings, in which it is shown, however, in which some, but not all embodiments of the application are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Accordingly, it is intended that the present application covers the modifications and variations of this application provided they come within the scope of the appended claims (the claims) and their equivalents. The embodiments provided by the embodiments of the present application may be combined with each other without contradiction.
In order that the above-recited objects, features and advantages of the present application will become more readily apparent, a more particular description of the application will be rendered by reference to the appended drawings and appended detailed description.
As described in the background section, how to improve the performance of electronic devices has become a focus of research for those skilled in the art.
Specifically, the electronic device includes a circuit board, and when the electronic device is in operation, the signal transmission quality in the circuit board can directly affect the performance of the electronic device. Therefore, as signal transmission rates become higher, it is important to optimize signal transmission quality so that signals are transmitted from the source to the destination with minimal distortion.
The inventor researches and discovers that in practical application, one of main reasons for signal distortion is signal reflection, and root cause of signal reflection is impedance discontinuity on a signal transmission path, specifically, impedance discontinuity exists at a place where the impedance is not matched on the signal transmission path, and part of energy is reflected back to a signal source at the place where the impedance is discontinuous, so that circuit noise is increased, signal energy is weakened, and signal transmission quality is affected.
In addition, there are many factors affecting the impedance on the signal transmission path in the circuit board, wherein from the signal transmission point of view, the factors affecting the impedance on the signal transmission path include internal resistance on the chip core (die), the mounting package configuration file (pkg), the PCB (Printed Circuit Board, circuit board) transmission line impedance, the via (via), the connector (connector), and the like. The PCB transmission line impedance further includes Pinfield (lead out area) impedance, such as CPU break area) impedance or BGA (ball grid array) area impedance or Openfield (open field experiment) area impedance, and the like; from a production perspective, factors that affect the impedance on the signal transmission path include etching factor, surface roughness, copper plating thickness, trace width, and the like.
In view of the above, the embodiments of the present application provide a circuit board and an electronic device including the circuit board, where the circuit board solves the problem of discontinuous impedance on a signal transmission line by optimizing impedance on the signal transmission line, and improves signal transmission quality, thereby improving performance of the electronic device including the circuit board.
In this embodiment, the electronic device may be a mobile phone, a computer, or other devices with circuit boards, which is not limited in this aspect of the application, and is specifically determined according to circumstances.
Specifically, as shown in fig. 1, the circuit board provided by the embodiment of the application includes:
At least one set of through holes 10 including a plurality of through holes 10 arranged in the first direction X;
A first group of signal lines 20 and a second group of signal lines 30 arranged in a second direction Y, wherein the first group of signal lines 20 and the second group of signal lines 30 are positioned on two opposite sides of the same group of through holes, the second direction Y intersects with the first direction X, and optionally, the second direction Y is perpendicular to the first direction X;
The first signal lines 20 have a plurality of first protrusions 40, the second signal lines 30 have a plurality of second protrusions 50, the first protrusions 40 are located in gaps between two adjacent through holes 10 arranged along the first direction X and protrude inward of the gaps, and the second protrusions 50 are located in gaps between two adjacent through holes 10 arranged along the first direction X and protrude inward of the gaps.
In this embodiment, the first protrusions and the second protrusions are in one-to-one correspondence, and the first protrusions and the second protrusions corresponding to the first protrusions are located in the same gap, and the first protrusions and the second protrusions corresponding to the first protrusions are at least partially overlapped in the first direction, so that by setting the overlapping area of the first protrusions and the second protrusions in the first direction, the impedance of the first group of signal lines and the second group of signal lines is optimized, the signal transmission quality of the first group of signal lines and the second group of signal lines is improved, and the performance of an electronic device including the circuit board is improved.
Optionally, in an embodiment of the present application, the circuit board includes at least N groups of through holes, where N is an integer not less than 1, and in this embodiment, the circuit board includes M groups of signal lines, where M may be N-1, n+1, or N, which is not limited in this aspect of the present application, as the case may be.
Specifically, when m=n-1, signal lines are disposed in gaps between only two adjacent groups of through holes in the circuit board, in this embodiment, the circuit board includes at least three groups of through holes, and in this embodiment, the circuit board includes three groups of through holes arranged along the second direction, where a group of signal lines K1 are disposed between the first group of through holes T1 and the second group of through holes T2, and a group of signal lines K2 are disposed between the second group of through holes T2 and the third group of through holes T3.
When m=n+1, signal lines are disposed on two sides of any group of through holes in the circuit board, in this embodiment, taking the circuit board including two groups of through holes arranged along the second direction as an example, a group of signal lines K2 is disposed between the first group of through holes T1 and the second group of through holes T2, a group of signal lines K1 is disposed on a side of the second group of through holes T2 away from the first group of through holes T1, and a group of signal lines K3 is disposed on a side of the first group of through holes away from the second group of through holes.
When m=n, the through holes and the signal lines of each group are staggered in the circuit board.
It should be noted that, as further shown in fig. 1, when the circuit board has at least two sets of through holes T1 and T2 and three sets of signal lines K1, K2 and K3, the K1 set of signal lines are located on a side of the T1 set of through holes away from the T2 set of through holes, the K2 set of signal lines are located between the T1 set of through holes and the T2 set of through holes, and the K2 set of signal lines are located on a side of the T2 set of through holes away from the T1 set of through holes. In the present embodiment, the K2 group of signal lines is the second group of signal lines for the T1 group of vias and the first group of signal lines for the T2 group of vias. That is, when the J-th group signal line is located between the I-th group of through holes and the i+1-th group of through holes, the J-th group signal line is a first group signal line for the I-th group of through holes and a second group signal line for the i+1-th group of through holes, wherein I is an integer of not less than 1 and less than N in order.
It should be noted that, in the design specification of the circuit board, the distance between two adjacent through holes arranged along the first direction is fixed in the same group of through holes. Optionally, in an embodiment of the present application, overlapping portions of the first protrusion and the corresponding second protrusion are parallel to each other, so as to reduce a size requirement of two through holes corresponding to a position where the overlapping portions are located in the first direction on the premise that a distance between two adjacent through holes arranged in the first direction is fixed.
Specifically, on the basis of the foregoing embodiments, in one embodiment of the present application, the first protrusion and the second protrusion are rectangular protrusions, and the overlapping portion of the first protrusion and the second protrusion is a long side of the rectangle, so that on the premise that a gap between two adjacent through holes arranged along the first direction is fixed, a maximum possible overlapping area of the first protrusion and the second protrusion corresponding to the first protrusion is increased, and thus impedance adjustment capability of the first group of signal lines and the second group of signal lines is improved.
In the above embodiment, the first protrusion and the second protrusion are rectangular protrusions, and the overlapping portion of the first protrusion and the second protrusion is a long side of the rectangle, so that not only the overlapping area can be formed on the long side of the first protrusion and the long side of the second protrusion, that is, in the first direction, the surface of the first protrusion facing the second protrusion and the surface of the second protrusion facing the first protrusion, the impedance of the first group of signal lines and the second group of signal lines is adjusted, but also the capacitance can be formed between the surface of the first protrusion facing the second group of signal lines and the second group of signal lines, and the capacitance can be formed between the surface of the second protrusion facing the first group of signal lines and the first group of signal lines, and the impedance of the first group of signal lines and the second group of signal lines is adjusted, so that the impedance adjustment capability of the first group of signal lines and the second group of signal lines is further increased.
Optionally, in an embodiment of the present application, the extending direction of the first protrusion is perpendicular to the contact surface of the first protrusion with the first group of signal lines, and the extending direction of the second protrusion is perpendicular to the contact surface of the second protrusion with the second group of signal lines, so that on the premise that the overlapping area of the first protrusion and the second protrusion is the same, the lengths of the first protrusion and the second protrusion are reduced, and thus the area required to be occupied by the first protrusion and the second protrusion on the circuit board is reduced.
On the basis of any one of the above embodiments, in one embodiment of the present application, the first group of signal lines further has a third protrusion thereon, the third protrusion extending in a direction away from the first protrusion, so as to balance the impedance on the first group of signal lines by providing the first protrusion and the third protrusion on both sides of the first group of signal lines, respectively; similarly, the second group of signal lines are further provided with fourth protrusions, and the fourth protrusions extend along a direction away from the second protrusions, so that the impedance on the second group of signal lines is balanced by arranging the second protrusions and the fourth protrusions on two sides of the second group of signal lines respectively.
Specifically, on the basis of the above embodiment, in one embodiment of the present application, the first set of signal lines includes a first signal line and a second signal line that are parallel, so that the first set of signal lines adopts a Tabbed routing design, on the premise that the inductances of the first signal line and the second signal line are kept substantially unchanged, the mutual capacitance between the first signal line and the second signal line is increased, so that the increased capacitance is used to effectively reduce the impedance of the first set of signal lines and reduce the far-end crosstalk of the surface layer lines, that is, the first set of signal lines includes the first signal line and the second signal line that are parallel, on one hand, the impedance discontinuity of the first set of signal lines caused by the line width reduction can be improved, and on the other hand, the far-end crosstalk of the surface layer routing can also be reduced; similarly, the second set of signal lines includes parallel third signal lines and fourth signal lines, so that the second set of signal lines adopts Tabbed routing design, on the premise of keeping the inductances of the third signal lines and the fourth signal lines basically unchanged, the capacity between the third signal lines and the fourth signal lines is increased by increasing the mutual capacity between the third signal lines and the fourth signal lines, and therefore the impedance of the second set of signal lines is effectively reduced by using the increased capacity, and the far-end crosstalk of the surface layer lines is reduced, namely, the second set of signal lines includes parallel third signal lines and fourth signal lines, on one hand, the impedance discontinuity of the second set of signal lines caused by the line width reduction can be improved, and on the other hand, the far-end crosstalk of the surface layer routing can also be reduced.
Specifically, in the above-described embodiment, in the second direction, the second signal line is located between the first signal line and the third signal line, and the third signal line is located between the second signal line and the fourth signal line. In this embodiment, the first bump is located on a side of the second signal line facing the third signal line, and the second bump is located on a side of the third signal line facing the second signal line, so that the anti-interference capability of the first group of signal lines is improved by arranging the first bump and the third bump on the parallel first signal line and the second signal line, and the impedance of the first group of signal lines is managed and the inductance effect of the circuit board is supplemented by controlling the capacitance of the first group of signal lines, so that impedance matching is realized in the whole signal path, signal reflection is reduced, signal integrity and channel throughput are improved, and finally, the performance of the electronic device including the circuit board is improved; similarly, the third protrusion is located at one side of the first signal line away from the second signal line, and the fourth protrusion is located at one side of the fourth signal line away from the third signal line, so that the anti-interference capability of the second group of signal lines is improved by arranging the second protrusion and the fourth protrusion on the third signal line and the fourth signal line which are parallel, and the impedance of the second group of signal lines is managed and the inductance effect of the circuit board is complemented by controlling the capacitance of the second group of signal lines, so that impedance matching is realized in the whole signal path, signal reflection is reduced, signal integrity and channel throughput are improved, and finally the performance of electronic equipment comprising the circuit board is improved.
From the foregoing, from the perspective of signal transmission, factors affecting impedance on the signal transmission path include internal resistance on the chip core (die), package profile (pkg), PCB (Printed Circuit Board, circuit board) transmission line impedance, via (via), connector (connector), and the like. The PCB transmission line impedance further includes Pinfield (lead out area) area impedance, such as CPU break area) impedance or BGA (ball grid array) area impedance or Openfield (open field experiment) area impedance, and surface layer transmission line impedance.
It should be noted that, the signal transmission line in the pin area is often narrower, and the impedance is usually larger than that in the open field experimental area. Because of the unconventional condition of the pin area, PCB manufacturers typically only test the impedance of the open field test area, but do not guarantee impedance control of the pin area.
Optionally, in an embodiment of the present application, the circuit board includes a pin area (i.e. Pinfield area), and the first bump and the second bump are located in the pin area, so as to optimize impedance of the pin area by controlling capacitance between the first set of signal lines and the second set of signal lines, thereby implementing impedance matching with the open field experimental area, reducing signal reflection through matching impedance in the whole signal path, and improving signal integrity and throughput, and further improving signal transmission quality in the circuit board.
In another embodiment of the present application, the circuit board includes an open field test (Openfield) area where the first bump and the second bump are located to allow for more channel routing on the surface layer for longer pinout lengths by controlling the capacitance between the first set of signal lines and the second set of signal lines, performing line compression, and reducing source-side crosstalk on the external layer without affecting signal performance.
It should be noted that, in this embodiment, the circuit board may use different sizes of the first bump and the second bump to adjust the capacitance between the first set of signal lines and the second set of signal lines, so as to obtain different target impedances, so that the circuit board may be applied to impedance adjustment in different scenarios. Wherein the dimensions of the first protrusion and the second protrusion include: the length of the first protrusion, the width of the first protrusion, the length of the second protrusion, the width of the second protrusion, and the distance between the first protrusion and the second protrusion. Taking the first protrusion and the second protrusion as rectangular protrusions as examples, the length of the first protrusion is the length of the long side of the rectangle corresponding to the first protrusion, the width of the first protrusion is the width of the short side of the rectangle corresponding to the first protrusion, the length of the second protrusion is the length of the long side of the rectangle corresponding to the second protrusion, the width of the first protrusion is the width of the short side of the rectangle corresponding to the first protrusion, the distance between the first protrusion and the second protrusion is the distance between the first protrusion and the second protrusion corresponding to the first protrusion in the first direction.
Taking PCIE5.0 signal as an example, the overall signal link target impedance is 85 ohms. As shown in fig. 2, fig. 2 shows a schematic diagram of a circuit board with time-varying impedance of the whole signal link when the circuit board provided by the embodiment of the application is applied to a PCIE5.0 signal scene, and as can be seen from fig. 2, the impedance of 86.424 ohms can be implemented by the curve 1, and the impedance of 81.535 ohms can be implemented by the curve 2.
Therefore, the circuit board provided by the embodiment of the application can realize different impedance adjustment under different application scenes.
In addition, as the signal transmission rate is higher, the grade of the board used by the PCB is better, and the circuit board provided by the embodiment of the application can meet the impedance optimization of different board grades by adjusting at least one of the sizes of the first bulge and the second bulge, so that the impedance of the circuit board is close to the target impedance. Specifically, in practical application, the dimensions of the first bump and the second bump may be flexibly set through simulation results to obtain a required impedance, which is not limited in the present application, and is specific to the case.
Correspondingly, the embodiment of the application also provides a manufacturing method of the signal wire on the circuit board, which is applied to the circuit board provided by any embodiment, and specifically, as shown in fig. 3, the manufacturing method provided by the embodiment of the application comprises the following steps:
S1: a target impedance is determined, optionally in one embodiment of the application, the target impedance is 85 ohms.
S2: and determining a target size combination of the first protrusion and the second protrusion based on the impedance of the signal line on the circuit board and the target impedance under different size combinations of the first protrusion and the second protrusion.
Specifically, in one embodiment of the present application, the dimensions of the first protrusion and the second protrusion include a length of the first protrusion, a width of the first protrusion, a length of the second protrusion, a width of the second protrusion, and a distance between the first protrusion and the second protrusion. Taking the first protrusion and the second protrusion as rectangular protrusions as examples, the length of the first protrusion is the length of the long side of the rectangle corresponding to the first protrusion, the width of the first protrusion is the width of the short side of the rectangle corresponding to the first protrusion, the length of the second protrusion is the length of the long side of the rectangle corresponding to the second protrusion, the width of the first protrusion is the width of the short side of the rectangle corresponding to the first protrusion, the distance between the first protrusion and the second protrusion is the distance between the first protrusion and the second protrusion corresponding to the first protrusion in the first direction.
Optionally, in an embodiment of the present application, the different size combinations include different lengths of the first protrusion and the second protrusion, different widths of the first protrusion and the second protrusion, or different distances between the first protrusion and the second protrusion; in another embodiment of the present application, the different size combinations include: two of three different lengths of the first protrusion and the second protrusion, different widths of the first protrusion and the second protrusion, and different distances between the first protrusion and the second protrusion; in still another embodiment of the present application, the different size combinations include at least one of different lengths of the first protrusion and the second protrusion, different widths of the first protrusion and the second protrusion, and different distances between the first protrusion and the second protrusion, which is not limited thereto, as long as the different size combinations include at least one of different lengths of the first protrusion and the second protrusion, different widths of the first protrusion and the second protrusion, and different distances between the first protrusion and the second protrusion.
Specifically, in one embodiment of the present application, determining the target size combination of the first bump and the second bump based on the impedance of the signal line on the circuit board and the target impedance under different size combinations of the first bump and the second bump includes:
Firstly, simulating to obtain the impedance of a target area on the circuit board, taking the target area as a PinField area as an example, and simulating to obtain the impedance of a PinField area as 90ohm;
then, the impedance of the target area is optimized to the target impedance by simulation to obtain a target size combination of the first bump and the second bump, for example, the 90ohm impedance is optimized to be near the 85ohm target impedance to obtain the target size combination of the first bump and the second bump.
In another embodiment of the present application, determining a target size combination of the first bump and the second bump based on the impedance of the signal line on the circuit board and the target impedance at different size combinations of the first bump and the second bump includes:
Simulating the impedance of a signal line on the circuit board under the combination of different sizes of the first bulge and the second bulge;
And determining a target size combination of the first protrusion and the second protrusion based on a simulation result of the impedance of the signal line on the circuit board and the target impedance under different size combinations of the first protrusion and the second protrusion.
Optionally, in an embodiment of the present application, in the first direction, a spacing S between the first bump and the second bump is not less than 3mil, a minimum distance between the first bump and the second signal line is not less than 3mil, and a minimum distance between the second bump and the first signal line is not less than 3mil, so as to satisfy the existing process capability, but the present application is not limited thereto as long as it is within the allowable range of the process capability.
Specifically, in one embodiment of the present application, the target size combination is: s=4mil, l=8mil, w=4mil, that is, in the first direction, the space S between the first protrusion and the second protrusion is 4mil, the long side dimension L of the rectangular protrusion corresponding to the first protrusion and the second protrusion is 8mil, and the short side dimension W of the rectangular protrusion corresponding to the first protrusion and the second protrusion is 4 mil.
S3: and (3) manufacturing a signal line of at least part of the area on the circuit board based on the target size combination of the first bulge and the second bulge, and continuously taking the target area as a PinField area as an example, for example, implementing the target size combination obtained in the step (S2) to a PinField area.
In summary, in the electronic device, the circuit board and the manufacturing method thereof provided by the embodiments of the present application, a plurality of first protrusions and a plurality of second protrusions are respectively provided on a first group of signal lines and a second group of signal lines located on two sides of the same group of through holes in a second direction, the first protrusions and the second protrusions are in one-to-one correspondence, the first protrusions and the second protrusions corresponding to the first protrusions are located in the same gap, and the first protrusions and the second protrusions corresponding to the first protrusions at least partially overlap in the first direction, so that by setting overlapping areas of the first protrusions and the second protrusions in the first direction, impedance of the first group of signal lines and the second group of signal lines is optimized, signal transmission quality of the first group of signal lines and the second group of signal lines is improved, and performance of the electronic device including the circuit board is improved.
In the present specification, each embodiment is described in a progressive manner, or a parallel manner, or a combination of progressive and parallel manners, and each embodiment is mainly described as a difference from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A circuit board, comprising:
at least one set of through holes including a plurality of through holes arranged in a first direction;
a first group of signal lines and a second group of signal lines arranged in a second direction, the first group of signal lines and the second group of signal lines being located on opposite sides of the same group of through holes;
The first group of signal wires are provided with a plurality of first bulges, the second group of signal wires are provided with a plurality of second bulges, the first bulges are positioned in gaps between two adjacent through holes arranged along the first direction and protrude towards the inner side of the gaps, and the second bulges are positioned in gaps between two adjacent through holes arranged along the first direction and protrude towards the inner side of the gaps;
The first protrusions and the second protrusions are in one-to-one correspondence, the first protrusions and the second protrusions corresponding to the first protrusions are located in the same gap, and the first protrusions and the second protrusions corresponding to the first protrusions are at least partially overlapped in the first direction.
2. The circuit board of claim 1, overlapping portions of the first protrusion and its corresponding second protrusion being parallel to each other.
3. The circuit board according to claim 2, the first projection and the second projection being rectangular projections, an overlapping portion of the first projection and the second projection being a long side of the rectangle.
4. A circuit board according to claim 3, the first protrusion extending in a direction perpendicular to its contact surface with the first group of signal lines; the extending direction of the second bulge is perpendicular to the contact surface of the second bulge and the second group of signal wires.
5. The circuit board of claim 1, the first set of signal lines further having a third bump thereon, the second set of signal lines further having a fourth bump thereon, the third bump extending in a direction away from the first bump, the fourth bump extending in a direction away from the second bump.
6. The circuit board of claim 5, the first set of signal lines comprising parallel first and second signal lines, the second set of signal lines comprising parallel third and fourth signal lines;
Wherein, in the second direction, the second signal line is located between the first signal line and the third signal line, and the third signal line is located between the second signal line and the fourth signal line; the first bulge is located on one side of the second signal line facing the third signal line, the second bulge is located on one side of the third signal line facing the second signal line, the third bulge is located on one side of the first signal line away from the second signal line, and the fourth bulge is located on one side of the fourth signal line away from the third signal line.
7. The circuit board of claim 1, comprising a pin area, the first bump and the second bump being located in the pin area.
8. An electronic device comprising at least one circuit board according to any one of claims 1-7.
9. A method for manufacturing a signal wire on a circuit board, which is applied to the circuit board of any one of claims 1-7; the manufacturing method comprises the following steps:
Determining a target impedance;
Determining a target size combination of the first bump and the second bump based on the impedance of the signal line on the circuit board and the target impedance under different size combinations of the first bump and the second bump;
and manufacturing a signal wire of at least part of the area on the circuit board based on the target size combination of the first bulge and the second bulge.
10. The method of claim 9, wherein the combination of different dimensions includes at least one of the following dimensions
The first protrusion and the second protrusion have different lengths;
the widths of the first protrusion and the second protrusion are different;
The distance between the first protrusion and the second protrusion is different.
CN202410205050.7A 2024-02-23 2024-02-23 Circuit board, manufacturing method thereof and electronic equipment Pending CN117896894A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410205050.7A CN117896894A (en) 2024-02-23 2024-02-23 Circuit board, manufacturing method thereof and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410205050.7A CN117896894A (en) 2024-02-23 2024-02-23 Circuit board, manufacturing method thereof and electronic equipment

Publications (1)

Publication Number Publication Date
CN117896894A true CN117896894A (en) 2024-04-16

Family

ID=90649227

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410205050.7A Pending CN117896894A (en) 2024-02-23 2024-02-23 Circuit board, manufacturing method thereof and electronic equipment

Country Status (1)

Country Link
CN (1) CN117896894A (en)

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