CN117890759A - Time measurement circuit, TMU test system and test equipment - Google Patents
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Abstract
In the time measurement circuit, a signal input unit is used for accessing a signal to be detected, and the signal to be detected is a single-ended signal or a differential signal; the differential signal processing unit is used for receiving the differential signal and outputting a processing signal according to the differential signal; the detection unit is used for receiving the single-ended signal and detecting the time parameter of the single-ended signal; or is used for receiving the processing signal and detecting the time parameter of the differential signal according to the processing signal; on the one hand, the differential signal processing unit processes the differential signal and then outputs a processed signal, and the detection unit is arranged to realize the detection of the time parameter of the differential signal through the processed signal; on the other hand, the switching unit is selectively connected to the differential signal processing unit or the detection unit to the signal input unit so as to realize the switching between the single-ended signal detection and the differential signal detection, thereby being beneficial to improving the applicability of the time measurement circuit.
Description
Technical Field
The application belongs to the technical field of semiconductor testing, and particularly relates to a time measurement circuit, a TMU (TMU) testing system and testing equipment.
Background
In high-speed signal processing, accurate timing, etc., accurately measuring time can greatly improve system performance. In particular, in semiconductor automation testing, measuring time-to-alternating parameters of integrated circuits is a particularly critical and important part of production testing. For example, in measuring the slew rate of an operational amplifier of an integrated circuit, it is required to measure the rise time and fall time of the voltage thereof; when measuring the integrated circuit comparator, the alternating current parameters such as delay time and the like are required to be measured; it is sometimes also necessary to measure parameters such as its period, frequency and pulse width. The measurement of the above communication parameters all need a special TMU (time measurement unit) test system to be realized.
However, in the related art, the time measurement circuit in the TMU test system generally can perform time measurement only on a single-ended signal, which is a voltage or current signal existing at only one reference point of the circuit, and when the signal to be detected is a voltage or current at two reference points, the current time measurement circuit is difficult to be applied.
Disclosure of Invention
The utility model provides a time measurement circuit, TMU test system and test equipment aims at solving the low problem of the suitability of time measurement circuit among the conventional art.
A first aspect of an embodiment of the present application proposes a time measurement circuit, the time measurement circuit comprising:
the signal input unit is used for accessing a signal to be detected, and the signal to be detected is a single-ended signal or a differential signal;
the differential signal processing unit is used for receiving the differential signal and outputting a processing signal according to the differential signal;
the detection unit is used for receiving the single-ended signal and detecting the time parameter of the single-ended signal; or is used for receiving the processing signal and detecting the time parameter of the differential signal according to the processing signal;
and the switching unit is arranged among the signal input unit, the differential signal processing unit and the detection unit and is used for selectively accessing the differential signal processing unit or the detection unit to the signal input unit.
In some embodiments of the present application, the signal input unit includes a first signal input terminal and a second signal input terminal; the switching unit comprises a first switching piece, a second switching piece, a third switching piece and a fourth switching piece;
the first switch piece is arranged between the first signal input end and the detection unit, and the second switch piece is arranged between the first signal input end and the differential signal processing unit; the third switch piece is arranged between the second signal end and the detection unit, and the fourth switch piece is arranged between the second signal end and the differential signal processing unit.
In some embodiments of the present application, the differential signal includes a first sub-signal and a second sub-signal, where the first signal input terminal is used for accessing the first sub-signal, and the second signal input terminal is used for accessing the second sub-signal;
the differential signal processing unit comprises a first operational amplifier, wherein the first operational amplifier is used for receiving the first sub-signal and the second sub-signal and outputting the processing signal according to the first sub-signal and the second sub-signal.
In some embodiments of the present application, the first operational amplifier includes a first input end, a second input end, and a first output end, where the first input end is connected to the first switch element, the second input end is connected to the second switch element, and the first output end is connected to the detection unit;
the differential signal processing unit further comprises a first resistor and a second resistor, wherein the first resistor is connected in series between the first input end and the second switch element, one end of the second resistor is connected between the first resistor and the first input end, and the other end of the second resistor is connected between the first output end and the detection unit;
and/or the differential signal processing unit further comprises a third resistor and a fourth resistor, wherein the third resistor is connected in series between the second input end and the fourth switch element, one end of the fourth resistor is connected between the third resistor and the second input end, and the other end of the fourth resistor is grounded.
In some embodiments of the present application, the differential signal processing unit further includes a fifth resistor and a fifth switch element, one end of the fifth switch element is connected between the second switch element and the first resistor, the other end of the fifth switch element is connected with the fifth resistor, and one end of the fifth resistor, which is far away from the fifth switch element, is connected between the fourth switch element and the third resistor.
In some embodiments of the present application, the time measurement circuit further includes a first comparator, where the first comparator is configured to access the processing signal and a first reference signal, and output a first comparison signal to the detection unit according to the processing signal and the first reference signal;
and/or the time measurement circuit further comprises a second comparator, wherein the second comparator is used for accessing the single-ended signal and a second reference signal and outputting a second comparison signal to the detection unit according to the single-ended signal and the second reference signal;
the first reference signal is a high-level signal, and the second reference signal is a low-level signal.
In some embodiments of the present application, the time measurement circuit further includes a second operational amplifier, where the second operational amplifier includes a third input terminal, a fourth input terminal, and a second output terminal, the third input terminal is connected to the first signal input terminal, the second output terminal is connected to the first switch element and the second switch element, and the fourth input terminal is connected to the second output terminal;
and/or, the time measurement circuit further comprises a third operational amplifier, the third operational amplifier comprises a fifth input end, a sixth input end and a third output end, the fifth input end is connected with the second signal input end, the third output end is connected with the third switch element and the fourth switch element, and the sixth input end is connected with the third output end.
In some embodiments of the present application, the time measurement circuit further includes a first clamping unit, where the first clamping unit includes a first diode and a second diode, an anode of the first diode is used to access a first limiting voltage, and a cathode of the first diode is connected between the third input end and the first signal input end;
the anode of the second diode is connected between the third input end and the first signal input end, and the cathode of the second diode is used for being connected with a second limiting voltage;
wherein the voltage value of the first limit voltage is higher than the voltage value of the second limit voltage;
and/or the time measurement circuit further comprises a second clamping unit, wherein the second clamping unit comprises a third diode and a fourth diode, the positive electrode of the third diode is used for being connected with the first limit voltage, and the negative electrode of the third diode is connected between the fifth input end and the second signal input end;
the positive pole of the fourth diode is connected between the fifth input end and the second signal input end, and the negative pole of the fourth diode is used for being connected with the second limiting voltage.
In some embodiments of the present application, the time measurement circuit includes a first voltage division unit, where the first voltage division unit includes a sixth switch element, a sixth resistor, and a seventh resistor, where the sixth resistor is disposed in series between the first signal input end and the first clamping unit, one end of the sixth switch element is connected between the sixth resistor and the first clamping unit, the other end of the sixth switch element is connected to the seventh resistor, and one end of the seventh resistor, far from the sixth switch element, is grounded;
and/or, the time measurement circuit further comprises a second voltage division unit, the second voltage division unit comprises a seventh switch piece, an eighth resistor and a ninth resistor, the eighth resistor is arranged between the second signal input end and the second clamping unit in series, one end of the seventh switch piece is connected between the eighth resistor and the second clamping unit, the other end of the seventh switch piece is connected with the ninth resistor, and one end of the ninth resistor far away from the seventh switch piece is grounded.
In a second aspect, the present application further provides a TMU test system, the TMU test system including a time measurement circuit as described above.
In a third aspect, the present application further provides a test apparatus comprising the time measurement circuit described above.
Compared with the prior art, the embodiment of the invention has the beneficial effects that: the time measurement circuit comprises a signal input unit, a differential signal processing unit, a detection unit and a switching unit; the signal input unit is used for accessing a signal to be detected, and the signal to be detected is a single-ended signal or a differential signal; the differential signal processing unit is used for receiving the differential signal and outputting a processing signal according to the differential signal; the detection unit is used for receiving the single-ended signal and detecting the time parameter of the single-ended signal; or is used for receiving the processing signal and detecting the time parameter of the differential signal according to the processing signal; the switching unit is arranged among the signal input unit, the differential signal processing unit and the detection unit; that is, on the one hand, the differential signal processing unit processes the differential signal and then outputs a processed signal, and the detection unit is arranged to be capable of detecting the time parameter of the differential signal through the processed signal; on the other hand, the differential signal processing unit or the detection unit is selectively connected to the signal input unit through the switching unit, so that the switching between single-ended signal detection and differential signal detection is realized, and the applicability of the time measurement circuit is improved.
Drawings
FIG. 1 is a schematic diagram of a time measurement circuit according to an embodiment of the present disclosure;
FIG. 2 is a schematic circuit diagram of a time measurement circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram of a frame structure of a time measurement circuit according to another embodiment of the present application.
Specific element symbol description: 100-signal input unit, 110-first signal input end, 120-second signal input end, 200-differential signal processing unit, 300-detection unit, 400-switching unit, 500-first clamping unit, 600-second clamping unit, 700-first voltage dividing unit, 800-second voltage dividing unit, OP 1-third operational amplifier, OP 2-second operational amplifier, OP 3-first operational amplifier, CMP 1-first comparator, CMP 2-second comparator, R1-eighth resistor, R2-ninth resistor, R3-twelfth resistor, R4-thirteenth resistor, R5-sixth resistor, R6-seventh resistor, R7-tenth resistor, R8-eleventh resistor, R9-third resistor, R10-first resistor, R11-fourth resistor, R12-second resistor, K15-first switch, K5-seventh switch, K8-sixth switch, K11-fifth switch, K12-fourth switch, K13-third switch, K13-fourth switch, D4-D diode, D4-fourth switch, D4-D diode.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved by the present application more clear, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
It will be understood that when an element is referred to as being "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It should be appreciated that the terms "length," "width," "upper," "lower," "inner," "outer," and the like indicate an orientation or positional relationship based on that shown in the drawings, merely to facilitate description of the present application and simplify the description, and do not indicate or imply that the apparatus or element in question must have a particular orientation, be configured and operated in a particular orientation, and therefore should not be construed as limiting the present application.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
It should be noted that in the fields of electronics and communication, measurement of time is critical for many applications. For example, in the fields of high-speed signal processing, accurate timing, radar systems, wireless communications, etc., accurately measuring time can greatly improve the performance of the system.
However, in the related art, the time measurement circuit generally can only perform time measurement on a single-ended signal, which is a voltage or current signal existing at only one reference point of the circuit, and when the signal to be detected is a voltage or current at two reference points, the current time measurement circuit is difficult to be applied.
Accordingly, the present application is based on this improvement of related time measurement circuits, TMU test systems and test equipment.
Referring to fig. 1 in combination, fig. 1 is a schematic diagram showing a frame structure of a time measurement circuit according to the present embodiment. A time measurement circuit of the present embodiment includes a signal input unit 100, a differential signal processing unit 200, a detection unit 300, and a switching unit 400. It should be explained that the time measurement circuit mainly measures the time parameter of the signal, for example, when measuring the slew rate of the operational amplifier, the rising time and falling time of the voltage need to be measured; the comparator needs to measure parameters such as delay time and the like, and even can measure parameters such as period, frequency, pulse width and the like.
The signal input unit 100 in this embodiment is configured to access a signal to be detected, where the signal to be detected is a single-ended signal or a differential signal; the differential signal processing unit 200 is configured to receive the differential signal and output a processing signal according to the differential signal; the detecting unit 300 is configured to receive a single-ended signal and detect a time parameter of the single-ended signal; or is used for receiving the processing signal and detecting the time parameter of the differential signal according to the processing signal; the switching unit 400 is disposed among the signal input unit 100, the differential signal processing unit 200, and the detection unit 300, and is used to selectively access the differential signal processing unit 200 or the detection unit 300 to the signal input unit 100.
It should be explained that a single-ended signal is understood to be a voltage or current signal that is present at only one reference point of the circuit, and a differential signal is understood to be a voltage or current signal that is present at both reference points of the circuit. That is, the differential signal is a double-ended signal, and the double-ended differential signal can be combined into a single-ended signal by the differential signal processing unit 200.
The current time detection circuit can only measure the time parameter of the single-ended signal, so that the application range of the current time detection circuit is small. However, the time detection circuit in the embodiment of the present application outputs the processed signal after processing the differential signal by the differential signal processing unit 200 on the one hand, and the detection of the time parameter of the differential signal can be achieved by setting the detection unit 300 to process the signal; on the other hand, the switching unit 400 is further used to selectively access the differential signal processing unit 200 or the detecting unit 300 to the signal input unit 100, so as to realize switching between single-ended signal detection and differential signal detection, thereby being beneficial to improving the applicability of the time measurement circuit.
In some embodiments, the detection unit 300 is an FPGA (Field-Programmable Gate Array, field programmable gate array) unit.
In some embodiments of the present application, referring to fig. 2, fig. 2 shows a circuit configuration diagram of a time measurement circuit provided in the present embodiment. The signal input unit 100 of the present embodiment includes a first signal input terminal 110 and a second signal input terminal 120; the switching unit 400 includes a first switching part K15, a second switching part, a third switching part, and a fourth switching part; wherein the first switch member K15 is disposed between the first signal input terminal 110 and the detecting unit 300, and the second switch member is disposed between the first signal input terminal 110 and the differential signal processing unit 200; the third switching element is disposed between the second signal terminal and the detecting unit 300, and the fourth switching element is disposed between the second signal terminal and the differential signal processing unit 200.
It should be explained that, when the signal to be detected is a single-ended signal, the single-ended signal can be connected along the first signal input terminal 110, and at this time, the first switch member K15 can be opened, and the second switch member is opened, and the single-ended signal can be directly transmitted to the detecting unit 300 along the first switch member K15, so that the detecting unit 300 can measure the time parameter of the single-ended signal. Alternatively, the single-ended signal can be connected along the second signal input 120, at which time the third switch element can be opened and the fourth switch element opened, and the single-ended signal can be directly transmitted along the third switch element to the detecting unit 300, so that the detecting unit 300 measures the time parameter of the single-ended signal.
When the signal to be detected is a differential signal, the differential signal includes a first sub-signal and a second sub-signal, the first sub-signal is connected along the first signal input end 110, at this time, the first switch element K15 is disconnected, the second switch element is opened, and the first sub-signal can be transmitted to the differential signal processing unit 200 along the second switch element; the second sub-signal is connected along the second signal input terminal 120, and at this time, the third switch element is turned off, and the fourth switch element is turned on, so that the second sub-signal can be transmitted to the differential signal processing unit 200 along the second switch element; the differential signal processing unit 200 can output a processing signal after operating the first sub-signal and the second sub-signal.
In some embodiments, the first switch element K15, the second switch element, the third switch element and the fourth switch element may be power switch transistors, and the gate voltage of the power switch transistors is controlled to control the on/off of the power switch transistors, so as to implement the switching function of the switch elements.
In some embodiments of the present application, please continue to refer to fig. 2, the differential signal of the present embodiment includes a first sub-signal and a second sub-signal, the first signal input terminal 110 is used for accessing the first sub-signal, and the second signal input terminal 120 is used for accessing the second sub-signal; the differential signal processing unit 200 includes a first operational amplifier OP3, where the first operational amplifier OP3 is configured to receive the first sub-signal and the second sub-signal, and output a processing signal according to the first sub-signal and the second sub-signal.
It should be explained that, the positive electrode of the first operational amplifier OP3 is connected to the second sub-signal, the negative electrode is connected to the first sub-signal, and the processing signal can be output according to the first sub-signal and the second sub-signal.
In some embodiments of the present application, please continue to refer to fig. 2 and fig. 3, fig. 3 shows a frame structure diagram of the time measurement circuit provided in the present embodiment; the first operational amplifier OP3 of this embodiment includes a first input end, a second input end and a first output end, where the first input end is connected to the first switch element K15, the second input end is connected to the second switch element, and the first output end is connected to the detection unit 300; the differential signal processing unit 200 further includes a first resistor R10 and a second resistor R12, where the first resistor R10 is connected in series between the first input end and the second switch element, and one end of the second resistor R12 is connected between the first resistor R10 and the first input end, and the other end is connected between the first output end and the detection unit 300; and/or, the differential signal processing unit 200 further includes a third resistor R9 and a fourth resistor R11, where the third resistor R9 is connected in series between the second input end and the fourth switching element, and one end of the fourth resistor R11 is connected between the third resistor R9 and the second input end, and the other end is grounded.
It should be noted that the first sub-signal can be amplified, reduced, or followed by setting the resistance values of the first resistor R10 and the second resistor R12; the second sub-signal can be amplified, reduced, or followed by setting the resistance values of the third resistor R9 and the fourth resistor R11. In an exemplary illustration, if the magnitude of the signal to be measured needs to be reduced by 2 times, the resistance value of the first resistor R10 can be selected to be twice that of the second resistor R12, and then the magnitude of the first sub-signal is reduced by half; the resistance value of the third resistor R9 may also be chosen to be twice the resistance value of the fourth resistor R11, the amplitude of the second sub-signal being reduced by half.
In some embodiments of the present application, please continue to refer to fig. 2, the differential signal processing unit 200 of the present embodiment further includes a fifth resistor and a fifth switch, one end of the fifth switch is connected between the second switch and the first resistor R10, the other end is connected with the fifth resistor, and one end of the fifth resistor far from the fifth switch is connected between the fourth switch and the third resistor R9.
It should be noted that by closing the fifth switching element, a terminating resistor can be connected between the first input and the second input. In some embodiments, the fifth resistor has a resistance value of 80-120Ω. Specifically, the resistance value of the fifth resistor is 100deg.OMEGA.
In some embodiments of the present application, please continue to refer to fig. 2, the time measurement circuit of the present embodiment further includes a first comparator CMP1, the first comparator CMP1 is configured to access the processing signal and the first reference signal, and output the first comparison signal to the detection unit 300 according to the processing signal and the first reference signal; and/or, the time measurement circuit further includes a second comparator CMP2, where the second comparator CMP2 is configured to access the single-ended signal and the second reference signal, and output the second comparison signal to the detection unit 300 according to the single-ended signal and the second reference signal; the first reference signal is a high level signal, and the second reference signal is a low level signal.
It should be explained that the first comparator CMP1 and the second comparator CMP2 are high-speed window comparators, and the high-speed window comparators have the characteristics of high bandwidth, high slew rate, low propagation delay, and the like. The comparison threshold VOH/VOL of the window comparator is set by the reference voltage input unit DAC, and the comparison results of the first comparator CMP1 and the second comparator CMP2 are input to the detection unit 300 to be processed, and the output level forms of the first comparator CMP1 and the second comparator CMP2 are selected by default to CMOS (Complementary Metal-Oxide-Semiconductor, complementary metal Oxide Semiconductor). If a higher transmission rate is required, a comparator with an output level of LVDS (Low Voltage Differential Signaling, low voltage differential signal) can be selected, so that the anti-interference capability can be improved, and the comparison result can be accurately input into the detection unit 300 for processing.
In some embodiments of the present application, please continue to refer to fig. 2, the time measurement circuit of the present embodiment further includes a second operational amplifier OP2, where the second operational amplifier OP2 includes a third input terminal, a fourth input terminal and a second output terminal, the third input terminal is connected to the first signal input terminal 110, the second output terminal is connected to the first switch element K15 and the second switch element, and the fourth input terminal is connected to the second output terminal; and/or, the time measurement circuit further comprises a third operational amplifier OP1, the third operational amplifier OP1 comprises a fifth input end, a sixth input end and a third output end, the fifth input end is connected with the second signal input end 120, the third output end is connected with the third switch element and the fourth switch element, and the sixth input end is connected with the third output end.
The first operational amplifier OP3 and the second operational amplifier OP2 can be used as a follower, which is equivalent to a buffer structure for performing impedance transformation, so that the front-stage resistor voltage divider network does not affect the rear-stage comparator circuit and the differential-to-single-ended circuit.
In some embodiments, when the input signal to be measured has a high frequency, the first operational amplifier OP3, the second operational amplifier OP2 and the third operational amplifier OP1 all satisfy: GBW (GBW)>H×f hf ×A F The method comprises the steps of carrying out a first treatment on the surface of the Wherein GBW is the operational amplifier gain bandwidth product, f hf For the closed loop bandwidth of the operational amplifier, A F For the closed loop voltage gain of the operational amplifier, H is a safety factor, and the larger the value of H is, the more can meet the design requirement. In some embodiments, H.epsilon.10, 100]. In an exemplary embodiment, an amplifier circuit is required to be designed with a closed loop gain of 10 times, a closed loop bandwidth of greater than 20kHz, and a gain-bandwidth product GBW of the amplifier. From the above equation, by selecting h=10, GBW can be calculated>10×20kHz×10＝2MHz；
In some embodiments of the present application, please continue to refer to fig. 2 and 3, the time measurement circuit of the present embodiment further includes a first clamping unit 500, the first clamping unit 500 includes a first diode and a second diode, the anode of the first diode is used for accessing a first limiting voltage, and the cathode of the first diode is connected between the third input terminal and the first signal input terminal 110; the anode of the second diode is connected between the third input end and the first signal input end 110, and the cathode of the second diode is used for being connected with a second limiting voltage; the voltage value of the first limiting voltage is higher than that of the second limiting voltage; and/or, the time measurement circuit further comprises a second clamping unit 600, the second clamping unit 600 comprises a third diode and a fourth diode, the positive electrode of the third diode is used for being connected with the first limit voltage, and the negative electrode of the third diode is connected between the fifth input end and the second signal input end 120; the positive pole of the fourth diode is connected between the fifth input terminal and the second signal input terminal 120, and the negative pole of the fourth diode is used for accessing the second limiting voltage.
It should be noted that, in order to prevent the high voltage signal to be detected from being directly input to the second operational amplifier OP2 and the third operational amplifier OP1 due to the failure of the resistor voltage dividing network, the operational amplifier structure is burnt. The front end of the second operational amplifier OP2 is added with a first diode and a second diode, the front end of the third operational amplifier OP1 is added with a third diode and a fourth diode, when the voltage input to the second operational amplifier OP2 and the third operational amplifier OP1 is larger than VDD+0.3V or smaller than VSS-0.3V, VDD is the voltage value of the first limiting voltage, VSS is the voltage value of the second limiting voltage, the voltage clamping circuit is effective, and the post-stage operational amplifier is protected from damage.
In some embodiments of the present application, please continue to refer to fig. 2 and 3, the time measurement circuit of the present embodiment includes a first voltage division unit 700, where the first voltage division unit 700 includes a sixth switch element, a sixth resistor R5 and a seventh resistor R6, the sixth resistor R5 is serially arranged between the first signal input end 110 and the first clamping unit 500, one end of the sixth switch element is connected between the sixth resistor R5 and the first clamping unit 500, the other end is connected with the seventh resistor R6, and one end of the seventh resistor R6 far from the sixth switch element is grounded; and/or, the time measurement circuit further includes a second voltage division unit 800, where the second voltage division unit 800 includes a seventh switch element, an eighth resistor R1, and a ninth resistor R2, the eighth resistor R1 is serially disposed between the second signal input end 120 and the second clamping unit 600, one end of the seventh switch element is connected between the eighth resistor R1 and the second clamping unit 600, the other end is connected with the ninth resistor R2, and one end of the ninth resistor R2 far from the seventh switch element is grounded.
It should be noted that the voltage value of the signal to be detected can be reduced by turning on the sixth switching element and/or the seventh switching element to perform the voltage division function.
In some embodiments, the first voltage dividing unit 700 further includes tenth and eleventh resistors R7 and R8, and the tenth and eleventh resistors R7 and R8 are optionally connected in parallel with the seventh resistor R6. That is, switching on the tenth resistor R7 and/or the eleventh resistor R8 can also function as a voltage dividing function. Specifically, any one of the seventh resistor R6, the tenth resistor R7 and the eleventh resistor R8 is selected to be connected into the circuit, so that different voltage division ratios are selected.
In some embodiments, the second voltage divider further includes a twelfth resistor R3 and a thirteenth resistor R4, the twelfth resistor R3 and the thirteenth resistor R4 being optionally connected in parallel with the eighth resistor R1. That is, switching on the twelfth resistor R3 and/or the thirteenth resistor R4 can also function as a voltage dividing function. Specifically, any one of the eighth resistor R1, the twelfth resistor R3 and the thirteenth resistor R4 is selected to be connected into the circuit, so that different voltage division ratios are selected.
In some embodiments, the time measurement circuit further comprises a first input impedance access unit comprising a first impedance resistor selectively connectable between the first signal input 110 and the first voltage divider unit 700. In some embodiments, the first impedance resistor has a resistance value of 50Ω. When the first signal input terminal 110 and the first voltage dividing unit 700 are turned off, the first impedance resistor may be turned on to make the first signal input terminal 110 exhibit a high impedance state.
In some embodiments, the time measurement circuit further includes a second input impedance access unit including a second impedance resistor selectively connectable between the second signal input 120 and the second voltage divider unit 800. In some embodiments, the second impedance resistor has a resistance value of 50Ω. When the second signal input terminal 120 and the second voltage division unit 800 are turned off, the second impedance resistor may be turned on to make the second signal input terminal 120 exhibit a high impedance state.
Further, in order to better implement the time measurement circuit in any embodiment, the application further provides a TMU test system, which includes the TMU test system, on the basis of the time measurement circuit in any embodiment.
Furthermore, in order to better implement the TMU test system in any embodiment, the application further provides a test device, which includes the TMU test system in any embodiment, on the basis of the TMU test system in any embodiment.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
While the basic concepts have been described above, it will be apparent to those skilled in the art that the foregoing detailed disclosure is by way of example only and is not intended to be limiting. Although not explicitly described herein, various modifications, improvements, and adaptations of the present application may occur to one skilled in the art. Such modifications, improvements, and modifications are intended to be suggested within this application, and are therefore within the spirit and scope of the exemplary embodiments of this application.
Meanwhile, the present application uses specific words to describe embodiments of the present application. Reference to "one embodiment," "an embodiment," and/or "some embodiments" means that a particular feature, structure, or characteristic is associated with at least one embodiment of the present application. Thus, it should be emphasized and should be appreciated that two or more references to "an embodiment" or "one embodiment" or "an alternative embodiment" in various positions in this specification are not necessarily referring to the same embodiment. Furthermore, certain features, structures, or characteristics of one or more embodiments of the present application may be combined as suitable.
Likewise, it should be noted that in order to simplify the presentation disclosed herein and thereby aid in understanding one or more inventive embodiments, various features are sometimes grouped together in a single embodiment, figure, or description thereof. This method of disclosure, however, is not intended to imply that more features than are presented in the claims are required for the subject application. Indeed, less than all of the features of a single embodiment disclosed above.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (10)
1. A time measurement circuit, the time measurement circuit comprising:
the signal input unit is used for accessing a signal to be detected, and the signal to be detected is a single-ended signal or a differential signal;
the differential signal processing unit is used for receiving the differential signal and outputting a processing signal according to the differential signal;
the detection unit is used for receiving the single-ended signal and detecting the time parameter of the single-ended signal; or is used for receiving the processing signal and detecting the time parameter of the differential signal according to the processing signal;
and the switching unit is arranged among the signal input unit, the differential signal processing unit and the detection unit and is used for selectively accessing the differential signal processing unit or the detection unit to the signal input unit.
2. The time measurement circuit of claim 1, wherein the signal input unit comprises a first signal input and a second signal input; the switching unit comprises a first switching piece, a second switching piece, a third switching piece and a fourth switching piece;
the first switch piece is arranged between the first signal input end and the detection unit, and the second switch piece is arranged between the first signal input end and the differential signal processing unit; the third switch piece is arranged between the second signal end and the detection unit, and the fourth switch piece is arranged between the second signal end and the differential signal processing unit.
3. The time measurement circuit of claim 2, wherein the differential signal comprises a first sub-signal and a second sub-signal, the first signal input for accessing the first sub-signal and the second signal input for accessing the second sub-signal;
the differential signal processing unit comprises a first operational amplifier, wherein the first operational amplifier is used for receiving the first sub-signal and the second sub-signal and outputting the processing signal according to the first sub-signal and the second sub-signal.
4. A time measurement circuit according to claim 3, wherein the first operational amplifier comprises a first input terminal, a second input terminal and a first output terminal, the first input terminal being connected to the first switch element, the second input terminal being connected to the second switch element, the first output terminal being connected to the detection unit;
the differential signal processing unit further comprises a first resistor and a second resistor, wherein the first resistor is connected in series between the first input end and the second switch element, one end of the second resistor is connected between the first resistor and the first input end, and the other end of the second resistor is connected between the first output end and the detection unit;
and/or the differential signal processing unit further comprises a third resistor and a fourth resistor, wherein the third resistor is connected in series between the second input end and the fourth switch element, one end of the fourth resistor is connected between the third resistor and the second input end, and the other end of the fourth resistor is grounded.
5. The time measurement circuit of claim 4, wherein the differential signal processing unit further comprises a fifth resistor and a fifth switch element, one end of the fifth switch element is connected between the second switch element and the first resistor, the other end is connected to the fifth resistor, and one end of the fifth resistor, which is far from the fifth switch element, is connected between the fourth switch element and the third resistor.
6. The time measurement circuit of claim 1, further comprising a first comparator for accessing the processing signal and a first reference signal and outputting a first comparison signal to the detection unit based on the processing signal and the first reference signal;
and/or the time measurement circuit further comprises a second comparator, wherein the second comparator is used for accessing the single-ended signal and a second reference signal and outputting a second comparison signal to the detection unit according to the single-ended signal and the second reference signal;
the first reference signal is a high-level signal, and the second reference signal is a low-level signal.
7. The time measurement circuit of claim 2, further comprising a second operational amplifier, the second operational amplifier comprising a third input terminal, a fourth input terminal, and a second output terminal, the third input terminal coupled to the first signal input terminal, the second output terminal coupled to the first switch element and the second switch element, the fourth input terminal coupled to the second output terminal;
and/or, the time measurement circuit further comprises a third operational amplifier, the third operational amplifier comprises a fifth input end, a sixth input end and a third output end, the fifth input end is connected with the second signal input end, the third output end is connected with the third switch element and the fourth switch element, and the sixth input end is connected with the third output end.
8. The time measurement circuit of claim 7, further comprising a first clamping unit comprising a first diode and a second diode, wherein the anode of the first diode is used for accessing a first limiting voltage, and the cathode of the first diode is connected between the third input terminal and the first signal input terminal;
the anode of the second diode is connected between the third input end and the first signal input end, and the cathode of the second diode is used for being connected with a second limiting voltage;
wherein the voltage value of the first limit voltage is higher than the voltage value of the second limit voltage;
and/or the time measurement circuit further comprises a second clamping unit, wherein the second clamping unit comprises a third diode and a fourth diode, the positive electrode of the third diode is used for being connected with the first limit voltage, and the negative electrode of the third diode is connected between the fifth input end and the second signal input end;
the anode of the fourth diode is connected between the fifth input end and the second signal input end, and the cathode of the fourth diode is used for being connected with the second limiting voltage;
and/or the time measurement circuit comprises a first voltage division unit, wherein the first voltage division unit comprises a sixth switch piece, a sixth resistor and a seventh resistor, the sixth resistor is arranged between the first signal input end and the first clamping unit in series, one end of the sixth switch piece is connected between the sixth resistor and the first clamping unit, the other end of the sixth switch piece is connected with the seventh resistor, and one end of the seventh resistor far away from the sixth switch piece is grounded;
and/or, the time measurement circuit further comprises a second voltage division unit, the second voltage division unit comprises a seventh switch piece, an eighth resistor and a ninth resistor, the eighth resistor is arranged between the second signal input end and the second clamping unit in series, one end of the seventh switch piece is connected between the eighth resistor and the second clamping unit, the other end of the seventh switch piece is connected with the ninth resistor, and one end of the ninth resistor far away from the seventh switch piece is grounded.
9. A TMU test system comprising the time measurement circuit of any one of claims 1 to 8.
10. A test apparatus comprising the time measurement circuit of claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311786685.2A CN117890759A (en) | 2023-12-22 | 2023-12-22 | Time measurement circuit, TMU test system and test equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311786685.2A CN117890759A (en) | 2023-12-22 | 2023-12-22 | Time measurement circuit, TMU test system and test equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117890759A true CN117890759A (en) | 2024-04-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311786685.2A Pending CN117890759A (en) | 2023-12-22 | 2023-12-22 | Time measurement circuit, TMU test system and test equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117890759A (en) |
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2023
- 2023-12-22 CN CN202311786685.2A patent/CN117890759A/en active Pending
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