CN117879581A - Bipolar rail-to-rail differential front-end input circuit for sigma delta ADC - Google Patents
Bipolar rail-to-rail differential front-end input circuit for sigma delta ADC Download PDFInfo
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Abstract
The invention belongs to the field of digital isolators, and discloses a bipolar rail-to-rail differential front-end input circuit for a sigma delta ADC, which comprises an input voltage division circuit, a bipolar-to-single-ended VGA circuit and a full-differential conversion circuit; the input voltage dividing circuit is used for reducing the input signal voltage to a preset range, obtaining a reduced voltage input signal and outputting the reduced voltage input signal to the bipolar-to-single-ended VGA circuit; the bipolar-to-single-ended VGA circuit is used for carrying out amplitude adjustment on a step-down input signal, converting the step-down input signal into a positive signal between a power supply voltage and a ground voltage, obtaining a unipolar analog voltage signal and outputting the unipolar analog voltage signal to the fully-differential conversion circuit; the fully differential conversion circuit is used for converting the unipolar analog voltage signal into a fully differential signal taking a preset common mode voltage VCM as a common mode level. When the input signal is applied to the digital isolator, the input signal can be single-polarity or bipolar single-ended input or fully differential input, the amplitude can reach the power supply voltage, and the input signal is more suitable for industrial high-voltage isolation application and has higher practicability.
Description
Technical Field
The invention belongs to the field of digital isolators, and relates to a bipolar rail-to-rail differential front-end input circuit for a sigma delta ADC.
Background
The digital isolator is a circuit device capable of realizing isolation function, and is mainly used for protecting and isolating the mutual influence between various circuits, and can convert digital signals from an input end into optical or magnetic signals, process the optical or magnetic signals in an isolation layer and finally output new signals to an output end. The digital isolator can prevent mutual interference between signals and ensure stable operation of the circuit. Meanwhile, the digital isolator can also exchange, transmit and control data among different circuits, so that quick, efficient and accurate communication among all components is realized. Digital isolators are therefore very widespread in industrial applications.
The core module of the digital isolator is a sigma-delta ADC (Analog-to-digital converter), and the serial digital code stream is more easily isolated. However, the current sigma-delta ADC is basically low-voltage and low-swing, and it is difficult to satisfy the industrial high-voltage isolation application.
Disclosure of Invention
It is an object of the present invention to overcome the above-mentioned drawbacks of the prior art by providing a bipolar rail-to-rail differential front end input circuit for a sigma delta ADC.
In order to achieve the purpose, the invention is realized by adopting the following technical scheme:
a bipolar rail-to-rail differential front end input circuit for sigma delta ADC comprises an input voltage division circuit, a bipolar-to-single-ended VGA circuit and a full differential conversion circuit; the input voltage dividing circuit is used for reducing the input signal voltage to a preset range, obtaining a reduced voltage input signal and outputting the reduced voltage input signal to the bipolar-to-single-ended VGA circuit; the bipolar-to-single-ended VGA circuit is used for carrying out amplitude adjustment on a step-down input signal, converting the step-down input signal into a positive signal between a power supply voltage and a ground voltage, obtaining a unipolar analog voltage signal and outputting the unipolar analog voltage signal to the fully-differential conversion circuit; the fully differential conversion circuit is used for converting the unipolar analog voltage signal into a fully differential signal taking a preset common mode voltage VCM as a common mode level.
Optionally, the input voltage dividing circuit is configured to reduce the input signal voltage to a positive and negative supply voltage.
Optionally, the input voltage dividing circuit includes a first resistor and a second resistor; one end of the first resistor is provided with an input signal input end, and the other end of the first resistor is connected with one end of the second resistor; the other end of the second resistor is grounded, and a connecting wire of the first resistor and the second resistor is connected with an input terminal of the bipolar-to-single-ended VGA circuit.
Optionally, the bipolar-to-single-ended VGA circuit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a first operational amplifier; one end of the third resistor is grounded or connected with an analog signal which is in differential property with the voltage-reducing input signal, and the other end of the third resistor is connected with one end of the fifth resistor and the negative input end of the first operational amplifier; one end of the fourth resistor is provided with an input terminal used for being connected with an input voltage dividing circuit, and the other end of the fourth resistor is connected with one end of the sixth resistor and the positive input end of the first operational amplifier; the other end of the sixth resistor is provided with a common-mode voltage terminal for inputting a common-mode voltage VCM; the other end of the fifth resistor is connected with the output end of the first operational amplifier, and the output end of the first operational amplifier is connected with the input terminal of the full-differential conversion circuit.
Optionally, the resistance of the sixth resistor is higher than the resistance of the fourth resistor, and the resistance of the fifth resistor is higher than the resistance of the third resistor.
Optionally, the fully differential conversion circuit includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a second operational amplifier, and a third operational amplifier; one end of the seventh resistor is provided with an input terminal used for being connected with the bipolar-to-single-ended VGA circuit, and the other end of the seventh resistor is connected with the negative input end of the second operational amplifier and one end of the ninth resistor; the other end of the ninth resistor is connected with the output end of the second operational amplifier and one end of the tenth resistor; the positive input ends of the third operational amplifier and the second operational amplifier are respectively provided with a common-mode voltage terminal for inputting a common-mode voltage VCM; the negative input end of the third operational amplifier is connected with one end of an eighth resistor, and the other end of the eighth resistor is connected with the other end of the tenth resistor and the output end of the third operational amplifier; when in use, the output end of the second operational amplifier is connected with the negative input end of the data converter; the output end of the third operational amplifier is connected with the positive input end of the data converter.
Optionally, the tenth resistor and the seventh resistor are the same; the eighth resistor is the same as the ninth resistor.
Optionally, the second operational amplifier and the third operational amplifier use the same operational amplifier.
Optionally, the data converter is a sigma delta ADC; the reference voltage of the data converter is generated based on a preset common mode voltage VCM; the input voltage dividing circuit adopts an on-chip peripheral meter.
Optionally, the fully differential conversion circuit further includes a first capacitor and a second capacitor; one end of the first capacitor is connected with a connecting wire between the eighth resistor and the negative input end of the third operational amplifier, and the other end of the first capacitor is connected with a connecting wire between the eighth resistor and the tenth resistor; one end of the second capacitor is connected with a connecting wire between the ninth resistor and the negative input end of the second operational amplifier, and the other end of the second capacitor is connected with a connecting wire between the ninth resistor and the tenth resistor.
Compared with the prior art, the invention has the following beneficial effects:
the invention is used for a bipolar rail-to-rail differential type front end input circuit of a sigma delta ADC, firstly, an input voltage division circuit is used for dividing a high-voltage input signal, the processed bipolar rail-to-rail input voltage step-down input signal is sent to a bipolar-to-single-ended VGA circuit, the amplitude is adjusted through the bipolar-to-single-ended VGA circuit and converted into a positive signal between a power supply voltage and a ground voltage, a unipolar analog voltage signal is obtained and sent to a full-differential conversion circuit, the unipolar analog voltage signal is converted into a full-differential signal with a preset common mode voltage VCM as a common mode level through the full-differential conversion circuit, and then the full-differential voltage signal can be used as the front end input circuit of a data converter when being applied to a digital isolator, and the high-precision differential input signal can be provided for the data converter, so that the final harmonic value of the digital isolator is reduced, and the ideal signal-to-noise distortion ratio is obtained. Through verification, on the premise of ensuring the signal-to-noise-and-distortion ratio, the direct current input is free from missing codes, and the typical value of the direct current precision error is smaller than 1 per mill. The high-voltage isolation device can realize the isolation of any high-voltage input, input signals can be single-polarity or bipolar single-ended input or fully differential input, the amplitude of the input signals can reach the power supply voltage, the high-input swing is more suitable for industrial high-voltage isolation application, the high-voltage isolation device has high practicability and value, the miniaturization and low-power consumption design of the digital isolator are realized, and the development direction of future application is met.
Drawings
FIG. 1 is a schematic diagram of a bipolar rail-to-rail differential front-end input circuit topology for a sigma delta ADC according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a high voltage bipolar input to unipolar switching output according to an embodiment of the present invention.
FIG. 3 is a diagram of a unipolar sinusoidal conversion to a fully differential output signal in accordance with an embodiment of the present invention.
FIG. 4 is a diagram of a comparison of bipolar sinusoidal input and digital quantized output according to an embodiment of the invention.
Fig. 5 is a schematic diagram illustrating frequency domain ac performance simulation according to an embodiment of the present invention.
Fig. 6 is a schematic diagram of dc voltage accuracy simulation according to an embodiment of the present invention.
Wherein: 1-a first resistor; 2-a second resistor; 3-a third resistor; 4-fourth resistor; 5-a fifth resistor; 6-sixth resistance; 7-seventh resistor; 8-eighth resistor; 9-ninth resistor; 10-tenth resistor; 11-a first capacitance; 12-a second capacitance; 101-a first operational amplifier; 102-a second operational amplifier; 103-a third operational amplifier; 104-a fully differential conversion circuit; 105-a bipolar to single-ended VGA circuit; 106-inputting a voltage dividing circuit; 107-data converter.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The invention is described in further detail below with reference to the attached drawing figures:
referring to fig. 1, in an embodiment of the present invention, a bipolar rail-to-rail differential front-end input circuit for a sigma delta ADC is provided, which includes an input voltage dividing circuit 106, a bipolar-to-single-ended VGA circuit 105, and a fully differential conversion circuit 104; the input voltage dividing circuit 106 is configured to reduce the input signal voltage to a preset range, obtain a reduced voltage input signal, and output the reduced voltage input signal to the bipolar-to-single-ended VGA circuit 105; the bipolar-to-single-ended VGA circuit 105 is configured to perform amplitude adjustment on the buck input signal, convert the buck input signal into a positive signal between the power supply voltage and the ground voltage, obtain a unipolar analog voltage signal, and output the unipolar analog voltage signal to the fully differential conversion circuit 104; the fully differential conversion circuit 104 is configured to convert a unipolar analog voltage signal into a fully differential signal with a preset common mode voltage VCM as a common mode level.
The invention is used for a bipolar rail-to-rail differential type front end input circuit of a sigma delta ADC, firstly, an input voltage division circuit 106 is used for dividing high-voltage input signals, the processed bipolar rail-to-rail input voltage step-down input signals are sent to a bipolar-to-single-ended VGA circuit 105, the amplitude of the processed bipolar rail-to-rail input voltage step-down input signals are adjusted through the bipolar-to-single-ended VGA circuit 105 and converted into positive signals between power supply voltage and ground voltage, single-polarity analog voltage signals are obtained and sent to a full-differential conversion circuit 104, the single-polarity analog voltage signals are converted into full-differential signals with a preset common mode voltage VCM as a common mode level through the full-differential conversion circuit 104, and then the full-differential voltage signals can be used as the front end input circuit of a data converter 107 when the full-differential voltage-to-single-rail differential type sigma delta ADC is applied to a digital isolator, so that the final harmonic value of the digital isolator can be reduced, and the ideal signal-to noise distortion ratio can be obtained. Through verification, on the premise of ensuring the signal-to-noise-and-distortion ratio, the direct current input is free from missing codes, and the typical value of the direct current precision error is smaller than 1 per mill. The high-voltage isolation device can realize the isolation of any high-voltage input, input signals can be single-polarity or bipolar single-ended input or fully differential input, the amplitude of the input signals can reach the power supply voltage, the high-input swing is more suitable for industrial high-voltage isolation application, the high-voltage isolation device has high practicability and value, the miniaturization and low-power consumption design of the digital isolator are realized, and the development direction of future application is met.
Specifically, the input voltage divider 106 is used to reduce the external bipolar high-voltage analog signal to a chip acceptable range, and the input signal is bipolar, so that a special ESD protection design is required; the divided signals are transmitted to the bipolar-to-single-ended VGA circuit 105 for amplitude adjustment, and are converted into positive signals between power supply grounds by the bipolar, and the bipolar-to-single-ended VGA circuit 105 plays an isolating role at the same time; the adjusted unipolar analog voltage signal is converted by the fully differential conversion circuit 104 for the second time, and converted by the unipolar analog voltage signal into a fully differential signal with VCM as a common mode level, and sent to the data converter 107 of the subsequent stage, and finally the serial digital code DOP is output.
The bipolar rail-to-rail differential front end input circuit for the sigma delta ADC can solve the problem that the application of the data converter, such as the sigma delta ADC, in a digital isolator is limited, can accept high-swing and high-voltage external signals, can be unipolar or bipolar, keeps the integrity and effectiveness of the signals, and is verified by practical simulation, when a modulator of the data converter takes a second-order CIFB structure, and inputs bipolar sinusoidal signals with the amplitude of +/-4.5V (5V) and the frequency of 1kHz, the effective signal-to-noise ratio can reach 86dB.
In one possible implementation, the input voltage divider circuit 106 is configured to reduce the input signal voltage to a positive and negative supply voltage.
Specifically, to ensure that the signal quality reaches a high dynamic range and signal-to-noise ratio in the subsequent quantization, the most suitable value of the divider resistance of the input divider circuit 106 is to reduce the input signal voltage to the positive and negative supply voltages.
In one possible implementation, the input voltage divider circuit 106 includes a first resistor 1 and a second resistor 2; one end of the first resistor 1 is provided with an input signal input end, and the other end of the first resistor is connected with one end of the second resistor 2; the other end of the second resistor 2 is grounded, and a connecting wire of the first resistor 1 and the second resistor 2 is connected with an input terminal of the bipolar-to-single-ended VGA circuit.
Specifically, the input voltage divider 106 is an off-chip optional application, for high voltage applications, the ratio of the input voltage to the input voltage can be effectively reduced to the system acceptance range, the input signal Ain is reduced from any high voltage to the power supply voltage range through the proportional adjustment of the resistance values of the first resistor 1 and the second resistor 2, the input PAD design must meet the bipolar input requirement in consideration of the bipolar input requirement, and the reduced-amplitude voltage-reduced input signal is input to the front-end input circuit.
In one possible implementation, the bipolar-to-single-ended VGA circuit 105 includes a third resistor 3, a fourth resistor 4, a fifth resistor 5, a sixth resistor 6, and a first operational amplifier 101; one end of the third resistor 3 is grounded or connected with an analog signal which is in differential property with the voltage-reducing input signal, and the other end of the third resistor is connected with one end of the fifth resistor 5 and the negative input end of the first operational amplifier 101; one end of the fourth resistor 4 is provided with an input terminal for being connected with an input voltage dividing circuit, and the other end of the fourth resistor is connected with one end of the sixth resistor 6 and the positive input end of the first operational amplifier 101; the other end of the sixth resistor 6 is provided with a common-mode voltage terminal for inputting a common-mode voltage VCM; the other end of the fifth resistor 5 is connected to the output terminal of the first operational amplifier 101, and the output terminal of the first operational amplifier 101 is connected to the input terminal of the full differential conversion circuit.
Specifically, the third resistor 3, the fourth resistor 4, the fifth resistor 5 and the sixth resistor 6 are gain adjusting resistors; the ratio of the resistors determines the amplification ratio of the input signal of the fourth resistor 4, and for high-voltage input, the fourth resistor 4 needs to be input after the off-chip voltage is divided to a certain ratio. One end of the third resistor 3 is selectively grounded or connected with an analog signal which is in differential property with the voltage-dropping input signal. Optionally, the first operational amplifier 101 may further ensure the integrity of the analog input signal using a high gain design
Optionally, the resistance of the sixth resistor 6 is higher than the resistance of the fourth resistor 4, and the resistance of the fifth resistor 5 is higher than the resistance of the third resistor 3, so as to reduce the signal amplitude.
In one possible implementation, the fully differential conversion circuit 104 includes a seventh resistor 7, an eighth resistor 8, a ninth resistor 9, a tenth resistor 10, a second operational amplifier 102, and a third operational amplifier 103; one end of the seventh resistor 7 is provided with an input terminal for connecting the bipolar-to-single-ended VGA circuit 105, and the other end of the seventh resistor is connected with the negative input end of the second operational amplifier 102 and one end of the ninth resistor 9; the other end of the ninth resistor 9 is connected with the output end of the second operational amplifier 102 and one end of the tenth resistor 10; the positive input end of the third operational amplifier 103 and the positive input end of the second operational amplifier 102 are respectively provided with a common-mode voltage terminal for inputting a common-mode voltage VCM; the negative input end of the third operational amplifier 103 is connected with one end of an eighth resistor 8, and the other end of the eighth resistor 8 is connected with the other end of a tenth resistor 10 and the output end of the third operational amplifier 103; in the use state, the output end of the second operational amplifier 102 is connected with the negative input end of the data converter 107; an output of the third operational amplifier 103 is connected to a non-inverting input of the data converter 107.
Specifically, the positive inputs of the second operational amplifier 102 and the third operational amplifier 103 are connected to a common-mode voltage VCM, which determines the common-mode voltage of the analog differential signal input by the modulator, and may be provided by an on-chip LDO or off-chip; the fully differential conversion circuit 104 is used for converting the unipolar analog voltage signal input by the seventh resistor 7 into a fully differential signal, and has better anti-interference and noise-suppressing effects.
Alternatively, the data converter 107 is composed of a modulator and a dynamic comparator, the modulator may be two-stage, three-stage or higher, the architecture design may be CIFB/CIFF/CIFB/CIFF, etc., the input of the data converter 107 is a fully differential signal after the previous stage processing, and the output of the data converter 107 is the finally quantized serial digital code stream DOP.
Optionally, the tenth resistor 10 and the seventh resistor 7 are the same; the eighth resistor 8 and the ninth resistor 9 are the same, and the second operational amplifier 102 and the third operational amplifier 103 adopt the same operational amplifier, so that the peak-to-peak symmetry can be effectively ensured.
Optionally, the reference voltage for the data converter 107 is generated based on a predetermined common mode voltage VCM, which ensures that a reference level with consistent drift is obtained as VCM drifts.
In a possible implementation manner, the fully differential conversion circuit 104 further includes a first capacitor 11 and a second capacitor 12; one end of the first capacitor 11 is connected with a connecting wire between the eighth resistor 8 and the negative input end of the third operational amplifier 103, and the other end of the first capacitor is connected with a connecting wire between the eighth resistor 8 and the tenth resistor 10; one end of the second capacitor 12 is connected to a connection line between the ninth resistor 9 and the negative input terminal of the second operational amplifier 102, and the other end is connected to a connection line between the ninth resistor 9 and the tenth resistor 10.
Specifically, the first capacitor 11 and the second capacitor 12 function as filtering and frequency compensation.
The invention is used for a bipolar rail-to-rail differential type front end input circuit of a sigma delta ADC, through the adjustment of the resistance ratio of a first resistor 1 and a second resistor 2, the voltage of an input signal Ain is reduced from any high voltage drop to a power supply voltage range, the design of an input PAD (digital versatile disc) must meet the bipolar input requirement in consideration of the bipolar input requirement, a proper common mode voltage VCM is selected to ensure that the voltage of the positive input end of a first operational amplifier 101 is within the design requirement range, a bipolar-to-single-ended VGA circuit 105 outputs a signal after single polarity and scaling to a full differential conversion circuit 104 after high-gain closed-loop negative feedback, at the moment, the transition from bipolar + -voltage to single polarity voltage is completed, the signal enters the full differential conversion circuit 104, and a seventh resistor 7 and a ninth resistor 9 select proper ratio as secondary scaling.
The invention is used for a bipolar rail-to-rail differential front end input circuit of a sigma delta ADC, an input signal is a direct current/alternating current voltage signal, and can be a bipolar (+/-) or unipolar (positive and negative) voltage/current signal, the input signal is input from a first resistor 1, the first resistor (1) and a second resistor (2) are connected in series and grounded to form resistor voltage division, a node A is an input voltage and is connected to a fourth resistor (4), a sixth resistor (6) is connected with a common-mode voltage VCM, the input voltage of the bipolar-to-single-ended circuit 105 and the common-mode voltage VCM form common-mode boosting through the fourth resistor 4 and the sixth resistor 6, the voltage value of the A2 point is consistent with the A1 point due to the negative feedback effect, and the signals of the A1 point are amplified by the third resistor 3 and the fifth resistor 5 in proportion, so that the bipolar (+ -) or unipolar (positive and negative) voltage/current signal is converted into a single-stage positive-voltage signal VB. Referring to fig. 2, a sinusoidal signal of the input signal ain= ±40V is converted into a unipolar sinusoidal signal B. The unipolar sinusoidal signal B needs to be converted into a highly accurate fully differential signal in order to meet the requirements of the data converter 107 for the input signal. The intersection of the ninth resistor 9 and the second operational amplifier 102 is defined as node D. The intersection of the eighth resistor 8 and the third operational amplifier 103 is defined as node C. The positive input ends of the second operational amplifier 102 and the third operational amplifier 103 are connected to a common mode voltage VCM, a common mode level of a fully differential signal is provided, a single-stage signal at a node B is input to the negative input end of the second operational amplifier 102 and is amplified in proportion to a seventh resistor 7 and a ninth resistor 9 to generate a voltage opposite to the point B, a single-stage signal at a node D is input to the negative input end of the third operational amplifier 103 and is amplified in proportion to a tenth resistor 10 and an eighth resistor 8 to generate a voltage opposite to the point D, the voltage at the point C is in phase with the voltage at the point B, and an output result is shown in fig. 3.
The invention is used for the bipolar rail-to-rail differential type front end input circuit of the sigma delta ADC, which aims to process bipolar (+ -) or unipolar (positive and negative) voltage/current signals, and further, a data converter such as the sigma delta ADC is used for converting the bipolar rail-to-rail differential type front end input circuit of the sigma delta ADC into digital quantization output codes, but the framework of the data converter is not restricted, and the digital quantization codes under the input of large voltage/current can be obtained by applying the bipolar rail-to-rail differential type front end input circuit of the sigma delta ADC.
As shown in fig. 4, the input clk=12.8mhz, ain is V P-P ＝80V，f in The serial digital code DOP presents a corresponding change in density as Ain rises and falls according to the bipolar sinusoidal signal of=20khz and the DOP graph output by the corresponding system, as shown in fig. 5, which is a frequency domain response graph obtained by performing spectrum analysis on the serial digital code DOP, and the signal-to-noise distortion ratio is 88dB, and the performance is excellent.
When the input signal Ain is a direct current signal, as shown in fig. 6, the input signal Ain can also be monitored and quantized, and when clk=12.8mhz is input, the direct current voltage ain= -49.5V (full swing ±50v), the output digital code period is about 15.55us, the clock period is 78.125ns, the actual output duty ratio is 78.125ns/15.55us and is about 5.024 mill, the theoretical duty ratio is 5 mill, and the direct current gain error is only 0.024 mill. If the current signal is a large current signal, the values of the first resistor 1 and the second resistor 2 need to be reduced to a reasonable range, and the working principle is consistent with that of the voltage signal, so that the monitoring effect of the invention is excellent for bipolar (+ -) or unipolar (positive and negative) voltage/current signals.
The above is only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited by this, and any modification made on the basis of the technical scheme according to the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (10)
1. The bipolar rail-to-rail differential front end input circuit for the sigma delta ADC is characterized by comprising an input voltage dividing circuit (106), a bipolar-to-single-ended VGA circuit (105) and a fully differential conversion circuit (104);
the input voltage dividing circuit (106) is used for reducing the input signal voltage to a preset range, obtaining a reduced voltage input signal and outputting the reduced voltage input signal to the bipolar-to-single-ended VGA circuit (105);
the bipolar-to-single-ended VGA circuit (105) is used for performing amplitude adjustment on a step-down input signal, converting the step-down input signal into a positive signal between a power supply voltage and a ground voltage, obtaining a single-polarity analog voltage signal and outputting the single-polarity analog voltage signal to the full-differential conversion circuit (104);
the fully differential conversion circuit (104) is used for converting the unipolar analog voltage signal into a fully differential signal with a preset common mode voltage VCM as a common mode level.
2. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 1, wherein the input voltage divider circuit (106) is configured to reduce the input signal voltage to a positive and negative supply voltage.
3. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 1, wherein the input voltage divider circuit (106) comprises a first resistor (1) and a second resistor (2);
one end of the first resistor (1) is provided with an input signal input end, and the other end of the first resistor is connected with one end of the second resistor (2);
the other end of the second resistor (2) is grounded, and a connecting wire of the first resistor (1) and the second resistor (2) is connected with an input terminal of the bipolar-to-single-ended VGA circuit.
4. A bipolar rail-to-rail differential front end input circuit for a sigma delta ADC according to claim 3, characterized in that the bipolar to single ended VGA circuit (105) comprises a third resistor (3), a fourth resistor (4), a fifth resistor (5), a sixth resistor (6) and a first operational amplifier (101);
one end of the third resistor (3) is grounded or connected with an analog signal which is in differential property with the voltage-reducing input signal, and the other end of the third resistor is connected with one end of the fifth resistor (5) and the negative input end of the first operational amplifier (101); one end of the fourth resistor (4) is provided with an input terminal used for being connected with an input voltage division circuit, and the other end of the fourth resistor is connected with one end of the sixth resistor (6) and the positive input end of the first operational amplifier (101); the other end of the sixth resistor (6) is provided with a common mode voltage terminal for inputting a common mode voltage VCM; the other end of the fifth resistor (5) is connected with the output end of the first operational amplifier (101), and the output end of the first operational amplifier (101) is connected with the input terminal of the full-differential conversion circuit.
5. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 4, wherein the resistance of the sixth resistor (6) is higher than the resistance of the fourth resistor (4), and the resistance of the fifth resistor (5) is higher than the resistance of the third resistor (3).
6. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 4, wherein the fully differential conversion circuit (104) comprises a seventh resistor (7), an eighth resistor (8), a ninth resistor (9), a tenth resistor (10), a second operational amplifier (102) and a third operational amplifier (103);
one end of the seventh resistor (7) is provided with an input terminal for connecting the bipolar-to-single-ended VGA circuit (105), and the other end of the seventh resistor is connected with the negative input end of the second operational amplifier (102) and one end of the ninth resistor (9); the other end of the ninth resistor (9) is connected with the output end of the second operational amplifier (102) and one end of the tenth resistor (10); the positive input ends of the third operational amplifier (103) and the second operational amplifier (102) are respectively provided with a common-mode voltage terminal for inputting a common-mode voltage VCM; the negative input end of the third operational amplifier (103) is connected with one end of an eighth resistor (8), and the other end of the eighth resistor (8) is connected with the other end of a tenth resistor (10) and the output end of the third operational amplifier (103); in a use state, the output end of the second operational amplifier (102) is connected with the negative input end of the data converter (107); an output of the third operational amplifier (103) is connected to a positive input of the data converter (107).
7. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 6, wherein the tenth resistor (10) and the seventh resistor (7) are identical; the eighth resistor (8) and the ninth resistor (9) are identical.
8. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 6, wherein the second operational amplifier (102) and the third operational amplifier (103) employ the same operational amplifier.
9. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 6, wherein the data converter (107) is a sigma delta ADC; the reference voltage of the data converter (107) is generated based on a preset common mode voltage VCM; the input voltage divider circuit (106) is of an off-chip design.
10. The bipolar rail-to-rail differential front end input circuit for a sigma delta ADC of claim 6, wherein the fully differential conversion circuit (104) further comprises a first capacitor (11) and a second capacitor (12);
one end of the first capacitor (11) is connected with a connecting wire between the eighth resistor (8) and the negative input end of the third operational amplifier (103), and the other end of the first capacitor is connected with a connecting wire between the eighth resistor (8) and the tenth resistor (10); one end of the second capacitor (12) is connected with a connecting wire between the ninth resistor (9) and the negative input end of the second operational amplifier (102), and the other end of the second capacitor is connected with a connecting wire between the ninth resistor (9) and the tenth resistor (10).
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| CN202410108469.0A CN117879581A (en) | 2024-01-25 | 2024-01-25 | Bipolar rail-to-rail differential front-end input circuit for sigma delta ADC |
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| CN202410108469.0A CN117879581A (en) | 2024-01-25 | 2024-01-25 | Bipolar rail-to-rail differential front-end input circuit for sigma delta ADC |
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