CN117857382A - Service board detection method, storage medium and electronic equipment - Google Patents
Service board detection method, storage medium and electronic equipment Download PDFInfo
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Abstract
The embodiment of the application provides a detection method of a service board, a storage medium and electronic equipment, wherein the method comprises the following steps: sending a target message to a slave CPU, wherein the target message is used for indicating the slave CPU to collect test information corresponding to the target message; receiving the test information sent by the slave CPU; determining a target state of a service board according to the test information, wherein the service board comprises: at least one said master CPU and at least one said slave CPU.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to a service board detection method, a storage medium, and an electronic device.
Background
The router device is composed of line cards mainly used for traffic processing and forwarding, and service boards mainly used for high-performance value-added service processing, and typically, one service board may contain 4 central processing units (Central Processing Unit, CPU). At present, the test of the router service board mainly sends a detection message through a line card, and the detection message reaches the service board through exchange.
In this case, the test of the service board depends on the flow sent by the hardware tester, and has high requirements on the test environment. And moreover, the flow of the tester can only be sent to a service board loaded with specific services, a flow model is built by manpower, and the flow test process is complicated and the labor is consumed.
Disclosure of Invention
The embodiment of the application aims to provide a detection method, a detection device and electronic equipment for a service board, which can automatically realize the test of the service board.
In order to solve the technical problems, embodiments of the present application are realized by the following aspects.
In a first aspect, an embodiment of the present application provides a method for detecting a service board, which is executed by a central processing unit CPU of a main service board, including: sending a target message to a slave CPU, wherein the target message is used for indicating the slave CPU to collect test information corresponding to the target message; receiving the test information sent by the slave CPU; determining a target state of a service board according to the test information, wherein the service board comprises: at least one said master CPU and at least one said slave CPU.
In a second aspect, a method for detecting a service board, performed by a service board CPU, includes: receiving a target message sent by a main CPU; collecting test information corresponding to the target message; transmitting the test information to a main CPU, so that the main CPU determines a target state of a service board according to the test information, wherein the service board comprises: at least one said master CPU and at least one said slave CPU.
In a third aspect, an embodiment of the present application provides a service board detection device, including: the device comprises a first sending module, a second sending module and a first receiving module, wherein the first sending module is used for sending a target message to a slave CPU, and the target message is used for indicating the slave CPU to collect test information corresponding to the target message; the first receiving module is used for receiving the test information sent by the slave CPU; the first determining module is configured to determine a target state of a service board according to the test information, where the service board includes: at least one said master CPU and at least one said slave CPU.
In a fourth aspect, an embodiment of the present application provides a service board detection device, including: the second receiving module is used for receiving the target message sent by the main CPU; the acquisition module is used for acquiring the test information corresponding to the target message; the second sending module is configured to send the test information to a main CPU, so that the main CPU determines a target state of a service board according to the test information, where the service board includes: at least one said master CPU and at least one said slave CPU.
In a fifth aspect, embodiments of the present application provide an electronic device, including: a memory, a processor, and computer-executable instructions stored on the memory and executable on the processor, which when executed by the processor, implement the method for detecting a service board according to the first or second aspect.
In a sixth aspect, embodiments of the present application provide a computer readable storage medium, where the computer readable storage medium is configured to store computer executable instructions, where the computer executable instructions when executed by a processor implement the method for detecting a service board according to the first aspect or the second aspect.
In the embodiment of the application, a target message is sent to a slave CPU, wherein the target message is used for indicating the slave CPU to collect test information corresponding to the target message; receiving the test information sent by the slave CPU; determining a target state of a service board according to the test information, wherein the service board comprises: at least one of the master CPU and at least one of the slave CPUs is capable of automatically implementing a test of the service board.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present application, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
Fig. 1 is a schematic flow chart of a method for detecting a service board according to an embodiment of the present application;
fig. 2 is a schematic flow chart of another method for detecting a service board according to an embodiment of the present application;
fig. 3 is a schematic flow chart of another method for detecting a service board according to an embodiment of the present application;
fig. 4 is a schematic flow chart of another method for detecting a service board according to an embodiment of the present application;
fig. 5 shows a schematic structural diagram of a detection device of a service board provided in an embodiment of the present application;
fig. 6 shows a schematic structural diagram of a detection device of a service board provided in an embodiment of the present application;
fig. 7 is a schematic diagram of a hardware structure of the electronic device.
Detailed Description
In order to better understand the technical solutions in the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.
Fig. 1 is a schematic flow chart of a method for detecting a service board according to an embodiment of the present application, and as shown in the drawing, the method may include the following steps.
S102: and sending the target message to the slave CPU.
The plurality of CPUs loaded with the service may set one master CPU, and at least one or more of the other CPUs loaded with the service may function as slave CPUs.
In this step, the master CPU transmits a target message to the slave CPU. Wherein the master CPU may optionally be directed to one or more slave CPUs. The target message of the slave CPU is used for indicating the slave CPU to collect the test information corresponding to the target message, for example, the slave CPU can be indicated to collect the test information corresponding to the type of the target message through the type of the target message. The slave CPU analyzes the received target message according to the received target message, and acquires test information corresponding to the target message according to an analysis result.
S104: and receiving the test information sent by the slave CPU.
S106: and determining the target state of the service board according to the test information.
Wherein, the business board includes: at least one said master CPU and at least one said slave CPU.
Alternatively, the main CPU may record the test information and save it to the log file.
In one possible implementation, the target state includes at least one of:
a state of a data link between the master CPU and the slave CPU;
the performance state of the slave CPU;
the working state of the slave CPU comprises the following working states: at least one of a power-on state, a start-up state, a fault detection state, and a transmit channel state.
In one possible implementation, one of a plurality of service board CPUs included in a service board may be set as a main service board CPU in response to setting information of the main service board CPU. Specifically, by loading the information detection service process on the service board CPU, a plurality of CPUs loaded with the service can set a master CPU, and at least one or more other CPUs loaded with the service can be used as slave CPUs, and the slave CPUs and the master CPU are mutually linked to each other to send the target message.
In one possible implementation manner, the target message carries a message type and a service type, where the service type refers to a type that the target message requires corresponding processing from the CPU. The message type comprises at least one of the following: target message, detection message, functional test message and performance test message. In one possible implementation manner, the target message may further carry at least one of the following: identification information of the main CPU; and the identification information of the slave CPU.
Therefore, the embodiment of the application realizes the detection of the working state or performance of the data link and the service board CPU by sending the functional message among the plurality of CPUs, does not need a test instrument and a test environment, improves the test efficiency, reduces the test cost, and saves the time cost and the labor cost.
Fig. 2 is a schematic flow chart of a method for detecting a service board according to an embodiment of the present application, where the method may be performed by an electronic device, for example, a router device. As shown, the method may include the following steps.
S202: and sending the target message to the slave CPU.
The type of the target message is used for indicating the slave CPU to collect test information corresponding to the target message. The target message is sent to the receiving end slave CPU through the data link and the exchange board in the service board.
S204: and under the condition that the type of the target message is an information detection message, establishing a link with the slave CPU.
The method comprises the steps of after receiving a message from a CPU, analyzing the message, judging whether the message is a target message according to the message type carried by the message header, if the message is the target message, continuing analyzing the field of the service type, carrying out corresponding processing according to the carried service type, if the service type is the message requiring to send information detection, starting an information detection function, and carrying out transmission control protocol (Transmission Control Protocol, TCP) link establishment with a main CPU, wherein the function can be one-to-one, one-to-many, or many-to-many, and after the link establishment is successful, packaging the working state test information of the current secondary CPU into the information detection message and sending the information detection message to the main CPU at fixed time.
S206: and receiving the information detection message fed back by the slave CPU, wherein the information detection message comprises the working state test information of the slave CPU.
The main CPU analyzes the received message, analyzes the message to obtain an information detection message, can acquire the working state test information of the auxiliary CPU according to the information detection message, and can store the working state test information into a log file for reference at any time.
S208: and determining the target state of the service board according to the test information.
Wherein, the business board includes: at least one said master CPU and at least one said slave CPU.
In one implementation, the information detection message further includes: at least one of packet loss rate, checksum of the master CPU, checksum of the slave CPU, message type and service type may include determining a working state of the slave CPU according to an information detection message; and judging the state of the data link according to at least one of the packet loss rate, the checksum, the message type and the service type.
Therefore, the embodiment of the application realizes the detection of the working states of the data link and the service board CPU by sending the functional messages among the CPUs, does not need a test instrument and a test environment, improves the test efficiency, reduces the test cost, and saves the time cost and the labor cost.
Fig. 3 shows a schematic flow chart of a method for detecting a service board according to an embodiment of the present application, where the method may be performed by an electronic device, for example, a router device. As shown, the method may include the following steps.
S302: and sending the target message to the slave CPU.
The type of the target message is used for indicating the slave CPU to collect test information corresponding to the target message.
S304: and receiving the test feedback message sent by the CPU under the condition that the type of the target message is a performance detection message.
The test feedback message comprises detection performance test information corresponding to the performance detection message.
The main CPU analyzes the received message, and if the analysis result is a performance test message, the main CPU receives a test feedback message sent by the auxiliary CPU; the test feedback message includes detection performance test information corresponding to the performance detection message, such as packet sending length, type, receiving time, flow size and the like.
Optionally, the slave CPU may also start a corresponding function after the information analysis is completed. And if the service type is that the function test message is required to be sent, processing according to the information carried in the target message, and packaging the function test message and sending the function test message to the main CPU.
S306: and determining the state of a data link between the master CPU and the slave CPU according to the test feedback message.
According to the test feedback message, determining the state of the data link between the main CPU and the auxiliary CPU, for example, whether the data link process has the problem of similar packet loss or not can be obtained.
Therefore, the embodiment of the application realizes the detection of the CPU performance of the data link and the service board by sending the functional message among the plurality of CPUs, does not need a test instrument and a test environment, improves the test efficiency, reduces the test cost and saves the time cost and the labor cost.
Fig. 4 is a schematic flow chart of a method for detecting a service board according to an embodiment of the present application, and as shown in the drawing, the method may include the following steps.
S402: and receiving the target message sent by the main CPU.
The slave CPU receives the target message sent by the master CPU. The slave CPU analyzes the received protocol message according to the received protocol message, and makes corresponding processing according to the analysis result to judge whether to send information detection messages at regular time or send a large number of test messages and the like.
S404: and collecting test information corresponding to the target message.
S406: and sending the test information to a main CPU.
Transmitting the test information to a main CPU so that the main CPU determines a target state of a service board according to the test information, wherein the service board comprises: at least one said master CPU and at least one said slave CPU.
Collecting the working state of the secondary CPU under the condition that the type of the target message is an information detection message; the main CPU builds a chain; and sending an information detection message, wherein the information detection message comprises the working state test information of the secondary CPU.
In one implementation, the information detection message further includes: at least one of packet loss rate, checksum of the master CPU, checksum of the slave CPU, message type and service type.
Under the condition that the type of the target message is a performance detection message, determining the performance to be detected corresponding to the performance detection message;
collecting the performance to be detected to obtain detection performance test information, and generating a test feedback message;
and sending a test feedback message to the main CPU, wherein the test feedback message comprises the detection performance test information.
In one implementation, before the receiving master CPU sends the target message, at least one of the service board CPUs included in the service board may be further set as the slave service board CPU in response to setting information of the slave service board CPU.
In one implementation manner, the target message carries a message type and a service type, wherein the message type includes at least one of the following: target message, detection message, functional test message and performance test message. And after receiving the message from the CPU, analyzing the message, judging whether the message is a protocol message according to the type of the message carried by the message header, if so, continuing analyzing the field of the service type, and carrying out corresponding processing according to the carried service type.
In one implementation, the target message further carries at least one of: identification information of the main CPU; and the identification information of the slave CPU.
The present embodiment may employ descriptions of steps corresponding to the embodiments of fig. 1-3, and achieve the same or corresponding effects, which are not described herein.
The embodiments of fig. 1-4 are illustrated below by way of example.
And loading an information detection service on a service board CPU, setting a master CPU and a slave CPU after the process is loaded, setting service functions to be initiated, encapsulating a target message by the master CPU according to the set service functions, processing all the set information, encapsulating required parts into the target message, and transmitting the target message to the slave CPU in S202. In S402, after receiving the target message from the CPU, analyzing the message type and the service type, determining the function to be supported, if the message is the information detection message, initiating a link establishment to the main CPU in S204, and after the link establishment is successful, periodically collecting the current CPU operating state test information and encapsulating the current CPU operating state test information in the information detection message, and in S406, transmitting the current CPU operating state test information to the main CPU. In S208, the main CPU parses the message, if the message is an information detection message reply message, parses the message, processes and records the information carried by the message, and stores the information in the log file, so that the message can be checked at any time.
In S402, after receiving the target message from the CPU, the message type and the service type are analyzed, and if the target message is a performance detection message, in S304, the corresponding test message is encapsulated according to the information carried by the target message, so that the service is directly started without building a link. After the processing of the slave CPU is completed, the test feedback message is fed back to the master CPU again through the data link and the exchange, and is transmitted to the master CPU in S406. In S306, the main CPU parses the message and performs corresponding processing, such as statistics and message verification. The information can also be recorded in a log file and can be checked at any time.
Therefore, the embodiment of the application realizes the detection of the working state or performance of the data link and the service board CPU by sending the functional message among the plurality of CPUs, does not need a test instrument and a test environment, improves the test efficiency, reduces the test cost, and saves the time cost and the labor cost.
Fig. 5 shows a detection apparatus 500 for a service board provided in an embodiment of the present application, where the apparatus 500 includes: a first transmitting module 510, a first receiving module 520 and a first determining module 530.
The first sending module 510 is configured to send a target packet to a slave CPU, where the target packet is configured to instruct the slave CPU to collect test information corresponding to the target packet; the first receiving module 520 is configured to receive the detection device 500 of the service board provided in the embodiment of the present application from fig. 5, where the device 500 includes: the test information sent by the PU; the first determining module 530 is configured to determine, according to the test information, a target state of a service board, where the service board includes: at least one said master CPU and at least one said slave CPU.
In one possible implementation, the target state includes at least one of:
a state of a data link between the master CPU and the slave CPU;
the performance state of the slave CPU;
the working state of the slave CPU comprises the following working states: at least one of a power-on state, a start-up state, a fault detection state, and a transmit channel state.
In a possible implementation manner, the first receiving module 520 is configured to build a chain with the slave CPU in a case that the type of the target packet is an information detection packet; and receiving the information detection message fed back by the slave CPU, wherein the information detection message comprises the working state test information of the slave CPU.
In one possible implementation manner, the information detection message further includes: the first determining module 530 is configured to determine, according to an information detection message, a working state of the slave CPU, where the working state is at least one of a packet loss rate, a checksum of the master CPU, a checksum of the slave CPU, a message type, and a service type; and judging the state of the data link according to at least one of the packet loss rate, the checksum, the message type and the service type.
In a possible implementation manner, the first receiving module 520 receives the test feedback packet sent from the CPU, where the type of the target packet is a performance test packet; the test feedback message comprises detection performance test information corresponding to the performance detection message.
In one possible implementation, the first determining module 530 determines a state of a data link between the master CPU and the slave CPU according to the test feedback packet.
In one possible implementation, the first determining module 530 further sets, before sending the target packet to the slave CPU, one of the service board CPUs included in the service board as the master service board CPU in response to the setting information of the master service board CPU.
In one possible implementation manner, the target message carries a message type and a service type, wherein the message type includes at least one of the following: target message, detection message, functional test message and performance test message.
In one possible implementation manner, the target message further carries at least one of the following:
identification information of the main CPU;
and the identification information of the slave CPU.
The apparatus 500 provided in this embodiment of the present application may perform the methods described in the foregoing method embodiments, and implement the functions and beneficial effects of the methods described in the foregoing method embodiments, which are not described herein again.
Fig. 6 shows a detection apparatus 600 for a service board provided in an embodiment of the present application, where the apparatus 600 includes: a second receiving module 610, an acquisition module 620, and a second transmitting module 630.
The second receiving module 610 is configured to receive a target message sent by the main CPU; the collection module 620 is configured to collect test information corresponding to the target message; the second sending module 630 is configured to send the test information to a main CPU, so that the main CPU determines a target state of a service board according to the test information, where the service board includes: at least one said master CPU and at least one said slave CPU.
In a possible implementation manner, the collecting module 620 collects the working state of the slave CPU in the case that the type of the target packet is an information detection packet; the second sending module 630 is configured to build a chain with the main CPU; the second sending module 630 is configured to send an information detection message, where the information detection message includes the working state test information of the slave CPU.
In one possible implementation manner, the information detection message further includes: at least one of packet loss rate, checksum of the master CPU, checksum of the slave CPU, message type and service type.
In a possible implementation manner, the acquisition module 620 determines, in a case that the type of the target packet is a performance detection packet, a performance to be detected corresponding to the performance detection packet; collecting the performance to be detected to obtain detection performance test information, and generating a test feedback message; the second sending module 630 sends a test feedback packet to the main CPU, where the test feedback packet includes the detection performance test information.
In one possible implementation, the second receiving module 610 further sets at least one of the plurality of service board CPUs included in the service board as the slave service board CPU in response to the setting information of the slave service board CPU before the receiving master CPU sends the target message.
In one possible implementation manner, the target message carries a message type and a service type, wherein the message type includes at least one of the following: target message, detection message, functional test message and performance test message.
In one possible implementation manner, the target message further carries at least one of the following:
identification information of the main CPU;
and the identification information of the slave CPU.
Fig. 7 shows a schematic diagram of a hardware structure of an executing electronic device, with reference to which the electronic device comprises a processor, optionally an internal bus, a network interface, a memory, at the hardware level. The Memory may include a Memory, such as a Random-Access Memory (RAM), and may further include a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. Of course, the electronic device may also include hardware required for other services.
The processor, network interface, and memory may be interconnected by an internal bus, which may be an industry standard architecture (Industry Standard Architecture, ISA) bus, a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. The buses may be classified as address buses, data buses, control buses, etc. For ease of illustration, only one bi-directional arrow is shown in the figure, but not only one bus or one type of bus.
And the memory is used for storing programs. In particular, the program may include program code including computer-operating instructions. The memory may include memory and non-volatile storage and provide instructions and data to the processor.
The processor reads the corresponding computer program from the nonvolatile memory into the memory and then runs to form a device for locating the target user on a logic level. A processor executing the program stored in the memory, and specifically configured to execute: at least one of the embodiments of fig. 1-4 achieves the same results and is not described in detail herein.
The methods disclosed above in the embodiments of fig. 1-4 of the present application may be applied to, or implemented by, a processor. The processor may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in a processor or by instructions in the form of software. The processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; but also digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The disclosed methods, steps, and logic blocks in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in hardware, in a decoded processor, or in a combination of hardware and software modules in a decoded processor. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory, and the processor reads the information in the memory and, in combination with its hardware, performs the steps of the above method.
The electronic device may also execute the methods described in the foregoing method embodiments, and implement the functions and beneficial effects of the methods described in the foregoing method embodiments, which are not described herein.
Of course, other implementations, such as a logic device or a combination of hardware and software, are not excluded from the electronic device of the present application, that is, the execution subject of the following processing flow is not limited to each logic unit, but may be hardware or a logic device.
The present embodiments also provide a computer-readable storage medium storing one or more programs that, when executed by an electronic device comprising a plurality of application programs, cause the electronic device to: at least one of the embodiments of fig. 1-4 achieves the same results and is not described in detail herein.
The computer readable storage medium includes Read-Only Memory (ROM), random access Memory (Random Access Memory RAM), magnetic disk or optical disk, etc.
Further, embodiments of the present application also provide a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, implement the following flow: at least one of the embodiments of fig. 1-4 achieves the same results and is not described in detail herein.
In summary, the foregoing description is only of the preferred embodiments of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.
The system, apparatus, module or unit set forth in the above embodiments may be implemented in particular by a computer chip or entity, or by a product having a certain function. One typical implementation is a computer. In particular, the computer may be, for example, a personal computer, a laptop computer, a cellular telephone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for system embodiments, since they are substantially similar to method embodiments, the description is relatively simple, as relevant to see a section of the description of method embodiments.
Claims (15)
1. A method for detecting a service board, which is executed by a main service board central processing unit CPU, comprising:
sending a target message to a slave CPU, wherein the target message is used for indicating the slave CPU to collect test information corresponding to the target message;
receiving the test information sent by the slave CPU;
determining a target state of a service board according to the test information, wherein the service board comprises: at least one said master CPU and at least one said slave CPU.
2. The method of claim 1, wherein the target state comprises at least one of:
a state of a data link between the master CPU and the slave CPU;
the performance state of the slave CPU;
the working state of the slave CPU comprises the following working states: at least one of a power-on state, a start-up state, a fault detection state, and a transmit channel state.
3. The method of claim 1, wherein receiving the test information sent from the CPU comprises:
under the condition that the type of the target message is an information detection message, establishing a link with the slave CPU;
and receiving the information detection message fed back by the slave CPU, wherein the information detection message comprises the working state test information of the slave CPU.
4. The method of claim 3, wherein the information detection message further comprises: at least one of packet loss rate, checksum of the master CPU, checksum of the slave CPU, message type and service type, determining a target state of the service board according to the test information, including:
determining the working state of the slave CPU according to the information detection message; and
and judging the state of the data link according to at least one of the packet loss rate, the checksum, the message type and the service type.
5. The method of claim 1, wherein receiving the test information sent from the CPU comprises:
receiving the test feedback message sent by the slave CPU under the condition that the type of the target message is a performance detection message; the test feedback message comprises detection performance test information corresponding to the performance detection message.
6. The method of claim 5, determining a target state of a business board based on the test information, comprising:
and determining the state of a data link between the master CPU and the slave CPU according to the test feedback message.
7. The method of claim 1, wherein prior to sending the target message to the slave CPU, further comprising:
one of a plurality of service board CPUs included in the service board is set as a main service board CPU in response to setting information of the main service board CPU.
8. The method according to any of claims 1-7, wherein the target message carries a message type and a traffic type, wherein the message type comprises at least one of: target message, detection message, functional test message and performance test message.
9. The method of claim 8, wherein the target message further carries at least one of:
identification information of the main CPU;
and the identification information of the slave CPU.
10. A method of detecting a service board, performed by a slave service board CPU, comprising:
receiving a target message sent by a main CPU;
collecting test information corresponding to the target message;
transmitting the test information to a main CPU, so that the main CPU determines a target state of a service board according to the test information, wherein the service board comprises: at least one said master CPU and at least one said slave CPU.
11. The method of claim 10, wherein collecting test information corresponding to the target message comprises:
collecting the working state of the secondary CPU under the condition that the type of the target message is an information detection message;
and establishing a chain with the main CPU and sending an information detection message to the main CPU, wherein the information detection message comprises the working state test information of the auxiliary CPU.
12. The method of claim 10, wherein collecting test information corresponding to the target message comprises:
under the condition that the type of the target message is a performance detection message, determining the performance to be detected corresponding to the performance detection message;
collecting the performance to be detected to obtain detection performance test information, and generating a test feedback message;
and sending the test feedback message to the main CPU.
13. The method of claim 10, wherein prior to the receiving main CPU sending a target message, the method further comprises:
at least one of a plurality of service board CPUs included in the service board is set as the slave service board CPU in response to setting information of the slave service board CPU.
14. An electronic device, comprising:
a processor; and
a memory arranged to store computer executable instructions that when executed perform the following operations using the processor: the detection method of a seed service board according to any one of claims 1 to 9; or performing the detection method of the seed service board according to any one of claims 10-13.
15. A computer readable medium storing one or more programs, which when executed by an electronic device comprising a plurality of application programs, cause the electronic device to: the detection method of a seed service board according to any one of claims 1 to 9; or alternatively
A method of detecting a seed board according to any of claims 10-13.
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| CN202211208317.5A CN117857382A (en) | 2022-09-30 | 2022-09-30 | Service board detection method, storage medium and electronic equipment |
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| CN202211208317.5A CN117857382A (en) | 2022-09-30 | 2022-09-30 | Service board detection method, storage medium and electronic equipment |
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| CN117857382A true CN117857382A (en) | 2024-04-09 |
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