CN117854434B - Pixel compensation circuit, pixel circuit, display device and pixel compensation method - Google Patents

Pixel compensation circuit, pixel circuit, display device and pixel compensation method Download PDF

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Publication number
CN117854434B
CN117854434B CN202410176417.7A CN202410176417A CN117854434B CN 117854434 B CN117854434 B CN 117854434B CN 202410176417 A CN202410176417 A CN 202410176417A CN 117854434 B CN117854434 B CN 117854434B
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thin film
film transistor
control signal
signal
node
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CN117854434A (en
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李小兵
付刚伟
袁海江
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HKC Co Ltd
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HKC Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266Details of drivers for scan electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The invention provides a pixel compensation circuit, a pixel circuit, a display device and a pixel compensation method, wherein the pixel compensation circuit consists of a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a seventh thin film transistor, an eighth thin film transistor, a first capacitor and a second capacitor, wherein before a light emitting diode emits light, the pixel compensation circuit can write threshold voltage and data signals into a grid electrode and a third node of the fifth thin film transistor respectively, and when the light emitting diode is driven to emit light, the threshold voltage of the eighth thin film transistor is offset, so that the working current of the light emitting diode is irrelevant to the threshold voltage of the eighth thin film transistor, the influence of the driving transistor on the working current of the light emitting diode due to the offset of the threshold voltage is eliminated, the brightness uniformity of the display device is improved, and the display effect is improved.

Description

Pixel compensation circuit, pixel circuit, display device and pixel compensation method
Technical Field
The invention belongs to the technical field of display, and particularly relates to a pixel compensation circuit, a pixel circuit, a display device and a pixel compensation method.
Background
OLED (Organic Light-Emitting Diode) has the advantages of self-luminescence, high contrast, wide color gamut and the like, and also has the advantages of simple preparation process, low cost, low power consumption, easy realization of flexible display and the like, and as a current type Light-Emitting device, the OLED has been increasingly applied to new-generation display devices, and has wide application prospects.
Since the OLED is current driven, a stable current is required to control its light emission. However, due to the process and device aging, there is non-uniformity in the threshold voltage Vth of the driving transistor driving the OLED to emit light in the pixel circuit, which causes the current flowing through the OLED to vary, so that the display brightness is not uniform, and the display effect of the whole image is deteriorated.
Disclosure of Invention
The invention aims to provide a pixel compensation circuit, which aims to solve the problem of poor display effect caused by threshold value deviation of a driving transistor in a traditional pixel circuit.
A first aspect of an embodiment of the present invention provides a pixel compensation circuit, including a first capacitor, a second capacitor, a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a seventh thin film transistor, and an eighth thin film transistor;
The first end of the first thin film transistor, the first end of the second thin film transistor, the first end of the first capacitor and a first node are connected, the second end of the first thin film transistor, the grid electrode of the third thin film transistor and the first end of the fourth thin film transistor are connected, the second end of the fourth thin film transistor is connected with a first power supply end, the first end of the third thin film transistor, the second end of the first capacitor, the first end of the fifth thin film transistor and a second node are connected, the second end of the third thin film transistor is connected with a second power supply end, the second end of the second thin film transistor is connected with the grid electrode of the fifth thin film transistor, the second end of the fifth thin film transistor, the first end of the sixth thin film transistor, the first end of the second capacitor, the first end of the eighth thin film transistor and a third node are connected, the sixth thin film transistor is connected with a third power supply end, the second thin film transistor is used for transmitting a data signal, the second thin film line is connected with the fifth thin film transistor, the data line is connected with the eighth thin film transistor is used for transmitting the data signal, the data line is connected with the eighth thin film transistor, and the data line is connected with the data line;
the grid electrode of the first thin film transistor is used for inputting a first control signal, the grid electrode of the second thin film transistor is used for inputting a second control signal, the grid electrode of the fourth thin film transistor is used for inputting a third control signal, and the grid electrode of the seventh thin film transistor is used for inputting a fourth control signal.
Optionally, the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor, the seventh thin film transistor, and the eighth thin film transistor are N-channel thin film transistors.
Optionally, the combination of the first control signal, the second control signal, the third control signal, the fourth control signal, the scanning signal and the light emission signal corresponds to a charging phase, a threshold voltage acquisition phase, a data writing phase and a light emitting phase in sequence;
During the charging phase, the first node is charged;
in the threshold voltage acquisition stage, the first node continues to charge and outputs a charging power supply to the grid electrode of the fifth thin film transistor, the fifth thin film transistor is turned on and charges the third node, and when the voltage of the first node and the voltage of the third node are smaller than the threshold voltage, the fifth thin film transistor is turned off;
in the data writing stage, writing the data signal to the third node;
in the light-emitting stage, the light-emitting diode emits light.
Optionally, in the charging phase, the first control signal and the third control signal are at a high level, and the second control signal, the fourth control signal, the scanning signal and the light emission signal are at a low level;
In the threshold voltage acquisition stage, the first control signal, the second control signal and the third control signal are at high level, and the fourth control signal, the scanning signal and the light emission signal are at low level;
In the data writing stage, the first control signal, the second control signal, the third control signal and the scanning signal are at high level, and the fourth control signal and the light emission signal are at low level;
In the light emitting stage, the first control signal, the second control signal, the third control signal, the fourth control signal, and the scan signal are low level, and the light emitting signal is high level.
Optionally, the pixel compensation circuit further includes a ninth thin film transistor and a tenth thin film transistor, and the ninth thin film transistor and the tenth thin film transistor are N-channel thin film transistors;
The first end of the ninth thin film transistor is connected with a fourth power supply end, the second end of the ninth thin film transistor is connected with the third node, and the grid electrode of the ninth thin film transistor is used for inputting the fourth control signal;
A first end of the tenth thin film transistor is connected with a fifth power supply end, a second end of the tenth thin film transistor is connected with the first node, and a grid electrode of the tenth thin film transistor is used for inputting a fifth control signal;
A charge clearing stage is further included between the charging stage and the threshold voltage acquisition stage;
In the charge clearing stage, the first control signal, the third control signal and the fourth control signal are high-level, and the second control signal, the fifth control signal, the scanning signal and the light emission signal are low-level;
A reset phase is also included before the charging phase;
In the reset phase, the third control signal and the fifth control signal are high level, and the first control signal, the second control signal, the fourth control signal, the scan signal and the light emission signal are low level.
Optionally, the first power supply terminal, the second power supply terminal, the third power supply terminal, the fourth power supply terminal, and the fifth power supply terminal are respectively configured to input a first voltage, a second voltage, a third voltage, a fourth voltage, and a fifth voltage, where the first voltage, the second voltage, the third voltage, and the fifth voltage are all greater than the fourth voltage.
A second aspect of an embodiment of the present invention proposes a pixel circuit comprising a light emitting diode and a pixel compensation circuit as described above, said pixel compensation circuit being connected to said light emitting diode.
A third aspect of the embodiments of the present invention proposes a display device comprising a driving circuit and a pixel circuit as described above, the driving circuit being connected to the pixel circuit.
A fourth aspect of the embodiments of the present invention proposes a pixel compensation method applied to a pixel compensation circuit as described above, the pixel compensation method comprising:
In the charging stage, the first control signal and the third control signal are set to high level, and the second control signal, the fourth control signal, the scanning signal and the light emission signal are set to low level;
In a threshold voltage acquisition stage, the first control signal, the second control signal and the third control signal are set to be at a high level, and the fourth control signal, the scanning signal and the light emission signal are set to be at a low level;
In a data writing stage, the first control signal, the second control signal, the third control signal and the scanning signal are set to a high level, and the fourth control signal and the light emission signal are set to a low level;
In the light emitting stage, the first control signal, the second control signal, the third control signal, the fourth control signal, and the scan signal are set to a low level, and the light emitting signal is set to a high level.
Optionally, the pixel compensation circuit further includes a ninth thin film transistor and a tenth thin film transistor, and the ninth thin film transistor and the tenth thin film transistor are N-channel thin film transistors;
The first end of the ninth thin film transistor is connected with a fourth power supply end, the second end of the ninth thin film transistor is connected with the third node, and the grid electrode of the ninth thin film transistor is used for inputting the fourth control signal;
A first end of the tenth thin film transistor is connected with a fifth power supply end, a second end of the tenth thin film transistor is connected with the first node, and a grid electrode of the tenth thin film transistor is used for inputting a fifth control signal;
The pixel compensation method further includes:
A charge clearing stage between the charging stage and the threshold voltage acquisition stage, in which the first control signal, the third control signal, and the fourth control signal are set to a high level, and the second control signal, the fifth control signal, the scanning signal, and the light emission signal are set to a low level;
In a reset phase before the charging phase, the third control signal and the fifth control signal are at a high level, and the first control signal, the second control signal, the fourth control signal, the scan signal, and the light emission signal are at a low level.
Compared with the prior art, the embodiment of the invention has the beneficial effects that: the pixel compensation circuit is composed of the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor, the seventh thin film transistor, the eighth thin film transistor, the first capacitor and the second capacitor, wherein before the light emitting diode emits light, the pixel compensation circuit can write threshold voltage and data signals into the grid electrode and the third node of the fifth thin film transistor respectively, and when the light emitting diode is driven to emit light, the threshold voltage of the eighth thin film transistor is counteracted, so that the working current of the light emitting diode is irrelevant to the threshold voltage of the eighth thin film transistor, and the influence of the driving transistor on the working current of the light emitting diode due to the deviation of the threshold voltage is eliminated, the brightness uniformity of the display device is improved, and the display effect is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a pixel compensation circuit and a pixel circuit according to a first embodiment and a third embodiment of the present invention;
Fig. 2 is a schematic diagram of a pixel compensation circuit and a pixel circuit according to a second embodiment of the present invention;
fig. 3 is a timing diagram of a pixel compensation circuit according to a first embodiment and a second embodiment of the present invention;
fig. 4 is a schematic structural diagram of a display device according to a fourth embodiment of the present invention;
fig. 5 is a flowchart of a pixel compensation method according to a fifth embodiment of the present invention;
fig. 6 is a flowchart of a pixel compensation method according to a sixth embodiment of the invention.
Wherein, each reference sign in the figure is:
10. A pixel compensation circuit; 101. a pixel circuit; 102. a driving circuit;
t1, a first thin film transistor; t2, a second thin film transistor; t3, a third thin film transistor; t4, a fourth thin film transistor; t5, fifth thin film transistor; t6, sixth thin film transistor; t7, seventh thin film transistor; t8, eighth thin film transistor; t9, ninth thin film transistor; t10, tenth thin film transistor; c1, a first capacitor; c2, a second capacitor;
N1, a first node; n2, a second node; n3, a third node; VSS, ground terminal;
scan1, first control signal; scan2, second control signal; scan3, third control signal; scan4, fourth control signal; scan5, fifth control signal; vdata, data signal; GATE, scan signal; EM, optical emission signals; vref1, a first voltage; vref2, second voltage; vref3, a third voltage; vref4, fourth voltage; vref5, fifth voltage.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Example 1
A first aspect of the embodiment of the present invention proposes a pixel compensation circuit 10 for implementing driving lighting of a light emitting diode and implementing threshold compensation of a driving transistor, so as to improve a display effect of a display device.
As shown in fig. 1, in the present embodiment, the pixel compensation circuit 10 includes a first capacitor C1, a second capacitor C2, a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a fifth thin film transistor T5, a sixth thin film transistor T6, a seventh thin film transistor T7, and an eighth thin film transistor T8;
The first end of the first thin film transistor T1, the first end of the second thin film transistor T2, the first end of the first capacitor C1 and the first node N1 are connected, the second end of the first thin film transistor T1, the grid electrode of the third thin film transistor T3 and the first end of the fourth thin film transistor T4 are connected, the second end of the fourth thin film transistor T4 is connected with the first power end, the first end of the third thin film transistor T3, the second end of the first capacitor C1, the first end of the fifth thin film transistor T5 and the second node N2 are connected, the second end of the third thin film transistor T3 is connected with the second power end, the second end of the second thin film transistor T2 is connected with the grid electrode of the fifth thin film transistor T5, the second end of the fifth thin film transistor T5, the first end of the sixth thin film transistor T6, the first end of the second capacitor C2, the first end of the eighth thin film transistor T8 and the third node N3 are connected, the second end of the sixth thin film transistor T6 is connected with the second end of the OLED transistor T6 and is used for emitting data signals, the data signals are transmitted by the data signals of the data lines of the fifth thin film transistor T and the data line is connected with the fifth thin film transistor;
The gate of the first thin film transistor T1 is used for inputting the first control signal scan1, the gate of the second thin film transistor T2 is used for inputting the second control signal scan2, the gate of the fourth thin film transistor T4 is used for inputting the third control signal scan3, and the gate of the seventh thin film transistor T7 is used for inputting the fourth control signal scan4.
In this embodiment, the first power terminal, the second power terminal, and the third power terminal correspondingly input the first voltage Vref1, the second voltage Vref2, and the third voltage Vref3, each of which may be provided by a corresponding power module, and in an alternative embodiment, each of which is provided by an external power management integrated circuit.
The first control signal scan1, the second control signal scan2, the third control signal scan3, and the fourth control signal scan4 may be provided by external corresponding control modules, signal sources, and in an alternative embodiment, each control signal is provided by an external timing controller.
The sixth thin film transistor T6 is configured to implement writing of the data signal Vdata, the eighth thin film transistor T8 is a driving transistor, the driving transistor is connected to an anode of the light emitting diode OLED, a cathode of the light emitting diode OLED is connected to the ground terminal VSS, the sixth thin film transistor T6 and the eighth thin film transistor T8 are turned on sequentially, and after the data signal Vdata is written into the third node N3, the data signal Vdata is output to the light emitting diode OLED through the eighth thin film transistor T8 and drives the light emitting diode OLED to emit light.
Therefore, the pixel compensation circuit 10 at least includes a data writing stage T3 and a light emitting stage T4, the data writing stage T3, the sixth thin film transistor T6 receives the high level scan signal GATE and triggers on, the data signal Vdata is written, and the eighth transistor receives the light emitting signal EM and triggers on in the light emitting stage T4, and the data signal Vdata outputs the child light emitting diode OLED.
The fifth thin film transistor T5 and the eighth thin film transistor T8 are transistors of the same type, and the pixel compensation circuit 10 further includes at least a threshold voltage collecting stage T2, at least in the threshold voltage collecting stage T2, by adjusting the high-low level timing of each control signal, the threshold voltage of the fifth thin film transistor T5 is superimposed on the gate of the fifth thin film transistor T5, in the light emitting stage T4, the operating current id=k (Vgs-Vth) 2 of the light emitting diode OLED is the voltage of the gate of the fifth thin film transistor T5, vs is the voltage of the third node N3, vth is the threshold voltage of the thin film transistor, and since the threshold voltage of the fifth thin film transistor T5 exists on the gate of the fifth thin film transistor T5, the threshold voltage of the fifth thin film transistor T5 and the threshold voltage of the eighth thin film transistor T8 cancel each other, so that the operating current of the light emitting diode OLED is irrelevant to the threshold voltage of the eighth thin film transistor T8, and the influence of the driving transistor on the operating current of the light emitting diode OLED due to the threshold voltage shift is eliminated, the uniformity of the display device is improved, and the display effect is improved.
The types of the thin film transistors may be set correspondingly according to the received level and the on-off state, and in an alternative embodiment, the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4, the fifth thin film transistor T5, the sixth thin film transistor T6, the seventh thin film transistor T7, and the eighth thin film transistor T8 are N-channel thin film transistors.
The first end of the first thin film transistor T1 is a source electrode, the second end of the first thin film transistor T1 is a drain electrode, the first end of the second thin film transistor T2 is a drain electrode, the second end of the second thin film transistor T2 is a source electrode, the first end of the third thin film transistor T3 is a source electrode, the second end of the third thin film transistor T3 is a drain electrode, the first end of the fourth thin film transistor T4 is a source electrode, the second end of the fourth thin film transistor T4 is a drain electrode, the first end of the fifth thin film transistor T5 is a drain electrode, the second end of the fifth thin film transistor T5 is a source electrode, the first end of the sixth thin film transistor T6 is a source electrode, the second end of the seventh thin film transistor T7 is a source electrode, the second end of the eighth thin film transistor T8 is a drain electrode, and the second end of the eighth thin film transistor T8 is a source electrode.
Each thin film transistor is triggered to turn on when receiving a high level and to turn off when receiving a low level.
In order to realize the acquisition and writing of the threshold voltage, in an alternative embodiment, the combination of the first control signal scan1, the second control signal scan2, the third control signal scan3, the fourth control signal scan4, the scan signal GATE and the light emission signal EM sequentially corresponds to a charging phase t1, a threshold voltage acquisition phase t2, a data writing phase t3 and a light emitting phase t4;
in the charging phase t1, the first node N1 is charged;
In the threshold voltage acquisition stage T2, the first node N1 continues to charge and outputs a charging power supply to the gate of the fifth thin film transistor T5, the fifth thin film transistor T5 is turned on and charges the third node N3, and when the voltage of the first node N1 and the voltage of the third node N3 are smaller than the threshold voltage, the fifth thin film transistor T5 is turned off;
in the data writing stage t3, the data signal Vdata is written into the third node N3;
In the light-emitting phase t4, the light-emitting diode OLED emits light.
In the present embodiment, in the charging stage T1, the first thin film transistor T1 and the fourth thin film transistor T4 are triggered to be turned on, the first voltage Vref1 charges the first node N1 through the fourth thin film transistor T4 and the first thin film transistor T1, and meanwhile, since the first voltage Vref1 is synchronously input to the third thin film transistor T3, the third thin film transistor T3 is turned on, the second voltage Vref2 is output to the second node N2 through the third thin film transistor T3, the voltage of the second node N2 is the second voltage Vref2, and the voltage of the first node N1 is the first voltage Vref1.
After the charging period T1 is ended, the pixel compensation circuit 10 switches to the threshold voltage collecting period T2, in the threshold voltage collecting period T2, the second thin film transistor T2 is turned on, meanwhile, the first thin film transistor T1 and the fourth thin film transistor T4 are triggered to be turned on, the first node N1 is continuously charged, the charging power supply of the first node N1 is output to the gate of the fifth thin film transistor T5, the fifth thin film transistor T5 is turned on, meanwhile, the voltages of the source of the fifth thin film transistor T5 and the third node N3 continuously rise, the second capacitor C2 is charged, and when the voltages of the first node N1 and the third node N3 are smaller than the threshold voltage, the fifth thin film transistor T5 is turned off, the voltage of the first node N1 is Vg (Vref 1), the voltage of the third node N3 is Vs, namely, when Vg-Vs-vth=0, the fifth transistor is triggered to be turned off.
After the threshold voltage acquisition stage T2 is finished, the pixel compensation circuit 10 is switched to the data writing stage T3, the sixth thin film transistor T6 receives the high-level scanning signal GATE, the data signal Vdata is written into the third node N3 through the sixth thin film transistor T6, the second capacitor C2 is further used for voltage suppression, and transient high voltage of the data signal Vdata is prevented when the data signal Vdata is input, and at this time, the voltage of the third node N3 is Vs 1 =vdata+vs.
After the data writing period T3 is completed, the pixel compensation circuit 10 is switched to the light emitting period T4, the eighth thin film transistor T8 is turned on, and the rest of the thin film transistors are turned off, and at this time, the working current of the light emitting diode OLED is as follows:
Id=K*(Vgs-Vth)2
=K*(Vg-Vs1-Vth)2
=K*(Vth+Vs-(Vdata+Vs)-Vth)2
=K*Vdata2
Therefore, according to the calculation formula of the light emitting diode OLED, the threshold voltage of the fifth thin film transistor T5 and the threshold voltage of the eighth thin film transistor T8 cancel each other, so that the operating current of the light emitting diode OLED is irrelevant to the threshold voltage of the eighth thin film transistor T8, thereby eliminating the influence of the driving transistor on the operating current of the light emitting diode OLED due to the shift of the threshold voltage, improving the brightness uniformity of the display device, and improving the display effect.
The high and low levels of each of the control signal, the scan signal GATE, and the light emission signal EM may be set correspondingly to the on timing and type of the thin film transistor of each stage.
As shown in fig. 1 and 3, in an alternative embodiment, in the charging stage T1, the first control signal scan1 and the third control signal scan3 are at high level, the second control signal scan2, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are at low level, the first thin film transistor T1 and the fourth thin film transistor T4 trigger on, the first voltage Vref1 charges the first node N1 through the fourth thin film transistor T4 and the first thin film transistor T1, and meanwhile, since the first voltage Vref1 is synchronously input to the third thin film transistor T3, the third thin film transistor T3 is turned on, the second voltage Vref2 is output to the second node N2 through the third thin film transistor T3, the voltage of the second node N2 is the second voltage Vref2, and the voltage of the first node N1 is the first voltage Vref1.
In the threshold voltage collection stage T2, the first control signal scan1, the second control signal scan2 and the third control signal scan3 are at high level, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are at low level, the second thin film transistor T2 is turned on, meanwhile, the first thin film transistor T1 and the fourth thin film transistor T4 trigger on, the first node N1 is continuously charged, the charging power of the first node N1 is output to the GATE of the fifth thin film transistor T5, the fifth thin film transistor T5 is turned on, meanwhile, the voltages of the source of the fifth thin film transistor T5 and the third node N3 continuously rise, the second capacitor C2 is charged, and when the voltages of the first node N1 and the third node N3 are smaller than the threshold voltage, the fifth thin film transistor T5 is turned off.
In the data writing stage T3, the first control signal scan1, the second control signal scan2, the third control signal scan3 and the scan signal GATE are at high level, the fourth control signal scan4 and the light emitting signal EM are at low level, the sixth thin film transistor T6 receives the scan signal GATE at high level, and the data signal Vdata is written to the third node N3 through the sixth thin film transistor T6.
In the light emitting stage T4, the first control signal scan1, the second control signal scan2, the third control signal scan3, the fourth control signal scan4 and the scan signal GATE are at low level, the light emitting signal EM is at high level, the eighth thin film transistor T8 is turned on, and the rest of the thin film transistors are turned off.
Compared with the prior art, the embodiment of the invention has the beneficial effects that: the pixel compensation circuit 10 is composed of a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a fifth thin film transistor T5, a sixth thin film transistor T6, a seventh thin film transistor T7, an eighth thin film transistor T8, a first capacitor C1 and a second capacitor C2, wherein before the light emitting diode OLED emits light, the pixel compensation circuit 10 can write a threshold voltage and a data signal Vdata into a gate electrode and a third node N3 of the fifth thin film transistor T5 respectively, and cancel the threshold voltage of the eighth thin film transistor T8 when the light emitting diode OLED emits light, so that the operating current of the light emitting diode OLED is independent of the threshold voltage of the eighth thin film transistor T8, the influence of the driving transistor on the operating current of the light emitting diode OLED due to the deviation of the threshold voltage is eliminated, the brightness uniformity of the display device is improved, and the display effect is improved.
Example two
As shown in fig. 2, the pixel compensation circuit 10 further includes a ninth thin film transistor T9 and a tenth thin film transistor T10, the ninth thin film transistor T9 and the tenth thin film transistor T10 being N-channel thin film transistors, based on the first embodiment;
A first end of the ninth thin film transistor T9 is connected to the fourth power supply end, a second end of the ninth thin film transistor T9 is connected to the third node N3, and a gate of the ninth thin film transistor T9 is used for inputting a fourth control signal scan4;
the first terminal of the tenth thin film transistor T10 is connected to the fifth power terminal, the second terminal of the tenth thin film transistor T10 is connected to the first node N1, and the gate of the tenth thin film transistor T10 is used for inputting the fifth control signal scan5.
The first end of the ninth thin film transistor T9 is a drain electrode, the second end of the ninth thin film transistor T9 is a source electrode, the first segment of the tenth thin film transistor T10 is a drain electrode, and the second end of the tenth thin film transistor T10 is a source electrode.
A charge zero clearing stage t5 is further included between the charging stage t1 and the threshold voltage acquisition stage t 2;
in the charge clearing stage t5, the first control signal scan1, the third control signal scan3 and the fourth control signal scan4 are at high level, and the second control signal scan2, the fifth control signal scan5, the scan signal GATE and the light emission signal EM are at low level;
a reset phase t6 is also included before the charging phase t 1;
In the reset phase t6, the third control signal scan3 and the fifth control signal scan5 are at high level, and the first control signal scan1, the second control signal scan2, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are at low level.
The fourth power supply terminal and the fifth power supply terminal are respectively used for inputting a fourth voltage Vref4 and a fifth voltage Vref5, and the first voltage Vref1, the second voltage Vref2, the third voltage Vref3 and the fifth voltage Vref5 are all greater than the fourth voltage Vref4.
As shown in fig. 3, the pixel compensation circuit 10 operates in a reset phase t6, a charging phase t1, a threshold voltage acquisition phase t2, a charge clearing phase t5, a data writing phase t3 and a light emitting phase t4.
In the reset phase T6, the third control signal scan3 and the fifth control signal scan5 are at high level, the first control signal scan1, the second control signal scan2, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are at low level, the third thin film transistor T3, the fourth thin film transistor T4 and the tenth thin film transistor T10 are turned on, the first node N1 is reset, and the voltage of the second node N2 is the second voltage Vref2.
In the charge clearing stage T5, the first control signal scan1, the third control signal scan3 and the fourth control signal scan4 are at high level, the second control signal scan2, the fifth control signal scan5, the scan signal GATE and the light emission signal EM are at low level, the first node N1 is maintained in a charged state, meanwhile, the seventh thin film transistor T7 provides a voltage for the second capacitor C2, so as to avoid transient voltage disturbance of the second capacitor C2, and meanwhile, the ninth thin film transistor T9 resets the third node N3, so as to clear residual charges of the light emitting diode OLED.
Example III
As shown in fig. 1, the present invention further provides a pixel circuit 101, where the pixel circuit 101 includes a light emitting diode OLED and a pixel compensation circuit 10, and the specific structure of the pixel compensation circuit 10 refers to the above embodiment, and since the pixel circuit 101 adopts all the technical solutions of all the embodiments, at least has all the beneficial effects brought by the technical solutions of the embodiments, which are not described herein again. The pixel compensation circuit 10 is connected to the light emitting diode OLED.
The pixel compensation circuit 10, by providing the fifth thin film transistor T5, offsets the threshold voltage of the driving transistor when the light emitting diode OLED emits light, so that the working current of the light emitting diode OLED is irrelevant to the threshold voltage of the eighth thin film transistor T8, thereby eliminating the influence of the threshold voltage offset of the driving transistor on the working current of the light emitting diode OLED, improving the brightness uniformity of the display device, and improving the display effect.
The light emitting diode OLED and the pixel compensation circuit 10 form a single pixel circuit 101, the pixel circuits 101 are arranged in an array to form a display module, and the display module is connected with the data line, the scanning line, the corresponding control signal end and the power supply end and displays corresponding image information under the driving of the data signal Vdata, the scanning signal GATE, the plurality of control signals and the voltage signals of the power supply end.
Example IV
As shown in fig. 4, the present invention further provides a display device, which includes a driving circuit 102 and a pixel circuit 101, and the specific structure of the pixel circuit 101 refers to the above embodiment, and since the display device adopts all the technical solutions of all the embodiments, at least has all the beneficial effects brought by the technical solutions of the embodiments, and will not be described in detail herein. The driving circuit 102 is connected to the pixel circuit 101.
The pixel circuits 101 are arranged in an array to form a display module, the display module is connected with the driving circuit 102, and the display module displays corresponding image information under the driving of a data signal Vdata, a scanning signal GATE, a plurality of control signals and a voltage signal of a power supply end output by the driving circuit 102.
Example five
A fourth aspect of the present invention provides a pixel compensation method applied to the pixel compensation circuit of the first embodiment, as shown in fig. 3 and 5, the pixel compensation method includes:
step S11, in the charging stage t1, the first control signal scan1 and the third control signal scan3 are set to high level, and the second control signal scan2, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are set to low level;
Step S12, in the threshold voltage collection stage t2, the first control signal scan1, the second control signal scan2 and the third control signal scan3 are set to a high level, and the fourth control signal scan4, the scan signal GATE and the light emission signal EM are set to a low level;
Step S13, in the data writing stage t3, the first control signal scan1, the second control signal scan2, the third control signal scan3 and the scan signal GATE are set to high level, and the fourth control signal scan4 and the light emission signal EM are set to low level;
In step S14, in the light emitting stage t4, the first control signal scan1, the second control signal scan2, the third control signal scan3, the fourth control signal scan4 and the scan signal GATE are set to the low level, and the light emitting signal EM is set to the high level.
In this embodiment, as shown in fig. 1 and 3, in the charging stage T1, the first control signal scan1 and the third control signal scan3 are at high level, the second control signal scan2, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are at low level, the first thin film transistor T1 and the fourth thin film transistor T4 are triggered to be turned on, the first voltage Vref1 charges the first node N1 through the fourth thin film transistor T4 and the first thin film transistor T1, and meanwhile, since the first voltage Vref1 is synchronously input to the third thin film transistor T3, the third thin film transistor T3 is turned on, the second voltage Vref2 is output to the second node N2 through the third thin film transistor T3, the voltage of the second node N2 is the second voltage Vref2, and the voltage of the first node N1 is the first voltage Vref1.
After the charging period T1 is ended, the pixel compensation circuit is switched to a threshold voltage collecting period T2, in the threshold voltage collecting period T2, the first control signal scan1, the second control signal scan2 and the third control signal scan3 are at high level, the fourth control signal scan4, the scanning signal GATE and the light emitting signal EM are at low level, the second thin film transistor T2 is turned on, meanwhile, the first thin film transistor T1 and the fourth thin film transistor T4 trigger on, the first node N1 is continuously charged, the charging power of the first node N1 is output to the GATE of the fifth thin film transistor T5, the fifth thin film transistor T5 is turned on, meanwhile, the source of the fifth thin film transistor T5 and the voltage of the third node N3 continuously rise, the second capacitor C2 is charged, when the voltage of the first node N1 and the voltage of the third node N3 are smaller than the threshold voltage, the fifth thin film transistor T5 is turned off, the voltage of the first node N1 is Vg (Vref 1), and the voltage of the third node N3 is Vs-Vs is v-v=0.
After the threshold voltage acquisition stage T2 is finished, the pixel compensation circuit is switched to a data writing stage T3, the first control signal scan1, the second control signal scan2, the third control signal scan3 and the scanning signal GATE are at high level, the fourth control signal scan4 and the light emission signal EM are at low level, the sixth thin film transistor T6 receives the scanning signal GATE at high level, the data signal Vdata is written into the third node N3 through the sixth thin film transistor T6, the second capacitor C2 is also used for voltage suppression, transient high voltage of the data signal Vdata is prevented when the data signal Vdata is input, and at this time, the voltage of the third node N3 is Vs 1 =vdata+vs.
After the data writing period T3 is finished, the pixel compensation circuit is switched to a light emitting period T4, the first control signal scan1, the second control signal scan2, the third control signal scan3, the fourth control signal scan4 and the scanning signal GATE are at low level, the light emitting signal EM is at high level, the eighth thin film transistor T8 is turned on, and the rest of the thin film transistors are turned off, at this time, the working current of the light emitting diode OLED is as follows:
Id=K*(Vgs-Vth)2
=K*(Vg-Vs1-Vth)2
=K*(Vth+Vs-(Vdata+Vs)-Vth)2
=K*Vdata2
Therefore, according to the calculation formula of the light emitting diode OLED, the threshold voltage of the fifth thin film transistor T5 and the threshold voltage of the eighth thin film transistor T8 cancel each other, so that the operating current of the light emitting diode OLED is irrelevant to the threshold voltage of the eighth thin film transistor T8, thereby eliminating the influence of the driving transistor on the operating current of the light emitting diode OLED due to the shift of the threshold voltage, improving the brightness uniformity of the display device, and improving the display effect.
Example six
As shown in fig. 2, the pixel compensation circuit further includes a ninth thin film transistor T9 and a tenth thin film transistor T10, the ninth thin film transistor T9 and the tenth thin film transistor T10 being N-channel thin film transistors, based on the fifth embodiment;
A first end of the ninth thin film transistor T9 is connected to the fourth power supply end, a second end of the ninth thin film transistor T9 is connected to the third node N3, and a gate of the ninth thin film transistor T9 is used for inputting a fourth control signal scan4;
a first end of the tenth thin film transistor T10 is connected to the fifth power supply end, a second end of the tenth thin film transistor T10 is connected to the first node N1, and a gate of the tenth thin film transistor T10 is used for inputting a fifth control signal scan5;
As shown in fig. 6 and 3, the pixel compensation method further includes:
Step S15, in a charge clearing stage t5 between the charging stage t1 and the threshold voltage collecting stage t2, the first control signal scan1, the third control signal scan3 and the fourth control signal scan4 are set at a high level, and the second control signal scan2, the fifth control signal scan5, the scan signal GATE and the light emission signal EM are set at a low level;
In step S16, in the reset stage t6 before the charging stage t1, the third control signal scan3 and the fifth control signal scan5 are at high level, and the first control signal scan1, the second control signal scan2, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are at low level.
In this embodiment, the pixel compensation circuit works in a reset phase t6, a charging phase t1, a threshold voltage acquisition phase t2, a charge clearing phase t5, a data writing phase t3 and a light emitting phase t4.
In the reset phase T6, the third control signal scan3 and the fifth control signal scan5 are at high level, the first control signal scan1, the second control signal scan2, the fourth control signal scan4, the scan signal GATE and the light emission signal EM are at low level, the third thin film transistor T3, the fourth thin film transistor T4 and the tenth thin film transistor T10 are turned on, the first node N1 is reset, and the voltage of the second node N2 is the second voltage Vref2.
In the charge clearing stage T5, the first control signal scan1, the third control signal scan3 and the fourth control signal scan4 are at high level, the second control signal scan2, the fifth control signal scan5, the scan signal GATE and the light emission signal EM are at low level, the first node N1 is maintained in a charged state, meanwhile, the seventh thin film transistor T7 provides a voltage for the second capacitor C2, so as to avoid transient voltage disturbance of the second capacitor C2, and meanwhile, the ninth thin film transistor T9 resets the third node N3, so as to clear residual charges of the light emitting diode OLED.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present invention.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention, and are intended to be included in the scope of the present invention.

Claims (10)

1. The pixel compensation circuit is characterized by comprising a first capacitor, a second capacitor, a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a seventh thin film transistor and an eighth thin film transistor;
The first end of the first thin film transistor, the first end of the second thin film transistor, the first end of the first capacitor and a first node are connected, the second end of the first thin film transistor, the grid electrode of the third thin film transistor and the first end of the fourth thin film transistor are connected, the second end of the fourth thin film transistor is connected with a first power supply end, the first end of the third thin film transistor, the second end of the first capacitor, the first end of the fifth thin film transistor and a second node are connected, the second end of the third thin film transistor is connected with a second power supply end, the second end of the second thin film transistor is connected with the grid electrode of the fifth thin film transistor, the second end of the fifth thin film transistor, the first end of the sixth thin film transistor, the first end of the second capacitor, the first end of the eighth thin film transistor and a third node are connected, the sixth thin film transistor is connected with a third power supply end, the second thin film transistor is used for transmitting a data signal, the second thin film line is connected with the fifth thin film transistor, the data line is connected with the eighth thin film transistor is used for transmitting the data signal, the data line is connected with the eighth thin film transistor, and the data line is connected with the data line;
the grid electrode of the first thin film transistor is used for inputting a first control signal, the grid electrode of the second thin film transistor is used for inputting a second control signal, the grid electrode of the fourth thin film transistor is used for inputting a third control signal, and the grid electrode of the seventh thin film transistor is used for inputting a fourth control signal.
2. The pixel compensation circuit of claim 1, wherein the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor, the seventh thin film transistor, and the eighth thin film transistor are N-channel thin film transistors.
3. The pixel compensation circuit of claim 2, wherein the first control signal, the second control signal, the third control signal, the fourth control signal, the scanning signal, and the light emission signal in combination correspond to a charging phase, a threshold voltage acquisition phase, a data writing phase, and a light emission phase in sequence;
During the charging phase, the first node is charged;
in the threshold voltage acquisition stage, the first node continues to charge and outputs a charging power supply to the grid electrode of the fifth thin film transistor, the fifth thin film transistor is turned on and charges the third node, and when the voltage of the first node and the voltage of the third node are smaller than the threshold voltage, the fifth thin film transistor is turned off;
in the data writing stage, writing the data signal to the third node;
in the light-emitting stage, the light-emitting diode emits light.
4. The pixel compensation circuit of claim 3, wherein during the charging phase, the first control signal and the third control signal are high, and the second control signal, the fourth control signal, the scanning signal, and the light emission signal are low;
In the threshold voltage acquisition stage, the first control signal, the second control signal and the third control signal are at high level, and the fourth control signal, the scanning signal and the light emission signal are at low level;
In the data writing stage, the first control signal, the second control signal, the third control signal and the scanning signal are at high level, and the fourth control signal and the light emission signal are at low level;
In the light emitting stage, the first control signal, the second control signal, the third control signal, the fourth control signal, and the scan signal are low level, and the light emitting signal is high level.
5. The pixel compensation circuit of claim 4, further comprising a ninth thin film transistor and a tenth thin film transistor, the ninth thin film transistor and the tenth thin film transistor being N-channel thin film transistors;
The first end of the ninth thin film transistor is connected with a fourth power supply end, the second end of the ninth thin film transistor is connected with the third node, and the grid electrode of the ninth thin film transistor is used for inputting the fourth control signal;
A first end of the tenth thin film transistor is connected with a fifth power supply end, a second end of the tenth thin film transistor is connected with the first node, and a grid electrode of the tenth thin film transistor is used for inputting a fifth control signal;
A charge clearing stage is further included between the charging stage and the threshold voltage acquisition stage;
In the charge clearing stage, the first control signal, the third control signal and the fourth control signal are high-level, and the second control signal, the fifth control signal, the scanning signal and the light emission signal are low-level;
A reset phase is also included before the charging phase;
In the reset phase, the third control signal and the fifth control signal are high level, and the first control signal, the second control signal, the fourth control signal, the scan signal and the light emission signal are low level.
6. The pixel compensation circuit of claim 5, wherein the first power supply terminal, the second power supply terminal, the third power supply terminal, the fourth power supply terminal, and the fifth power supply terminal are configured to input a first voltage, a second voltage, a third voltage, a fourth voltage, and a fifth voltage, respectively, each of the first voltage, the second voltage, the third voltage, and the fifth voltage being greater than the fourth voltage.
7. A pixel circuit comprising a light emitting diode and a pixel compensation circuit according to any one of claims 1 to 6, wherein the pixel compensation circuit is connected to the light emitting diode.
8. A display device comprising a driver circuit and the pixel circuit according to claim 7, wherein the driver circuit is connected to the pixel circuit.
9. A pixel compensation method, characterized in that it is applied to the pixel compensation circuit according to any one of claims 1 to 6, and the pixel compensation method comprises:
In the charging stage, the first control signal and the third control signal are set to high level, and the second control signal, the fourth control signal, the scanning signal and the light emission signal are set to low level;
In a threshold voltage acquisition stage, the first control signal, the second control signal and the third control signal are set to be at a high level, and the fourth control signal, the scanning signal and the light emission signal are set to be at a low level;
In a data writing stage, the first control signal, the second control signal, the third control signal and the scanning signal are set to a high level, and the fourth control signal and the light emission signal are set to a low level;
In the light emitting stage, the first control signal, the second control signal, the third control signal, the fourth control signal, and the scan signal are set to a low level, and the light emitting signal is set to a high level.
10. The pixel compensation method of claim 9, wherein the pixel compensation circuit further comprises a ninth thin film transistor and a tenth thin film transistor, the ninth thin film transistor and the tenth thin film transistor being N-channel thin film transistors;
The first end of the ninth thin film transistor is connected with a fourth power supply end, the second end of the ninth thin film transistor is connected with the third node, and the grid electrode of the ninth thin film transistor is used for inputting the fourth control signal;
A first end of the tenth thin film transistor is connected with a fifth power supply end, a second end of the tenth thin film transistor is connected with the first node, and a grid electrode of the tenth thin film transistor is used for inputting a fifth control signal;
The pixel compensation method further includes:
A charge clearing stage between the charging stage and the threshold voltage acquisition stage, in which the first control signal, the third control signal, and the fourth control signal are set to a high level, and the second control signal, the fifth control signal, the scanning signal, and the light emission signal are set to a low level;
In a reset phase before the charging phase, the third control signal and the fifth control signal are at a high level, and the first control signal, the second control signal, the fourth control signal, the scan signal, and the light emission signal are at a low level.
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