CN117854121A - Sensor pixel circuit, driving method thereof, ultrasonic sensor and electronic equipment - Google Patents

Sensor pixel circuit, driving method thereof, ultrasonic sensor and electronic equipment Download PDF

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Publication number
CN117854121A
CN117854121A CN202311772376.XA CN202311772376A CN117854121A CN 117854121 A CN117854121 A CN 117854121A CN 202311772376 A CN202311772376 A CN 202311772376A CN 117854121 A CN117854121 A CN 117854121A
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node
voltage
coupled
control signal
transistor
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CN202311772376.XA
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Chinese (zh)
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张翠萍
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN202311772376.XA priority Critical patent/CN117854121A/en
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Abstract

The embodiment of the application provides a sensor pixel circuit, a driving method thereof, an ultrasonic sensor and electronic equipment, relates to the technical field of electronics, and is used for improving the performance of the sensor pixel circuit. The sensor pixel circuit includes a drive circuit whose port voltage directly affects the performance of the sensor pixel circuit. In the embodiment of the application, the variable voltage is directly or indirectly provided to the port of the driving circuit in different stages of one sampling period, or the variable voltage is directly or indirectly provided to the port of the driving circuit in different sampling periods, or a plurality of groups of driving circuits with different structures are arranged, and different driving circuits are used under different conditions, so that the sensor pixel circuit can exert better performance in different electronic devices.

Description

Sensor pixel circuit, driving method thereof, ultrasonic sensor and electronic equipment
Technical Field
The application relates to the technical field of electronics, in particular to a sensor pixel circuit, a driving method of the sensor pixel circuit, an ultrasonic sensor and electronic equipment.
Background
In the ultrasonic sensor, an ultrasonic transceiver may be used to transmit ultrasonic waves toward an object to be detected through an ultrasonic transmission medium and receive the ultrasonic waves reflected back from the object to be detected to complete the detection of the object to be detected.
For example, in an ultrasonic fingerprint ultrasonic sensor, ultrasonic waves emitted by an ultrasonic transceiver may be transmitted to a finger and reflected back to the ultrasonic transceiver at the ridges and valleys of the fingerprint at different intensities. The reflected signal may be processed to generate an image of the fingerprint to complete the acquisition and identification of the fingerprint image.
The ultrasonic sensor comprises a pixel circuit and a piezoelectric device, wherein the piezoelectric device is used for receiving and transmitting ultrasonic waves, and the pixel circuit is used for collecting the ultrasonic waves. The performance of the pixel circuit directly influences the detection effect of the ultrasonic sensor.
Disclosure of Invention
The embodiment of the application provides a sensor pixel circuit, a driving method thereof, an ultrasonic sensor and electronic equipment, which are used for improving the performance of the sensor pixel circuit.
In order to achieve the above purpose, the present application adopts the following technical scheme:
in a first aspect of the embodiments of the present application, a sensor pixel circuit is provided, including an emission circuit, a sampling circuit, a driving circuit, a reading circuit, and a voltage writing circuit. The transmitting circuit is coupled to the first control signal terminal, the bias voltage terminal and the first node, and is configured to transmit the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received by the first control signal terminal. The sampling circuit is coupled to the second control signal terminal, the second node and the first node, and is configured to transmit the signal of the first node to the second node under the control of the second control signal received by the second control signal terminal. The driving circuit is coupled with the second node, the power voltage end and the third node and is used for transmitting the power signal of the power voltage end to the third node under the control of the signal of the second node. The reading circuit is coupled to the third control signal terminal, the third node and the fourth node, and is configured to transmit the signal of the third node to the fourth node under the control of the received third control signal of the third control signal terminal. The voltage writing circuit is coupled with the fourth control signal end, the third node and the set voltage end and is used for transmitting the set voltage of the set voltage end to the third node under the control of the fourth control signal end.
Because the voltage of the second node, the voltage of the power supply voltage end and the voltage of the third node all affect the performance of the driving circuit, the sensor pixel circuit provided by the embodiment of the application can be controlled by the voltage writing circuit by setting the voltage writing circuit coupled with the third node. In this way, the voltage of the third node can be optimized in combination with the specific structure of the sensor pixel circuit, so as to optimize the performance of the driving circuit, thereby achieving the purpose of optimizing the performance of the sensor pixel circuit.
In one possible implementation, the set voltage received at the set voltage terminal is a variable voltage. By enabling the third node to receive the variable voltage, the equivalent capacitance effect of the fourth transistor in different phases in one sampling period or in different sampling periods can be adjusted to be better, so that the performances of the sensor pixel circuit, such as gain, signal to noise ratio and the like, are improved.
In one possible implementation, in one sampling period, the set voltage is the first voltage during the transmitting phase; and in the sampling stage, the set voltage is the second voltage. In this way, the performance of the driving circuit can be optimized at different stages of the sampling period, respectively, so as to improve the performance of the sensor pixel circuit.
In one possible implementation, the set voltage is the third voltage in one sampling period; in another sampling period, the set voltage is a fourth voltage. In this way, the performance of the driving circuit can be optimized according to the sampling period correspondence at different moments according to a plurality of factors, so as to improve the performance of the sensor pixel circuit.
In one possible implementation, the sensor pixel circuit further includes an auxiliary circuit coupled to the second node and the auxiliary voltage terminal. Because the voltage of the second node can influence the performance of the driving circuit, the auxiliary circuit communicated with the second node is arranged, and the voltage of the second node can be optimized through the auxiliary circuit so as to optimize the performance of the driving circuit, thereby achieving the purpose of further optimizing the performance of the sensor pixel circuit.
In one possible implementation, the fourth control signal terminal is coupled to the first control signal terminal. Therefore, the voltage writing circuit is controlled by the first control signal end, so that the number of signal ports can be reduced, and the requirement on control signals is reduced.
In one possible implementation, the fourth control signal terminal is coupled to the second control signal terminal. Therefore, the voltage writing circuit is controlled by the second control signal end, so that the number of signal ports can be reduced, and the requirement on control signals is reduced.
In one possible implementation, the voltage writing circuit includes a first transistor, a control electrode of the first transistor is coupled to the fourth control signal terminal, a first electrode of the first transistor is coupled to the set voltage terminal, and a second electrode of the first transistor is coupled to the third node. The potential of the third node is regulated through the first transistor, so that the process is simple, the structure is simple, and the cost is low.
In one possible implementation, the transmitting circuit includes a second transistor having a control electrode coupled to the first control signal terminal, a first electrode coupled to the bias voltage terminal, and a second electrode coupled to the first node. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the sampling circuit includes a third transistor, a control electrode of the third transistor is coupled to the second control signal terminal, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to the second node. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the driving circuit includes a fourth transistor, a control electrode of the fourth transistor is coupled to the second node, a first electrode of the fourth transistor is coupled to the third node, and a second electrode of the fourth transistor is coupled to the power supply voltage terminal. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the read circuit includes a fifth transistor having a control electrode coupled to the third control signal terminal, a first electrode coupled to the fourth node, and a second electrode coupled to the third node. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the auxiliary circuit includes a sixth transistor having a control electrode coupled to the second node, the first electrode of the sixth transistor and the second electrode of the sixth transistor being coupled to the third control signal terminal. The potential of the second node is regulated through the sixth transistor, so that the technology is simple, the structure is simple, and the cost is low.
In a second aspect of embodiments of the present application, there is provided a sensor pixel circuit, including: and the transmitting circuit is coupled with the first control signal end, the bias voltage end and the first node and is used for transmitting the bias voltage of the bias voltage end to the first node under the control of the first control signal received by the first control signal end. The first sampling circuit is coupled with the second control signal end, the second node and the first node and is used for transmitting the signal of the first node to the second node under the control of the second control signal received by the second control signal end. The first driving circuit is coupled with the second node, the power voltage end and the third node and is used for transmitting the power signal of the power voltage end to the third node under the control of the signal of the second node. And the reading circuit is coupled with the third control signal end, the third node and the fourth node and is used for transmitting the signal of the third node to the fourth node under the control of the received third control signal of the third control signal end. The second sampling circuit is coupled to the fourth control signal terminal, the fifth node and the first node, and is configured to transmit the signal of the first node to the fifth node under the control of the fourth control signal received by the fourth control signal terminal. The second driving circuit is coupled with the fifth node, the power supply voltage end and the third node and is used for transmitting a power supply signal to the third node under the control of the signal of the fifth node; the structure of the first driving circuit is different from that of the second driving circuit.
In the sensor pixel circuit provided by the embodiment of the application, the sampling circuit and the driving circuit are regarded as one reading unit, and the sensor pixel circuit comprises a plurality of reading units which are independently controlled and have different structures. The number of the reading units is not limited to two, and may be two or more. In a different electronic device, the sensor pixel circuit may select one of the plurality of reading units with optimal performance for fingerprint acquisition, so as to overcome the deviation caused by the process error. In the same electronic equipment, different reading units can be selected for fingerprint acquisition by the sensor pixel circuit in different sampling periods so as to overcome the deviation caused by the state change (such as aging, use temperature change and the like) of the electronic equipment, thereby achieving the purpose of optimizing the performance of the sensor pixel circuit.
In one possible implementation, the sensor pixel circuit further includes a first auxiliary circuit and a second auxiliary circuit; the first auxiliary circuit is coupled with the second node and the auxiliary voltage terminal; the second auxiliary circuit is coupled to the fifth node and the auxiliary voltage terminal. By arranging the first auxiliary circuit and the second auxiliary circuit, the electric potentials of the second node and the fifth node can be adjusted to optimize the performances of the first driving circuit and the second driving circuit, thereby achieving the purpose of optimizing the performances of the sensor pixel circuit.
In one possible implementation, the first driving circuit includes a first transistor; the control electrode of the first transistor is coupled with the second node, the first electrode of the first transistor is coupled with the third node, and the second electrode of the first transistor is coupled with the power supply voltage end; the second driving circuit includes a second transistor; the control electrode of the second transistor is coupled with the fifth node, the first electrode of the second transistor is coupled with the third node, and the second electrode of the second transistor is coupled with the power supply voltage end; the length of the channel of the first transistor is different from the length of the channel of the second transistor. The length of the channel directly affects the performance of the transistor, so that setting the length of the channel of the first transistor to be different from the length of the channel of the second transistor can make the equivalent capacitances of the first transistor and the second transistor different, so that the first transistor and the second transistor are applicable to different scenes.
In one possible implementation, the first driving circuit includes a first transistor; the control electrode of the first transistor is coupled with the second node, the first electrode of the first transistor is coupled with the third node, and the second electrode of the first transistor is coupled with the power supply voltage end; the second driving circuit includes a second transistor; the control electrode of the second transistor is coupled with the fifth node, the first electrode of the second transistor is coupled with the third node, and the second electrode of the second transistor is coupled with the power supply voltage end; the width of the channel of the first transistor is different from the width of the channel of the second transistor. The width of the channel directly affects the performance of the transistor, so that the length of the channel of the first transistor is set to be different from the width of the channel of the second transistor, and the equivalent capacitance of the first transistor and the equivalent capacitance of the second transistor can be different, so that the first transistor and the second transistor are applicable to different scenes.
In one possible implementation, the first sampling circuit includes a third transistor, a control electrode of the third transistor is coupled to the second control signal terminal, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to the second node. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the second sampling circuit includes a fourth transistor, a control electrode of the fourth transistor is coupled to the fourth control signal terminal, a first electrode of the fourth transistor is coupled to the first node, and a second electrode of the fourth transistor is coupled to the fifth node. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the first auxiliary circuit includes a fifth transistor having a control electrode coupled to the second node, the first and second electrodes of the fifth transistor being coupled to the auxiliary voltage terminal. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the second auxiliary circuit includes a sixth transistor having a control electrode coupled to the fifth node, the first and second electrodes of the sixth transistor being coupled to the auxiliary voltage terminal. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the transmitting circuit includes a seventh transistor having a control electrode coupled to the first control signal terminal, a first electrode coupled to the bias voltage terminal, and a second electrode coupled to the first node. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the read circuit includes an eighth transistor having a gate coupled to the third control signal terminal, a first gate coupled to the fourth node, and a second gate coupled to the third node. The method is an implementation mode with simple process, simple structure and low cost.
In one possible implementation, the auxiliary voltage terminal is coupled to the third control signal terminal. In this way, the number of ports in the sensor pixel circuit can be reduced.
In one possible implementation, the fourth node is configured to couple with a voltage variable terminal. The voltage of the third node can influence the performance of the driving circuit, so the fourth node is used for being coupled with a voltage variable terminal, and the voltage of the third node can be made to be variable voltage through the variable voltage terminal, so that the performance of the driving circuit is optimized, and the purpose of further optimizing the performance of the sensor pixel circuit is achieved.
In one possible implementation, in one sampling period, the voltage of the fourth node is the first voltage during the transmitting phase; the sampling stage, wherein the voltage of the fourth node is the second voltage; in the reading stage, the voltage of the fourth node is the second voltage or the third voltage. In this way, the performance of the driving circuit can be optimized at different stages of the sampling period, respectively, so as to improve the performance of the sensor pixel circuit.
In one possible implementation, in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is the fifth voltage. In this way, the performance of the driving circuit can be optimized according to the sampling period correspondence at different moments according to a plurality of factors, so as to improve the performance of the sensor pixel circuit.
In a third aspect of embodiments of the present application, there is provided a sensor pixel circuit, including: and the transmitting circuit is coupled with the first control signal end, the bias voltage end and the first node and is used for transmitting the bias voltage of the bias voltage end to the first node under the control of the first control signal received by the first control signal end. The sampling circuit is coupled with the second control signal end, the second node and the first node and is used for transmitting the signal of the first node to the second node under the control of the second control signal received by the second control signal end. And the driving circuit is coupled with the second node, the power supply voltage end and the third node and is used for transmitting the power supply signal of the power supply voltage end to the third node under the control of the signal of the second node. The reading circuit is coupled with the third control signal end, the third node and the fourth node and is used for transmitting the signal of the third node to the fourth node under the control of the received third control signal of the third control signal end; the fourth node is for coupling with the voltage variable terminal.
Because the voltage of the third node affects the performance of the driving circuit, the fourth node is coupled to the voltage variable terminal, and the voltage of the third node coupled to the fourth node can be made to be a variable voltage through the variable voltage terminal, so that the performance of the driving circuit is optimized, and the purpose of further optimizing the performance of the sensor pixel circuit is achieved.
In one possible implementation, in one sampling period, the voltage of the fourth node is the first voltage during the transmitting phase; the sampling stage, wherein the voltage of the fourth node is the second voltage; in the reading stage, the voltage of the fourth node is the second voltage or the third voltage. In this way, the performance of the driving circuit can be optimized at different stages of the sampling period, respectively, so as to improve the performance of the sensor pixel circuit.
In one possible implementation, in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is the fifth voltage. In this way, the performance of the driving circuit can be optimized according to the sampling period correspondence at different moments according to a plurality of factors, so as to improve the performance of the sensor pixel circuit.
In one possible implementation, the sensor pixel circuit further includes an auxiliary circuit coupled to the second node and the third control signal terminal. By arranging the auxiliary circuit, the potential of the second node can be adjusted to optimize the performance of the driving circuit, thereby achieving the purpose of optimizing the performance of the sensor pixel circuit.
In a fourth aspect of embodiments of the present application, there is provided an array substrate including a substrate and a plurality of sensor pixel circuits disposed on one side of the substrate, the sensor pixel circuits including the sensor pixel circuits of any one of the first to third aspects.
In a fifth aspect of embodiments of the present application, an ultrasonic sensor is provided, including an array substrate and a plurality of pixel electrodes, where the array substrate includes the array substrate of the fourth aspect, and the plurality of pixel electrodes are correspondingly coupled to the plurality of sensor pixel circuits.
In a sixth aspect of embodiments of the present application, there is provided an electronic device comprising an ultrasonic sensor and a control chip, the ultrasonic sensor comprising the ultrasonic sensor of the fifth aspect, the ultrasonic sensor being coupled to the control chip.
In one possible implementation, the control chip is configured to transmit a set voltage to a set voltage terminal of the ultrasonic sensor.
In one possible implementation, the port at which the control chip is coupled to the fourth node of the ultrasonic sensor is a voltage variable port.
In one possible implementation, the control chip is configured to transmit the second control signal or the fourth control signal to the ultrasound sensor at the same time.
A seventh aspect of embodiments of the present application provides a driving method of the sensor pixel circuit of any one of the first aspect, including: within one sampling period: the transmitting stage: the transmitting circuit transmits the bias voltage of the bias voltage end to the first node under the control of a first control signal received by the first control signal end; sampling: the sampling circuit transmits the signal of the first node to a second node under the control of a second control signal received by a second control signal end; reading: the driving circuit transmits a power supply signal of a power supply voltage end to the third node under the control of the signal of the second node; the reading circuit transmits a signal of a third node to a fourth node under the control of a received third control signal of a third control signal end; before the reading stage, the voltage writing circuit transmits the set voltage of the set voltage terminal to the third node under the control of a fourth control signal of the fourth control signal terminal.
In one possible implementation, the set voltage received at the set voltage terminal is a variable voltage.
In one possible implementation, in one sampling period, the set voltage is the first voltage during the transmitting phase; and in the sampling stage, the set voltage is the second voltage.
In one possible implementation, the set voltage is the third voltage in one sampling period; in another sampling period, the set voltage is a fourth voltage.
An eighth aspect of embodiments of the present application provides a driving method of the sensor pixel circuit of any one of the second aspect, including: within one sampling period: the transmitting stage: the transmitting circuit transmits the bias voltage of the bias voltage end to the first node under the control of a first control signal received by the first control signal end; sampling: the first sampling circuit transmits the signal of the first node to a second node under the control of a second control signal received by a second control signal end; reading: the first driving circuit transmits a power supply signal of a power supply voltage end to a third node under the control of a signal of the second node; the reading circuit transmits a signal of a third node to a fourth node under the control of a received third control signal of a third control signal end; alternatively, the sampling phase: the second sampling circuit transmits the signal of the first node to a fifth node under the control of a second control signal received by a fourth control signal end; reading: the second driving circuit transmits a power supply signal of a power supply voltage end to the third node under the control of a signal of the fifth node; the reading circuit transmits a signal of the third node to the fourth node under the control of the third control signal.
In one possible implementation, the voltage of the fourth node is a fixed voltage.
In one possible implementation, the voltage of the fourth node is a variable voltage.
In one possible implementation, the voltage of the fourth node is a variable voltage, including: in the sampling period, in the transmitting stage, the voltage of the fourth node is the first voltage; the sampling stage, wherein the voltage of the fourth node is the second voltage; in the reading stage, the voltage of the fourth node is the second voltage or the third voltage.
In one possible implementation, the voltage of the fourth node is a variable voltage, including: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is the fifth voltage.
A ninth aspect of embodiments of the present application provides a driving method of the sensor pixel circuit of any one of the third aspects, including: within one sampling period: the transmitting stage: the transmitting circuit transmits the bias voltage of the bias voltage end to the first node under the control of a first control signal received by the first control signal end; sampling: the sampling circuit transmits the signal of the first node to a second node under the control of a second control signal received by a second control signal end; reading: the driving circuit transmits a power supply signal of a power supply voltage end to the third node under the control of the signal of the second node; the reading circuit transmits a signal of a third node to a fourth node under the control of a received third control signal of a third control signal end; the voltage of the fourth node is a variable voltage.
In one possible implementation, the voltage of the fourth node is a variable voltage, including: in the sampling period, in the transmitting stage, the voltage of the fourth node is the first voltage; the sampling stage, wherein the voltage of the fourth node is the second voltage; in the reading stage, the voltage of the fourth node is the second voltage or the third voltage.
In one possible implementation, the voltage of the fourth node is a variable voltage, including: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is the fifth voltage.
Drawings
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of an ultrasonic sensor according to an embodiment of the present application;
FIG. 3A is a schematic diagram of a peak detection technique according to an embodiment of the present disclosure;
fig. 3B is a waveform diagram of an output end according to an embodiment of the present application;
fig. 4A is a topology diagram of a sensor pixel circuit according to an embodiment of the present disclosure;
FIG. 4B is a timing diagram of the pixel circuit shown in FIG. 4A according to an embodiment of the present disclosure;
fig. 5 is a topology diagram of a sensor pixel circuit according to an embodiment of the present disclosure;
Fig. 6A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present disclosure;
fig. 6B-6D are timing diagrams of the pixel circuit shown in fig. 6A according to an embodiment of the present application;
fig. 7 is a topology diagram of a sensor pixel circuit according to an embodiment of the present disclosure;
fig. 8A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present application;
fig. 8B and 8C are timing diagrams of the pixel circuit shown in fig. 8A according to an embodiment of the present application;
fig. 9 is a topology diagram of a sensor pixel circuit according to an embodiment of the present disclosure;
figure 10A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present application,
fig. 10B and 10C are timing diagrams of the pixel circuit shown in fig. 10A according to an embodiment of the present application;
FIG. 11 is a topology diagram of a sensor pixel circuit according to an embodiment of the present disclosure;
fig. 12A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present disclosure;
fig. 12B and 12C are timing diagrams of the pixel circuit shown in fig. 12A according to an embodiment of the present application.
Detailed Description
The following description of the technical solutions in the embodiments of the present application will be made with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments.
Hereinafter, the terms "second," "first," and the like are used for descriptive convenience only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "second," "first," etc. may explicitly or implicitly include one or more such feature. In the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.
Furthermore, in the embodiments of the present application, the terms "upper," "lower," "left," "right," and the like may be defined by, but are not limited to, orientations that are illustrated with respect to the component in the figures, it being understood that the directional terms may be used for relative description and clarity, and may be modified accordingly in response to changes in the orientation of the component in the figures.
In the embodiments herein, unless explicitly specified and limited otherwise, the term "connected" is to be construed broadly, and for example, "connected" may be either a fixed connection, a removable connection, or an integral body; can be directly connected or indirectly connected through an intermediate medium. Furthermore, the term "coupled" may be a direct electrical connection, or an indirect electrical connection via an intermediary. The term "contact" may be direct contact or indirect contact through an intermediary.
In the embodiment of the present application, "and/or" describes an association relationship of an association object, which indicates that three relationships may exist, for example, a and/or B may indicate: a alone, a and B together, and B alone, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship.
The embodiment of the application provides electronic equipment, which has a sensing detection function on a pressed object. For example, a fingerprint, palmprint, fingerprint of a hand, or the like may be detected. The electronic device is, for example, a consumer electronic product, a home electronic product, a vehicle-mounted electronic product, or the like having a biometric feature detection function. Among the consumer electronics products are, for example, mobile phones, tablet computers (pad), notebook computers, electronic readers, personal computers (personal computer, PC), personal digital assistants (personal digital assistant, PDA), desktop displays, smart wearable products (e.g., smart watches, smart bracelets), virtual Reality (VR) electronics, augmented reality (augmented reality, AR) electronics, drones, etc. Household electronic products such as intelligent door locks, televisions, remote controllers, refrigerators, small household appliances (e.g., soymilk makers, sweeping robots) and the like. The vehicle-mounted electronic products are, for example, vehicle-mounted navigator, vehicle-mounted high-density digital video disc (digital video disc, DVD) and the like. The electronic device may be an electronic device with a display function, or an electronic device without a display function, which is not limited in the embodiment of the present application.
Hereinafter, an electronic device will be schematically described as an example of a mobile phone.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
As shown in fig. 1, the electronic device 10 mainly includes a cover plate 11, a touch display screen 12, a middle frame 13, and a rear case 14. The back shell 14 and the touch display screen 12 are respectively located at two sides of the middle frame 13, the middle frame 13 and the touch display screen 12 are arranged in the back shell 14, the cover plate 11 is arranged at one side, far away from the middle frame 13, of the touch display screen 12, and the display surface of the touch display screen 12 faces the cover plate 11.
By way of example, the touch display 12 may be a low temperature polysilicon (low temperature poly-silicon, LTPS) display, an active-matrix organic light emitting diode (AMOLED) display, a low temperature polycrystalline oxide (low temperature polycrystalline oxide, LTPO) display, a liquid crystal display (liquid crystal display, LCD), a micro-organic light emitting diode (micro light emitting diode, micro LED) display. Of course, the type of the touch display 12 is not limited in the embodiment of the present application, and the display with the touch display function is suitable for the embodiment of the present application, and the above list is only illustrative.
On the basis, as shown in fig. 1, the electronic device 10 further includes a biometric sensor 15, and the biometric sensor 15 is disposed on one side of the display screen 12. The biometric sensor 15 is used to provide a biometric function for the electronic device 10.
In addition, those skilled in the art will appreciate that the configuration of the electronic device 10 illustrated in the above-described figures does not constitute a limitation of the electronic device 10, and the electronic device 10 may include more or less components than illustrated, or may combine certain components, or may have a different arrangement of components. For example, the electronic device 10 further includes a printed circuit board (printed circuit boards, PCB), a battery, a camera, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor, an audio circuit, a wireless fidelity (wireless fidelity, wiFi) module, a power source, a bluetooth module, and the like, which are not described herein.
Taking fingerprint identification as an example, with the continuous development of users' demands for comprehensive screen technologies, technologies for under-screen fingerprints are also continuously developed. The current under-screen fingerprint technology is mainly divided into two types: fingerprint under optical screen and fingerprint under ultrasonic wave screen.
Since 2018, fingerprints under an optical screen are gradually and widely applied to fingerprints under an OLED display screen by virtue of lower cost and excellent performance. However, with the continuous development of OLED display technology, if the biometric sensor 15 adopts the fingerprint technology under the optical screen, the following problems may exist: on the one hand, the performance of the fingerprint module under the optical screen depends on the light transmittance of the OLED display screen, the overall light transmittance of the common LTPS OLED display screen in the market is about 3%, and the light transmittance is enough for the application of the optical fingerprint module. However, with the continuous penetration of LTPO OLED display technology in the market and the continuous development of emerging OLED screen technologies such as no polarized light (color on encapsulation, COE) structures, the transmittance of OLED display screens is continuously reduced, which causes significant challenges to the fingerprint technology under the optical screen. On the other hand, the current optical fingerprint under the second generation screen with the most cost performance has the module thickness of 3mm-4mm and larger thickness, so that the design of the whole electronic equipment is limited. In addition, the thickness is large, so that the electronic device cannot be applied to a folding screen electronic device. On the other hand, when the fingerprint under the optical screen is used, the display pixels of the fingerprint identification area are lightened firstly, at the moment, the brightness of the pixels of the area is higher, if the finger is pressed with a certain deviation, the problem of light leakage and dazzling can be caused, and particularly in a dark environment, the problem is more serious.
While the development of fingerprints under an optical screen, the technology of fingerprints under an ultrasonic screen is also continuously developed and applied to the market. The fingerprint module under the ultrasonic screen is clung to the lower part of the display screen, and ultrasonic waves are transmitted and received by the piezoelectric layer, so that fingerprint images are acquired and identified. Compared with the fingerprint module under the optical screen, if the biological feature recognition sensor 15 adopts the fingerprint technology under the ultrasonic screen, the following advantages are provided: on the one hand, the fingerprint under the ultrasonic screen does not depend on the light transmittance of the display screen, and can adapt to the technical development trend that the transmittance of the current OLED display screen is continuously reduced. On the other hand, the thickness of the ultrasonic fingerprint module is thinner and only 200um-300um, which is beneficial to the whole structure design of the electronic equipment and can be applied to the folding screen electronic equipment. On the other hand, the fingerprint module under the ultrasonic screen is faster in recognition speed, and the problems of light leakage, dazzling and the like are avoided.
Based on this, the embodiment of the present application provides an ultrasonic sensor that uses an ultrasonic under-screen fingerprint technology, and can be used as the biometric sensor 15 in the electronic device 10.
Fig. 2 is a schematic structural diagram of an ultrasonic sensor according to an embodiment of the present application.
As shown in fig. 2, the ultrasonic sensor 20 includes a common electrode layer, a piezoelectric layer, a pixel electrode layer, and a thin film field effect transistor (thin film transistor, TFT) substrate.
The common electrode layer is formed by coating the whole surface of conductive silver paste, and the piezoelectric layer is prepared by using copolymer organic composite material with polyvinylidene fluoride (PVDF) as a core raw material. The pixel electrode layer comprises pixel electrodes arranged in an array, the TFT substrate comprises sensor pixel circuits 30 arranged in an array, and the sensor pixel circuits 30 are correspondingly coupled with the pixel electrodes.
When the ultrasonic sensor 20 is applied to the electronic device 10, as shown in fig. 2, the ultrasonic sensor 20 is bonded to the OLED display screen through the bonding layer. Of course, in different application scenarios, the ultrasonic sensor 20 may be conformed to different structures. For example, the ultrasonic sensor may be attached to a structure such as a display screen, a glass cover plate, a metal cover plate, or other cover plate.
In practical applications, as shown in fig. 2, the ultrasonic sensor 20 may be attached to the back side below the OLED display screen, that is, the TFT substrate in the ultrasonic sensor 20 is attached to the OLED display screen. Of course, the ultrasonic sensor 20 may also be attached to the front surface below the OLED display screen, that is, the common electrode layer is attached to the OLED display screen.
The ultrasonic sensor 20 mainly uses the piezoelectric effect of the piezoelectric layer, that is, the mutual conversion between the pressure deformation and the electrical signal can be achieved. The operation of the ultrasonic sensor 20 is largely divided into a Transmit (TX) phase and a Receive (RX) phase. In the TX phase, a high frequency high amplitude ac signal is emitted to the pixel electrode (where the common electrode layer is at a fixed level) through the control chip and peripheral components (e.g., integrated on the PCB of the electronic device 10). After the piezoelectric layer receives the alternating current signal, the piezoelectric layer can deform under the drive of electrostatic high voltage on the upper side and the lower side, and the alternating current signal is converted into high-frequency mechanical vibration, namely ultrasonic waves are generated. The ultrasonic waves reach the finger tips after penetrating the ultrasonic sensor 20 and the OLED display screen, and after touching the valleys and ridges of the fingerprint, a part of the ultrasonic waves are reflected by the fingerprint, and a small part of the ultrasonic waves continue to propagate forward. In the RX stage, the reflected ultrasonic waves pass through each layer of medium again to reach the piezoelectric layer, and the ultrasonic waves which are close to the static piezoelectric layer and are reflected back drive high-frequency vibration, so that the high-frequency vibration is converted into a high-frequency pulse electric signal. This electrical signal is received by the sensor pixel circuit 30 coupled to the pixel electrode and then passed on to the control chip. Because the reflection degree of the finger valleys and the finger ridges on the ultrasonic wave is different, the final control chip can process and analyze the ultrasonic wave according to different signals to obtain a final fingerprint image.
From the above analysis, the accuracy of detection by the sensor pixel circuit 30 has a direct influence on the accuracy of the fingerprint recognition result. In some techniques, the sensor pixel circuit 30 employs peak detection techniques to achieve valley-ridge echo signal detection.
Fig. 3A is a schematic diagram of a peak detection technique according to an embodiment of the present application, and fig. 3B is a waveform diagram of an output end according to an embodiment of the present application.
The specific principle of the peak detection technique is shown in fig. 3A: when the level of the output terminal Vo is less than the level of the input terminal Vi, the diode D is turned on, and the output terminal Vo is charged to the level of the input terminal Vi to the on level of the diode D. The capacitance C and resistance R in fig. 3A are equivalent to other device modules in the circuit. As shown in fig. 3B, when the level of the output terminal Vo is greater than the level of the input terminal Vi, the diode D is turned off, and the output terminal Vo maintains the original level until the next higher level than the current value reaches the input terminal Vi. Eventually, the level of the output Vo will remain near the highest level of the input Vi. Therefore, the peak detection technology is to use the unidirectional conduction capability of the diode D to extract the peak value of the input signal, so that the voltage at the output terminal Vo is maintained until a larger peak value occurs or the circuit is reset to achieve such a goal.
Fig. 4A is a topology diagram of a sensor pixel circuit according to an embodiment of the present application, and fig. 4B is a timing diagram of the pixel circuit shown in fig. 4A according to an embodiment of the present application.
In some embodiments, as shown in fig. 4A, the sensor pixel circuit 30 includes a transistor M1, a transistor M2, a transistor M3, a diode D, a capacitor C, and a pixel electrode pad P.
The bias voltage terminal Vref is coupled to the pixel electrode pad P, the gate of the transistor M1 is coupled to the pixel electrode pad P, the first electrode of the transistor M1 is coupled to the power source terminal AP, the second terminal of the transistor M1 is coupled to the first terminal of the transistor M3, the second terminal of the transistor M3 is coupled to the output terminal Vo, and the gate of the transistor M3 is coupled to the read voltage terminal VRe. The gate of the transistor M2 is coupled to the reset voltage terminal VRs, the first terminal of the transistor M2 is coupled to the input terminal Vi, and the second terminal of the transistor M2 is coupled to the gate of the transistor M1. One end of the diode D is coupled to the input terminal Vi, and the other end of the diode D is coupled to the gate of the transistor M1. One end of the capacitor C is coupled to the gate of the transistor M1, and the other end of the capacitor C is coupled to the ground voltage GND.
The transistor M2 is a set transistor and is used as a switch for detecting a pre-reset peak value signal, so that the influence of the previous residual charge on the current signal receiving and processing is avoided, and the consistency and accuracy of each signal processing are ensured.
The diode D is a diode formed by a transistor process and is used for realizing a peak detection function. The principle of peak detection of diode D may be referred to the above description of the correlation with fig. 2.
The transistor M1 is a driving transistor, receives a peak correlation signal, is turned on during a read phase and operates in a source-follower (source-follower) mode, and controls the output voltage to vary with the gate voltage Vg.
The transistor M3 is a read transistor, and outputs the peak correlation signal from the output terminal Vo to the control chip terminal in the read stage, and the transistor M3 is used as a switch.
The sensor pixel circuit 30 has 6 signal terminals: the output end Vo is used for outputting a sampling signal, and the power end AP is a direct-current voltage and is a global signal. The reset voltage terminal VRs is a control terminal of the TX stage global control initialization signal, and the bias voltage terminal Vref supplies a bias voltage to the pixel electrode pad P in the TX stage. The input Vi is also a global signal, providing an initialization voltage Dbias (L) during the TX phase and providing a bias voltage Dbias (H) for the diode D during the RX phase. The read voltage terminal VRe outputs a control signal for the RX stage.
The present application is schematically described with reference to the transistors M1, M2, and M3 being N-type transistors, and the transistors M1, M2, and M3 may be P-type transistors.
As can be seen from the topology diagram shown in fig. 4A and the timing diagram shown in fig. 4B, the sensor pixel circuit 30 can be divided into three stages: in the TX stage, the control chip drives a high-voltage periodic signal to the P side of the pixel electrode pad through the bias voltage end Vref, so that the piezoelectric material generates ultrasonic waves. In the RX stage, the reset voltage terminal VRs signals the high control transistor M2 to be turned on, and the initializing voltage Dbias (L) provided by the input terminal Vi initializes the gate voltage Vg of the transistor M1, vg=dbias (L). At this time, the input terminal Vi is at a low level, and the diode D is in an off state. The reset voltage terminal VRs signal then sets the low control transistor M2 off. The echo signals reflected by the fingers are converted into alternating current signals by the piezoelectric effect of the piezoelectric layer, and the stronger the echo signals are, the larger the amplitude of the alternating current signals is. This signal is applied to the gate of transistor M1 by capacitive C charge distribution. The input terminal Vi provides a bias voltage Dbias (H) with a higher level to place the diode D in a conductive state, thereby realizing a peak detection function. When Vg < Dbias (H), diode D continues to charge the gate of transistor M1 until vg=dbias (H). When Vg > Dbias (H), diode D turns off and Vg remains unchanged. Due to the fact that the fingerprint valley and ridge echo signal amplitudes are different, the peak voltages of the final Vg are different. The input end Vi of the reading stage is switched back to the initializing voltage Dbias (L), the signal of the reading voltage end VRe is set to high, the control transistor M3 is turned on, the sensor pixel circuit 30 outputs line by line, the transistor M1 works in the source follower mode, the voltage output by the output end Vo changes along with the change of the Vg voltage, and therefore the transition from different echo signal intensities to different output voltages is achieved.
Although the sensor pixel circuit 30 shown in fig. 4A can detect a fingerprint, on the one hand, the peak detection technique can only recognize the signal difference of the valley and the ridge on the other hand under ideal conditions, and the signal difference information on the side smaller than the bias voltage Dbias (H) is lost. Meanwhile, as the echo signal is a high-frequency sine wave signal with a certain attenuation coefficient, when the response rate of the diode D in the circuit is slower, the corresponding detection action cannot be carried out in real time along with the change of the echo signal, so that the finally identified peak value is not the maximum value of the echo signal, the effective information is further lost, and the output valley-ridge signal difference is smaller. On the other hand, the sensor pixel circuit 30 has a diode D structure, which is different from the conventional TFT process, and requires a special process for preparation, and has high process complexity. On the other hand, the voltage provided by the input terminal Vi is used as a power signal, and needs to be quickly flipped between the initialization voltage Dbias (L) and the bias voltage Dbias (H), so that the requirement on the control chip is high.
Based on this, the embodiment of the present application provides a sensor pixel circuit 30 for improving the performance of the sensor pixel circuit 30 without increasing the process difficulty.
Next, a sensor pixel circuit and a driving method thereof provided in the embodiments of the present application are schematically described with several examples.
Example one
Fig. 5 is a topology diagram of a sensor pixel circuit according to an embodiment of the present application.
The embodiment of the present application provides a sensor pixel circuit 30, as shown in fig. 5, the sensor pixel circuit 30 includes a transmitting circuit 31, a sampling circuit 32, a driving circuit 33, and a reading circuit 34.
The transmitting circuit 31 is coupled to the first control signal terminal S1, the bias voltage terminal Vb and the first node P1, and the transmitting circuit 31 is configured to transmit the bias voltage of the bias voltage terminal Vb to the first node P1 under the control of the first control signal received by the first control signal terminal S1.
When the sensor pixel circuit 30 provided in the embodiment of the present application is applied to the above-described ultrasonic sensor 20, the first node P1 is used to couple with a pixel electrode in the ultrasonic sensor 20. After the bias voltage of the bias voltage terminal Vb is transmitted to the pixel electrode, the piezoelectric layer deforms under the drive of the electrostatic high voltage on the upper side and the lower side, and ultrasonic waves are generated.
The sampling circuit 32 is coupled to the second control signal terminal S2, the second node P2 and the first node P1, and the sampling circuit 32 is configured to transmit the signal of the first node P1 to the second node P2 under the control of the second control signal received by the second control signal terminal S2.
The reflected ultrasonic wave reaches the piezoelectric layer again, and the piezoelectric layer vibrates under the drive of the ultrasonic wave at high frequency, so that the high-frequency vibration is converted into a high-frequency pulse electric signal. The electrical signal is transmitted to the first node P1 through the pixel electrode, and the sampling circuit 32 transmits the signal of the first node P1 to the second node P2, thereby completing the sampling of the echo signal.
The driving circuit 33 is coupled to the second node P2, the power voltage terminal AP, and the third node P3, and the driving circuit 33 is configured to transmit the power signal of the power voltage terminal AP to the third node P3 under the control of the signal of the second node P2.
The driving circuit 33 transmits the power signal of the power voltage terminal AP to the third node P3, the voltage of the second node P2 determines the intensity of the signal transmitted to the third node P3, and the second node P2 is similar to a tap switch, determining the throughput of the driving circuit 33.
The reading circuit 34 is coupled to the third control signal terminal S3, the third node P3 and the fourth node P4, and the reading circuit 34 is configured to transmit the signal of the third node P3 to the fourth node P4 under the control of the received third control signal of the third control signal terminal S3.
The reading circuit 34, as a column output selection circuit, determines whether the sensor pixel circuit 30 transmits the signal of the third node P3 to the fourth node P4, and thus to the peripheral control chip, and completes the reading of the echo signal.
In some embodiments, the sensor pixel circuit further comprises an auxiliary circuit 35, the auxiliary circuit 35 being coupled to the second node P2 and the third control signal terminal S3.
Fig. 6A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present application. Fig. 6B-6D are timing diagrams of the pixel circuit shown in fig. 6A according to an embodiment of the present application.
In some embodiments, as shown in fig. 6A, the transmitting circuit 31 includes a second transistor T2, a control electrode of the second transistor T2 is coupled to the first control signal terminal S1, a first electrode of the second transistor T2 is coupled to the bias voltage terminal Vb, and a second electrode of the second transistor T2 is coupled to the first node P1. Of course, the transmitting circuit 31 may also include one or more transistors connected in series and/or parallel with the second transistor T2, which is not limited in this embodiment of the present application.
The sampling circuit 32 includes a third transistor T3, a control electrode of the third transistor T3 is coupled to the second control signal terminal S2, a first electrode of the third transistor T3 is coupled to the first node P1, and a second electrode of the third transistor T3 is coupled to the second node P2. Of course, the sampling circuit 32 may also include one or more transistors in series and/or parallel with the third transistor T3, which is not limited in this embodiment of the present application.
The driving circuit 33 includes a fourth transistor T4, the control electrode of the fourth transistor T4 is coupled to the second node P2, the first electrode of the fourth transistor T4 is coupled to the third node P3, and the second electrode of the fourth transistor T4 is coupled to the power voltage terminal AP. Of course, the driving circuit 33 may further include one or more transistors connected in series and/or parallel with the fourth transistor T4, which is not limited in the embodiment of the present application.
The reading circuit 34 includes a fifth transistor T5, a control electrode of the fifth transistor T5 is coupled to the third control signal terminal S3, a first electrode of the fifth transistor T5 is coupled to the fourth node P4, and a second electrode of the fourth transistor T4 is coupled to the third node P3. Of course, the read circuit 34 may also include one or more transistors in series and/or parallel with the fifth transistor T5, which is not limited in this embodiment.
The auxiliary circuit 35 includes a sixth transistor T6, a control electrode of the sixth transistor T6 is coupled to the second node P2, and a first electrode of the sixth transistor T6 and a second electrode of the sixth transistor T6 are both coupled to the third control signal terminal S3. Of course, the auxiliary circuit 35 may also include one or more transistors connected in series and/or parallel with the sixth transistor T6, which is not limited in this embodiment of the present application.
It should be noted that the types of the transistors in each circuit are not limited in the embodiment of the present invention, that is, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 may be N-type transistors or P-type transistors. The following embodiments of the present invention will be described by taking the above transistors as N-type transistors as examples.
Wherein the first pole of the transistor may be a drain electrode and the second pole may be a source electrode; alternatively, the first pole may be the source and the second pole may be the drain. The embodiments of the present invention are not limited in this regard.
Next, a driving method of the sensor pixel circuit provided in the embodiment of the present application is schematically described, as shown in fig. 6B, in one sampling period:
in the transmitting phase:
the transmitting circuit 31 transmits the bias voltage of the bias voltage terminal Vb to the first node P1 under the control of the first control signal received by the first control signal terminal S1.
For example, the first control signal terminal S1 transmits a high-level on signal to control the second transistor T2 to be turned on, and the voltage of the first node P1 is set to the bias voltage of the bias voltage terminal Vb, so that the piezoelectric layer can perform ultrasonic wave emission. During this time, for example, the second control signal terminal S2 transmits a high-level turn-on signal to control the third transistor T3 to turn on. The third control signal terminal S3 transmits a high-level turn-on signal to control the fifth transistor T5 to turn on. Or for example, the second control signal terminal S2 transmits a low-level turn-off signal to control the third transistor T3 to be turned off. The third control signal terminal S3 transmits a low-level turn-off signal to control the fifth transistor T5 to be turned off.
In the sampling phase:
after the piezoelectric layer transmits the ultrasonic fingerprint, the ultrasonic fingerprint propagates out to the surface of the display screen, then reflects at the interface between the surface of the display screen and the finger, propagates back to the piezoelectric layer, and is converted into an electrical signal by the piezoelectric layer, and the electrical signal is received by the first node P1 corresponding to each sensor pixel circuit 30.
The sampling circuit 32 transmits the signal of the first node P1 to the second node P2 under the control of the second control signal received by the second control signal terminal S2.
For example, the first control signal terminal S1 transmits a low-level turn-off signal to control the second transistor T2 to be turned off. The second control signal terminal S2 transmits a high-level start signal to control the third transistor T3 to start, so that the first node P1 and the second node P2 can follow the echo signal. Then, after a suitable time interval, the second control signal terminal S2 transmits a low-level turn-off signal to control the third transistor T3 to be turned off. The callback voltage signal at the moment when the third transistor T3 is turned off may be stored in the second node P2, so as to complete sampling of the echo signal. During this period, the third control signal terminal S3 transmits a high-level turn-off signal to control the fifth transistor T5 to turn on. The sixth transistor T6 assists in the sampling phase to improve the sampling accuracy.
In the reading phase:
the driving circuit 33 transmits the power signal of the power voltage terminal AP to the third node P3 under the control of the signal of the second node P2. The reading circuit 34 transmits the signal of the third node P3 to the fourth node P4 under the control of the received third control signal of the third control signal terminal S3.
For example, the power voltage terminal AP of the sensor pixel circuit 30 is at a suitable voltage, and the signal converts the voltage of the second node P2 into a current flowing through the fourth transistor T4, and transmits the current to the third node P3. And the third control signal terminal S3 transmits a high-level start signal, so that the fifth transistor T5 is turned on, the signal of the third node P3 is transmitted to the fourth node P4, and then the pixel signal is transmitted to the column line coupled to the fourth node P4, and the control chip at the rear end reads and digitizes the echo signal.
In some embodiments, as shown in fig. 6B, the fourth node P4 is coupled to a fixed voltage terminal in the control circuit through a column line. For example, to an input of an operational amplifier in an Active Front End (AFE) in the control circuit.
Then, the voltage of the fourth node P4 is a fixed voltage throughout the sampling process.
Since the capacitance state of the fourth transistor T4 during the sampling phase and the reading phase directly affects the core performance of the sensor pixel circuit 30, the voltage condition of the first and second poles of the fourth transistor T4 during the sampling period affects the capacitance state thereof. If the fourth node P4 is coupled to the column line (column) during the whole sampling period, the voltage is a fixed voltage. Then, in the sampling phase and the reading phase, the first pole voltage of the fourth transistor T4 is determined by the column line voltage, and the optimal capacitance state cannot be ensured, and thus the optimal performance of the sensor pixel circuit 30 cannot be ensured.
In other embodiments, the fourth node P4 is coupled to a port in the control chip capable of transmitting a variable voltage through a column line. For example, the fourth node P4 is coupled to an input of a charge integrating amplifier in the control chip, the voltage of which is variable, so that the control chip is enabled to supply the variable voltage to the fourth node P4 of the ultrasonic sensor.
Illustratively, the variable voltage output circuit outputs the variable voltage with a fixed law.
Alternatively, the control chip further includes a detection circuit for detecting that the voltage output from the variable voltage output circuit is sufficient to make the equivalent capacitance performance of the fourth transistor T4 excellent. If the performance of the equivalent capacitor can be better, the variable voltage output circuit is controlled to continuously output the current voltage. If the performance of the equivalent capacitor cannot be optimized, the variable voltage output circuit is controlled to output a new voltage.
Then, the voltage of the fourth node P4 is a variable voltage throughout the sampling process.
In this embodiment, the fourth node P4 receives the variable voltage, so that the voltage of the first pole of the fourth transistor T4 can be adjusted by the voltage of the fourth node P4, so as to optimize the equivalent capacitance of the fourth transistor T4 and improve the performance such as the gain, the signal-to-noise ratio, and the like of the sensor pixel circuit 30.
In one possible implementation, as shown in fig. 6C, the voltage of the fourth node P4 is different at different phases of one sampling period.
For example, as shown in fig. 6C, during the transmitting phase of one sampling period, the voltage of the fourth node P4 is the first voltage. In the sampling phase of the sampling period, the voltage of the fourth node P4 is the second voltage. In the reading phase of the sampling period, the voltage of the fourth node P4 is the second voltage. That is, the voltage received by the fourth node P4 in the transmitting phase and the reading phase is the same as the second voltage in one sampling period. The voltage received by the fourth node P4 during the transmit phase is the first voltage. Of course, the magnitude relation between the first voltage and the second voltage is not limited in the embodiment of the present application, and the sensor pixel circuit 30 may be specifically provided in combination, and fig. 6C only illustrates an example in which the second voltage is greater than the first voltage.
Of course, the embodiment of the present application is not limited to the fourth node P4 receiving only the first voltage and the second voltage, and the fourth node P4 may also receive a plurality of voltages with different values.
Alternatively, for example, as shown in fig. 6D, in the transmitting phase within one sampling period, the voltage of the fourth node P4 is the first voltage. In the sampling phase of the sampling period, the voltage of the fourth node P4 is the second voltage. In the reading phase of the sampling period, the voltage of the fourth node P4 is the third voltage. That is, the fourth node P4 receives different voltages at each stage within one sampling period. Of course, the magnitude relation among the first voltage, the second voltage, and the third voltage is not limited in the embodiment of the present application, and the sensor pixel circuit 30 may be specifically configured, and fig. 6D only illustrates an example in which the third voltage is greater than the second voltage, and the second voltage is greater than the first voltage.
Of course, the embodiment of the present application does not limit that the fourth node P4 only receives the first voltage, the second voltage and the third voltage. The fourth node P4 may also receive a plurality of voltages having different values.
By providing the variable voltage to the fourth node P4, the first pole of the fifth transistor T5 may receive different voltages at different stages in one sampling period, so as to optimize the state of the equivalent capacitance of the fifth transistor T5, and further improve the performance such as the gain, the signal-to-noise ratio, and the like of the sensor pixel circuit 30.
In another possible implementation, the voltage of the fourth node P4 is the fourth voltage in one sampling period; in another sampling period, the voltage of the fourth node P4 is the fifth voltage. That is, the voltages received by the fourth node P4 in different sampling periods may be different.
For example, the voltage received by the fourth node P4 may be the same throughout the sampling period. But in different sampling periods the voltage received by the fourth node P4 is different. At this time, the fourth voltage may be understood as one voltage, and the fifth voltage may be understood as one voltage.
Or, for example, the fourth node P4 receives a different voltage throughout the sampling period. The voltage received at the fourth node P4 is also different in different sampling periods. At this time, the fourth voltage may be understood as a set of voltages including voltages corresponding to each of the emission phase, the sampling phase, and the reading phase. The fifth voltage is also understood to be a set of voltages including voltages corresponding to the emission phase, the sampling phase, and the reading phase. In one set of voltages, only one phase voltage is different, that is, the fourth voltage and the fifth voltage in the embodiment of the present application are different.
Of course, the embodiment of the present application is not limited to the fourth node P4 receiving only the fourth voltage and the fifth voltage, and the fourth node P4 may also receive a plurality of voltages with different values.
Since the voltages of the first and second poles of the fourth transistor T4, especially the first pole voltage of the fourth transistor T4, directly affect the signal-to-noise ratio of the sensor pixel circuit 30 during the sampling phase. In consideration of errors in the production process, there are different optimal voltages at the sampling stage for the first poles of the fourth transistors T4 of the TFT substrate in different ultrasonic sensors. The fourth transistor T4 of the same TFT substrate may also have an optimal voltage at different sampling stages. According to the embodiment of the application, the fourth node P4 receives different voltages in different sampling periods, and the voltage which can optimize the state of the equivalent capacitance of the fifth transistor T5 is selected, so that the performances of the sensor pixel circuit 30, such as gain, signal to noise ratio and the like, are improved.
Example two
The main difference between the second example and the first example is that the sensor pixel circuit 30 provided in the second example further includes a voltage writing circuit on the basis of the first example structure.
Fig. 7 is a topology diagram of a sensor pixel circuit according to an embodiment of the present application.
The embodiment of the present application provides a sensor pixel circuit 30, as shown in fig. 7, the sensor pixel circuit 30 includes a transmitting circuit 31, a sampling circuit 32, a driving circuit 33, a reading circuit 34, and a voltage writing circuit.
The structures of the transmitting circuit 31, the sampling circuit 32, the driving circuit 33, and the reading circuit 34 are the same as those in the first example, and will not be repeated here.
The voltage writing circuit is coupled to the fourth control signal terminal S4, the third node P3, and the set voltage terminal Vint, and is configured to transmit the set voltage of the set voltage terminal Vint to the third node P3 under the control of the fourth control signal terminal S4.
Since the voltage of the second node P2, the voltage of the power supply voltage terminal AP, and the voltage of the third node P3 all affect the performance of the driving circuit 33, the voltage of the third node P3 can be controlled by the voltage writing circuit by setting the voltage writing circuit coupled to the third node P3 in the sensor pixel circuit 30 according to the embodiment of the present application. In this way, in combination with the specific structure of the sensor pixel circuit 30, the voltage of the third node P3 can be optimized to optimize the performance of the driving circuit 33, so as to achieve the purpose of optimizing the performance of the sensor pixel circuit 30.
In some embodiments, as shown in fig. 7, the fourth control signal terminal S4 is coupled to the first control signal terminal S1.
In this way, the voltage writing circuit is controlled by the first control signal terminal S1, so that the number of signal ports can be reduced, and the requirement on control signals can be reduced.
In other embodiments, as shown in fig. 7, the fourth control signal terminal S4 is coupled to the second control signal terminal S2.
In this way, the voltage writing circuit is controlled by the second control signal terminal S2, so that the number of signal ports can be reduced, and the requirement on control signals can be reduced.
In some embodiments, sensor pixel circuit 30 further includes an auxiliary circuit 35, auxiliary circuit 35 coupled to second node P2 and auxiliary voltage terminal Vf; the auxiliary voltage terminal Vf is insulated from the third control signal terminal S3.
Since the voltage of the second node P2, the voltage of the power supply voltage terminal AP, and the voltage of the third node P3 all affect the performance of the driving circuit 33, the auxiliary circuit 35 connected to the second node P2 is provided, and the voltage of the second node P2 can be optimized by the auxiliary circuit 35 to optimize the performance of the driving circuit 33, so as to achieve the purpose of optimizing the performance of the sensor pixel circuit 30.
Fig. 8A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present application, and fig. 8B and fig. 8C are timing diagrams of the pixel circuit shown in fig. 8A according to an embodiment of the present application.
In some embodiments, as shown in fig. 8A, the voltage writing circuit 36 includes a first transistor T1, a control electrode of the first transistor T1 is coupled to the fourth control signal terminal S4, a first electrode of the first transistor T1 is coupled to the set voltage terminal Vint, and a second electrode of the first transistor T1 is coupled to the third node P3. Of course, voltage writing circuit 36 may also include one or more transistors in series and/or parallel with first transistor T1, which is not limited in this embodiment.
The first transistor T1 is used for controlling whether the set voltage terminal Vint is communicated with the third node P3 or not, and the process is simple, the structure is simple and the cost is low.
In some embodiments, as shown in fig. 8A, the auxiliary circuit 35 includes a sixth transistor T6, the control electrode of the sixth transistor T6 is coupled to the second node P2, and the first electrode of the sixth transistor T6 and the second electrode of the sixth transistor T6 are both coupled to the third control signal terminal S3.
The potential of the second node P2 is regulated by the sixth transistor T6, so that the technology is simple, the structure is simple, and the cost is low.
Next, a driving method of the sensor pixel circuit provided in the embodiment of the present application is schematically described, as shown in fig. 8B, in one sampling period: the driving process of the transmitting circuit 31, the sampling circuit 32, the driving circuit 33, and the reading circuit 34 within one image frame is the same as in example one. The difference is that:
Before the reading stage, the voltage writing circuit 36 transmits the set voltage of the set voltage terminal Vint to the third node P3 under the control of the fourth control signal terminal S4.
For example, before the reading stage, the fourth control signal terminal S4 transmits a high-level turn-on signal to control the first transistor T1 to be turned on, and transmits the set voltage of the set voltage terminal Vint to the third node P3.
As shown in fig. 8B, the third control signal terminal S3 transmits the high-level on signal only in the reading phase, the fifth transistor T5 is turned on only in the reading phase, and the fifth transistor T5 is turned off in both the transmitting phase and the sampling phase.
As shown in fig. 8B, the fourth control signal terminal S4 may transmit a high-level on signal in the transmitting stage. As shown in fig. 8C, the fourth control signal terminal S4 may also transmit a high-level on signal in both the transmitting phase and the sampling phase. Of course, the fourth control signal terminal S4 may also transmit a high-level on signal during the sampling phase.
In some embodiments, as shown in fig. 8B, the set voltage transmitted by the set voltage terminal Vint is a fixed voltage.
In other embodiments, as shown in fig. 8C, the set voltage transmitted by the set voltage terminal Vint is a variable voltage.
For example, in one sampling period, the set voltage is the first voltage in the transmitting phase; and in the sampling stage, the set voltage is the second voltage.
Alternatively, in one sampling period, the set voltage is the third voltage. In another sampling period, the set voltage is a fourth voltage.
The change manner of the set voltage may be the same as that of the fourth node P4 in the first example, and reference may be made to the above description, which is not repeated here. The set voltage terminal Vint may be coupled to a control chip, for example, and the control chip outputs a variable voltage to the set voltage terminal Vint. For example, at different times, the control chip is used to provide different set voltages to the ultrasonic sensor.
In this embodiment, the third node P3 receives the variable voltage, so that the equivalent capacitance effect of the fourth transistor T4 can be adjusted to be better at different stages in one sampling period or in different sampling periods, so as to improve the performances of the sensor pixel circuit 30, such as gain, signal to noise ratio, and the like.
In some embodiments, the auxiliary voltage of the auxiliary voltage terminal Vf maintains a high-level signal in each phase within the sampling period. For example, the auxiliary voltage of the auxiliary voltage terminal Vf is the same as the timing of the third control signal terminal S3 in example one.
Example three
The main difference between the third example and the first example is that a plurality of sets of receiving circuits and driving circuits 33 are included in the third example.
Fig. 9 is a topology diagram of a sensor pixel circuit according to an embodiment of the present application.
In some embodiments, as shown in fig. 9, the sensor pixel circuit 30 includes: a transmitting circuit 31, a first sampling circuit 32, a second sampling circuit 32 ', a first driving circuit 33, a second driving circuit 33', and a reading circuit 34.
The transmitting circuit 31 is coupled to the first control signal terminal S1, the bias voltage terminal Vb and the first node P1, and the transmitting circuit 31 is configured to transmit the bias voltage of the bias voltage terminal Vb to the first node P1 under the control of the first control signal received by the first control signal terminal S1.
The first sampling circuit 32 is coupled to the second control signal terminal S2, the second node P2 and the first node P1, and the first sampling circuit 32 is configured to transmit the signal of the first node P1 to the second node P2 under the control of the second control signal received by the second control signal terminal S2.
The first driving circuit 33 is coupled to the second node P2, the power voltage terminal AP, and the third node P3, and the first driving circuit 33 is configured to transmit the power signal of the power voltage terminal AP to the third node P3 under the control of the signal of the second node P2.
The reading circuit 34 is coupled to the third control signal terminal S3, the third node P3 and the fourth node P4, and the reading circuit 34 is configured to transmit the signal of the third node P3 to the fourth node P4 under the control of the received third control signal of the third control signal terminal S3.
The second sampling circuit 32 'is coupled to the fourth control signal terminal S4, the fifth node P5 and the first node P1, and the second sampling circuit 32' is configured to transmit the signal of the first node P1 to the fifth node P5 under the control of the fourth control signal received by the fourth control signal terminal S4. For example, the second control signal terminal S2 and the fourth control signal terminal S4 are insulated from each other.
The second driving circuit 33 'is coupled to the fifth node P5, the power voltage terminal AP and the third node P3, and the second driving circuit 33' is configured to transmit the power signal to the third node P3 under the control of the signal of the fifth node P5.
In some embodiments, the structure of the first driving circuit 33 is different from the structure of the second driving circuit 33'. The materials are different, the topology circuits are different, the sizes of devices adopted in the topology circuits are different, and the like, and all belong to different structures in the embodiment of the application.
That is, the sampling circuit 32 and the driving circuit 33 are regarded as one reading unit, and a plurality of reading units which are independently controlled and have different structures are included in the sensor pixel circuit 30. The number of the reading units is not limited to two, and may be two or more. Then, in different electronic devices, the sensor pixel circuit 30 may select one of the plurality of reading units with the optimal performance for fingerprint acquisition, so as to overcome the deviation caused by the process error. In the same electronic device, the sensor pixel circuit 30 may also select different reading units for fingerprint acquisition in different sampling periods to overcome deviations caused by state changes (e.g., aging, usage temperature changes, etc.) of the electronic device. Thereby achieving the objective of optimizing the performance of the sensor pixel circuit 30.
In some embodiments, as shown in fig. 9, the sensor pixel circuit further includes a first auxiliary circuit 35 and a second auxiliary circuit 35'. The first auxiliary circuit 35 is coupled to the second node P2 and the auxiliary voltage terminal Vf, and the second auxiliary circuit 35' is coupled to the fifth node P5 and the auxiliary voltage terminal Vf. For example, the auxiliary voltage terminal Vf is insulated from the third control signal terminal S3, and is configured to receive different signals.
By providing the first auxiliary circuit 35 and the second auxiliary circuit 35 ', the potentials of the second node P2 and the fifth node P5 can be adjusted to optimize the performance of the first driving circuit 33 and the second driving circuit 33', thereby achieving the purpose of optimizing the performance of the sensor pixel circuit 30.
Fig. 10A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present application, and fig. 10B and fig. 10C are timing diagrams of the pixel circuit shown in fig. 10A according to an embodiment of the present application.
In some embodiments, as shown in fig. 10A, the first driving circuit 33 includes a first transistor T1; the control electrode of the first transistor T1 is coupled to the second node P2, the first electrode of the first transistor T1 is coupled to the third node P3, and the second electrode of the first transistor T1 is coupled to the power voltage terminal AP.
The second driving circuit 33' includes a second transistor T2; the control electrode of the second transistor T2 is coupled to the fifth node P5, the first electrode of the second transistor T2 is coupled to the third node P3, and the second electrode of the second transistor T2 is coupled to the power voltage terminal AP.
Illustratively, the length of the channel of the first transistor T1 is different from the length of the channel of the second transistor T2.
Alternatively, the width of the channel of the first transistor T1 is different from the width of the channel of the second transistor T2, for example.
Alternatively, the length of the channel of the first transistor T1 is different from the length of the channel of the second transistor T2, and the width of the channel of the first transistor T1 is different from the width of the channel of the second transistor T2, for example.
Since the channel sizes of the first transistor T1 and the second transistor T2 affect the equivalent capacitance of the first transistor T1 and the second transistor T2, the performance of the first driving circuit 33 and the second driving circuit 33' can be made different by setting the channel sizes of the first transistor T1 and the second transistor T2 to be different, thereby achieving the purpose of optimizing the performance of the sensor pixel circuit 30.
In some embodiments, as shown in fig. 10A, the first sampling circuit 32 includes a third transistor T3, a control electrode of the third transistor T3 is coupled to the second control signal terminal S2, a first electrode of the third transistor T3 is coupled to the first node P1, and a second electrode of the third transistor T3 is coupled to the second node P2.
The second sampling circuit 32' includes a fourth transistor T4, the control electrode of the fourth transistor T4 is coupled to the fourth control signal terminal S4, the first electrode of the fourth transistor T4 is coupled to the first node P1, and the second electrode of the fourth transistor T4 is coupled to the fifth node P5.
The first auxiliary circuit 35 includes a fifth transistor T5, a control electrode of the fifth transistor T5 is coupled to the second node P2, and a first electrode and a second electrode of the fifth transistor T5 are both coupled to the auxiliary voltage terminal Vf.
The second auxiliary circuit 35' includes a sixth transistor T6, the control electrode of the sixth transistor T6 is coupled to the fifth node P5, and the first electrode and the second electrode of the sixth transistor T6 are both coupled to the auxiliary voltage terminal Vf.
The transmitting circuit 31 includes a seventh transistor T7, a control electrode of the seventh transistor T7 is coupled to the first control signal terminal S1, a first electrode of the seventh transistor T7 is coupled to the bias voltage terminal Vb, and a second electrode of the seventh transistor T7 is coupled to the first node P1.
The reading circuit 34 includes an eighth transistor T8, a control electrode of the eighth transistor T8 is coupled to the third control signal terminal S3, a first electrode of the eighth transistor T8 is coupled to the fourth node P4, and a second electrode of the eighth transistor T8 is coupled to the third node P3.
Of course, each of the first transistor T1 to the seventh transistor T7 may further include a transistor connected in series and/or parallel thereto, which is only an example and not limited in any way.
Next, a driving method of the sensor pixel circuit provided in the embodiment of the present application is schematically described, and as shown in fig. 10B, the driving process in example two is performed in one sampling period, which is different from example two in that the related process of the voltage writing circuit is not performed. Alternatively, as shown in fig. 10C, during the transmit phase, it is still under the control of the transmit circuit 31. But is controlled by the second sampling circuit 32' during the sampling phase. The second sampling circuit 32' transmits the signal of the first node P1 to the fifth node P5 under the control of the second control signal received by the fourth control signal terminal S4. In the read phase, controlled by the second drive circuit 33' and the read circuit 34. The second driving circuit 33' transmits the power signal of the power voltage terminal AP to the third node P3 under the control of the signal of the fifth node P5; the reading circuit 34 transmits the signal of the third node P3 to the fourth node P4 under the control of the third control signal. At the same time, the control chip is configured to transmit the second control signal to the second control signal terminal S2, or is configured to transmit the fourth control signal to the fourth control signal terminal S4.
In some embodiments, sensor pixel circuit 30 determines which read cell to operate from after it has been determined which read cell to operate from. Then, the sensor pixel circuit 30 performs only the timing shown in fig. 10B, or only the timing shown in fig. 10C.
In other embodiments, the sensor pixel circuit 30 may switch the read unit. Then, the sensor pixel circuit 30 performs the timing shown in fig. 10B for some sampling periods and performs the timing shown in fig. 10C for some sampling periods.
For example, when the sensor pixel circuit 30 performs the timing shown in fig. 10B, the control chip in the electronic device transmits the signal shown in fig. 10B to the sensor pixel circuit. When the sensor pixel circuit 30 performs the timing shown in fig. 10C, the control chip in the electronic device transmits the signal shown in fig. 10C to the sensor pixel circuit. Whether the sensor pixel circuit 30 performs the timing shown in fig. 10B or the timing shown in fig. 10C may be determined by a control chip, for example. When the control chip determines which timing the sensor pixel circuit 30 performs the timing shown in fig. 10B and which timing the sensor pixel circuit 30 performs is better than when the timing shown in fig. 10C is performed, the control chip determines which timing the sensor pixel circuit 30 performs. Then, at the same time, the control chip supplies the second control signal or the fourth control signal to the sensor pixel circuit 30. Of course, the second control signal at this time refers to an on signal (e.g., a high level signal) capable of controlling the third transistor T3 to be turned on. Similarly, the fourth control signal at this time is an on signal (e.g., a high level signal) capable of controlling the fourth transistor T4 to be turned on.
As shown in fig. 10B and 10C, the voltage of the fourth voltage terminal P4 is always a fixed voltage throughout the sampling period.
Example four
The main difference between the fourth example and the third example is that in the fourth example, the auxiliary voltage terminal is coupled to the third control signal terminal.
Fig. 11 is a topology diagram of a sensor pixel circuit according to an embodiment of the present application.
In some embodiments, as shown in fig. 11, the sensor pixel circuit 30 includes: the emission circuit 31, the first sampling circuit 32, the second sampling circuit 32 ', the first driving circuit 33, the second driving circuit 33 ', the reading circuit 34, the first auxiliary circuit 35, and the second auxiliary circuit 35 '.
The configuration of the transmitting circuit 31, the first sampling circuit 32, the second sampling circuit 32 ', the first driving circuit 33, the second driving circuit 33', the reading circuit 34, the first auxiliary circuit 35, and the second auxiliary circuit 35 'is the same as in example three, except that, as shown in fig. 11, an auxiliary voltage terminal Vf coupled to the first auxiliary circuit 35 and the second auxiliary circuit 35', and a third control signal terminal S3 coupled to the reading circuit 34 are coupled.
Fig. 12A is a topology diagram of each circuit in a sensor pixel circuit according to an embodiment of the present application, and fig. 12B and fig. 12C are timing diagrams of the pixel circuit shown in fig. 12A according to an embodiment of the present application.
As shown in fig. 12A, the structures of the transmitting circuit 31, the first sampling circuit 32, the second sampling circuit 32 ', the first driving circuit 33, the second driving circuit 33 ', the reading circuit 34, the first auxiliary circuit 35 and the second auxiliary circuit 35 ' are the same as those in the third example, and reference is made to the related description of fig. 10A, and the description thereof is omitted here.
In some embodiments, taking the operation of the first sampling circuit 32 as an example, as shown in fig. 12B, the driving process of the sensor pixel circuit 30 is the same as the driving process of the sensor pixel circuit 30 in fig. 10A, the signal of the third control signal terminal S3 follows the signal of the auxiliary voltage terminal Vf, and the voltage of the fourth node P4 is a fixed voltage.
In other embodiments, as shown in fig. 12C, the voltage of the fourth node P4 is a variable voltage. The voltage of the fourth node P4 may be changed in the same manner as in example one, and will not be described here again.
The embodiment of the application further provides an array substrate, which comprises a substrate, a plurality of any one of the sensor pixel circuits 30 and a plurality of column lines, wherein the plurality of sensor pixel circuits 30 are arranged on the substrate in an array mode, and the fourth nodes P4 of the sensor pixel circuits 30 positioned in the same column are coupled with the same column line.
For example, the sensor pixel circuits 30 on the same array substrate have the same topology. The above-mentioned array substrate is applied to the ultrasonic sensor provided in the embodiment of the present application, and the plurality of sensor pixel circuits 30 are correspondingly coupled with the plurality of pixel electrodes, so that the performance of the ultrasonic sensor can be improved based on the structure of the sensor pixel circuits 30 provided in the embodiment of the present application.
The foregoing is merely a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (38)

1. A sensor pixel circuit, comprising:
the transmitting circuit is coupled with the first control signal end, the bias voltage end and the first node and is used for transmitting the bias voltage of the bias voltage end to the first node under the control of the first control signal received by the first control signal end;
the sampling circuit is coupled with the second control signal end, the second node and the first node and is used for transmitting the signal of the first node to the second node under the control of the second control signal received by the second control signal end;
The driving circuit is coupled with the second node, the power supply voltage end and the third node and is used for transmitting the power supply signal of the power supply voltage end to the third node under the control of the signal of the second node;
the reading circuit is coupled with a third control signal end, the third node and a fourth node and is used for transmitting the signal of the third node to the fourth node under the control of the received third control signal of the third control signal end;
and the voltage writing circuit is coupled with the fourth control signal end, the third node and the set voltage end and is used for transmitting the set voltage of the set voltage end to the third node under the control of the fourth control signal end.
2. The sensor pixel circuit of claim 1, wherein the set voltage received at the set voltage terminal is a variable voltage.
3. The sensor pixel circuit of claim 2, wherein the set voltage is a first voltage during an emission phase in one sampling period; and in the sampling stage, the set voltage is the second voltage.
4. A sensor pixel circuit according to claim 2 or 3, wherein the set voltage is a third voltage during one sampling period; in another sampling period, the set voltage is a fourth voltage.
5. The sensor pixel circuit of any one of claims 1-4, further comprising an auxiliary circuit coupled to the second node and an auxiliary voltage terminal.
6. A sensor pixel circuit according to any one of claims 1 to 5, wherein,
the fourth control signal end is coupled with the first control signal end;
or,
the fourth control signal terminal is coupled to the second control signal terminal.
7. The sensor pixel circuit of any one of claims 1-6, wherein the voltage write circuit comprises a first transistor having a control electrode coupled to the fourth control signal terminal, a first electrode coupled to the set voltage terminal, and a second electrode coupled to the third node.
8. A sensor pixel circuit according to any one of claims 1 to 7, wherein,
the transmitting circuit comprises a second transistor, a control electrode of the second transistor is coupled with the first control signal end, a first electrode of the second transistor is coupled with the bias voltage end, and a second electrode of the second transistor is coupled with the first node;
And/or the number of the groups of groups,
the sampling circuit comprises a third transistor, a control electrode of the third transistor is coupled with the second control signal end, a first electrode of the third transistor is coupled with the first node, and a second electrode of the third transistor is coupled with the second node;
and/or the number of the groups of groups,
the driving circuit comprises a fourth transistor, a control electrode of the fourth transistor is coupled with the second node, a first electrode of the fourth transistor is coupled with the third node, and a second electrode of the fourth transistor is coupled with the power supply voltage end;
and/or the number of the groups of groups,
the read circuit includes a fifth transistor having a control electrode coupled to the third control signal terminal, a first electrode coupled to the fourth node, and a second electrode coupled to the third node.
9. The sensor pixel circuit of claim 5, wherein the auxiliary circuit comprises a sixth transistor having a control electrode coupled to the second node, the first electrode of the sixth transistor and the second electrode of the sixth transistor each being coupled to the third control signal terminal.
10. A sensor pixel circuit, comprising:
the transmitting circuit is coupled with the first control signal end, the bias voltage end and the first node and is used for transmitting the bias voltage of the bias voltage end to the first node under the control of the first control signal received by the first control signal end;
the first sampling circuit is coupled with the second control signal end, the second node and the first node and is used for transmitting the signal of the first node to the second node under the control of a second control signal received by the second control signal end;
the first driving circuit is coupled with the second node, the power supply voltage end and the third node and is used for transmitting the power supply signal of the power supply voltage end to the third node under the control of the signal of the second node;
the reading circuit is coupled with a third control signal end, the third node and a fourth node and is used for transmitting the signal of the third node to the fourth node under the control of the received third control signal of the third control signal end;
the second sampling circuit is coupled with the fourth control signal end, the fifth node and the first node and is used for transmitting the signal of the first node to the fifth node under the control of a fourth control signal received by the fourth control signal end;
A second driving circuit coupled to the fifth node, the power supply voltage terminal, and the third node, for transmitting the power supply signal to the third node under control of a signal of the fifth node; the structure of the first driving circuit is different from that of the second driving circuit.
11. The sensor pixel circuit of claim 10, wherein the sensor pixel circuit further comprises a first auxiliary circuit and a second auxiliary circuit;
the first auxiliary circuit is coupled with the second node and an auxiliary voltage terminal; the second auxiliary circuit is coupled to the fifth node and the auxiliary voltage terminal.
12. The sensor pixel circuit according to claim 10 or 11, wherein,
the first driving circuit includes a first transistor; a control electrode of the first transistor is coupled with the second node, a first electrode of the first transistor is coupled with the third node, and a second electrode of the first transistor is coupled with the power supply voltage end;
the second driving circuit includes a second transistor; a control electrode of the second transistor is coupled with the fifth node, a first electrode of the second transistor is coupled with the third node, and a second electrode of the second transistor is coupled with the power supply voltage end;
The length of the channel of the first transistor is different from the length of the channel of the second transistor, and/or the width of the channel of the first transistor is different from the width of the channel of the second transistor.
13. Sensor pixel circuit according to any one of claims 10-12, characterized in that,
the first sampling circuit comprises a third transistor, a control electrode of the third transistor is coupled with the second control signal end, a first electrode of the third transistor is coupled with the first node, and a second electrode of the third transistor is coupled with the second node;
and/or the number of the groups of groups,
the second sampling circuit comprises a fourth transistor, a control electrode of the fourth transistor is coupled with the fourth control signal end, a first electrode of the fourth transistor is coupled with the first node, and a second electrode of the fourth transistor is coupled with the fifth node;
and/or the number of the groups of groups,
the first auxiliary circuit comprises a fifth transistor, a control electrode of the fifth transistor is coupled with the second node, and a first electrode and a second electrode of the fifth transistor are both coupled with the auxiliary voltage terminal;
and/or the number of the groups of groups,
the second auxiliary circuit comprises a sixth transistor, a control electrode of the sixth transistor is coupled with the fifth node, and a first electrode and a second electrode of the sixth transistor are both coupled with the auxiliary voltage terminal;
And/or the number of the groups of groups,
the transmitting circuit comprises a seventh transistor, a control electrode of the seventh transistor is coupled with the first control signal end, a first electrode of the seventh transistor is coupled with the bias voltage end, and a second electrode of the seventh transistor is coupled with the first node;
and/or the number of the groups of groups,
the read circuit includes an eighth transistor having a control electrode coupled to the third control signal terminal, a first electrode coupled to the fourth node, and a second electrode coupled to the third node.
14. The sensor pixel circuit of any one of claims 11-13, wherein the auxiliary voltage terminal is coupled to the third control signal terminal.
15. The sensor pixel circuit of claim 14, wherein the fourth node is configured to be coupled to a voltage variable terminal.
16. The sensor pixel circuit of claim 15, wherein the voltage of the fourth node is the first voltage during an emission phase in one sampling period; a sampling stage, wherein the voltage of the fourth node is a second voltage; and in the reading stage, the voltage of the fourth node is the second voltage or the third voltage.
17. A sensor pixel circuit according to claim 15 or 16, wherein the voltage of the fourth node is a fourth voltage during one sampling period; in another sampling period, the voltage of the fourth node is a fifth voltage.
18. A sensor pixel circuit, comprising:
the transmitting circuit is coupled with the first control signal end, the bias voltage end and the first node and is used for transmitting the bias voltage of the bias voltage end to the first node under the control of the first control signal received by the first control signal end;
the sampling circuit is coupled with the second control signal end, the second node and the first node and is used for transmitting the signal of the first node to the second node under the control of the second control signal received by the second control signal end;
the driving circuit is coupled with the second node, the power supply voltage end and the third node and is used for transmitting the power supply signal of the power supply voltage end to the third node under the control of the signal of the second node;
the reading circuit is coupled with a third control signal end, the third node and a fourth node and is used for transmitting the signal of the third node to the fourth node under the control of the received third control signal of the third control signal end; the fourth node is configured to be coupled to a voltage variable terminal.
19. The sensor pixel circuit of claim 18, wherein the voltage of the fourth node is the first voltage during an emission phase in one sampling period; a sampling stage, wherein the voltage of the fourth node is a second voltage; and in the reading stage, the voltage of the fourth node is the second voltage or the third voltage.
20. A sensor pixel circuit according to claim 18 or 19, wherein the voltage of the fourth node is a fourth voltage during one sampling period; in another sampling period, the voltage of the fourth node is a fifth voltage.
21. The sensor pixel circuit of any one of claims 18-20, further comprising an auxiliary circuit coupled to the second node and the third control signal terminal.
22. An array substrate comprising a substrate and a plurality of sensor pixel circuits disposed on one side of the substrate, the sensor pixel circuits comprising the sensor pixel circuit of any one of claims 1-21.
23. An ultrasonic sensor comprising an array substrate comprising the array substrate of claim 22 and a plurality of pixel electrodes correspondingly coupled to the plurality of sensor pixel circuits.
24. An electronic device comprising an ultrasonic sensor and a control chip, the ultrasonic sensor comprising the ultrasonic sensor of claim 23, the ultrasonic sensor coupled to the control chip.
25. The electronic device of claim 24, wherein the control chip is configured to transmit a set voltage to a set voltage terminal of the ultrasonic sensor.
26. The electronic device of claim 24, wherein the port of the control chip coupled to the fourth node of the ultrasonic sensor is a voltage variable port.
27. The electronic device of claim 24, wherein at the same time the control chip is configured to transmit a second control signal or a fourth control signal to the ultrasonic sensor.
28. A driving method of a sensor pixel circuit according to any one of claims 1 to 9, comprising:
within one sampling period:
the transmitting stage:
the transmitting circuit transmits the bias voltage of the bias voltage end to the first node under the control of a first control signal received by the first control signal end;
sampling:
the sampling circuit transmits the signal of the first node to a second node under the control of a second control signal received by a second control signal end;
Reading:
the driving circuit transmits a power supply signal of a power supply voltage end to the third node under the control of the signal of the second node; the reading circuit transmits the signal of the third node to a fourth node under the control of a received third control signal of a third control signal end;
before the reading stage, the voltage writing circuit transmits the set voltage of the set voltage terminal to the third node under the control of a fourth control signal of the fourth control signal terminal.
29. The driving method of claim 28, wherein the set voltage received by the set voltage terminal is a variable voltage.
30. The driving method according to claim 29, wherein in one sampling period, the set voltage is a first voltage at an emission stage; and in the sampling stage, the set voltage is the second voltage.
31. The driving method according to claim 29 or 30, wherein the set voltage is a third voltage in one sampling period; in another sampling period, the set voltage is a fourth voltage.
32. A driving method of a sensor pixel circuit according to any one of claims 10 to 17, comprising:
Within one sampling period:
the transmitting stage:
the transmitting circuit transmits the bias voltage of the bias voltage end to the first node under the control of a first control signal received by the first control signal end;
sampling:
the first sampling circuit transmits the signal of the first node to a second node under the control of a second control signal received by a second control signal end;
reading:
the first driving circuit transmits a power supply signal of a power supply voltage end to a third node under the control of a signal of the second node; the reading circuit transmits the signal of the third node to a fourth node under the control of a received third control signal of a third control signal end;
or,
sampling:
the second sampling circuit transmits the signal of the first node to a fifth node under the control of a second control signal received by a fourth control signal end;
reading:
the second driving circuit transmits a power supply signal of a power supply voltage end to the third node under the control of a signal of the fifth node; the reading circuit transmits the signal of the third node to the fourth node under the control of the third control signal.
33. The driving method according to claim 32, wherein the voltage of the fourth node is a variable voltage.
34. The driving method according to claim 33, wherein the voltage of the fourth node is a variable voltage, comprising: in the sampling period, in a transmitting stage, the voltage of the fourth node is a first voltage; a sampling stage, wherein the voltage of the fourth node is a second voltage; and in the reading stage, the voltage of the fourth node is the second voltage or the third voltage.
35. The driving method according to claim 33 or 34, wherein the voltage of the fourth node is a variable voltage, comprising: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage.
36. A driving method of a sensor pixel circuit according to any one of claims 18 to 21, comprising:
within one sampling period:
the transmitting stage:
the transmitting circuit transmits the bias voltage of the bias voltage end to the first node under the control of a first control signal received by the first control signal end;
sampling:
the sampling circuit transmits the signal of the first node to a second node under the control of a second control signal received by a second control signal end;
Reading:
the driving circuit transmits a power supply signal of a power supply voltage end to the third node under the control of the signal of the second node; the reading circuit transmits the signal of the third node to a fourth node under the control of a received third control signal of a third control signal end; the voltage of the fourth node is a variable voltage.
37. The driving method according to claim 36, wherein the voltage of the fourth node is a variable voltage, comprising: in the sampling period, in a transmitting stage, the voltage of the fourth node is a first voltage; a sampling stage, wherein the voltage of the fourth node is a second voltage; and in the reading stage, the voltage of the fourth node is the second voltage or the third voltage.
38. The driving method according to claim 36 or 37, wherein the voltage of the fourth node is a variable voltage, comprising: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage.
CN202311772376.XA 2023-12-20 2023-12-20 Sensor pixel circuit, driving method thereof, ultrasonic sensor and electronic equipment Pending CN117854121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311772376.XA CN117854121A (en) 2023-12-20 2023-12-20 Sensor pixel circuit, driving method thereof, ultrasonic sensor and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311772376.XA CN117854121A (en) 2023-12-20 2023-12-20 Sensor pixel circuit, driving method thereof, ultrasonic sensor and electronic equipment

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CN117854121A true CN117854121A (en) 2024-04-09

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