CN117851150A - GPIO drive test system, method, device and storage medium - Google Patents

Abstract

The utility model provides a GPIO drive test system, a method, a device and a storage medium, relate to GPIO test technical field, solve the problem that the manual test process arouses the difference easily and influence the test result, thereby main control unit can control other modules in the GPIO drive test system through the test script that runs the setting in this scheme, and then provide a output channel from GPIO to test module for the signal under test, in order to accomplish the function test, and main control unit can also combine the test hardware module and/or the signal that GPIO test kit module fed back to produce the test report of corresponding test result, for the tester to consult, this test process is simple and convenient, need not the manual test of tester, thereby avoid the difference that manual test brought effectively, help providing more accurate and effective test result.

Description

GPIO drive test system, method, device and storage medium

Technical Field

The embodiment of the application relates to the technical field of GPIO (general purpose input/output) test, in particular to a GPIO drive test system, a GPIO drive test method, a GPIO drive test device and a GPIO drive test storage medium.

Background

The application program needs to call a GPIO (General Purpose Input/Output) driver to control and detect the external devices, for example, the application program outputs a high level or a low level through the GPIO to drive an internal circuit of the external hardware device, so as to control each external device; and the digital level input is read through the GPIO, so that the detection of the external equipment is realized.

In order to ensure the stability of the GPIO driver, it is necessary to perform corresponding functional tests such as level input/output test, level slew rate test, maximum driving current test, etc. In the development of GPIO drivers, the chip platform itself cannot verify whether the code functions correctly, and it often needs to assist in verification by means of other measuring instruments (such as oscilloscopes, multimeters) and external functional test modules (circuits implementing different functions).

In the related art, for GPIO driving test, most of test processes are manually tested by developers or testers, and the test processes need to be connected with various functional test modules and measuring instruments, so that manual test differences are easy to occur, and the test results are affected.

Disclosure of Invention

The embodiment of the application provides a GPIO driving test system, a method, a device and a storage medium, solves the problem that the test result is affected by the difference caused by the manual test process, can complete the automatic test, effectively avoids the difference caused by the manual test, and is beneficial to providing more accurate and effective test results.

In a first aspect, embodiments of the present application provide a GPIO driver test system, which includes a main controller, a test hardware module, a signal matrix module, and a GPIO test suite module.

The main controller is used for outputting signals through a communication interface on the main controller; the test hardware module is connected with the main controller through a firmware download port to burn test firmware, and is also connected with the main controller in a communication way, and is used for outputting a tested signal through the GPIO or feeding back an output signal corresponding to a test result to the main controller under the condition of receiving a first control instruction output by the main controller; the signal matrix module is connected with the test hardware module, is provided with a plurality of input interfaces for connecting GPIO of the test hardware module, is also connected with the main controller in a communication manner, and is used for selecting an output channel according to a second control instruction output by the received main controller; the GPIO test suite module is connected with the signal matrix module, and the GPIO test suite module is provided with a plurality of detection interfaces to be connected with the output end of the signal matrix module in a one-to-one correspondence mode, and the GPIO test suite module is also connected with the main controller in a communication mode and is used for selecting one path of signals to detect according to the received third control signals output by the main controller.

In a second aspect, an embodiment of the present application further provides a GPIO driver test method, where the GPIO driver test method is applied to a main controller in the GPIO driver test system, and a GPIO driver and a test script are disposed in the main controller, and the method includes:

compiling the GPIO drivers to generate firmware corresponding to the GPIO drivers;

importing firmware into the test hardware module to load the firmware by the test hardware module;

running a test script to respectively send corresponding control signals to the test hardware module, the signal matrix module and the GPIO test suite module, and enabling the test hardware module or the GPIO test suite module to output signals corresponding to test results;

and under the condition that an output signal corresponding to the test result is received, generating a test report corresponding to the test result based on a preset report template.

In a third aspect, an embodiment of the present application further provides a GPIO driver test device, where the GPIO driver test device is applied to a main controller in the GPIO driver test system, and a GPIO driver and a test script are disposed in the main controller, where the device includes:

the program compiling module is configured to compile the GPIO driver to generate firmware corresponding to the GPIO driver;

the firmware importing module is configured to import the firmware to the test hardware module so that the test hardware module can load the firmware;

the script running module is configured to run the test script to respectively send corresponding control signals to the test hardware module, the signal matrix module and the GPIO test suite module;

and the report output module is configured to generate a test report corresponding to the test result based on a preset report template under the condition that an output signal corresponding to the test result is received.

In a fourth aspect, embodiments of the present application further provide a storage medium storing computer-executable instructions that, when executed by a processor, are configured to perform the GPIO drive test method described above.

According to the method and the device, the main controller can control other modules in the GPIO driving test system through running the set test script, and further provide an output channel from the GPIO to the test module for the tested signal to complete functional test, and the main controller can also generate a test report corresponding to the test result by combining the signals fed back by the test hardware module and/or the GPIO test suite module for the testers to review, so that the test process is simple and convenient, manual testing by the testers is not needed, and the difference caused by manual testing is effectively avoided, and more accurate and effective test results are provided.

Drawings

FIG. 1 is a schematic diagram of a GPIO driver test system according to an embodiment of the present disclosure;

FIG. 2 is a schematic diagram illustrating steps of a method for testing a GPIO driver according to an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of controlling a GPIO driver test according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of a GPIO driving test device according to an embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of a main controller according to an embodiment of the present application.

Detailed Description

Embodiments of the present application are described in further detail below with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the embodiments of the application and are not limiting of the embodiments of the application. It should be further noted that, for convenience of description, only some, but not all structures related to the embodiments of the present application are shown in the drawings, and those skilled in the art will appreciate that any combination of technical features may constitute alternative embodiments as long as the technical features are not contradictory to each other after reading the specification of the present application.

The terms first, second and the like in the description and in the claims, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present application may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type and not limited to the number of objects, e.g., the first object may be one or more. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship. In the description of the present application, "a plurality" means two or more, and "a number" means one or more.

In order to ensure the stability of the GPIO driver, the GPIO needs to undergo "complete" functional tests, such as level input/output test, level flip speed test, maximum driving current test, interrupt response test, and the like. In addition, for GPIO driving test, a developer or a tester is usually required to manually test the GPIO driving test, so that a manual test difference is introduced in a test result, and the test result is not accurate enough.

In this regard, the present application provides a GPIO driving test system, fig. 1 is a schematic structural diagram of the GPIO driving test system provided in an embodiment of the present application, and as shown in the drawing, the system includes a main controller, a test hardware module, a signal matrix module and a GPIO test suite module, where the main controller is respectively in communication connection with the test hardware module, the signal matrix module and the GPIO test suite module, and if the main controller respectively establishes communication connection with the test hardware module, the signal matrix module and the GPIO test suite module through a CAN bus, the main controller outputs corresponding signals to each module through a communication interface thereon. It should be noted that, in some embodiments, the main controller may also establish a communication connection with the above modules through a bus such as I2C, RS485 or SPI.

The test hardware module is also connected with the main controller through a firmware download port so that the main controller can burn test firmware into the test hardware module. It is contemplated that the test hardware module may be an MCU (Microcontroller Unit, micro control unit) platform such as a DSP (Digital Singnal Processor, digital signal processor), FPGA (Field Programmable Gate Array ), etc., and accordingly, the host controller may also configure a program download tool associated with the test hardware module to facilitate burning the test firmware.

The signal matrix module is also connected with the test hardware module, and the multiple input interfaces of the signal matrix module are respectively connected with the GPIO of the test hardware module, so that it can be understood that the main controller can send a first control instruction to the test hardware module, so that the test hardware module responds to the instruction to output a tested signal through the GPIO on the test hardware module, or feed back an output signal corresponding to the test result to the main controller. Therefore, the tested signal output by the test hardware module through the GPIO can be transferred to the signal matrix module.

And a multipath output channel is arranged in the signal matrix module so as to correspondingly transfer the tested signals accessed from the multipath input interfaces to the next stage module. And the signal matrix module is in communication connection with the main controller, namely the main controller can output a second control signal by the signal matrix module so as to select a corresponding output channel.

The GPIO test suite module is connected with the signal matrix module, and the multi-path detection interfaces of the GPIO test suite module are respectively connected with the output ends of the signal matrix module, so that the detected signals selected through the corresponding output channels are accessed. It can be understood that the GPIO test suite module is in communication connection with the main controller, and accordingly, the main controller can output a third control signal to the GPIO test suite module, so that the GPIO test suite module selects one path of signal for testing.

It can be understood that the main controller is internally provided with a corresponding GPIO driver and a test script, and the GPIO driver needs to be loaded to the test hardware module for the test hardware module to run. The test script is used as a program for performing GPIO driving test of the control system, and the main controller can output corresponding control signals when running the test script so as to control a test hardware module, a signal matrix module and a GPIO test suite module in the system. Therefore, after the main controller loads the GPIO driver to the test hardware module, the main controller runs the tested program to send corresponding control signals to each module, so that the corresponding function test is completed.

According to the scheme, the main controller burns test firmware to the test hardware module so that the test hardware module can output a tested signal through the GPIO on the main controller, and the main controller can also output corresponding control signals to the test hardware module, the signal matrix module and the GPIO test suite module so that the tested signal enters the GPIO test suite module through the output channel in the signal matrix module to perform functional test, therefore, the tested signal can be accessed to the corresponding test module to perform test in a signal control mode without manual test of a tester, the difference caused by manual test is effectively avoided, and more accurate and effective test results are provided.

In some embodiments, the test hardware module is provided with a plurality of GPIOs, and accordingly, the signal matrix module includes a DB50 interface, a signal relay unit, and a DB8 interface, and it is conceivable that the DB50 interface is an interface for connecting GPIOs of the test hardware module in the signal matrix module, which is capable of accessing signals output by 50 GPIOs and in turn outputting 50 signals, and thus, the number of DB50 interfaces provided in the signal matrix module is sufficient for the number of GPIOs, for example, the number of GPIOs is 200, and correspondingly, the number of DB50 interfaces is 4.

Furthermore, the number of signal relay units is adapted to the number of output ends of all DB50 interfaces, and the input end of each signal relay unit is connected to the output end of the corresponding DB50 interface, respectively, it will be understood that if the number of DB50 interfaces is 4 and each signal relay unit has 8 input ends and 8 output ends, correspondingly, 25 signal relay units may be provided to connect the output ends of the 4 DB50 interfaces.

The DB8 interface can be connected with 8 paths of signals and output 8 paths of signals instead, the output ends of the signal relay units are connected with the DB8 interface in a parallel cascade mode, namely, the output end of each signal relay unit is connected with the DB8 interface, so that the signal matrix module can convert multi-path signal input into 8 paths of signal output, in addition, the signal matrix module can control the signal relay units to switch corresponding output channels according to control signals sent by the main controller, selection of the output channels is completed, and signals of the selected output channels are output as 8 paths of signals.

Therefore, the signal matrix module provides a plurality of output channels with controlled on-off, and the corresponding output channels can be selected according to the control signals output by the main controller, so that a specific number of signals in the signals input by the plurality of channels are selected and output to the next-stage module, and the tested signals are better utilized for functional test.

In one embodiment, the signal relay unit includes 8 inputs and 8 outputs to form an 8-way output channel, and the signal relay unit includes an MCU, a communication interface, and a drive subunit. The MCU is in communication connection with the main controller through a communication interface, the MCU is connected with the driving subunit, and it can be understood that a control signal output by the main controller to the signal driving module can be received by the MCU through the communication interface, so that the MCU outputs a corresponding signal to the driving subunit to adjust the on-off of 8 paths of output channels, and then the output channels are selected, so that the selection of signals output by one path of GPIO is realized.

It can be understood that the signals provided by the GPIOs of the test hardware module are accessed by the signal matrix module and the corresponding channels are selected to be conducted according to the control signals sent by the main controller, so that the signals are transmitted to the GPIOs test suite module. Therefore, after the test script is run, the control signal sent by the main controller to the signal matrix module can be received by the MCU in the signal relay unit through the communication interface, so that the on-off of the output channel is controlled, and similarly, other signal relay units also respond to the control signal to select corresponding output channels to be conducted, and then 8 paths of signals are selected from the multipath signals and output to the GPIO test suite module, so that the functional test is assisted, and the test is better completed.

In some embodiments, the GPIO test suite module includes a signal bridging module and a plurality of test modules, where the signal bridging module has a plurality of input ends and a plurality of output ends, the input ends of the signal bridging module are connected to the output ends of the signal matrix module, for example, the signal matrix module has 8 output ends, and correspondingly, the GPIO test suite module has 8 detection interfaces to be correspondingly connected to the 8 output ends of the signal matrix module, and the input ends of the signal bridging module are connected to the detection interfaces to access the signals transmitted by the signal matrix module.

And the plurality of output ends of the signal bridging module are respectively connected with each test module, namely after receiving the control signal sent by the main controller, the signal bridging module is used for connecting one path of signal into one test module. The test module is used for performing different functional tests, such as level input/output test, level turning speed test, maximum driving current test, etc., and it is conceivable that the different test modules are applied to performing different functional tests, the test module is a related circuit for performing functional tests, and after the tested signal is accessed to the test module, the test module can generate a test result accordingly, so that the GPIO test suite module feeds back an output signal corresponding to the test result.

The test module is used for performing different functional tests, and the GPIO test suite module bridges one path of tested signals to the corresponding test module according to the control signals sent by the main controller. For example, the test module includes a module for testing the low level input and the float input functions of the GPIO, and the test module can control whether the tested signal is grounded through a switch to perform the low level input test when grounded or the float input test when suspended, and it is conceivable that the voltage in the current scene needs to be detected when the low level input test or the float input test is performed, so that the main controller can determine whether the tested signal output through the GPIO in two test scenes can reach the corresponding voltage requirement.

Therefore, the GPIO test suite module can select and conduct a corresponding passage according to the control signal of the main controller so as to access the tested signal to the corresponding test module. In the testing process, a tester only needs to output a corresponding control signal by using the main controller, so that the tester does not need to perform manual testing, the difference caused by the manual testing is reduced, and the accuracy of the testing result is improved.

In one embodiment, the signal bridging module includes two signal relay units, each signal relay unit including 8 inputs and 8 outputs to form an 8-way output. In the signal bridging module, 8 output ends of one signal relay unit are integrated into one path of output to serve as target output ends, namely, the 8 output ends of the signal relay unit are connected to the same end and serve as common output ends, namely, target output ends; and the 8 input ends of the other signal relay unit are integrated into one input to serve as target input ends, namely the 8 input ends of the signal relay unit are connected to the same end and serve as common input ends, namely target input ends. Furthermore, the target output end is connected with the target input end, so that the signal bridging module forms an 8-input 8-output module, and 8 output channels exist in each input path, so that signals can enter the corresponding test module conveniently.

It is conceivable that after the main controller outputs the third control signal to the GPIO test suite module, the signal bridging module in the GPIO test suite module may gate one path of signal input corresponding to the control signal and gate one path of signal output corresponding to the control signal, so as to transfer the accessed signal to the gated output channel, thereby accessing the corresponding test module for performing the functional test.

The test hardware module has 200 GPIOs, and correspondingly, the signal matrix module is provided with 4 DB50 interfaces, 25 signal relay units and 1 DB8 interface, the signal matrix module is respectively connected with the GPIOs of the test hardware module through the 4 DB50 interfaces, and the input ends of the 25 signal relay units are respectively connected with the output ends of the DB50 interfaces, and the output ends of the signal relay units are connected with the DB8 interfaces. It is conceivable that the signal matrix module forms a plurality of output channels by using the signal relay units thereon, and further controls the on and off of the output channels according to the received control signals, so as to transmit the tested signals accessed from the corresponding GPIOs to the GPIOs test suite module.

The GPIO test suite module is respectively connected with pins of the DB8 interface through 8 detection interfaces, and comprises a signal bridging module and 8 test modules, wherein the signal bridging module is provided with 8 input ends and 8 output ends so as to be connected with the detection interfaces and the test modules. It can be understood that the signal bridging module is respectively connected with 8 detection interfaces, and 8 output ends of the signal bridging module are respectively connected with different test modules, so that the tested signals accessed from each detection interface can be correspondingly bridged into the corresponding test modules through the bridging modules to perform functional test.

Therefore, the main controller can control the signal bridging module in the GPIO test suite module to form a corresponding passage so as to bridge the tested signal to the target test module, thereby rapidly completing the functional test of different test items.

Fig. 2 is a schematic diagram of steps of a GPIO driving test method according to an embodiment of the present application, where the method is applied to a main controller in the GPIO driving test system, so that the main controller can control other modules. The main controller is internally provided with a GPIO driver and a test script, the GPIO driver is used for driving the test hardware module to output corresponding tested signals through GPIO, and the test script is used for assisting the main controller to control each module so as to complete the test of signals output by GIPO, and the specific steps are as follows:

step S210, compiling the GPIO drivers to generate firmware corresponding to the GPIO drivers.

Step S220, importing firmware into the test hardware module for loading the firmware by the test hardware module.

Step S230, running a test script to send corresponding control signals to the test hardware module, the signal matrix module and the GPIO test suite module, respectively, and enabling the test hardware module or the GPIO test suite module to output signals corresponding to the test results.

Step S240, under the condition that an output signal corresponding to the test result is received, a test report corresponding to the test result is generated based on a preset report template.

It can be understood that before the main controller burns the GPIO driver for testing to the test hardware module, the main controller compiles the GPIO driver to obtain the firmware of the corresponding GPIO driver, and then burns the firmware to the test hardware module.

The main controller burns the firmware through the corresponding burning tool to import the firmware to the test hardware module through the firmware download port, so that the test hardware module loads the firmware to further operate the GPIO driver, and the test hardware module can output the tested signal through the GPIO on the test hardware module.

The main controller runs the test script, thereby starting the corresponding test flow. It is conceivable that a developer may set a time of sending a control signal, a trigger condition of the sending signal, etc. in the test script, so that the main controller may appropriately send corresponding control signals to the test hardware module, the signal matrix module, and the GPIO test suite module, respectively, so as to control the test hardware module, the signal matrix module, and the GPIO test suite module to form a test branch therebetween, so as to complete one functional test. It should be noted that, in some functional tests, the output signal corresponding to the test result may also be provided by the test hardware module to the host controller, for example, the interrupt response time test may be performed by recording the GPIO interrupt response time by the host controller, so as to complete the functional test.

For example, the test hardware module has 200 GPIOs, and correspondingly, the signal matrix module is provided with 4 DB50 interfaces, 25 signal relay units and 1 DB8 interface, the signal matrix module is respectively connected with the GPIOs of the test hardware module through the 4 DB50 interfaces, and the input ends of the 25 signal relay units are respectively connected with the output ends of the DB50 interfaces, and the output ends of the signal relay units are connected with the DB8 interfaces.

The GPIO test suite module is respectively connected with pins of the DB8 interface through 8 detection interfaces, and comprises a signal bridging module and 8 test modules, wherein the signal bridging module is provided with 8 input ends and 8 output ends so as to be connected with the detection interfaces and the test modules.

When the main controller runs the test script, the main controller can output a control signal to the test hardware module so that the test hardware module outputs a tested signal. Of course, the main controller may also send corresponding control signals to other modules, such as the signal matrix module and the GPIO test suite module, when outputting control signals to the test hardware module. The functional test performed at present needs to adopt a test module I, and correspondingly, the main controller can output corresponding control signals to the signal matrix module so that each signal relay unit can be switched on and off to form an output channel for switching the tested signals to the GPIO test suite module. And the main controller also controls the GPIO test suite module to bridge the tested signal to the test module I through the signal bridging module through the control signal so as to perform corresponding test. The main controller can acquire output signals corresponding to the test results through communication connection with the GPIO test suite module so as to generate a test report according to the corresponding report template. It is conceivable that a plurality of items to be tested can be further arranged in the tested script, and accordingly, when the tested script is run, the main controller can output corresponding control signals so that the tested signals can be connected into corresponding test modules for testing.

The main controller can control other modules in the GPIO drive test system by running the set test script, so as to provide an output channel from the GPIO to the test module for the tested signal to complete the functional test, and can also generate a test report corresponding to the test result by combining the feedback signal for the tester to review. Therefore, the testing process is simple and convenient, and the manual testing of a tester is not needed, so that the difference caused by the manual testing is effectively avoided, and more accurate and effective testing results are provided.

Fig. 3 is a schematic diagram of controlling a GPIO driving test according to an embodiment of the present application, where, as shown in the drawing, when a main controller outputs control signals to each module, it needs to control each module according to the content defined in the test script, and specific steps are as follows:

step S310, according to the GPIO output configuration defined by the test script, a first control signal is sent to the test hardware module so that the test hardware module can output a tested signal through the target GPIO.

Step S320, a second control signal is sent to the signal matrix module, so that the signal matrix module transmits the tested signal output by the target GPIO to the GPIO test suite module.

Step S330, according to the target test function defined by the test script, a third control signal is sent to the GPIO test suite module to map the tested signal output by the target GPIO to the target test module, where the target test module is related to the target test function.

It can be understood that the test script is edited by the tester for the GPIO driver test, and the corresponding GPIO output configuration is recorded on the test script, for example, the port information of the target GPIO that is configured with the signals to be tested to be output under each test is configured. Of course, the test script also defines a target test function for the currently output signal under test, such as a test module to which the signal under test output by the target GPIO is mapped to be required.

Furthermore, the main controller outputs the first control signal to the test hardware module so that the test hardware module outputs the signal to be tested through the target GPIO, for example, the GPIO1 is currently required to be used for a low level input test, i.e., GPIO1 is used as the target GPIO, and the main controller outputs the first control signal to the test hardware module so that the GPIO1 outputs the signal to be tested for performing the low level input test.

In addition, the main controller outputs a second control signal to the signal matrix module so as to open an output channel corresponding to the GPIO1, so that the tested signal output by the GPIO1 is transmitted to the GPIO test suite module. Of course, the main controller also outputs the third control signal to the GPIO test suite module, and it is conceivable that the main controller needs to send the third control signal to the GPIO test suite module according to the target test function defined by the test script, so that the signal bridging module in the GPIO test suite module is utilized to map the tested signal output by the GPIO1 to the target test module for performing the low-level test to perform the low-level input test.

Therefore, the main controller outputs corresponding control signals to each module according to the requirements of different test items so as to provide corresponding output channels for the tested signals, and then map the tested signals into the target test module, the main controller can automatically complete the signal GPIO driving test according to the test script, manual testing is not needed in the test process, the difference caused by manual testing is reduced, and the accuracy of the detection result is effectively improved.

Fig. 4 is a schematic structural diagram of a GPIO driving test device according to an embodiment of the present application, where the GPIO driving test device is applied to a main controller in the GPIO driving test system, and is configured to execute the GPIO driving test method, and has a functional module and beneficial effects of executing the method. The apparatus includes a program compiling module 401, a firmware importing module 402, a script running module 403, and a report outputting module 404.

Wherein the program compiling module 401 is configured to compile the GPIO driver to generate firmware corresponding to the GPIO driver; the firmware import module 402 is configured to import firmware to the test hardware module for the test hardware module to load the firmware; script operation module 403 is configured to operate a test script to send corresponding control signals to the test hardware module, the signal matrix module, and the GPIO test suite module, respectively; the report output module 404 is configured to generate a test report corresponding to the test result based on a preset report template in case of receiving an output signal corresponding to the test result.

On the basis of the above embodiment, the script execution module 403 is further configured to:

according to GPIO output configuration defined by the test script, a first control signal is sent to the test hardware module so that the test hardware module can output a tested signal through a target GPIO;

transmitting a second control signal to the signal matrix module so that the signal matrix module transmits a tested signal output by the target GPIO to the GPIO test suite module;

and according to the target test function defined by the test script, sending a third control signal to the GPIO test suite module so as to map the tested signal output by the target GPIO to the target test module, wherein the target test module is related to the target test function.

It should be noted that, in the embodiment of the GPIO driving test device, each module is only divided according to the functional logic, but not limited to the above division, so long as the corresponding function can be realized; in addition, the specific names of the modules are only for distinguishing from each other, and are not used to limit the protection scope of the present application.

Fig. 5 is a schematic structural diagram of a main controller according to an embodiment of the present application, where the device is configured to execute the GPIO driving test method according to the foregoing embodiment, and has functional modules and beneficial effects corresponding to the execution method. As shown, the apparatus comprises a processor 501, a memory 502, an input device 503 and an output device 504. The number of processors 501 may be one or more, one processor 501 being illustrated in the figure; the processor 501, memory 502, input devices 503 and output devices 504 may be connected by a bus or other means, which is illustrated as a bus connection. The memory 502 is used as a computer readable storage medium for storing a software program, a computer executable program, and a module, such as program instructions/modules corresponding to the GPIO driving test method in the embodiment of the present application. The processor 501 executes software programs, instructions and modules stored in the memory 502 to perform corresponding various functional applications and data processing, i.e., to implement the GPIO drive test method described above.

Memory 502 may include primarily a program storage area and a data storage area, wherein the program storage area may store an operating system, at least one application program required for functionality; the storage data area may store data or the like recorded or created according to the use process. In addition, memory 502 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 502 may further comprise remotely located memory relative to the processor 501, which may be connected to the terminal device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The input means 503 may be used to input corresponding numeric or character information to the processor 501 and to generate key signal inputs related to user settings and function control of the device; the output means 504 may be used to send or display key signal outputs related to user settings and function control of the device.

Embodiments of the present application also provide a storage medium storing computer-executable instructions that, when executed by a processor, are configured to perform related operations in a GPIO drive test method provided by any of the embodiments of the present application.

Computer-readable storage media, including both permanent and non-permanent, removable and non-removable media, may be implemented in any method or technology for storage of information. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Disks (DVD) or other optical storage, magnetic cassettes, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises an element.

Note that the above is only a preferred embodiment of the present application and the technical principle applied. Those skilled in the art will appreciate that the present application is not limited to the particular embodiments described herein, but is capable of numerous obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the present application. Therefore, while the present application has been described in connection with the above embodiments, the present application is not limited to the above embodiments, but may include many other equivalent embodiments without departing from the spirit of the present application, the scope of which is defined by the scope of the appended claims.

Claims (10)

1. A GPIO drive test system comprising:

the main controller is used for outputting signals through a communication interface on the main controller;

the test hardware module is connected with the main controller through a firmware download port to burn test firmware, is also connected with the main controller in a communication way, and is used for outputting a tested signal through a GPIO (general purpose input/output) or feeding back an output signal corresponding to a test result to the main controller under the condition of receiving a first control instruction output by the main controller;

the signal matrix module is connected with the test hardware module, is provided with a plurality of input interfaces for connecting GPIO of the test hardware module, is also connected with the main controller in a communication manner, and is used for selecting an output channel according to a received second control instruction output by the main controller;

the GPIO test kit module is connected with the signal matrix module, and the GPIO test kit module is provided with a plurality of detection interfaces to be connected with the output of signal matrix module in a one-to-one correspondence, the GPIO test kit module still with master controller communication connection, the GPIO test kit module is used for selecting a path of signal to detect according to received the third control signal of master controller output.

2. The GPIO drive test system of claim 1 wherein the test hardware module is provided with a plurality of GPIOs, the signal matrix module comprising a DB50 interface, a signal relay unit, and a DB8 interface;

each DB50 interface is respectively connected with different GPIOs on the test hardware module, the number of the signal relay units is adapted to the number of the output ends of all DB50 interfaces, the input ends of each signal relay unit are respectively connected with the output ends of the corresponding DB50 interfaces, the output ends of the signal relay units are connected with the input ends of the DB8 interfaces in a parallel cascade mode, and the output ends of the DB8 interfaces are connected with the input ends of the GPIO test suite module.

3. The GPIO drive test system of claim 2 wherein the signal relay unit comprises 8 inputs and 8 outputs to form 8 output channels, the signal relay unit comprises an MCU, a communication interface, and a driving subunit, the MCU is communicatively connected with the main controller through the communication interface, the MCU is connected with the driving subunit, and the driving subunit is configured to adjust on-off of the 8 output channels according to a control instruction output by the MCU.

4. The GPIO drive test system of claim 1 wherein the GPIO test suite module comprises a signal bridging module and a plurality of test modules;

the signal bridging module comprises a plurality of input ends and a plurality of output ends, the input ends of the signal bridging module are connected with the output ends of the signal matrix module through the detection interfaces, the plurality of output ends of the signal bridging module are respectively connected with different test modules, and the signal bridging module is used for selecting one path of signals to be connected into one test module according to the third control signals;

each test module is used for performing different functional tests, and each test module is connected with the main controller so as to feed back output signals of corresponding test results to the main controller.

5. The GPIO drive test system of claim 4 wherein the signal bridging module comprises two signal relay units, each comprising 8 inputs and 8 outputs to form an 8-way output channel;

and the two signal relay units respectively select one output channel according to the third control signal output.

6. The GPIO drive test system of any one of claims 1-5 wherein the master controller establishes communication connections with the test hardware module, the signal matrix module, and the GPIO test suite module, respectively, via a CAN bus.

7. A GPIO driver test method, applied to a main controller in a GPIO driver test system as claimed in any one of claims 1 to 6, wherein a GPIO driver and a test script are provided in the main controller, and the GPIO driver test method comprises:

compiling the GPIO driver to generate firmware corresponding to the GPIO driver;

importing the firmware into a test hardware module for loading the firmware by the test hardware module;

running the test script to respectively send corresponding control signals to the test hardware module, the signal matrix module and the GPIO test suite module, and enabling the test hardware module or the GPIO test suite module to output signals corresponding to test results;

and under the condition that an output signal corresponding to the test result is received, generating a test report corresponding to the test result based on a preset report template.

8. The GPIO drive test method of claim 7, wherein the running the test script to send corresponding control signals to a test hardware module, a signal matrix module, and a GPIO test suite module, respectively, and to cause the test hardware module or the GPIO test suite module to output signals corresponding to test results comprises:

according to the GPIO output configuration defined by the test script, a first control signal is sent to the test hardware module so that the test hardware module can output a tested signal through a target GPIO;

transmitting a second control signal to the signal matrix module so that the signal matrix module transmits a tested signal output by the target GPIO to the GPIO test suite module;

and according to a target test function defined by the test script, sending a third control signal to the GPIO test suite module so as to map a tested signal output by the target GPIO to a target test module, wherein the target test module is related to the target test function.

9. A GPIO driver test device, applied to a main controller in a GPIO driver test system according to any one of claims 1-6, where a GPIO driver and a test script are disposed in the main controller, the GPIO driver test device comprising:

the program compiling module is configured to compile the GPIO driver to generate firmware corresponding to the GPIO driver;

the firmware importing module is configured to import the firmware to the test hardware module so that the test hardware module can load the firmware;

the script running module is configured to run the test script to respectively send corresponding control signals to the test hardware module, the signal matrix module and the GPIO test suite module;

and the report output module is configured to generate a test report corresponding to the test result based on a preset report template under the condition that an output signal corresponding to the test result is received.

10. A storage medium storing computer executable instructions which, when executed by a computer processor, are for performing the GPIO drive test method of any one of claims 7-8.