CN117811544A - Circuit and method for implementing chip analog signal calibration and compensation - Google Patents
Circuit and method for implementing chip analog signal calibration and compensation Download PDFInfo
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- CN117811544A CN117811544A CN202311871226.4A CN202311871226A CN117811544A CN 117811544 A CN117811544 A CN 117811544A CN 202311871226 A CN202311871226 A CN 202311871226A CN 117811544 A CN117811544 A CN 117811544A
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Abstract
The invention discloses a circuit and a method for implementing chip analog signal calibration and compensation, which belong to the technical field of analog signal calibration, and the circuit for implementing chip analog signal calibration and compensation comprises: the compensating circuit of the analog signal in the chip stores the digital register of the analog compensation value, the digital logic finite state machine which controls the effective loading of the compensation value, the nonvolatile memory interval of the analog compensation value which stores the compensation wafer manufacturing process difference or the chip temperature change in the chip; according to the invention, the analog signal of each chip is measured, the part deviating from the reference is compensated, and the compensation value is loaded into the compensation circuit when the chip is electrified, so that the consistency of the analog signals is maintained for the chips produced in batches; and measuring analog signals of each temperature interval, compensating the part deviating from the reference, and automatically loading corresponding compensation values to a compensation circuit when the temperature of the chip changes, so as to ensure the consistency of the analog signals of the chip in each temperature interval.
Description
Technical Field
The invention belongs to the technical field of analog signal calibration, and particularly relates to a circuit and a method for implementing chip analog signal calibration and compensation.
Background
Analog signals refer to information represented by continuously varying physical quantities, the amplitude, frequency, or phase of which continuously varies over time, or signals whose characteristic quantities representing the information may appear as arbitrary values at arbitrary instants over a continuous period of time; due to the difference of wafer processing technology, it is difficult to achieve complete consistency of analog signals in the chip, such as voltage and clock of the chip. There is a need for a calibration method that measures the analog signal of each chip and compensates for the offset from the reference so that mass-produced chips maintain analog signal consistency.
Even if the output of the analog value of the chip meets the expectations, in actual operation, the analog signal still drifts with the change of temperature, and especially under the high-temperature or low-temperature environment, the drift of the analog signal may exceed the design specification of the chip, so that the performance of the chip is deteriorated.
Disclosure of Invention
To solve the problems set forth in the background art. The invention provides a circuit and a method for implementing chip analog signal calibration and compensation, which have the characteristics of keeping consistency during large-scale chip manufacturing and still keeping stability of analog signals in high and low temperature environments.
In order to achieve the above purpose, the present invention provides the following technical solutions: a circuit for chip analog signal calibration and compensation implementation, the chip analog signal calibration and compensation implementation circuit comprising:
a compensation circuit for analog signals in the chip;
digital logic for storing analog signal compensation values;
a digital logic finite state machine for controlling correct implementation of the compensation value;
and storing a nonvolatile storage interval of an analog compensation value for compensating wafer manufacturing process variation or temperature drift in the chip.
Further in the present invention; the analog signal of the chip needs to realize a circuit for compensating the output of the analog signal, the compensation circuit can realize the function of upwards or downwards compensating the analog signal on the basis of the reference output, and after the analog signal passes through the compensation circuit, the actual output = output before compensation + compensation quantity, so that the output of the analog signal accords with the design expectation and keeps consistency; the compensation range of the compensation circuit should cover the deviation range of the analog signal caused by wafer processing difference and the drift amount of the analog signal caused by the highest temperature and the lowest temperature when the chip is used.
Further in the present invention; the compensation circuit of the analog signal compensates the output of the analog signal through a compensation value, the compensation value is obtained through testing in a testing stage after the wafer production is finished, and the compensation value can only comprise the compensation quantity of the chip tested at normal temperature or the compensation quantity of the chip required to be applied to the analog signal in each temperature range.
Further in the present invention; and in the corresponding temperature range, the compensation amount of each analog signal and the compensation amount of each temperature range are obtained by adjusting the compensation amount and observing whether the output accords with the expected or not in the test stage.
Further in the present invention; when the chip is electrified and initialized, the compensation quantity at normal temperature is read out from the nonvolatile memory by the logic circuit and is configured into the logic circuit corresponding to the corresponding compensation circuit to compensate the difference caused by chip manufacture.
Further in the present invention; in the temperature range compensation circuit, an analog-digital converter (ADC) is contained in a chip, a logic circuit finite state machine triggers the ADC to collect the temperature of the chip at regular time, when the temperature of the chip is in a certain range needing compensation, the compensation value of the range is read from a nonvolatile memory and is configured into a corresponding logic circuit, and the compensation value of the corresponding compensation circuit is changed.
A circuit operation method for performing chip analog signal calibration and compensation for compensating chip differences caused by a wafer processing process, comprising a circuit operation method for chip calibration and a circuit operation method for chip compensation, wherein the circuit operation method for chip calibration comprises:
at step 100, digital logic, such as that in fig. 1, is set to store the compensation values of the logic signals, i.e., to set the compensation values corresponding to the analog signals;
at step 101, observing the corresponding analog signal output;
at step 102, determining whether the corresponding analog signal output is within the expected range, i.e. meets the design specification, if yes, jumping to step 103, i.e. recording the compensation value of the measured analog signal, if no, jumping to step 100, adjusting the compensation value of the measured analog signal, and repeatedly executing steps 100, 101 and 102 until the measured analog signal output meets the expected requirement;
the circuit operation method for chip compensation comprises the following steps:
at step 200, the chip is powered up, and the digital logic reads the compensation value from the nonvolatile memory according to the nonvolatile memory address allocated by the analog signal compensation value;
at step 201, the compensation value read out in step 200 is written into a digital register corresponding to the compensation value, the compensation value is applied into an analog compensation circuit through the digital register corresponding to the compensation value, and then the step 202 is skipped;
at step 202, determining whether all analog compensation values are loaded, if yes, jumping to step 3, otherwise, circularly executing step 200 and step 201, continuing to read the rest compensation values, and loading the rest compensation values into the compensation circuits corresponding to all analog compensation values until all compensation values are read and loaded;
at step 203, meaning that the analog signal compensation loading operation has been completed, other initialization operations of the system are initiated.
A circuit for implementing chip analog signal calibration and compensation for compensating for temperature-induced analog signal drift, comprising:
nonvolatile memory cells within the chip;
a storage interval opened by storing analog compensation values for compensating temperature drift, wherein the space for storing the compensation values is determined according to the number of analog signals to be compensated and the temperature interval to be compensated;
a digital logic finite state machine in the chip;
a compensation circuit for the analog signal;
digital logic for storing the compensation value of the logic signal;
a temperature detection circuit in the chip;
an analog-to-digital converter of the chip;
a switch for switching detection channels in front of the ADC;
the FSM configures an ADC detection channel switch and a signal triggering ADC sampling;
after ADC sampling is completed, the FSM reads signals of ADC sampling results;
based on the above circuit structure, a circuit operation method for implementing chip analog signal calibration and compensation for compensating analog signal drift caused by temperature is provided, which comprises a circuit operation method for chip calibration and a circuit operation method for chip compensation, wherein the circuit operation method for chip calibration comprises the following steps:
at step 300, a temperature interval is selected for calibration;
at step 301, configuring a compensation value of an analog signal;
at step 302, observing an analog signal output;
at step 303, determining whether the analog signal output meets the expectation, if yes, jumping to step 304, if no, jumping back to step 301, adjusting the compensation value, and then observing whether the analog signal output meets the expectation;
at step 304, it is determined whether all temperature intervals have been compensated, if yes, step 305 is executed, if no, step 300 is skipped, the temperature intervals are switched, then compensation values are configured, and whether the output meets the expectations is observed;
at step 305, the compensation values of the analog signal at each temperature interval are recorded;
at step 306, the compensation values of each analog signal in each temperature interval are written into the nonvolatile memory according to the allocated addresses in turn;
the circuit operation method for chip compensation comprises the following steps:
at step 400, the digital logic finite state machine of fig. 4 switches the channel switch at regular time, starting the temperature detection circuit information of the analog-to-digital converter sampling chip;
at step 401, when the temperature reaches the temperature interval needing switching compensation, entering step 402, otherwise, jumping back to step 400, and sampling the temperature at fixed time;
at step 402, according to the temperature interval, the compensation value corresponding to the temperature interval is read from the corresponding address of the nonvolatile memory;
at step 403, the compensation value is loaded into a digital register corresponding to the corresponding analog compensation circuit;
at step 404, the switch and analog to digital converter for pre-ADC detection channel switching are switched back to the original state, and then jumped back to step 400 to periodically de-sample the chip temperature.
Compared with the prior art, the invention has the beneficial effects that:
according to the invention, the analog signals of each chip are measured, and the part deviating from the reference is compensated, so that the consistency of the analog signals is kept for the chips produced in a large scale; by measuring the analog signal of each temperature interval, when the chip temperature changes, the part deviating from the reference is compensated, so that the consistency of the analog signal of the chip in the whole temperature interval is ensured.
Drawings
FIG. 1 is a schematic diagram of a circuit for calibrating and compensating chips in order to compensate for chip differences caused by wafer processing;
FIG. 2 is a flow chart of the circuit operation for chip calibration to compensate for chip variations caused by wafer processing;
FIG. 3 is a flow chart of the circuit operation for compensating chips in order to compensate for the chip differences caused by the wafer processing process according to the present invention;
FIG. 4 is a schematic diagram of a circuit for calibrating and compensating a chip to compensate for temperature-induced analog signal drift according to the present invention;
FIG. 5 is a flow chart of the circuit operation for chip calibration to compensate for temperature induced analog signal drift in accordance with the present invention;
FIG. 6 is a flow chart of the circuit operation for compensating the chip in order to compensate the temperature-induced analog signal drift.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-6, the present invention provides the following technical solutions: a circuit for chip analog signal calibration and compensation implementation, the chip analog signal calibration and compensation implementation circuit comprising:
component 10 is a nonvolatile memory cell within a chip;
the component 12 is a memory section opened up in the component 10 for storing analog compensation values that compensate for wafer manufacturing process variations;
component 14 is an on-chip digital logic Finite State Machine (FSM);
component 16 is digital logic corresponding to component 18 that stores the compensation value for the logic signal;
the component 18 is a compensation circuit for the analog signal.
Specifically, the analog signal of the chip needs to realize a circuit for compensating the output of the analog signal, the compensation circuit can realize the function of upwards or downwards compensating the analog signal on the basis of the reference output, and after the analog signal passes through the compensation circuit, the actual output = output before compensation + compensation quantity, so that the output of the analog signal accords with the design expectation and keeps consistency; the compensation range of the compensation circuit should cover the deviation range of the analog signal caused by wafer processing difference and the drift amount of the analog signal caused by the highest temperature and the lowest temperature when the chip is used.
Specifically, the compensation circuit of the analog signal compensates the output of the analog signal by a compensation value, the compensation value is obtained by testing in a testing stage after the wafer is produced, and the compensation value can only include the compensation amount of the chip tested at normal temperature or the compensation amount of the chip required to be applied to the analog signal in each temperature range.
Specifically, the compensation amount of each analog signal and the compensation amount of each temperature range are obtained by adjusting the compensation amount in the test stage and observing whether the output meets the expectations or not in the corresponding temperature range.
Specifically, when the chip is powered on and initialized, the compensation amount at normal temperature is read out from the nonvolatile memory by the logic circuit and is configured into the logic circuit corresponding to the corresponding compensation circuit, so as to compensate the difference caused by chip manufacture.
Specifically, in the temperature range compensation circuit, an analog-digital converter is included in a chip, an ADC is triggered by a logic circuit finite state machine to collect the temperature of the chip at regular time, when the temperature of the chip is in a certain range needing compensation, the compensation value of the range is read from a nonvolatile memory and is configured into a corresponding logic circuit, the compensation value of the corresponding compensation circuit is changed, and the analog parameters of the chip need to be kept in an application of no temperature drift in a full temperature range, wherein the chip belongs to a digital-analog hybrid chip, and the ADC exists in the chip.
A circuit operation method for calibrating and compensating chip analog signals for compensating chip differences caused by wafer processing technology is characterized in that: a circuit operation method including chip calibration and a circuit operation method of chip compensation, wherein the circuit operation method of chip calibration includes:
at step 100, the component 16 as in fig. 1 is set, i.e. the compensation value corresponding to the analog signal is set;
at step 101, the corresponding analog signal (element 18 in fig. 1) output is observed;
at step 102, determining whether the output of the corresponding analog signal (component 18 in fig. 1) is within the expected range, i.e. meets the design specification, if yes, jumping to step 103, i.e. recording the compensation value of the measured analog signal, if no, jumping to step 100, adjusting the compensation value of the measured analog signal, and repeating steps 100, 101 and 102 until the output of the measured analog signal meets the expected requirement;
in one embodiment, after recording the compensation value of the measured analog signal at step 103, the process jumps to step 104;
in one embodiment, at step 104, the compensation value obtained at step 103 is written into the fig. 1 part 12 (i.e., within the nonvolatile memory space allocated for the compensation value).
In another embodiment, after step 103 is completed, steps 100 to 103 are repeated in a loop to test all analog signals in sequence, and then step 104 is skipped, and compensation values of all analog signals are written into the corresponding nonvolatile memory space (component 12) at one time;
the circuit operation method for chip compensation comprises the following steps:
at step 200, the chip is powered up, and the digital logic reads the compensation value from the nonvolatile memory according to the nonvolatile memory address allocated by the analog signal compensation value;
at step 201, the compensation value read out at step 200 is written into the block 16 (digital register corresponding to the compensation value), the compensation value is applied into the block 18 (analog compensation circuit) by the block 16, and then the step 202 is skipped;
at step 202, determining whether all analog compensation values are loaded, if yes, jumping to step 3, otherwise, circularly executing step 200 and step 201, continuing to read the rest compensation values, and loading the rest compensation values into the compensation circuits corresponding to all analog compensation values until all compensation values are read and loaded;
at step 203, meaning that the analog signal compensation loading operation has been completed, other initialization operations of the system are initiated.
8. A circuit for implementing chip analog signal calibration and compensation for compensating for temperature-induced analog signal drift, characterized by: comprising the following steps:
component 20 is a nonvolatile memory cell within the chip;
the components 21, 22, 23 are provided with a storage interval for storing the analog compensation value for compensating the temperature drift, and the space for storing the compensation value is determined according to the number of analog signals to be compensated and the temperature interval to be compensated;
component 29 is an on-chip digital logic Finite State Machine (FSM);
the component 31 is a compensation circuit for analog signals;
the component 30 is digital logic corresponding to the component 31 and used for storing the logic signal compensation value;
the component 25 is a temperature detection circuit within the chip;
component 26 is an analog-to-digital converter (ADC) of a chip;
the component 24 is a switch for switching detection channels before the ADC;
component 27 configures the ADC detection channel switch for the FSM and the signal triggering the ADC sampling;
the component 28 reads the signal of the ADC sampling result after the ADC sampling is completed;
based on the above circuit structure, a circuit operation method for implementing chip analog signal calibration and compensation for compensating analog signal drift caused by temperature is provided, which is characterized in that: a circuit operation method including chip calibration and a circuit operation method of chip compensation, wherein the circuit operation method of chip calibration includes:
at step 300, a temperature interval is selected for calibration;
at step 301, configuring a compensation value of an analog signal;
at step 302, observing an analog signal output;
at step 303, determining whether the analog signal output meets the expectation, if yes, jumping to step 304, if no, jumping back to step 301, adjusting the compensation value, and then observing whether the analog signal output meets the expectation;
at step 304, it is determined whether all temperature intervals have been compensated, if yes, step 305 is executed, if no, step 300 is skipped, the temperature intervals are switched, then compensation values are configured, and whether the output meets the expectations is observed;
at step 305, the compensation values of the analog signal at each temperature interval are recorded;
at step 306, the compensation values of the respective analog signals at the respective temperature intervals are sequentially written into the nonvolatile memory (the part 20 in fig. 4) by the assigned addresses;
the circuit operation method for chip compensation comprises the following steps:
at step 400, the digital logic finite state machine (component 29) of fig. 4 switches the channel switch (component 24) at a timing to activate the analog-to-digital converter (component 26) to sample the chip's temperature detection circuit (component 25) information;
at step 401, when the temperature reaches the temperature interval needing switching compensation, entering step 402, otherwise, jumping back to step 400, and sampling the temperature at fixed time;
at step 402, reading the compensation value corresponding to the temperature interval according to the corresponding address to the non-volatile memory part 20) in fig. 4;
at step 403, the compensation value is loaded into a digital register (component 30) corresponding to the corresponding analog compensation circuit;
at step 404, the switch (component 24) and analog-to-digital converter (component 26) that switched the detection channel before the ADC are switched back to the original state, and then jumped back to step 400 to periodically de-sample the temperature of the chip.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (8)
1. A circuit for chip analog signal calibration and compensation implementation, characterized by: the chip analog signal calibration and compensation implementation circuit comprises:
a compensation circuit for analog signals in the chip;
digital logic for storing analog signal compensation values;
a digital logic finite state machine for controlling correct implementation of the compensation value;
and storing a nonvolatile storage interval of an analog compensation value for compensating wafer manufacturing process variation or temperature drift in the chip.
2. A circuit for chip analog signal calibration and compensation implementation according to claim 1, wherein: the analog signal of the chip needs to realize a circuit for compensating the output of the analog signal, the compensation circuit can realize the function of upwards or downwards compensating the analog signal on the basis of the reference output, and after the analog signal passes through the compensation circuit, the actual output = output before compensation + compensation quantity, so that the output of the analog signal accords with the design expectation and keeps consistency; the compensation range of the compensation circuit should cover the deviation range of the analog signal caused by wafer processing difference and the drift amount of the analog signal caused by the highest temperature and the lowest temperature when the chip is used.
3. A circuit for chip analog signal calibration and compensation implementation according to claim 1, wherein: the compensation circuit of the analog signal compensates the output of the analog signal through a compensation value, the compensation value is obtained through testing in a testing stage after the wafer production is finished, and the compensation value can only comprise the compensation quantity of the chip tested at normal temperature or the compensation quantity of the chip required to be applied to the analog signal in each temperature range.
4. A circuit for chip analog signal calibration and compensation implementation according to claim 1, wherein: and in the corresponding temperature range, the compensation amount of each analog signal and the compensation amount of each temperature range are obtained by adjusting the compensation amount and observing whether the output accords with the expected or not in the test stage.
5. A circuit for chip analog signal calibration and compensation implementation according to claim 1, wherein: when the chip is electrified and initialized, the compensation quantity at normal temperature is read out from the nonvolatile memory by the logic circuit and is configured into the logic circuit corresponding to the corresponding compensation circuit to compensate the difference caused by chip manufacture.
6. A circuit for chip analog signal calibration and compensation implementation according to claim 1, wherein: in the temperature range compensation circuit, an analog-digital converter is contained in a chip, an ADC is triggered by a logic circuit finite state machine at fixed time to acquire the temperature of the chip, when the temperature of the chip is in a certain range needing compensation, the compensation value of the range is read from a nonvolatile memory and is configured into a corresponding logic circuit, the compensation value of the corresponding compensation circuit is changed, and in the application that the analog parameters of the chip need to be kept within the full temperature range and no temperature drift occurs, the chip belongs to a digital-analog hybrid chip, and the ADC exists in the chip.
7. A circuit operation method for calibrating and compensating chip analog signals for compensating chip differences caused by wafer processing technology is characterized in that: a circuit operation method including chip analog signal calibration and a circuit operation method of chip compensation, wherein the circuit operation method of chip calibration includes:
at step 100, digital logic, such as that in fig. 1, is set to store the compensation values of the logic signals, i.e., to set the compensation values corresponding to the analog signals;
at step 101, observing the corresponding analog signal output;
at step 102, determining whether the corresponding analog signal output is within the expected range, i.e. meets the design specification, if yes, jumping to step 103, i.e. recording the compensation value of the measured analog signal, if no, jumping to step 100, adjusting the compensation value of the measured analog signal, and repeatedly executing steps 100, 101 and 102 until the measured analog signal output meets the expected requirement;
the circuit operation method for chip compensation comprises the following steps:
at step 200, the chip is powered up, and the digital logic finite state machine reads the compensation value from the nonvolatile memory according to the nonvolatile memory address allocated by the analog signal compensation value;
at step 201, the compensation value read out in step 200 is written into a digital register corresponding to the compensation value, the compensation value is applied into an analog compensation circuit through the digital register corresponding to the compensation value, and then the step 202 is skipped;
at step 202, determining whether all analog compensation values are loaded, if yes, jumping to step 3, otherwise, circularly executing step 200 and step 201, continuing to read the rest compensation values, and loading the rest compensation values into the compensation circuits corresponding to all analog compensation values until all compensation values are read and loaded;
at step 203, meaning that the analog signal compensation loading operation has been completed, other initialization operations of the system are initiated.
8. A circuit for implementing calibration and compensation of chip analog signals for compensating for analog signal drift caused by temperature variations, characterized by: comprising the following steps:
a compensation circuit for analog signals in the chip;
a digital register storing the analog compensation value;
a nonvolatile memory space for storing analog compensation values for compensating temperature changes, the space for storing the compensation values being determined according to the number of analog signals to be compensated and a temperature interval to be compensated;
a digital logic Finite State Machine (FSM) for controlling the correct loading of the analog compensation value for compensating the temperature variation in the corresponding chip temperature interval;
a temperature detection circuit in the chip;
an analog-to-digital converter (ADC) of the chip;
a switch for switching detection channels in front of the ADC;
based on the above circuit structure, a circuit operation method for implementing chip analog signal calibration and compensation for compensating analog signal drift caused by temperature is provided, which is characterized in that: a circuit operation method including chip calibration and a circuit operation method of chip compensation, wherein the circuit operation method of chip calibration includes:
at step 300, a temperature interval is selected for calibration;
at step 301, configuring a compensation value of an analog signal;
at step 302, observing an analog signal output;
at step 303, determining whether the analog signal output meets the expectation, if yes, jumping to step 304, if no, jumping back to step 301, adjusting the compensation value, and then observing whether the analog signal output meets the expectation;
at step 304, it is determined whether all temperature intervals have been compensated, if yes, step 305 is executed, if no, step 300 is skipped, the temperature intervals are switched, then compensation values are configured, and whether the output meets the expectations is observed;
at step 305, the compensation values of the analog signal at each temperature interval are recorded;
at step 306, the compensation values of each analog signal in each temperature interval are written into the nonvolatile memory according to the allocated addresses in turn;
the circuit operation method for chip compensation comprises the following steps:
at step 400, the digital logic finite state machine of fig. 4 switches the channel switch at regular time, starting the temperature detection circuit information of the analog-to-digital converter sampling chip;
at step 401, when the temperature reaches the temperature interval needing switching compensation, entering step 402, otherwise, jumping back to step 400, and sampling the temperature at fixed time;
at step 402, according to the temperature interval, the compensation value corresponding to the temperature interval is read from the corresponding address of the nonvolatile memory;
at step 403, the compensation value is loaded into a digital register corresponding to the corresponding analog compensation circuit;
at step 404, the switch to detect channel switching before the ADC and the ADC are switched back to the original state, and then jump back to step 400 to periodically de-sample the temperature of the chip.
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| CN202311871226.4A CN117811544A (en) | 2023-12-29 | 2023-12-29 | Circuit and method for implementing chip analog signal calibration and compensation |
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| CN202311871226.4A CN117811544A (en) | 2023-12-29 | 2023-12-29 | Circuit and method for implementing chip analog signal calibration and compensation |
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