CN117810313A - Preparation method of solar cell, solar cell and photovoltaic device - Google Patents
Preparation method of solar cell, solar cell and photovoltaic device Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 339
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 338
- 239000010703 silicon Substances 0.000 claims abstract description 338
- 239000000758 substrate Substances 0.000 claims abstract description 99
- 238000004519 manufacturing process Methods 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims description 25
- 230000003287 optical effect Effects 0.000 claims description 13
- 238000002834 transmittance Methods 0.000 claims description 6
- 239000013081 microcrystal Substances 0.000 claims description 5
- 230000003094 perturbing effect Effects 0.000 claims description 3
- 238000012986 modification Methods 0.000 abstract description 25
- 230000004048 modification Effects 0.000 abstract description 23
- 238000006243 chemical reaction Methods 0.000 abstract description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 description 32
- 230000008569 process Effects 0.000 description 11
- 239000000126 substance Substances 0.000 description 11
- 238000004140 cleaning Methods 0.000 description 7
- 238000005137 deposition process Methods 0.000 description 7
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 7
- 238000010248 power generation Methods 0.000 description 7
- 230000006798 recombination Effects 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 5
- 229910021419 crystalline silicon Inorganic materials 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 5
- 238000005215 recombination Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 4
- 238000009434 installation Methods 0.000 description 4
- 230000031700 light absorption Effects 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 230000009471 action Effects 0.000 description 3
- 125000004429 atom Chemical group 0.000 description 3
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- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000004050 hot filament vapor deposition Methods 0.000 description 2
- 238000007641 inkjet printing Methods 0.000 description 2
- 239000013067 intermediate product Substances 0.000 description 2
- 238000001579 optical reflectometry Methods 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 230000000750 progressive effect Effects 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229910008045 Si-Si Inorganic materials 0.000 description 1
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Abstract
The application provides a preparation method of a solar cell, the solar cell and photovoltaic equipment, wherein the preparation method comprises the following steps: and respectively forming a first silicon layer and a second silicon layer on the upper surface and the lower surface of the substrate, carrying out disturbance reconstruction on the N-type doped silicon layer in the first silicon layer and the P-type doped silicon layer in the second silicon layer by utilizing a preset light beam, sequentially forming a first conductive layer and a first electrode on the surfaces of the N-type doped silicon layer and the P-type doped silicon layer, and sequentially forming a second conductive layer and a second electrode on the surfaces of the P-type doped silicon layer. Therefore, the preparation method carries out light modification treatment on the N-type doped silicon layer and the P-type doped silicon layer, so that the N-type doped silicon layer and the P-type doped silicon layer are promoted to be structurally reconstructed, the doping efficiency of the N-type doped silicon layer and the P-type doped silicon layer can be effectively improved, the carrier concentration is further improved, the photoelectric conversion efficiency of the SHJ battery is improved, and the mass production and the industrialized popularization of the SHJ battery are further facilitated.
Description
Technical Field
The application relates to the technical field of photovoltaic power generation, in particular to a manufacturing method of a solar cell, the solar cell and photovoltaic equipment.
Background
Solar cell power generation (photovoltaic power generation) is one of the fastest growing technologies of renewable energy sources, and by the end of 2018, the global accumulated installed quantity exceeds 400GW, and becomes the main force of new energy sources. China is the largest solar cell production and installation country in the world, the average speed increase in recent 10 years exceeds 140%, and the total accumulated installation amount is close to 200GW, so that the solar cell is a true photovoltaic country. According to the international energy agency prediction, photovoltaic installation accounts for 27% of the global power generation installation quantity by 2050, and can become a first large power generation source. Thanks to the rapid development of the whole photovoltaic industry chain and policy guidance, compared with the price of the Chinese photovoltaic module and the system which are respectively reduced by 58 percent and 65 percent before 10 years, the national LCOE (Levelized Cost of Energy, leveling degree electric cost) for the photovoltaic power generation has more than one third of the provinces, which is close to or even lower than that of the thermal power generation.
Silicon-based heterojunction solar cells (Silicon heterojunction solar cell), abbreviated as SHJ solar cells, are receiving a great deal of attention as next-generation ultra-efficient solar cell technology following PERC cells. However, for SHJ batteriesBecause of the diversity of amorphous silicon film structures, the process for manufacturing high-quality doped amorphous silicon layers is difficult to control. Taking boron doped P-type amorphous silicon as an example, since a dopant source gas (B 2 H 6 ) The decomposition process in the plasma enhanced chemical vapor deposition (PE-CVD) technology and the metal thermal catalytic chemical vapor deposition (Cat-CVD/Hot-wire CVD) technology is complex, the decomposed intermediate products are difficult to control, boron atoms and incompletely decomposed intermediate products are easier to form lattice defects in the P-type amorphous silicon film, a plurality of structural defects and dangling bonds are caused, the effective doping rate of the boron atoms is extremely low, the photoelectric conversion efficiency of the SHJ battery is influenced, and the mass production and the industrialized popularization of the SHJ battery are further influenced.
Disclosure of Invention
In view of this, the present application provides a method for manufacturing a solar cell, which comprises the following steps:
a method of fabricating a solar cell, comprising:
providing a substrate;
forming a first silicon layer on the upper surface of the substrate, wherein the first silicon layer comprises an N-type doped silicon layer;
forming a second silicon layer on the lower surface of the substrate, wherein the second silicon layer comprises a P-type doped silicon layer; wherein the upper surface and the lower surface of the substrate are two opposite surfaces;
disturbing the N-type doped silicon layer and the P-type doped silicon layer by using a preset light beam so as to reconstruct the structures of the N-type doped silicon layer and the P-type doped silicon layer;
after the structures of the N-type doped silicon layer and the P-type doped silicon layer are reconstructed, a first conductive layer and a first electrode are sequentially formed on one side, away from the substrate, of the N-type doped silicon layer, and a second conductive layer and a second electrode are sequentially formed on one side, away from the substrate, of the P-type doped silicon layer.
Optionally, perturbing the N-doped silicon layer and the P-doped silicon layer with a preset beam includes:
placing the whole formed by the substrate, the first silicon layer and the second silicon layer in a preset light environment;
the N-type doped silicon layer and the P-type doped silicon layer are disturbed for a preset time by utilizing the preset light beam in the preset light environment;
the value range of the preset time is 10 s-100 s, including the endpoint value.
Optionally, the range of the intensity of the preset light beam is 1 sun-100 sun, including the endpoint value;
the ratio of the target beam in the preset beam is 20% -50%, the end point value is included, and the wavelength of the target beam is smaller than 500nm;
the irradiation area of the preset light beam is at least 1.2 times of the size of the substrate;
the temperature of the preset light environment is less than 300 ℃.
Optionally, the first silicon layer further includes a first intrinsic silicon layer, the first intrinsic silicon layer being located between the substrate and the N-type doped silicon layer; the second silicon layer comprises a second intrinsic silicon layer, and the second intrinsic silicon layer is positioned between the substrate and the P-type doped silicon layer; the preparation method also comprises the following steps:
and disturbing the first and second intrinsic silicon layers by using the preset light beam so as to reconstruct the structures of the first and second intrinsic silicon layers.
A solar cell manufactured by the manufacturing method according to any one of the above embodiments, comprising:
a substrate;
a first silicon layer on the upper surface of the substrate, wherein the first silicon layer comprises an N-type doped silicon layer,
a first conductive layer and a first electrode which are sequentially laminated on one side of the N-type doped silicon layer, which is away from the substrate;
the second silicon layer is positioned on the lower surface of the substrate and comprises a P-type doped silicon layer;
a second conductive layer and a second electrode which are sequentially arranged on one side of the P-type doped silicon layer, which is away from the substrate; the upper surface and the lower surface of the substrate are two opposite surfaces;
the N-type doped silicon layer and the P-type doped silicon layer are silicon layers reconstructed by preset light beam disturbance.
Optionally, the structure of the N-doped silicon layer is at least one of amorphous, nanocrystalline and microcrystalline, and the thickness of the N-doped silicon layer ranges from 5nm to 15nm, including the end point value;
the structure of the P-type doped silicon layer is at least one of amorphous, nanocrystalline and microcrystal, and the thickness of the P-type doped silicon layer ranges from 5nm to 15nm, including the end point value.
Optionally, the first silicon layer further includes a first intrinsic silicon layer, the first intrinsic silicon layer being located between the substrate and the N-type doped silicon layer;
the second silicon layer further comprises a second intrinsic silicon layer located between the substrate and the P-type doped silicon layer;
the first intrinsic silicon layer and the second intrinsic silicon layer are silicon layers after being subjected to disturbance reconstruction of the preset light beam.
Optionally, the structure of the first intrinsic silicon layer is at least one of amorphous, nanocrystalline and microcrystal, and the thickness of the first intrinsic silicon layer ranges from 3nm to 10nm, including end point values;
the second intrinsic silicon layer has at least one of amorphous, nanocrystalline and microcrystal structure, and the thickness of the second intrinsic silicon layer ranges from 3nm to 10nm, including the end point value.
Optionally, the first conductive layer is a transparent conductive layer, the optical transmittance is more than 90%, the optical reflectivity is less than 3.5%, the thickness range is 80 nm-120 nm, the endpoint value is included, and the square resistance range is 30 ohm/sq-150 ohm/sq, the endpoint value is included;
the second conductive layer is a transparent conductive layer, the optical transmittance is more than 90%, the thickness range is 80-120 nm and comprises an end point value, and the square resistance range is 30-150 ohm/sq and comprises an end point value.
A photovoltaic device comprising a solar cell as in any one of the embodiments above.
Compared with the prior art, the technical scheme of the application has the following beneficial effects:
the preparation method of the solar cell provided by the application comprises the following steps: and respectively forming a first silicon layer and a second silicon layer on the upper surface and the lower surface of the substrate, carrying out disturbance reconstruction on the N-type doped silicon layer in the first silicon layer and the P-type doped silicon layer in the second silicon layer by utilizing a preset light beam, sequentially forming a first conductive layer and a first electrode on the surfaces of the N-type doped silicon layer and the P-type doped silicon layer, and sequentially forming a second conductive layer and a second electrode on the surfaces of the P-type doped silicon layer. Therefore, the preparation method carries out light modification treatment on the N-type doped silicon layer and the P-type doped silicon layer, can promote the structural reconstruction of the N-type doped silicon layer and the P-type doped silicon layer, further can effectively improve the doping efficiency of the N-type doped silicon layer and the P-type doped silicon layer, increase the N-type doped silicon layer and the P-type doped silicon layer, further improve the carrier concentration, and further facilitate the improvement of the photoelectric conversion efficiency of the SHJ battery, and further facilitate the mass production and the industrialized popularization of the SHJ battery.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is apparent that the drawings in the following description are only embodiments of the present application, and other drawings may be obtained according to the provided drawings without inventive effort to those skilled in the art.
The structures, proportions, sizes, etc. shown in the drawings are shown only in connection with the present disclosure, and should not be construed as limiting the scope of the invention, since any modification, variation in proportions, or adjustment of the size, which would otherwise be used by those skilled in the art, would not have the essential significance of the present disclosure, would not affect the efficacy or otherwise be achieved, and would still fall within the scope of the present disclosure.
Fig. 1 is a flowchart of a method for manufacturing a solar cell provided in the present application;
fig. 2 to 7 are schematic structural diagrams after different process steps in the preparation method of a solar cell provided by the application;
fig. 8 is a graph showing comparison of output characteristics of a solar cell manufactured by the manufacturing method provided in the present application and an existing cell.
Detailed Description
Embodiments of the present application will now be described more fully hereinafter with reference to the accompanying drawings, in which it is shown, and in which it is evident that the embodiments described are exemplary only of one area of the application, and not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
In order that the above-recited objects, features and advantages of the present application will become more readily apparent, a more particular description of the invention briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings.
As described in the background section, the SHJ cell is receiving a great deal of attention as the next generation ultra-efficient solar cell technology following the PERC cell, but the current SHJ cell cannot be mass-produced and industrially popularized due to its own structure.
In addition, when the intrinsic amorphous silicon film is deposited on the surface of the crystalline silicon substrate, the lattice mismatch at the interface between the intrinsic amorphous silicon and the substrate and the epitaxial growth of the intrinsic amorphous silicon film generate serious surface defect states, so that the recombination centers at the interface between the intrinsic amorphous silicon and the substrate are increased, the photoelectric conversion efficiency of the SHJ battery is influenced, the uncontrollability in the manufacturing process of the SHJ battery is also increased, the manufacturing process difficulty of the SHJ battery is increased, and the mass production and the industrialized popularization of the SHJ battery are influenced.
Based on the foregoing, the present application provides a method for preparing a solar cell, as shown in fig. 1, fig. 1 is a flowchart of a method for preparing a solar cell provided in the present application, for preparing a silicon-based heterojunction solar cell (SHJ cell), where the method for preparing the solar cell comprises:
s1: as shown in fig. 2, a substrate 100 is provided. Alternatively, the substrate 100 may be a monocrystalline silicon wafer. The specific process of step S1 is as follows: the substrate 100 is chemically cleaned, then the surface is textured to form pyramid-shaped concave-convex structures capable of improving light absorption on the upper and lower surfaces of the substrate 100, and then the chemical cleaning is performed again to form a clean surface.
S2: as shown in fig. 3, a first silicon layer 210 is formed on the upper surface of the substrate 100, and the first silicon layer 210 includes an N-type doped silicon layer 211, wherein the N-type doped silicon layer 211 refers to a silicon layer doped with N-type atoms. The specific process of step S2 is as follows: the textured and cleaned substrate 100 is placed in a deposition apparatus, and the first silicon layer 210 and the second silicon layer 220 are deposited by a deposition process such as PECVD, so as to form the first silicon layer 210 and the second silicon layer 220 on the upper and lower surfaces of the substrate 100, respectively.
S3: as shown in fig. 4, a second silicon layer 220 is formed on the lower surface of the substrate 100, and the second silicon layer 220 includes a P-type doped silicon layer 221, wherein the P-type doped silicon layer 221 refers to a silicon layer doped with P-type atoms.
S4: the N-type doped silicon layer 211 and the P-type doped silicon layer 221 are perturbed by a predetermined beam, so that the N-type doped silicon layer 211 and the P-type doped silicon layer 221 are structurally reconstructed.
S5: after the structures of the N-doped silicon layer 211 and the P-doped silicon layer 221 are reconfigured, as shown in fig. 5, a first conductive layer 310 and a first electrode 410 are sequentially formed on a side of the N-doped silicon layer 211 facing away from the substrate 100, and a second conductive layer 320 and a second electrode 420 are sequentially formed on a side of the P-doped silicon layer 221 facing away from the substrate. That is, after the structures of the N-type doped silicon layer 211 and the P-type doped silicon layer 221 are reconfigured, the stacked first conductive layer 310 and first electrode 410 are sequentially formed in the direction in which the N-type doped silicon layer 211 is away from the substrate 100, and the stacked second conductive layer 320 and second electrode 420 are sequentially formed in the direction in which the P-type doped silicon layer 221 is away from the substrate 100. In step S5, the specific process of sequentially forming the stacked first conductive layer 310 and first electrode 410 in the direction of the N-doped silicon layer 211 away from the substrate 100 is as follows: after the N-type doped silicon layer 211 and the P-type doped silicon layer 221 are disturbed, a first conductive layer 310 is deposited on the side of the N-type doped silicon layer 211 away from the substrate 100 by using a deposition process, and then a first electrode 410 is manufactured by using processes such as screen printing, electroplating or ink-jet printing; the specific process of sequentially forming the stacked second conductive layer 320 and second electrode 420 in the direction of the P-type doped silicon layer 221 away from the substrate 100 is: after the N-doped silicon layer 211 and the P-doped silicon layer 221 are perturbed, a second conductive layer 320 is deposited on the side of the P-doped silicon layer 221 facing away from the substrate 100 by using a deposition process, and then a second electrode 420 is fabricated by using a screen printing process, an electroplating process, an inkjet printing process, or the like.
The N-type doped silicon layer 211 and the P-type doped silicon layer 221 are amorphous silicon films, in which many free H atoms exist, and many Si-H, si-H atoms also exist 2 、SiH 3 ～H、Si～H 4 Chemical bonds such as Si-Si, si-P, si-B, B-H, P-H bonds, hanging bonds and the like, which are weak chemical bonds, and bond breaking can be performed through external disturbance. Therefore, when the amorphous silicon film is disturbed by the outside, the amorphous silicon film can generate structural reconstruction, the chemical bonds in the amorphous silicon film can be broken, and H atoms can be diffused or jumped, so that coordination numbers of the surrounding environment can be changed, the probability of doping atoms being doped into the amorphous silicon film is increased, and the effective doping of the amorphous silicon film is improved. Therefore, the preparation method provided by the application utilizes the preset light beam to disturb the formed N-type doped silicon layer 211 and the P-type doped silicon layer 221, so that the N-type doped silicon layer 211 and the P-type doped silicon layer 221 can be caused to have structural reconstruction, the doping efficiency of the N-type doped silicon layer 211 and the P-type doped silicon layer 221 can be further effectively improved, the number of carriers in the N-type doped silicon layer 211 and the P-type doped silicon layer 221 is increased, the carrier concentration is improved, the photoelectric conversion efficiency of the SHJ battery is improved, and the mass production and the industrialized popularization of the SHJ battery are facilitated.
For step S4, in one embodiment of the present application, perturbation of the N-type doped silicon layer 211 and the P-type doped silicon layer 221 with a predetermined beam includes:
as shown in fig. 6, the whole of the substrate 100, the first silicon layer 210, and the second silicon layer 220 is placed in a preset light environment.
The N-type doped silicon layer 211 and the P-type doped layer 221 are perturbed for a predetermined time by the predetermined light beam in the predetermined light environment.
Wherein the value range of the preset time is 10 s-100 s, and the value range comprises the endpoint value.
Specifically, the stacked structure formed by the substrate 100, the first silicon layer 210, and the second silicon layer 220 is placed in a preset light environment, and the light source 1 and the light source 2 in the preset light environment emit preset light beams to disturb the N-type doped silicon layer 211 and the P-type doped silicon layer 221, so as to optically modify the N-type doped silicon layer 211 and the P-type doped silicon layer 221, so that the N-type doped silicon layer 211 and the P-type doped silicon layer 221 are structurally reconstructed.
It should be noted that, the value of the preset time is not limited in this application, and in other embodiments of this application, the value of the preset time may also be other values, which is specific according to circumstances.
Optionally, on the basis of the foregoing embodiment, in one embodiment of the present application, the preset light beam intensity ranges from 1sun to 100sun (from 1 sunlight intensity to 10 sunlight intensities), including an endpoint value; the ratio of the target beam in the preset beam is 20% -50%, wherein the target beam comprises an endpoint value, and the wavelength of the target beam is less than 500nm; the irradiation area of the preset light beam is at least 1.2 times of the size of the substrate 100; the temperature of the preset light environment is less than 300 ℃. However, the values are not limited to the above values, and may be specific as occasion demands.
As shown in fig. 7, in one embodiment of the present application, the first silicon layer 210 further includes a first intrinsic silicon layer 212, the first intrinsic silicon layer 212 is located between the substrate 100 and the N-type doped silicon layer 211, and the second silicon layer 220 further includes a second intrinsic silicon layer 222, the second intrinsic silicon layer 222 is located between the substrate 100 and the P-type doped silicon layer 221. Based on this, the preparation method further comprises:
s6: the first and second intrinsic silicon layers 212 and 222 are perturbed by the preset beam so that the first and second intrinsic silicon layers 212 and 222 are structurally reconstructed.
When an intrinsic amorphous silicon film is deposited on the surface of a known crystalline silicon substrate, a serious surface defect state is generated at the interface of amorphous silicon and crystalline silicon, so that the recombination center at the interface of the intrinsic amorphous silicon and the substrate is increased, and the photoelectric conversion efficiency of the SHJ battery is affected. The first intrinsic silicon layer 212 and the second intrinsic silicon layer 222 are also amorphous silicon films, and can be reconstructed by using external disturbance. Thus, in this embodiment, the method further includes perturbing the first and second intrinsic silicon layers 212 and 222 with a predetermined beam, i.e., optically modifying the first and second intrinsic silicon layers 212 and 222 with a predetermined beam, such that the first and second intrinsic silicon layers 212 and 222 are structurally reconfigured. However, when the first intrinsic silicon layer 212 and the second intrinsic silicon layer 222 are structurally reconfigured, the chemical bonds are broken, and the H atoms jump along the dangling bonds, so that the H atoms diffuse to the interface between the crystalline silicon and the amorphous silicon, i.e. the H atoms diffuse to the interface between the first intrinsic silicon layer 212 and the substrate 100 and diffuse to the interface between the second intrinsic silicon layer 222 and the substrate 100, so as to combine with the dangling bonds of the interface, reduce the dangling bond density, reduce the number of recombination centers at the interface, improve the carrier recombination efficiency, and further improve the photoelectric conversion efficiency. Meanwhile, the number of composite centers at the interface is reduced, uncontrollability in the manufacturing process of the SHJ battery is also reduced, the requirements on the preparation process are further reduced, the production stability and the product yield are effectively improved, and the mass production and the industrialized popularization of the SHJ battery are facilitated.
It should be noted that the photo-modification treatment of the first intrinsic silicon layer 212 and the second intrinsic silicon layer 222 may be performed in the same step as the photo-modification treatment of the N-type doped silicon layer 211 and the P-type doped silicon layer 221, or may be performed in two steps, as the case may be. When the optical modification treatment is performed on the N-type doped silicon layer 211 and the P-type doped silicon layer 221 on the upper and lower surfaces of the substrate 100, the optical modification treatment may be performed simultaneously or sequentially, wherein if the optical modification treatment is performed on the N-type doped silicon layer 211 and the P-type doped silicon layer 221 in two steps, the sequence of the optical modification treatment on the N-type doped silicon layer 211 and the P-type doped silicon layer 221 is not limited, and is specifically determined according to the situation.
As shown in fig. 8, fig. 8 is a graph showing the output characteristics of the SHJ battery prepared by the preparation method of the present application compared with that of a conventional SHJ battery, where (1) in fig. 8 represents a graph showing the comparison of photoelectric conversion efficiency, (2) represents a graph showing the comparison of open circuit voltage, (3) represents a graph showing the comparison of short circuit current, and (4) represents a graph showing the comparison of fill factor, as can be seen from fig. 8, the output characteristics of the SHJ battery subjected to the optical modification treatment are better improved, wherein the photoelectric conversion efficiency is improved by more than 0.4%, the open circuit voltage is improved by more than 3mV, and the fill factor is improved by more than 1%.
In order to more clearly understand the preparation method of the solar cell provided by the application, the preparation method is described in detail below through three specific examples.
Example 1
Providing an N-type monocrystalline silicon wafer as a substrate 100, firstly, performing surface texturing and chemical cleaning on the substrate 100 to form a pyramid concave-convex structure capable of improving light absorption on the surface of the substrate 100, and then performing chemical cleaning again to form an ultra-clean surface. Then, a first intrinsic silicon layer 212 and an N-type doped silicon layer are sequentially deposited on the upper surface of the substrate 100 using a PECVD deposition process, and a second intrinsic silicon layer 222 and a P-type doped silicon layer 221 are sequentially deposited on the lower surface of the substrate 100. When the stacked structure composed of the substrate 100, the first intrinsic silicon layer 212, the second intrinsic silicon layer 222, the N-type doped silicon layer 211 and the P-type doped silicon layer 221 is placed under a light source device to perform light modification treatment, and the N-type doped silicon layer 211 on the upper surface of the substrate 100 and the P-type doped silicon layer 221 on the lower surface are subjected to light modification treatment, the light modification treatment of the N-type doped silicon layer 211 and the P-type doped silicon layer 221 may be performed simultaneously or may be performed step by step. Then, a first conductive layer 310 and a first electrode 410 are sequentially formed on the surface of the N-type doped silicon layer 211, and a second conductive layer 310 and a second electrode 420 are sequentially formed on the surface of the p-type doped silicon layer.
Example two
Providing an N-type monocrystalline silicon wafer as a substrate 100, firstly, performing surface texturing and chemical cleaning on the substrate 100 to form a pyramid concave-convex structure capable of improving light absorption on the surface of the substrate 100, and then performing chemical cleaning again to form an ultra-clean surface. Then, a first intrinsic silicon layer 212 and an N-type doped silicon layer 211 are sequentially deposited on the upper surface of the substrate 100 using a PECVD deposition process, and a second intrinsic silicon layer 222 and a P-type doped silicon layer 221 are sequentially deposited on the lower surface of the substrate 100 using a PECVD deposition process. The stacked structure composed of the substrate 100, the first intrinsic silicon layer 212, the second intrinsic silicon layer 222, the N-type doped silicon layer 211 and the P-type doped silicon layer 221 is placed under a light source device to perform light modification treatment, and when the first intrinsic silicon layer 212 and the N-type doped silicon layer 211 on the upper surface of the substrate 100 are subjected to light modification treatment, and the second intrinsic silicon layer 221 and the P-type doped silicon layer 221 on the lower surface of the substrate 100 are subjected to light modification treatment, the light modification treatment may be performed simultaneously or stepwise. Then, a first conductive layer 310 and a first electrode 410 are sequentially formed on the surface of the N-type doped silicon layer 211, and a second conductive layer 310 and a second electrode 420 are sequentially formed on the surface of the p-type doped silicon layer. After that
Example III
Providing an N-type monocrystalline silicon wafer as a substrate 100, firstly, performing surface texturing and chemical cleaning on the substrate 100 to form a pyramid concave-convex structure capable of improving light absorption on the surface of the substrate 100, and then performing chemical cleaning again to form an ultra-clean surface. A first intrinsic silicon layer 212 is then sequentially deposited on the upper surface of the substrate 100 using a PECVD deposition process, and a second intrinsic silicon layer 222 is formed on the lower surface of the substrate 100. The stacked structure composed of the substrate 100, the first intrinsic silicon layer 212, and the second intrinsic silicon layer 222 is placed under a light source device to perform light modification treatment, and the first intrinsic silicon layer 212 on the upper surface and the second intrinsic silicon layer 222 on the lower surface of the substrate 100 are subjected to light modification treatment, and the light modification treatment can be performed simultaneously or stepwise. Then, an N-type doped silicon layer 211, a first conductive layer 310, and a first electrode 410 are sequentially formed on the surface of the first intrinsic silicon layer 212, and a P-type doped silicon layer 221, a second conductive layer 310, and a second electrode 420 are sequentially formed on the surface of the second intrinsic silicon layer 222.
Correspondingly, the application also provides a solar cell, which is prepared by the preparation method of any embodiment, and particularly a SHJ cell. As shown in fig. 5, the solar cell includes:
a substrate 100, which is a monocrystalline silicon wafer.
A first silicon layer 210 on the upper surface of the substrate 100, wherein the first silicon layer 210 includes an N-type doped silicon layer 211;
a first conductive layer 310 and a first electrode 410 are sequentially stacked on the side of the N-type doped silicon layer 211 facing away from the substrate 100.
A second silicon layer 220 located on the lower surface of the substrate 100, wherein the second silicon layer 220 includes a P-type doped silicon layer 221.
A second conductive layer 320 and a second electrode 420 are sequentially stacked on the side of the P-type doped silicon layer 221 facing away from the substrate 100.
The N-doped silicon layer 211 and the P-doped silicon layer 221 are silicon layers after being reconstructed by a predetermined beam disturbance.
As can be seen from the above, the N-doped silicon layer 211 and the P-doped silicon layer 221 of the solar cell are silicon layers after the reconstruction by the preset beam disturbance, that is, the N-doped silicon layer 211 and the P-doped silicon layer 221 of the solar cell are silicon layers after the light modification treatment, so the N-doped silicon layer 211 and the P-doped silicon layer 221 have higher doping efficiency, thereby improving the carrier concentrations of the N-doped silicon layer 211 and the P-doped silicon layer 221, so as to be beneficial to improving the photoelectric conversion efficiency of the SHJ cell, and further being beneficial to mass production and industrialized popularization of the SHJ cell.
Based on the foregoing embodiments, in one embodiment of the present application, the microstructure of the N-doped silicon layer 211 is at least one of amorphous, nanocrystalline, and microcrystalline, and the thickness thereof ranges from 5nm to 15nm, including the end point values. The microstructure of the P-type doped silicon layer 221 is at least one of amorphous, nanocrystalline and microcrystalline, and the thickness thereof ranges from 5nm to 15nm, including the end point values. The N-type doped silicon layer 211 may be at least one of amorphous silicon, amorphous silicon oxide, and amorphous silicon carbon, and the P-type doped silicon layer 221 may be at least one of amorphous silicon, amorphous silicon oxide, and amorphous silicon carbon.
As shown in fig. 7, in one embodiment of the present application, the first silicon layer 210 further includes a first intrinsic silicon layer 212, the first intrinsic silicon layer 212 is located between the substrate 100 and the N-type doped silicon layer 211, and the second silicon layer 220 further includes a second intrinsic silicon layer 222, the second intrinsic silicon layer 222 is located between the substrate 100 and the P-type doped silicon layer 221.
The first intrinsic silicon layer 212 and the second intrinsic silicon layer 222 are silicon layers after the reconstruction by the preset beam disturbance, that is, the first intrinsic silicon layer 212 and the second intrinsic silicon layer 222 are silicon layers after the light modification treatment.
As can be seen from the above, the first intrinsic silicon layer 212 and the second intrinsic silicon layer 222 in the solar cell are silicon layers subjected to light modification treatment, so that H atoms can diffuse to the interface between crystalline silicon and amorphous silicon, i.e. H atoms can diffuse to the interface between the first intrinsic silicon layer 212 and the substrate 100 and diffuse to the interface between the second intrinsic silicon layer 222 and the substrate 100, and further combine with dangling bonds of the interface, thereby reducing the density of the dangling bonds, reducing the number of recombination centers at the interface, improving the carrier recombination efficiency, and further improving the photoelectric conversion efficiency. Meanwhile, the number of composite centers at the interface is reduced, uncontrollability in the manufacturing process of the SHJ battery is also reduced, the requirements on the process are further reduced, the production stability and the product yield are effectively improved, and the mass production and the industrialized popularization of the SHJ battery are facilitated.
Based on the above embodiments, in one embodiment of the present application, the microstructure of the first intrinsic silicon layer 212 is at least one of amorphous, nanocrystalline, and microcrystalline, and the thickness thereof ranges from 3nm to 10nm, including the end point values. The microstructure of the second intrinsic silicon layer 222 is at least one of amorphous, nanocrystalline, and microcrystalline, and the thickness thereof ranges from 3nm to 10nm, including the end point values. The first intrinsic silicon layer 212 may be at least one of amorphous silicon, amorphous silicon oxide, and amorphous silicon carbon, and the second intrinsic silicon layer 222 may be at least one of amorphous silicon, amorphous silicon oxide, and amorphous silicon carbon.
For the conductive layer in the solar cell provided in the present application, in one embodiment of the present application, the first conductive layer 310 is a transparent conductive layer, specifically may be a transparent conductive oxide film, whose optical transmittance is greater than 90%, optical reflectance is less than 3.5%, and the thickness has a value ranging from 80nm to 120nm, including an endpoint value, and the square resistance has a value ranging from 30ohm/sq to 150ohm/sq, including an endpoint value. The transparent conductive layer of the second conductive layer 320 may be a transparent conductive oxide film, wherein the optical transmittance of the transparent conductive oxide film is greater than 90%, the thickness of the transparent conductive layer ranges from 80nm to 120nm, inclusive, and the square resistance ranges from 30ohm/sq to 150ohm/sq, inclusive. The first conductive layer 310 is a conductive layer on a side receiving solar rays, so that an optical reflectivity thereof is less than 3.5%.
Based on the solar cell, the application also provides photovoltaic equipment, and the photovoltaic equipment comprises the solar cell in any embodiment.
In summary, the present application provides a method for preparing a solar cell, and a photovoltaic device, where the method for preparing the solar cell comprises: and respectively forming a first silicon layer and a second silicon layer on the upper surface and the lower surface of the substrate, carrying out disturbance reconstruction on the N-type doped silicon layer in the first silicon layer and the P-type doped silicon layer in the second silicon layer by utilizing a preset light beam, sequentially forming a first conductive layer and a first electrode on the surfaces of the N-type doped silicon layer and the P-type doped silicon layer, and sequentially forming a second conductive layer and a second electrode on the surfaces of the P-type doped silicon layer. Therefore, the preparation method carries out light modification treatment on the N-type doped silicon layer and the P-type doped silicon layer, can promote the structural reconstruction of the N-type doped silicon layer and the P-type doped silicon layer, further can effectively improve the doping efficiency of the N-type doped silicon layer and the P-type doped silicon layer, increases the number of carriers in the N-type doped silicon layer and the P-type doped silicon layer, further improves the carrier concentration, and is beneficial to improving the photoelectric conversion efficiency of the SHJ battery, and further is beneficial to mass production and industrialized popularization of the SHJ battery.
In the present specification, each embodiment is described in a progressive manner, or a parallel manner, or a combination of progressive and parallel manners, and each embodiment is mainly described as different from other embodiments, and the same similar areas between the embodiments are referred to each other. For the device disclosed in the embodiment, since the device corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method area.
It should be noted that, in the description of the present application, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "top", "bottom", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the apparatus or element to be referred to must have a specific direction, be configured and operated in the specific direction, and thus should not be construed as limiting the present application. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present.
It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in an article or apparatus that comprises such element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A method of manufacturing a solar cell, comprising:
providing a substrate;
forming a first silicon layer on the upper surface of the substrate, wherein the first silicon layer comprises an N-type doped silicon layer;
forming a second silicon layer on the lower surface of the substrate, wherein the second silicon layer comprises a P-type doped silicon layer; wherein the upper surface and the lower surface of the substrate are two opposite surfaces;
disturbing the N-type doped silicon layer and the P-type doped silicon layer by using a preset light beam so as to reconstruct the structures of the N-type doped silicon layer and the P-type doped silicon layer;
after the structures of the N-type doped silicon layer and the P-type doped silicon layer are reconstructed, a first conductive layer and a first electrode are sequentially formed on one side, away from the substrate, of the N-type doped silicon layer, and a second conductive layer and a second electrode are sequentially formed on one side, away from the substrate, of the P-type doped silicon layer.
2. The method of claim 1, wherein perturbing the N-doped silicon layer and the P-doped silicon layer with a predetermined beam comprises:
placing the whole formed by the substrate, the first silicon layer and the second silicon layer in a preset light environment;
the N-type doped silicon layer and the P-type doped silicon layer are disturbed for a preset time by utilizing the preset light beam in the preset light environment;
the value range of the preset time is 10 s-100 s, including the endpoint value.
3. The method for manufacturing a solar cell according to claim 2, wherein the intensity of the preset beam has a value ranging from 1sun to 100sun, including an end point value;
the ratio of the target beam in the preset beam is 20% -50%, the end point value is included, and the wavelength of the target beam is smaller than 500nm;
the irradiation area of the preset light beam is at least 1.2 times of the size of the substrate;
the temperature of the preset light environment is less than 300 ℃.
4. The method of claim 1, wherein the first silicon layer further comprises a first intrinsic silicon layer, the first intrinsic silicon layer being located between the substrate and the N-doped silicon layer; the second silicon layer comprises a second intrinsic silicon layer, and the second intrinsic silicon layer is positioned between the substrate and the P-type doped silicon layer; the preparation method also comprises the following steps:
and disturbing the first and second intrinsic silicon layers by using the preset light beam so as to reconstruct the structures of the first and second intrinsic silicon layers.
5. A solar cell manufactured by the manufacturing method according to any one of claims 1 to 4, comprising:
a substrate;
a first silicon layer on the upper surface of the substrate, wherein the first silicon layer comprises an N-type doped silicon layer,
a first conductive layer and a first electrode which are sequentially laminated on one side of the N-type doped silicon layer, which is away from the substrate;
the second silicon layer is positioned on the lower surface of the substrate and comprises a P-type doped silicon layer;
a second conductive layer and a second electrode which are sequentially arranged on one side of the P-type doped silicon layer, which is away from the substrate; the upper surface and the lower surface of the substrate are two opposite surfaces;
the N-type doped silicon layer and the P-type doped silicon layer are silicon layers reconstructed by preset light beam disturbance.
6. The solar cell according to claim 5, wherein the N-doped silicon layer has at least one of amorphous, nanocrystalline, and microcrystalline structure, and the thickness thereof ranges from 5nm to 15nm, inclusive;
the structure of the P-type doped silicon layer is at least one of amorphous, nanocrystalline and microcrystal, and the thickness of the P-type doped silicon layer ranges from 5nm to 15nm, including the end point value.
7. The solar cell of claim 5, wherein the first silicon layer further comprises a first intrinsic silicon layer, the first intrinsic silicon layer being located between the substrate and the N-doped silicon layer;
the second silicon layer further comprises a second intrinsic silicon layer located between the substrate and the P-type doped silicon layer;
the first intrinsic silicon layer and the second intrinsic silicon layer are silicon layers after being subjected to disturbance reconstruction of the preset light beam.
8. The solar cell according to claim 7, wherein the first intrinsic silicon layer has at least one of amorphous, nanocrystalline, and microcrystalline structure, and the thickness thereof ranges from 3nm to 10nm, inclusive;
the second intrinsic silicon layer has at least one of amorphous, nanocrystalline and microcrystal structure, and the thickness of the second intrinsic silicon layer ranges from 3nm to 10nm, including the end point value.
9. The solar cell of claim 5, wherein the first conductive layer is a transparent conductive layer, has an optical transmittance of greater than 90%, an optical reflectance of less than 3.5%, and a thickness ranging from 80nm to 120nm inclusive, and a sheet resistance ranging from 30ohm/sq to 150ohm/sq inclusive;
the second conductive layer is a transparent conductive layer, the optical transmittance is more than 90%, the thickness range is 80-120 nm and comprises an end point value, and the square resistance range is 30-150 ohm/sq and comprises an end point value.
10. A photovoltaic device comprising a solar cell according to any one of the preceding claims 5-9.
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