CN117809562A - Pixel circuit, display device and driving method - Google Patents
Pixel circuit, display device and driving method Download PDFInfo
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- CN117809562A CN117809562A CN202211175075.4A CN202211175075A CN117809562A CN 117809562 A CN117809562 A CN 117809562A CN 202211175075 A CN202211175075 A CN 202211175075A CN 117809562 A CN117809562 A CN 117809562A
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- 238000004146 energy storage Methods 0.000 claims abstract description 53
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Abstract
The invention provides a pixel circuit, a display device and a driving method. The pixel circuit comprises a light emitting element, a driving circuit, a switching control circuit, a current source, a first energy storage circuit and a reset circuit; the current source is used for outputting driving current through a current output end of the current source; the reset circuit provides driving current to the control end of the driving circuit and the second end of the driving circuit under the control of a reset control signal; the switch control circuit controls the potential of the switch control end according to the control voltage and the data voltage; the switch circuit controls the connection or disconnection between the second end of the driving circuit and the light emitting element under the control of the potential of the switch control end. The invention can improve the uneven display brightness.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a pixel circuit, a display device, and a driving method.
Background
When the related pixel circuit is in operation, a problem of uneven display brightness occurs due to IR drop (IR drop refers to a phenomenon that voltage drops or increases on power and ground networks in an integrated circuit).
Disclosure of Invention
The main object of the present invention is to provide a pixel circuit, a display device and a driving method, which solve the problem of uneven display brightness caused by IR drop (IR drop refers to a phenomenon that voltage drops or rises on power and ground networks in an integrated circuit)
In one aspect, an embodiment of the present invention provides a pixel circuit including a light emitting element, a driving circuit, a switching control circuit, a current source, a first tank circuit, and a reset circuit, wherein,
a first end of the driving circuit is electrically connected with a first voltage line; the driving circuit is used for driving the light-emitting element;
the current source is used for outputting driving current through a current output end of the current source;
the reset circuit is electrically connected with the reset control line, the control end of the drive circuit, the second end of the drive circuit and the current output end and is used for providing the drive current to the control end of the drive circuit and the second end of the drive circuit under the control of a reset control signal provided by the reset control line;
the first end of the first energy storage circuit is electrically connected with the control end of the driving circuit, the second end of the first energy storage circuit is electrically connected with the first voltage line, and the first energy storage circuit is used for storing electric energy;
The switch control circuit is respectively and electrically connected with the switch control end, the control voltage end and the data line and is used for controlling the potential of the switch control end according to the control voltage provided by the control voltage end and the data voltage provided by the data line;
the control end of the switch circuit is electrically connected with the switch control end, the first end of the switch circuit is electrically connected with the second end of the driving circuit, the second end of the switch circuit is electrically connected with the light-emitting element, and the switch circuit is used for controlling the connection or disconnection between the second end of the driving circuit and the light-emitting element under the control of the potential of the switch control end.
Optionally, the reset circuit includes a first transistor and a second transistor, and the driving circuit includes a driving transistor;
the control electrode of the first transistor is electrically connected with the reset control line, the first electrode of the first transistor is electrically connected with the second electrode of the driving transistor, and the second electrode of the first transistor is electrically connected with the current output end of the current source;
the control electrode of the second transistor is electrically connected with the reset control line, the first electrode of the second transistor is electrically connected with the control electrode of the driving transistor, and the second electrode of the second transistor is electrically connected with the second electrode of the driving transistor;
The first electrode of the driving transistor is electrically connected to the first voltage line.
Optionally, the switching circuit includes a third transistor, and the first tank circuit includes a first capacitor;
a control electrode of the third transistor is electrically connected with the switch control end, a first electrode of the third transistor is electrically connected with a second electrode of the driving transistor, and a second electrode of the third transistor is electrically connected with the light emitting element;
the first end of the first capacitor is electrically connected with the control electrode of the driving transistor, and the second end of the first capacitor is electrically connected with the first voltage line.
Optionally, the switch control circuit includes a second energy storage circuit, a third energy storage circuit, a data writing circuit, a first control circuit and a second control circuit;
the first end of the second energy storage circuit is electrically connected with the control voltage end, the second end of the second energy storage circuit is electrically connected with the control end of the first control circuit, and the second energy storage circuit is used for storing electric energy;
the data writing circuit is respectively and electrically connected with a first scanning line, a data line and a control end of the first control circuit and is used for writing data voltage provided by the data line into the control end of the first control circuit under the control of a first scanning signal provided by the first scanning line;
The first end of the third energy storage circuit is electrically connected with a second voltage line, the second end of the third energy storage circuit is electrically connected with the control end of the second control circuit, and the third energy storage circuit is used for storing electric energy;
the second control circuit is respectively and electrically connected with a reset control line, a first voltage line and the switch control end and is used for controlling the connection or disconnection between the first voltage line and the switch control end under the control of a reset control signal provided by the reset control line;
the first end of the first control circuit is electrically connected with a third voltage line, the second end of the first control circuit is electrically connected with the switch control end, and the first control circuit is used for controlling the third voltage signal provided by the third voltage line to be written into the switch control end under the control of the potential of the control end of the first control circuit.
Optionally, the data writing circuit includes a fourth transistor, the first control circuit includes a fifth transistor, and the second control circuit includes a sixth transistor;
the control electrode of the fourth transistor is electrically connected with the first scanning line, the first electrode of the fourth transistor is electrically connected with the data line, and the second electrode of the fourth transistor is electrically connected with the control electrode of the fifth transistor;
A first pole of the fifth transistor is electrically connected with the third voltage line, and a second pole of the fifth transistor is electrically connected with the switch control terminal;
the control electrode of the sixth transistor is electrically connected with the reset control line, the first electrode of the sixth transistor is electrically connected with the first voltage line, and the second electrode of the sixth transistor is electrically connected with the switch control end.
Optionally, the second tank circuit includes a second capacitor, and the third tank circuit includes a third capacitor;
the first end of the second capacitor is electrically connected with the control voltage end, and the second end of the second capacitor is electrically connected with the control end of the first control circuit;
the first end of the third capacitor is electrically connected with a second voltage line, and the second end of the third capacitor is electrically connected with the control end of the second control circuit.
Optionally, the reset control line is a first scan line of an adjacent previous stage.
Optionally, the switch control circuit includes a comparator, a write control circuit, and a fourth tank circuit;
the reset control line is a first scanning line;
the writing control circuit is respectively and electrically connected with a first scanning line, a data line and an inverting input end of the comparator and is used for writing data voltage provided by the data line into the inverting input end of the comparator under the control of a first scanning signal provided by the first scanning line;
The non-inverting input end of the comparator is electrically connected with the control voltage end, the output end of the comparator is electrically connected with the switch control end, and the comparator is used for providing a low-voltage signal for the switch control end when the voltage value of the data voltage is larger than the voltage value of the control voltage provided by the control voltage end, and providing a high-voltage signal for the switch control end when the voltage value of the data voltage is smaller than the voltage value of the control voltage;
the first end of the fourth energy storage circuit is electrically connected with the inverting input end of the comparator, and the second end of the fourth energy storage circuit is electrically connected with a second voltage line.
Optionally, the write control circuit includes a seventh transistor;
the control electrode of the seventh transistor is electrically connected with the first scanning line, the first electrode of the seventh transistor is electrically connected with the data line, and the second electrode of the seventh transistor is electrically connected with the inverting input end of the comparator.
Optionally, the fourth tank circuit includes a fourth capacitor;
the first end of the fourth capacitor is electrically connected with the inverting input end of the comparator, and the second end of the fourth capacitor is electrically connected with a second voltage line.
In a second aspect, an embodiment of the present invention provides a display device including a plurality of rows and a plurality of columns of the pixel circuits described above.
In a third aspect, an embodiment of the present invention provides a driving method, which is applied to the above display device, where a display period includes a reset phase and a light-emitting phase that are sequentially set; the driving method includes:
in a reset stage, the current source is used for outputting a driving current to the reset circuit through the current output end of the current source, and the reset circuit supplies the driving current to the control end of the driving circuit and the second end of the driving circuit under the control of a reset control signal so as to charge the first energy storage circuit until the driving circuit supplies the driving current, and the first energy storage circuit is stopped being charged;
in the light-emitting stage, the switch control circuit controls the potential of the switch control end according to the control voltage provided by the control voltage end and the data voltage provided by the data line; the switch circuit controls the connection or disconnection between the second end of the driving circuit and the light-emitting element under the control of the potential of the switch control end.
Optionally, the switch control circuit includes a second energy storage circuit, a third energy storage circuit, a data writing circuit, a first control circuit and a second control circuit; the display period also includes a data writing stage disposed between the reset stage and the light-emitting stage; the driving method includes:
In a data writing stage, a data line provides a data voltage, and the data writing circuit writes the data voltage into a control end of the first control circuit under the control of a first scanning signal;
in the light-emitting stage, the control voltage end provides a control voltage to the first end of the second energy storage circuit, the voltage value of the control voltage is gradually reduced to control the potential of the control end of the first control circuit to be gradually reduced, when the potential of the control end of the first control circuit is reduced to a preset voltage value, the first control circuit controls writing of a third voltage signal into the switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
Optionally, in the data writing stage, the pixel circuits of the display device include a plurality of rows, and the data voltages provided by the corresponding data lines are written into the control ends of the first control circuits included in the pixel circuits under the control of the first scanning signals of the corresponding rows in sequence.
Optionally, the switch control circuit includes a comparator, a write control circuit, and a fourth tank circuit; the reset control line is a first scanning line; the driving method further includes:
In the reset stage, the write control circuit writes the data voltage provided by the data line into the inverting input end of the comparator under the control of the first scanning signal provided by the first scanning line;
in the light-emitting stage, a control voltage end provides a control voltage to a first end of the fourth energy storage circuit, the voltage value of the control voltage is gradually reduced until the voltage value of the data voltage is larger than the voltage value of the control voltage, the comparator provides a low-voltage signal for a switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
The invention can avoid the problem of uneven display brightness caused by IR drop (IR drop refers to a phenomenon that the voltage on a power supply and a ground network in an integrated circuit is reduced or increased).
Drawings
Fig. 1 is a block diagram of a pixel circuit according to an embodiment of the present invention;
FIG. 2 is a block diagram of a pixel circuit according to at least one embodiment of the invention;
FIG. 3 is a circuit diagram of a pixel circuit according to at least one embodiment of the invention;
FIG. 4 is a timing diagram illustrating operation of at least one embodiment of the pixel circuit shown in FIG. 3 according to the present invention;
FIG. 5 is a timing diagram illustrating operation of at least one embodiment of the pixel circuit shown in FIG. 3 according to the present invention;
FIG. 6 is a circuit diagram of at least one embodiment of a constant current source;
FIG. 7 is a circuit diagram of a pixel circuit according to at least one embodiment of the invention;
FIG. 8 is a timing diagram illustrating operation of at least one embodiment of the pixel circuit shown in FIG. 7 according to the present invention;
FIG. 9 is a block diagram of a pixel circuit according to at least one embodiment of the invention;
FIG. 10 is a circuit diagram of a pixel circuit according to at least one embodiment of the invention;
FIG. 11 is a timing diagram illustrating operation of at least one embodiment of the pixel circuit shown in FIG. 10 according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics. In the embodiment of the invention, in order to distinguish the two poles of the transistor except the grid electrode, one pole is called a first pole, and the other pole is called a second pole.
In actual operation, when the transistor is a thin film transistor or a field effect transistor, the first electrode may be a drain electrode, and the second electrode may be a source electrode; alternatively, the first pole may be a source and the second pole may be a drain.
As shown in fig. 1, the pixel circuit according to the embodiment of the present invention includes a light emitting element E0, a driving circuit 10, a switching circuit 11, a switching control circuit 12, a current source SI, a first tank circuit 13, and a reset circuit 14, wherein,
a first end of the driving circuit 10 is electrically connected to a first voltage line V1; the driving circuit 10 is used for driving the light-emitting element E0;
the current source SI is used for outputting driving current through a current output end of the current source SI;
the reset circuit 14 is electrically connected to a reset control line R1, a control terminal of the driving circuit 10, a second terminal of the driving circuit 10, and a current output terminal of the current source SI, and is configured to provide the driving current to the control terminal of the driving circuit 10 and the second terminal of the driving circuit 10 under the control of a reset control signal provided by the reset control line R1;
A first end of the first energy storage circuit 13 is electrically connected with the control end of the driving circuit 10, a second end of the first energy storage circuit 13 is electrically connected with the first voltage line V1, and the first energy storage circuit 13 is used for storing electric energy;
the switch control circuit 12 is electrically connected with a switch control terminal Ct, a control voltage terminal Sweep and a Data line Data, and is used for controlling the potential of the switch control terminal Ct according to the control voltage provided by the control voltage terminal Sweep and the Data voltage provided by the Data line Data;
the control end of the switch circuit 11 is electrically connected with the switch control end Ct, the first end of the switch circuit 11 is electrically connected with the second end of the driving circuit 10, the second end of the switch circuit 11 is electrically connected with the light emitting element E0, and the switch circuit 11 is used for controlling the connection or disconnection between the second end of the driving circuit 10 and the light emitting element E0 under the control of the potential of the switch control end Ct.
In at least one embodiment of the present invention, the first voltage line V1 may be a high voltage line, but is not limited thereto.
When the pixel circuit of the embodiment of the invention is in operation, in the light emitting stage, the driving current of the driving circuit 10 for driving the light emitting element E0 to emit light is the driving current of the current source SI output through the current output end thereof, and the communication time between the second end of the driving circuit 10 and the light emitting element E0 is controlled by the switching circuit 11 to adjust the brightness. The pixel circuit of the embodiment of the invention can avoid the problem of uneven display brightness caused by IR drop (IR drop refers to a phenomenon that the voltage on a power supply and a ground network in an integrated circuit is reduced or increased).
The embodiment of the invention provides a driving scheme of current combined with PWM (pulse width modulation) regulation, solves the problem of uneven brightness display of a silicon-based LED/glass-based LED caused by IR Drop, and can realize the function of multiple gray scales.
When the pixel circuit disclosed by the embodiment of the invention works, the display period comprises a reset stage and a light-emitting stage which are sequentially arranged;
in the reset stage, the current source SI is configured to output a driving current to the reset circuit 14 through the current output end thereof, and the reset circuit 14 provides the driving current to the control end of the driving circuit 10 and the second end of the driving circuit 10 under the control of the reset control signal, so as to charge the first tank circuit 13 until the driving circuit 10 provides the driving current, and stops charging the first tank circuit 13;
in the light emitting stage, the switch control circuit 12 controls the potential of the switch control terminal Ct according to the control voltage supplied from the control voltage terminal Sweep and the Data voltage supplied from the Data line Data; the switching circuit 11 controls the connection or disconnection between the second terminal of the driving circuit 10 and the light emitting element E0 under the control of the potential of the switching control terminal Ct.
In at least one embodiment of the present invention, the driving current for driving the light emitting element to emit light by the driving circuit 10 is provided by the current source SI, and is independent of the voltage value of the first voltage signal provided by the first voltage line V1, and thus is not affected by the IR Drop of the first voltage line V1.
Optionally, the reset circuit includes a first transistor and a second transistor, and the driving circuit includes a driving transistor;
the control electrode of the first transistor is electrically connected with the reset control line, the first electrode of the first transistor is electrically connected with the second electrode of the driving transistor, and the second electrode of the first transistor is electrically connected with the current output end of the current source;
the control electrode of the second transistor is electrically connected with the reset control line, the first electrode of the second transistor is electrically connected with the control electrode of the driving transistor, and the second electrode of the second transistor is electrically connected with the second electrode of the driving transistor;
the first electrode of the driving transistor is electrically connected to the first voltage line.
Optionally, the switching circuit includes a third transistor, and the first tank circuit includes a first capacitor;
a control electrode of the third transistor is electrically connected with the switch control end, a first electrode of the third transistor is electrically connected with a second electrode of the driving transistor, and a second electrode of the third transistor is electrically connected with the light emitting element;
the first end of the first capacitor is electrically connected with the control electrode of the driving transistor, and the second end of the first capacitor is electrically connected with the first voltage line.
In at least one embodiment of the present invention, the switch control circuit includes a second tank circuit, a third tank circuit, a data writing circuit, a first control circuit and a second control circuit;
the first end of the second energy storage circuit is electrically connected with the control voltage end, the second end of the second energy storage circuit is electrically connected with the control end of the first control circuit, and the second energy storage circuit is used for storing electric energy;
the data writing circuit is respectively and electrically connected with a first scanning line, a data line and a control end of the first control circuit and is used for writing data voltage provided by the data line into the control end of the first control circuit under the control of a first scanning signal provided by the first scanning line;
the first end of the third energy storage circuit is electrically connected with a second voltage line, the second end of the third energy storage circuit is electrically connected with the control end of the second control circuit, and the third energy storage circuit is used for storing electric energy;
the second control circuit is respectively and electrically connected with a reset control line, a first voltage line and the switch control end and is used for controlling the connection or disconnection between the first voltage line and the switch control end under the control of a reset control signal provided by the reset control line;
The first end of the first control circuit is electrically connected with a third voltage line, the second end of the first control circuit is electrically connected with the switch control end, and the first control circuit is used for controlling the third voltage signal provided by the third voltage line to be written into the switch control end under the control of the potential of the control end of the first control circuit.
In a specific implementation, the switch control circuit may include a second tank circuit, a third tank circuit, a data writing circuit, a first control circuit, and a second control circuit, and the display period may further include a data writing stage disposed between the reset stage and the light emitting stage;
in a data writing stage, a data line provides a data voltage, and the data writing circuit writes the data voltage into a control end of the first control circuit under the control of a first scanning signal;
in the light-emitting stage, the control voltage end provides a control voltage to the first end of the second energy storage circuit, the voltage value of the control voltage is gradually reduced to control the potential of the control end of the first control circuit to be gradually reduced, when the potential of the control end of the first control circuit is reduced to a preset voltage value, the first control circuit controls writing of a third voltage signal into the switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
As shown in fig. 2, on the basis of the embodiment of the pixel circuit shown in fig. 1, the switch control circuit includes a data writing circuit 21, a second tank circuit 22, a third tank circuit 23, a first control circuit 24, and a second control circuit 25;
a first end of the second tank circuit 22 is electrically connected to the control voltage end Sweep, a second end of the second tank circuit 22 is electrically connected to the control end of the first control circuit 24, and the second tank circuit 22 is used for storing electric energy;
the Data writing circuit 21 is electrically connected to the first scan line S (n), the Data line Data, and the control terminal of the first control circuit 24, and is configured to write the Data voltage provided by the Data line Data into the control terminal of the first control circuit 24 under the control of the first scan signal provided by the first scan line S (n);
the first end of the third tank circuit 23 is electrically connected to a second voltage line V2, the second end of the third tank circuit 23 is electrically connected to the control end of the second control circuit 25, and the third tank circuit 23 is used for storing electric energy;
the second control circuit 25 is electrically connected to the reset control line R1, the first voltage line V1, and the switch control terminal Ct, and is configured to control the connection or disconnection between the first voltage line V1 and the switch control terminal Ct under the control of the reset control signal provided by the reset control line R1;
The first end of the first control circuit 24 is electrically connected to the third voltage line V3, the second end of the first control circuit 24 is electrically connected to the switch control end Ct, and the first control circuit 24 is configured to control writing of the third voltage signal provided by the third voltage line V3 into the switch control end Ct under control of the potential of the control end thereof.
In at least one embodiment of the present invention, the second voltage line V2 may be a first low voltage line, and the third voltage line V3 may be a second low voltage line, but is not limited thereto.
Optionally, the data writing circuit includes a fourth transistor, the first control circuit includes a fifth transistor, and the second control circuit includes a sixth transistor;
the control electrode of the fourth transistor is electrically connected with the first scanning line, the first electrode of the fourth transistor is electrically connected with the data line, and the second electrode of the fourth transistor is electrically connected with the control electrode of the fifth transistor;
a first pole of the fifth transistor is electrically connected with the third voltage line, and a second pole of the fifth transistor is electrically connected with the switch control terminal;
the control electrode of the sixth transistor is electrically connected with the reset control line, the first electrode of the sixth transistor is electrically connected with the first voltage line, and the second electrode of the sixth transistor is electrically connected with the switch control end.
Optionally, the second tank circuit includes a second capacitor, and the third tank circuit includes a third capacitor;
the first end of the second capacitor is electrically connected with the control voltage end, and the second end of the second capacitor is electrically connected with the control end of the first control circuit;
the first end of the third capacitor is electrically connected with a second voltage line, and the second end of the third capacitor is electrically connected with the control end of the second control circuit.
In at least one embodiment of the present invention, the reset control line is a first scan line of an adjacent previous stage.
As shown in fig. 3, in at least one embodiment of the pixel circuit shown in fig. 2, the light emitting element is an organic light emitting diode O1;
the reset circuit 14 includes a first transistor T1 and a second transistor T2, and the driving circuit 10 includes a driving transistor T0;
the grid electrode of the first transistor T1 is electrically connected with a first scanning line S (n-1) of an adjacent upper stage, the source electrode of the first transistor T1 is electrically connected with the drain electrode of the driving transistor T0, and the drain electrode of the first transistor T1 is electrically connected with the current output end of the current source SI;
the grid electrode of the second transistor T2 is electrically connected with the first scanning line S (n-1) of the adjacent upper stage, the source electrode of the second transistor T2 is electrically connected with the grid electrode of the driving transistor T0, and the drain electrode of the second transistor T2 is electrically connected with the drain electrode of the driving transistor T0;
The source electrode of the driving transistor T0 is electrically connected with a high voltage line Vdd;
the switch circuit 11 includes a third transistor T3, and the first tank circuit 13 includes a first capacitor C1;
a gate of the third transistor T3 is electrically connected to the switch control terminal Ct, a source of the third transistor T3 is electrically connected to a drain of the driving transistor T0, and a drain of the third transistor T3 is electrically connected to an anode of the organic light emitting diode O1; the cathode of the organic light emitting diode O1 is electrically connected to a first low voltage line Vss;
a first end of the first capacitor C1 is electrically connected to the gate of the driving transistor T0, and a second end of the first capacitor C1 is electrically connected to the high voltage line Vdd;
the data writing circuit 21 includes a fourth transistor T4, the first control circuit 24 includes a fifth transistor T5, and the second control circuit 25 includes a sixth transistor T6;
the gate of the fourth transistor T4 is electrically connected to the first scan line S (n), the source of the fourth transistor T4 is electrically connected to the Data line Data, and the drain of the fourth transistor T4 is electrically connected to the gate of the fifth transistor T5;
a source electrode of the fifth transistor T5 is electrically connected to the two low voltage lines VGL, and a drain electrode of the fifth transistor T5 is electrically connected to the switch control terminal Ct;
The gate of the sixth transistor T6 is electrically connected to the adjacent upper stage first scan line S (n-1), the source of the sixth transistor T6 is electrically connected to the high voltage line Vdd, and the drain of the sixth transistor T6 is electrically connected to the switch control terminal Ct;
the second tank circuit 22 includes a second capacitor C2, and the third tank circuit 23 includes a third capacitor C3;
a first end of the second capacitor C2 is electrically connected to the control voltage terminal Sweep, and a second end of the second capacitor C2 is electrically connected to the gate of the fifth transistor T5;
a first end of the third capacitor C3 is electrically connected to the first low voltage line Vss, and a second end of the third capacitor C3 is electrically connected to the gate of the fourth transistor T4.
In at least one embodiment of the pixel circuit shown in fig. 3, all of the transistors are p-type transistors, but not limited thereto.
In at least one embodiment of the pixel circuit shown in fig. 3, the first voltage line is the high voltage line Vdd, the second voltage line is the first low voltage line Vss, and the third voltage line is the second low voltage line VGL, but not limited thereto.
In at least one embodiment of the pixel circuit shown in fig. 3, the reset control line is the first scan line S (n-1) of the adjacent upper stage, but not limited thereto.
When the display panel includes at least one embodiment of the pixel circuit shown in fig. 3 of the present invention, the current values of the driving currents provided by the current sources may be different in different pixel circuits, and the data voltages Vdata may be different to achieve different gray scales.
In at least one embodiment of the present invention, vdata may be greater than or equal to 0V and less than or equal to 6V, and the voltage value of the control voltage provided by sweep may be greater than or equal to-6V and less than or equal to 6V, but is not limited thereto.
As shown in fig. 4, in operation, at least one embodiment of the pixel circuit shown in fig. 3 of the present invention includes a reset phase S1, a data writing phase S2, and a light emitting phase S3 sequentially arranged;
in the reset stage S1, S (n-1) provides a low voltage signal, S (n) provides a high voltage signal, sweep provides a high voltage signal, T1 and T2 are turned on, T6 is turned on, the gate of T3 is connected with the high voltage signal, T3 is turned off, SI provides driving current Ipixel to C1, C1 is charged by the driving current Ipixel until source leakage current flowing through the source of T0 and the drain of T0 is Ipixel, and C1 is stopped;
in the Data writing stage S2, S (n-1) provides a high voltage signal, S (n) provides a low voltage signal, sweep provides a high voltage signal, T1 and T2 are turned off, T6 is turned off, T4 is turned on, and Data provides the Data voltage Vdata to the gate of T5;
In the light emitting stage S3, S (n-1) and S (n) both provide high voltage signals, T4 is turned off, the voltage value of the control voltage provided by Sweep gradually decreases, so that the potential of the gate of T5 is correspondingly reduced, after the potential of the gate of T5 decreases to a level such that the gate-source voltage of T5 is smaller than the threshold voltage of T5, T5 is turned on to write the second low voltage signal provided by VGL into the gate of T3, so that T3 is turned on, T0 drives O1 to emit light, and the turn-on duration of T3 can be controlled by Vdata to control the light emitting brightness of the pixel.
In fig. 4, the duration of the light emitting period S3 may be 6000us, the reset period S1 and the data writing period S2 may be included in a scanning period S0, and all rows of pixel circuits included in the display panel are sequentially scanned in the scanning period S0, for example, the display panel may include 270 rows of pixel circuits, and the duration of the scanning period S0 may be 2450us, but not limited thereto.
As shown in fig. 5, when the display panel includes at least one embodiment of the pixel circuit shown in fig. 3, the current values of the driving currents provided by the current sources may be different in different pixel circuits, the data voltages Vdata may be different, and the corresponding driving currents Ipixel may be different accordingly, so as to implement multi-gray scale display.
In at least one embodiment of the present invention, the current source SI may be integrated in an external IC (integrated circuit). As shown in fig. 6, at least one embodiment of the constant current source may include an operational amplifier F1, a first resistor R01, a filter capacitor Cs, a second resistor R2, and a third resistor R3;
the first end of R01 is electrically connected with the input voltage end Ui, and the second end of R01 is electrically connected with the non-inverting input end of F1;
the first end of Cs is electrically connected with the second end of R01, and the second end of Cs is electrically connected with the ground end GND; cs plays a role in filtering and voltage stabilization;
the output end of F1 is electrically connected with the first end of R2, the second end of R2 is electrically connected with the first end of R3, and the second end of R3 is electrically connected with the ground end GND;
the inverting input end of F1 is electrically connected with the second end of R2;
the current flowing through R3 is a driving current provided by a constant current source, the current value of the driving current is Vi/R3z, wherein R3z is the resistance value of R3, and Vi is the voltage value of the input voltage provided by Ui.
As shown in fig. 7, in at least one embodiment of the pixel circuit shown in fig. 2, the light emitting element is an organic light emitting diode O1;
the reset circuit 14 includes a first transistor T1 and a second transistor T2, and the driving circuit 10 includes a driving transistor T0;
The gate of the first transistor T1 is electrically connected to the reset control line R1, the source of the first transistor T1 is electrically connected to the drain of the driving transistor T0, and the drain of the first transistor T1 is electrically connected to the current output end of the current source SI;
the grid electrode of the second transistor T2 is electrically connected with the reset control line R1, the source electrode of the second transistor T2 is electrically connected with the grid electrode of the driving transistor T0, and the drain electrode of the second transistor T2 is electrically connected with the drain electrode of the driving transistor T0;
the source electrode of the driving transistor T0 is electrically connected with a high voltage line Vdd;
the switch circuit 11 includes a third transistor T3, and the first tank circuit 13 includes a first capacitor C1;
a gate of the third transistor T3 is electrically connected to the switch control terminal Ct, a source of the third transistor T3 is electrically connected to a drain of the driving transistor T0, and a drain of the third transistor T3 is electrically connected to an anode of the organic light emitting diode O1; the cathode of the organic light emitting diode O1 is electrically connected to a first low voltage line Vss;
a first end of the first capacitor C1 is electrically connected to the gate of the driving transistor T0, and a second end of the first capacitor C1 is electrically connected to the high voltage line Vdd;
The data writing circuit 21 includes a fourth transistor T4, the first control circuit 24 includes a fifth transistor T5, and the second control circuit 25 includes a sixth transistor T6;
the gate of the fourth transistor T4 is electrically connected to the first scan line S (n), the source of the fourth transistor T4 is electrically connected to the Data line Data, and the drain of the fourth transistor T4 is electrically connected to the gate of the fifth transistor T5;
a source electrode of the fifth transistor T5 is electrically connected to the two low voltage lines VGL, and a drain electrode of the fifth transistor T5 is electrically connected to the switch control terminal Ct;
the gate of the sixth transistor T6 is electrically connected to the reset control line R1, the source of the sixth transistor T6 is electrically connected to the high voltage line Vdd, and the drain of the sixth transistor T6 is electrically connected to the switch control terminal Ct;
the second tank circuit 22 includes a second capacitor C2, and the third tank circuit 23 includes a third capacitor C3;
a first end of the second capacitor C2 is electrically connected to the control voltage terminal Sweep, and a second end of the second capacitor C2 is electrically connected to the gate of the fifth transistor T5;
a first end of the third capacitor C3 is electrically connected to the first low voltage line Vss, and a second end of the third capacitor C3 is electrically connected to the gate of the fourth transistor T4.
In at least one embodiment of the pixel circuit shown in fig. 7, all of the transistors are p-type transistors, but not limited thereto.
In at least one embodiment of the pixel circuit shown in fig. 7, the first voltage line is the high voltage line Vdd, the second voltage line is the first low voltage line Vss, and the third voltage line is the second low voltage line VGL, but not limited thereto.
As shown in fig. 8, at least one embodiment of the pixel circuit shown in fig. 7 of the present invention is in operation, and the display period includes a reset phase S1, a data writing phase S2, and a light emitting phase S3, which are sequentially arranged;
in the reset stage S1, R1 provides a low voltage signal, S (n) provides a high voltage signal, sweep provides a high voltage signal, T1 and T2 are on, T6 is on, the gate of T3 is connected to the high voltage signal, T3 is off, SI provides a drive current Ipixel to C1, C1 is charged by said drive current Ipixel until the source leakage current flowing through the source of T0 and the drain of T0 is Ipixel, and charging of C1 is stopped;
in the Data writing stage S2, R1 provides a high voltage signal, S (n) provides a low voltage signal, sweep provides a high voltage signal, T1 and T2 are turned off, T6 is turned off, T4 is turned on, and Data provides the Data voltage Vdata to the gate of T5;
in the light emitting stage S3, R1 and S (n) both provide a high voltage signal, T4 is turned off, the voltage value of the control voltage provided by Sweep gradually decreases, so that the potential of the gate of T5 is correspondingly reduced, when the potential of the gate of T5 decreases to a level such that the gate-source voltage of T5 is less than the threshold voltage of T5, T5 is turned on, so that the second low voltage signal provided by VGL is written into the gate of T3, so that T3 is turned on, T0 drives O1 to emit light, and the turn-on duration of T3 can be controlled by Vdata to control the light emitting brightness of the pixel.
In fig. 8, the reset stage S1 is set before the scan period S0, before the rows of pixel circuits included in the display panel are scanned, the rows of pixel circuits included in the display panel are collectively reset, and in the scan period S0, all the rows of pixel circuits included in the display panel are sequentially scanned, for example, the display panel may include 270 rows of pixel circuits, the duration of the scan period S0 may be 2450us, and the duration of the light-emitting stage S3 may be 6000us, but not limited thereto.
At least one embodiment of the pixel circuit shown in fig. 3 of the present invention and at least one embodiment of the pixel circuit shown in fig. 7 of the present invention may be applied to a silicon-based display panel or a glass-based display panel.
In at least one embodiment of the present invention, the switch control circuit includes a comparator, a write control circuit, and a fourth tank circuit;
the reset control line is a first scanning line;
the writing control circuit is respectively and electrically connected with a first scanning line, a data line and an inverting input end of the comparator and is used for writing data voltage provided by the data line into the inverting input end of the comparator under the control of a first scanning signal provided by the first scanning line;
The non-inverting input end of the comparator is electrically connected with the control voltage end, the output end of the comparator is electrically connected with the switch control end, and the comparator is used for providing a low-voltage signal for the switch control end when the voltage value of the data voltage is larger than the voltage value of the control voltage provided by the control voltage end, and providing a high-voltage signal for the switch control end when the voltage value of the data voltage is smaller than the voltage value of the control voltage;
the first end of the fourth energy storage circuit is electrically connected with the inverting input end of the comparator, and the second end of the fourth energy storage circuit is electrically connected with a second voltage line.
In implementations, the switch control circuit may include a comparator, a write control circuit, and a fourth tank circuit; the reset control line is a first scanning line;
in the reset stage, the write control circuit writes the data voltage provided by the data line into the inverting input end of the comparator under the control of the first scanning signal provided by the first scanning line;
in the light-emitting stage, a control voltage end provides a control voltage to a first end of the fourth energy storage circuit, the voltage value of the control voltage is gradually reduced until the voltage value of the data voltage is larger than the voltage value of the control voltage, the comparator provides a low-voltage signal for a switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
As shown in fig. 9, on the basis of the embodiment of the pixel circuit shown in fig. 1, the switch control circuit includes a comparator 91, a write control circuit 92, and a fourth tank circuit 93;
the reset control line is a first scanning line S (n);
the write control circuit 92 is electrically connected to the first scan line S (n), the Data line Data, and the inverting input terminal of the comparator 91, and is configured to write the Data voltage Vdata provided by the Data line Data into the inverting input terminal of the comparator 91 under the control of the first scan signal provided by the first scan line S (n);
the non-inverting input terminal of the comparator 91 is electrically connected to the control voltage terminal Sweep, the output terminal of the comparator 91 is electrically connected to the switch control terminal Ct, the comparator 91 is configured to provide a low voltage signal to the switch control terminal Ct when the voltage value of the data voltage Vdata is greater than the voltage value of the control voltage provided by the control voltage terminal Sweep, and provide a high voltage signal to the switch control terminal Ct when the voltage value of the data voltage Vdata is less than the voltage value of the control voltage;
the first end of the fourth tank circuit 93 is electrically connected to the inverting input terminal of the comparator 91, and the second end of the fourth tank circuit 93 is electrically connected to the second voltage line V2.
Optionally, the write control circuit includes a seventh transistor;
the control electrode of the seventh transistor is electrically connected with the first scanning line, the first electrode of the seventh transistor is electrically connected with the data line, and the second electrode of the seventh transistor is electrically connected with the inverting input end of the comparator.
Optionally, the fourth tank circuit includes a fourth capacitor;
the first end of the fourth capacitor is electrically connected with the inverting input end of the comparator, and the second end of the fourth capacitor is electrically connected with a second voltage line.
As shown in fig. 10, on the basis of at least one embodiment of the pixel circuit shown in fig. 9, the reset circuit 14 includes a first transistor T1 and a second transistor T2, and the driving circuit 10 includes a driving transistor T0;
the gate of the first transistor T1 is electrically connected to the first scan line S (n), the source of the first transistor T1 is electrically connected to the drain of the driving transistor T0, and the drain of the first transistor T1 is electrically connected to the current output end of the current source SI;
the grid electrode of the second transistor T2 is electrically connected with the first scanning line S (n), the source electrode of the second transistor T2 is electrically connected with the grid electrode of the driving transistor T0, and the drain electrode of the second transistor T2 is electrically connected with the drain electrode of the driving transistor T0;
The source electrode of the driving transistor T0 is electrically connected with a high voltage line Vdd;
the switch circuit 11 includes a third transistor T3, and the first tank circuit 13 includes a first capacitor C1;
a gate of the third transistor T3 is electrically connected to the switch control terminal Ct, a source of the third transistor T3 is electrically connected to a drain of the driving transistor T0, and a drain of the third transistor T3 is electrically connected to an anode of the organic light emitting diode O1; the cathode of the organic light emitting diode O1 is electrically connected to a first low voltage line Vss;
a first end of the first capacitor C1 is electrically connected to the gate of the driving transistor T0, and a second end of the first capacitor C1 is electrically connected to the high voltage line Vdd;
the write control circuit 92 includes a seventh transistor T7;
a gate of the seventh transistor T7 is electrically connected to the first scan line S (n), a source of the seventh transistor T7 is electrically connected to the Data line Data, and a drain of the seventh transistor T7 is electrically connected to an inverting input terminal of the comparator 91;
the fourth tank circuit 93 includes a fourth capacitor C4;
a first end of the fourth capacitor C4 is electrically connected to the inverting input terminal of the comparator 91, and a second end of the fourth capacitor C4 is electrically connected to the first low voltage line Vss.
In at least one embodiment of the pixel circuit shown in fig. 10, all the transistors are p-type transistors, but not limited thereto.
As shown in fig. 11, in operation, at least one embodiment of the pixel circuit shown in fig. 10 of the present invention may include a reset phase S1 and a light-emitting phase S3 sequentially arranged;
in the reset phase S1, S (n) providing a low voltage signal, sweep providing a high voltage signal, T1 and T2 being turned on, SI providing a drive current Ipixel to C1, by which Ipixel charges C1 until the source leakage current flowing through the source of T0 and the drain of T0 is Ipixel, stopping charging C1; t3 is off; t7 is turned on, data provides a Data voltage Vdata to an inverting input terminal of the comparator 91, vdata is smaller than a voltage value of the high voltage signal provided by Sweep, the comparator 91 outputs the high voltage signal, and T3 is turned off;
in the light emitting stage S3, S (n), a high voltage signal is provided, the voltage value of the control voltage provided by Sweep gradually decreases until the voltage values of the data voltage Vdata and the control voltage are greater than the voltage value of the control voltage, the comparator 91 provides a low voltage signal to the switch control terminal Ct, T3 is turned on, T0 drives O1 to emit light, and the turn-on duration of T3 can be controlled by Vdata to control the light emitting brightness of the pixel.
In fig. 11, the duration of the light-emitting period S3 may be 6000us, the reset period S1 may be included in a scanning period S0, and all rows of pixel circuits included in the display panel are sequentially scanned in the scanning period S0, for example, the display panel may include 270 rows of pixel circuits, and the duration of the scanning period S0 may be 2450us, but is not limited thereto.
The display device according to the embodiment of the invention comprises a plurality of rows and columns of the pixel circuits.
The driving method of the embodiment of the invention is applied to the display device, and the display period comprises a reset stage and a light-emitting stage which are sequentially arranged; the driving method includes:
in a reset stage, the current source is used for outputting a driving current to the reset circuit through the current output end of the current source, and the reset circuit supplies the driving current to the control end of the driving circuit and the second end of the driving circuit under the control of a reset control signal so as to charge the first energy storage circuit until the driving circuit supplies the driving current, and the first energy storage circuit is stopped being charged;
in the light-emitting stage, the switch control circuit controls the potential of the switch control end according to the control voltage provided by the control voltage end and the data voltage provided by the data line; the switch circuit controls the connection or disconnection between the second end of the driving circuit and the light-emitting element under the control of the potential of the switch control end.
In the driving method according to the embodiment of the present invention, in the light emitting stage, the driving current for driving the light emitting element to emit light by the driving circuit is the driving current outputted by the current source through the current output end thereof, and the communication time between the second end of the driving circuit and the light emitting element is controlled by the switching circuit, so as to adjust the brightness. The embodiment of the invention can avoid the problem of uneven display brightness caused by IR drop (IR drop refers to a phenomenon that the voltage on a power supply and a ground network in an integrated circuit is reduced or increased).
In at least one embodiment of the present invention, the switch control circuit includes a second tank circuit, a third tank circuit, a data writing circuit, a first control circuit and a second control circuit; the display period also includes a data writing stage disposed between the reset stage and the light-emitting stage; the driving method includes:
in a data writing stage, a data line provides a data voltage, and the data writing circuit writes the data voltage into a control end of the first control circuit under the control of a first scanning signal;
in the light-emitting stage, the control voltage end provides a control voltage to the first end of the second energy storage circuit, the voltage value of the control voltage is gradually reduced to control the potential of the control end of the first control circuit to be gradually reduced, when the potential of the control end of the first control circuit is reduced to a preset voltage value, the first control circuit controls writing of a third voltage signal into the switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
In at least one embodiment of the present invention, in the data writing stage, a plurality of rows of pixel circuits included in the display device sequentially write data voltages provided by corresponding data lines into control terminals of a first control circuit included in the pixel circuits under control of corresponding row first scan signals.
Optionally, the switch control circuit includes a comparator, a write control circuit, and a fourth tank circuit; the reset control line is a first scanning line; the driving method includes:
in the reset stage, the write control circuit writes the data voltage provided by the data line into the non-inverting input end of the comparator under the control of the first scanning signal provided by the first scanning line;
in the light-emitting stage, a control voltage end provides a control voltage to a first end of the fourth energy storage circuit, the voltage value of the control voltage is gradually reduced until the voltage value of the data voltage is larger than the voltage value of the control voltage, the comparator provides a high-voltage signal to a switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
The display device provided by the embodiment of the invention can be any product or component with a display function, such as a mobile phone, a tablet personal computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that various modifications and adaptations can be made without departing from the principles of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.
Claims (15)
1. A pixel circuit is characterized by comprising a light emitting element, a driving circuit, a switching control circuit, a current source, a first energy storage circuit and a reset circuit, wherein,
a first end of the driving circuit is electrically connected with a first voltage line; the driving circuit is used for driving the light-emitting element;
the current source is used for outputting driving current through a current output end of the current source;
the reset circuit is electrically connected with the reset control line, the control end of the drive circuit, the second end of the drive circuit and the current output end and is used for providing the drive current to the control end of the drive circuit and the second end of the drive circuit under the control of a reset control signal provided by the reset control line;
The first end of the first energy storage circuit is electrically connected with the control end of the driving circuit, the second end of the first energy storage circuit is electrically connected with the first voltage line, and the first energy storage circuit is used for storing electric energy;
the switch control circuit is respectively and electrically connected with the switch control end, the control voltage end and the data line and is used for controlling the potential of the switch control end according to the control voltage provided by the control voltage end and the data voltage provided by the data line;
the control end of the switch circuit is electrically connected with the switch control end, the first end of the switch circuit is electrically connected with the second end of the driving circuit, the second end of the switch circuit is electrically connected with the light-emitting element, and the switch circuit is used for controlling the connection or disconnection between the second end of the driving circuit and the light-emitting element under the control of the potential of the switch control end.
2. The pixel circuit according to claim 1, wherein the reset circuit includes a first transistor and a second transistor, and the drive circuit includes a drive transistor;
the control electrode of the first transistor is electrically connected with the reset control line, the first electrode of the first transistor is electrically connected with the second electrode of the driving transistor, and the second electrode of the first transistor is electrically connected with the current output end of the current source;
The control electrode of the second transistor is electrically connected with the reset control line, the first electrode of the second transistor is electrically connected with the control electrode of the driving transistor, and the second electrode of the second transistor is electrically connected with the second electrode of the driving transistor;
the first electrode of the driving transistor is electrically connected to the first voltage line.
3. The pixel circuit of claim 2, wherein the switching circuit comprises a third transistor, the first tank circuit comprising a first capacitance;
a control electrode of the third transistor is electrically connected with the switch control end, a first electrode of the third transistor is electrically connected with a second electrode of the driving transistor, and a second electrode of the third transistor is electrically connected with the light emitting element;
the first end of the first capacitor is electrically connected with the control electrode of the driving transistor, and the second end of the first capacitor is electrically connected with the first voltage line.
4. A pixel circuit as claimed in any one of claims 1 to 3, wherein the switch control circuit comprises a second tank circuit, a third tank circuit, a data write circuit, a first control circuit and a second control circuit;
The first end of the second energy storage circuit is electrically connected with the control voltage end, the second end of the second energy storage circuit is electrically connected with the control end of the first control circuit, and the second energy storage circuit is used for storing electric energy;
the data writing circuit is respectively and electrically connected with a first scanning line, a data line and a control end of the first control circuit and is used for writing data voltage provided by the data line into the control end of the first control circuit under the control of a first scanning signal provided by the first scanning line;
the first end of the third energy storage circuit is electrically connected with a second voltage line, the second end of the third energy storage circuit is electrically connected with the control end of the second control circuit, and the third energy storage circuit is used for storing electric energy;
the second control circuit is respectively and electrically connected with a reset control line, a first voltage line and the switch control end and is used for controlling the connection or disconnection between the first voltage line and the switch control end under the control of a reset control signal provided by the reset control line;
the first end of the first control circuit is electrically connected with a third voltage line, the second end of the first control circuit is electrically connected with the switch control end, and the first control circuit is used for controlling the third voltage signal provided by the third voltage line to be written into the switch control end under the control of the potential of the control end of the first control circuit.
5. The pixel circuit according to claim 4, wherein the data writing circuit includes a fourth transistor, the first control circuit includes a fifth transistor, and the second control circuit includes a sixth transistor;
the control electrode of the fourth transistor is electrically connected with the first scanning line, the first electrode of the fourth transistor is electrically connected with the data line, and the second electrode of the fourth transistor is electrically connected with the control electrode of the fifth transistor;
a first pole of the fifth transistor is electrically connected with the third voltage line, and a second pole of the fifth transistor is electrically connected with the switch control terminal;
the control electrode of the sixth transistor is electrically connected with the reset control line, the first electrode of the sixth transistor is electrically connected with the first voltage line, and the second electrode of the sixth transistor is electrically connected with the switch control end.
6. The pixel circuit of claim 4 wherein the second tank circuit comprises a second capacitor and the third tank circuit comprises a third capacitor;
the first end of the second capacitor is electrically connected with the control voltage end, and the second end of the second capacitor is electrically connected with the control end of the first control circuit;
The first end of the third capacitor is electrically connected with a second voltage line, and the second end of the third capacitor is electrically connected with the control end of the second control circuit.
7. The pixel circuit of claim 4 wherein the reset control line is a first scan line of an adjacent previous stage.
8. A pixel circuit according to any one of claims 1 to 3, wherein the switch control circuit comprises a comparator, a write control circuit and a fourth tank circuit;
the reset control line is a first scanning line;
the writing control circuit is respectively and electrically connected with a first scanning line, a data line and an inverting input end of the comparator and is used for writing data voltage provided by the data line into the inverting input end of the comparator under the control of a first scanning signal provided by the first scanning line;
the non-inverting input end of the comparator is electrically connected with the control voltage end, the output end of the comparator is electrically connected with the switch control end, and the comparator is used for providing a low-voltage signal for the switch control end when the voltage value of the data voltage is larger than the voltage value of the control voltage provided by the control voltage end, and providing a high-voltage signal for the switch control end when the voltage value of the data voltage is smaller than the voltage value of the control voltage;
The first end of the fourth energy storage circuit is electrically connected with the inverting input end of the comparator, and the second end of the fourth energy storage circuit is electrically connected with a second voltage line.
9. The pixel circuit according to claim 8, wherein the write control circuit includes a seventh transistor;
the control electrode of the seventh transistor is electrically connected with the first scanning line, the first electrode of the seventh transistor is electrically connected with the data line, and the second electrode of the seventh transistor is electrically connected with the inverting input end of the comparator.
10. The pixel circuit of claim 8 wherein the fourth tank circuit comprises a fourth capacitor;
the first end of the fourth capacitor is electrically connected with the inverting input end of the comparator, and the second end of the fourth capacitor is electrically connected with a second voltage line.
11. A display device comprising a plurality of rows and a plurality of columns of the pixel circuit according to any one of claims 1 to 10.
12. A driving method applied to the display device according to any one of claims 1 to 10, wherein the display period includes a reset phase and a light-emitting phase sequentially arranged; the driving method includes:
In a reset stage, the current source is used for outputting a driving current to the reset circuit through the current output end of the current source, and the reset circuit supplies the driving current to the control end of the driving circuit and the second end of the driving circuit under the control of a reset control signal so as to charge the first energy storage circuit until the driving circuit supplies the driving current, and the first energy storage circuit is stopped being charged;
in the light-emitting stage, the switch control circuit controls the potential of the switch control end according to the control voltage provided by the control voltage end and the data voltage provided by the data line; the switch circuit controls the connection or disconnection between the second end of the driving circuit and the light-emitting element under the control of the potential of the switch control end.
13. The driving method of claim 12, wherein the switch control circuit comprises a second tank circuit, a third tank circuit, a data write circuit, a first control circuit, and a second control circuit; the display period also includes a data writing stage disposed between the reset stage and the light-emitting stage; the driving method includes:
in a data writing stage, a data line provides a data voltage, and the data writing circuit writes the data voltage into a control end of the first control circuit under the control of a first scanning signal;
In the light-emitting stage, the control voltage end provides a control voltage to the first end of the second energy storage circuit, the voltage value of the control voltage is gradually reduced to control the potential of the control end of the first control circuit to be gradually reduced, when the potential of the control end of the first control circuit is reduced to a preset voltage value, the first control circuit controls writing of a third voltage signal into the switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
14. The driving method according to claim 13, wherein in the data writing stage, a plurality of rows of pixel circuits included in the display device sequentially write data voltages supplied from corresponding data lines to control terminals of a first control circuit included in the pixel circuits under control of corresponding rows of first scan signals.
15. The driving method as claimed in claim 12, wherein the switch control circuit includes a comparator, a write control circuit, and a fourth tank circuit; the reset control line is a first scanning line; the driving method further includes:
In the reset stage, the write control circuit writes the data voltage provided by the data line into the inverting input end of the comparator under the control of the first scanning signal provided by the first scanning line;
in the light-emitting stage, a control voltage end provides a control voltage to a first end of the fourth energy storage circuit, the voltage value of the control voltage is gradually reduced until the voltage value of the data voltage is larger than the voltage value of the control voltage, the comparator provides a low-voltage signal for a switch control end, the switch circuit is controlled by the potential of the switch control end to control the second end of the driving circuit to be communicated with the light-emitting element, and the driving circuit drives the light-emitting element to emit light.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211175075.4A CN117809562A (en) | 2022-09-26 | 2022-09-26 | Pixel circuit, display device and driving method |
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| CN202211175075.4A CN117809562A (en) | 2022-09-26 | 2022-09-26 | Pixel circuit, display device and driving method |
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| CN117809562A true CN117809562A (en) | 2024-04-02 |
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| CN202211175075.4A Pending CN117809562A (en) | 2022-09-26 | 2022-09-26 | Pixel circuit, display device and driving method |
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