CN117806851A

CN117806851A - Multi-host shared memory system, memory access method, device and storage medium

Info

Publication number: CN117806851A
Application number: CN202410223933.0A
Authority: CN
Inventors: 董培强; 鲁璐; 刘铁军; 计晶
Original assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Current assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Priority date: 2024-02-28
Filing date: 2024-02-28
Publication date: 2024-04-02
Anticipated expiration: 2044-02-28
Also published as: CN117806851B

Abstract

The embodiment of the application provides a memory system shared by multiple hosts, a memory access method, equipment and a storage medium, wherein the system comprises multiple hosts, a task management module and multiple memory modules, the task management module is connected with the multiple memory modules through a cache consistency interconnection protocol, and any one of the multiple hosts is used for issuing a request task; the task management module comprises a plurality of preset task queues, and is used for receiving a request task issued by any host, determining a target task queue corresponding to the request task in the plurality of preset task queues, and adding the request task into the target task queue; the task management module is used for acquiring the request task to be executed from the plurality of task queues according to a preset rule, and executing a corresponding processing strategy according to the type of the request task to be executed so as to realize the sharing of a plurality of memory modules by a plurality of hosts. The embodiment of the application aims to improve the stability of a memory system.

Description

Multi-host shared memory system, memory access method, device and storage medium

Technical Field

The embodiment of the application relates to the technical field of memory access, in particular to a multi-host shared memory system, a memory access method, equipment and a storage medium.

Background

With the development of technologies such as cloud computing, artificial intelligence, and high-performance computing, the computing power of a processor is continuously improved, and the number of cores of the processor is increased, which also promotes the demand for high-capacity and high-bandwidth memory, and how to separate the memory from a CPU (Central Processing Unit ) using the memory and create a pool memory layer which can be shared by a plurality of systems is always an important subject of research in the industry.

CXL (Compute Express Link) is a cache coherence interconnect protocol for processors, memory extensions, and accelerators that is supported by the industry, and CXL technology can maintain coherence between CPU memory space and memory on additional devices, allowing for resource sharing, thus achieving higher performance, and providing physical device realisation for memory pooling.

The current latest method is CXL memory pool, CXL memory pool is a decomposed memory system, wherein multiple hosts are connected through CXL SWITCH and share a large memory pool, but CXL SWITCH only supports address routing of each host and the expansion memory pool, unified management and maintenance of the memory pool cannot be realized, when multiple hosts access the memory pool, task congestion is easy to occur to request tasks issued by multiple hosts, and then data access conflict is caused when multiple hosts access the memory pool, so that the memory system is unstable.

Disclosure of Invention

The embodiment of the application provides a memory system shared by multiple hosts, a memory access method, a memory access device and a storage medium, and aims to improve the stability of the memory system.

In a first aspect, an embodiment of the present application provides a multi-host shared memory system, where the system includes a plurality of hosts, a task management module, and a plurality of memory modules, where the task management module is connected to the plurality of memory modules through a cache coherence interconnect protocol, where:

any one of the plurality of hosts is used for issuing a request task;

the task management module comprises a plurality of preset task queues, and is used for receiving the request task issued by any host, determining a target task queue corresponding to the request task in the plurality of preset task queues, and adding the request task into the target task queue;

the task management module is used for acquiring the request task to be executed from the plurality of task queues according to a preset rule, and executing a corresponding processing strategy according to the type of the request task to be executed so as to realize the sharing of the plurality of memory modules by the plurality of hosts.

Optionally, the preset task queues are divided into a plurality of priorities, and each priority corresponds to a plurality of task queues;

the task management module is used for determining a target priority corresponding to the request task after receiving the request task, and determining a target task queue corresponding to the request task in a plurality of task queues corresponding to the target priority.

Optionally, the task management module is configured to determine, according to the type of the request task, a target priority corresponding to the request task, where different types of request tasks are preset with corresponding priorities.

Optionally, the task management module is configured to: determining a type coefficient of the request task according to the type of the request task, and determining a priority coefficient corresponding to the request task according to the type coefficient;

and determining the target priority corresponding to the request task according to the priority coefficient corresponding to the request task and the threshold range corresponding to each of the priorities.

Optionally, the task management module is configured to determine, according to the type and the data length of the requested task, a target priority corresponding to the requested task.

Optionally, the task management module is configured to: determining a type coefficient of the request task according to the type of the request task;

determining a length coefficient of the request task according to the data length of the request task;

determining a priority coefficient corresponding to the request task according to the type coefficient and the length coefficient;

Optionally, the task management module is configured to determine, according to the type and the data length of the requested task and the request frequency of the host that issues the requested task, a target priority corresponding to the requested task.

acquiring a request frequency of a host issuing the request task, and determining a frequency coefficient corresponding to the request task according to the request frequency;

determining a priority coefficient corresponding to the request task according to the type coefficient, the length coefficient and the frequency coefficient;

Optionally, the task management module is configured to:

acquiring the total time length to be executed of each of a plurality of task queues under the target priority corresponding to the request task, and taking the task queue with the minimum total time length to be executed as the target task queue corresponding to the request task;

the total duration to be executed of each of the plurality of task queues is the sum of the execution durations corresponding to all the request tasks contained in each of the plurality of task queues.

Optionally, each task queue of the preset plurality of task queues is provided with a counter, and the counter is used for indicating the total duration to be executed of the task queue;

the task management module is used for acquiring the execution time length of the request task after the request task is added in the target task queue, and updating the counter of the target task queue according to the execution time length of the request task.

Optionally, the task management module is configured to determine an execution duration corresponding to the requested task according to an execution duration corresponding to the data length corresponding to the requested task and a preset unit data length.

Optionally, the task management module is configured to detect, after receiving the request task issued by any host, a length of a target memory address corresponding to the request task when the type of the request task is a read data operation or a write data operation;

when the length of the target memory address is greater than a length threshold, splitting the request task into a plurality of sub-request tasks, and determining target task queues corresponding to the plurality of sub-request tasks.

Optionally, the task management module maintains a memory record table, where usage states of the multiple memory modules are recorded in the memory record table, where the usage states include respective memory block numbers, memory block sizes, occupation states of the memory blocks, host identifiers of the memory blocks, and sharing states of the memory blocks.

Optionally, when the task management module receives that the type of the requested task issued by any host is memory state reading, the task management module is configured to obtain the memory record table, generate a memory state result according to a memory state reading object of the requested task, and return the memory state result to the host corresponding to the requested task.

Optionally, the task management module is configured to obtain, in parallel, a request task to be executed in the preset multiple task queues, and execute a corresponding processing policy according to a type of the request task to be executed.

Optionally, the task management module is configured to obtain, in parallel, a request task to be executed in a plurality of task queues corresponding to the same priority according to the order of the priority from high to low, and execute a corresponding processing policy according to the type of the request task to be executed.

Optionally, when the type of the requested task to be executed is memory release, the task management module is configured to change, according to a target release memory address corresponding to the requested task to be executed, an occupied state of a memory block corresponding to the target release memory address into unoccupied state in the memory record table.

Optionally, when the type of the requested task to be executed is a memory application, the task management module is configured to determine, according to an application memory length corresponding to the requested task to be executed, a target memory address with the application memory length in the memory record table, change an occupied state of a memory block corresponding to the target memory address to occupied, and configure a host identifier corresponding to the requested task to be executed for the target memory address.

Optionally, when the type of the requested task to be executed is a data reading operation or a data writing operation, the task management module is configured to determine that the requested task to be executed corresponds to a target memory module, and send the requested task to be executed to the target memory module, so as to perform a read operation or a write operation of a target memory address corresponding to the requested task to be executed in the target memory module.

Optionally, when the target memory module is in another data reading operation or data writing operation, the task management module adds the request task to be executed in a congestion buffer queue;

and when the target memory module finishes another data reading operation or data writing operation, the task management module is used for sending the request task to be executed in the congestion buffer queue to the target memory module.

Optionally, when a memory module is newly added in the system, the task management module is configured to respond to an operation of the newly added memory module, and newly add an entry of the newly added memory module in the memory record table, where the entry of the newly added memory module includes a memory block number, a memory block size, an occupied state of the memory block, a host identifier of the memory block, and a shared state of the memory block of the newly added memory module.

Optionally, when the memory module is deleted in the system, the task management module is configured to respond to an operation of the memory module to be deleted, delete an entry of the memory module to be deleted in the memory record table, where the entry of the memory module to be deleted includes a memory block number, a memory block size, an occupied state of the memory block, a host identifier of the memory block, and a shared state of the memory block.

Optionally, the preset plurality of task queues further includes a high-speed serial task queue, and when any host issuing a request task through the high-speed serial computer expansion bus standard is received, the task management module is configured to add the request task to the high-speed serial task queue.

In a second aspect, an embodiment of the present application provides a memory access method, where the method is applied to the multi-host shared memory system according to the first aspect of the embodiment, and the method includes:

any one of the plurality of hosts issues a request task;

the task management module receives the request task issued by any host, determines a target task queue corresponding to the request task from a plurality of preset task queues, and adds the request task into the target task queue;

The task management module acquires the request task to be executed from the plurality of task queues according to a preset rule, and executes a corresponding processing strategy according to the type of the request task to be executed so as to realize the sharing of the plurality of memory modules by the plurality of hosts.

In a third aspect, an embodiment of the present application provides a memory access method, applied to a task management module, where the method includes:

acquiring a request task issued by any one of a plurality of hosts;

determining a target task queue corresponding to the request task in a plurality of preset task queues, and adding the request task into the target task queue;

and acquiring the request task to be executed from the plurality of task queues according to a preset rule, and executing a corresponding processing strategy according to the type of the request task to be executed, wherein the processing strategy is used for realizing the access of the corresponding request task to the memory module.

In a fourth aspect, embodiments of the present application provide a computing processing device, including:

a memory having computer readable code stored therein; the computer-readable code, when executed by the one or more processors, causes the computing processing device to perform the memory access method of the second aspect of the embodiments, or the memory access method of the third aspect of the embodiments.

In a fifth aspect, embodiments of the present application provide a non-volatile readable storage medium storing a computer program, where the computer program, when executed by a processor, performs a memory access method according to the second aspect of the embodiments, or a memory access method according to the third aspect of the embodiments.

The beneficial effects are that:

the multi-host shared memory system provided in this embodiment includes a plurality of hosts, a task management module, and a plurality of memory modules, where the task management module is connected to the plurality of memory modules through a cache coherence interconnection protocol, and the task management module includes a plurality of task queues preset therein.

When any one of a plurality of hosts issues a request task, the task management module receives the request task issued by the any one host, determines a target task queue corresponding to the request task in a plurality of preset task queues, adds the request task into the target task queue, and then obtains the request task to be executed from the plurality of task queues according to a preset rule, and executes a corresponding processing strategy according to the type of the request task to be executed so as to realize the sharing of the plurality of memory modules by the plurality of hosts.

Compared with the existing problem that the request task is easy to be jammed when a plurality of hosts access the memory module, the method has the advantages that the request task issued by the plurality of hosts is spatially classified into one task queue of a plurality of task queues, then the request task to be executed is acquired from the plurality of task queues according to the preset rule, and the corresponding processing strategy is executed according to the type of the request task to be executed, namely the request task issued by the plurality of hosts is managed, so that the unstable system caused by the jam of the request task issued by the plurality of hosts is avoided, and the stability of the memory system is improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below.

FIG. 1 is a schematic diagram illustrating a structure of a multi-host shared memory system according to an embodiment of the present disclosure;

FIG. 2 is a flowchart illustrating steps of a method for determining a target priority of a requested task according to an embodiment of the present application;

FIG. 3 is a flowchart illustrating steps of a method for determining a target priority of a requested task according to an embodiment of the present application;

FIG. 4 is a flowchart illustrating steps of a method for determining a target priority of a requested task according to an embodiment of the present application;

FIG. 5 is a flowchart illustrating steps of a memory access method according to an embodiment of the present disclosure;

FIG. 6 is a flowchart illustrating an implementation of a memory access method according to an embodiment of the present disclosure;

FIG. 7 is a flowchart illustrating steps of a memory access method according to an embodiment of the present disclosure;

FIG. 8 shows a schematic diagram of a computing processing device provided by an embodiment of the present application;

fig. 9 shows a schematic diagram of a nonvolatile readable storage medium provided in an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the following detailed description of each embodiment of the present application will be given with reference to the accompanying drawings. However, those of ordinary skill in the art will understand that in various embodiments of the present application, numerous technical details have been set forth in order to provide a better understanding of the present application. However, the technical solutions claimed in the present application can be implemented without these technical details and with various changes and modifications based on the following embodiments. The following embodiments are divided for convenience of description, and should not be construed as limiting the specific implementation of the present application, and the embodiments may be mutually combined and referred to without contradiction.

CXL (Compute Express Link) is an industry supported cache coherence interconnect protocol for processors, memory extensions, and accelerators;

IO: input/Output, input/Output;

DRAM: dynamic Random Access Memory, dynamic random access memory;

CPU: central Processing Unit, a central processing unit;

PCIE: peripheral component interconnect express, a high-speed serial computer expansion bus standard.

As the power of processors continues to increase, the demands for large capacity and high bandwidth of memory have increased, so that DRAM has been separated from the CPU using it, and a method of creating a memory pool shared by multiple hosts has been attracting attention, and the CXL protocol provides physical device realisation for memory pooling.

In the existing CXL memory pool, a plurality of hosts access a plurality of CXL extended memories through CXL SWITCH, but the CXL SWITCH only supports address routing of each host and the extended memory pool of CXL, and unified management and maintenance of the memory pool cannot be realized, so when the plurality of hosts access the memory pool, task congestion is easy to occur for request tasks issued by the plurality of hosts, and further data access conflict is caused when the plurality of hosts access the memory pool, so that the memory system is unstable.

In order to improve stability of a memory system, an embodiment of the present application provides a multi-host shared memory system, where the system includes a plurality of hosts, a task management module, and a plurality of memory modules, where the task management module is connected to the plurality of memory modules through a cache coherence interconnection protocol, that is, the task management module and the plurality of memory modules are connected based on a CXL protocol.

Referring to fig. 1, a schematic structural diagram of a multi-host shared memory system provided in an embodiment of the present application is shown, where the system includes a plurality of hosts (host 1-host n), and in practical implementation, the number of hosts is not limited in this embodiment, a task management module is connected to a plurality of memory modules (memory modules 1-n) through cache coherence interconnects (CXL SWITCH FABRIC), CXL SWITCH FABRIC, and CXL SWITCH FABRIC mainly forwards a request task for a target memory address to a target memory module according to forwarding between the task management module and the memory modules for the request task, where the target memory address is a memory address in the target memory module.

In the practical application process, the memory module can adopt a memory pool allocation mode, namely, before using the memory, a certain number of memory blocks with equal size are applied to be allocated as standby, when a new memory requirement exists, a part of memory blocks are separated from the memory pool, and if the memory blocks are insufficient, new memory is continuously applied, so that memory fragments can be avoided, and the memory allocation efficiency is improved.

The task management module is used for analyzing and managing the request tasks issued by the hosts, managing the memory service conditions of the memory modules, managing the memory release and the memory application, and reasonably distributing the memory addresses when the hosts apply for the memory.

Specifically, in order to avoid congestion and data access conflict of the request tasks issued by the multiple hosts, multiple task queues (task queues 1-task queues n) are preset in the task management module, and the number of the multiple task queues can be configured according to the requirements of practical applications, which is not limited in this embodiment.

When the task management module receives any one of the plurality of hosts to issue a request task, the task management module determines a target task queue corresponding to the request task in a plurality of preset task queues, and adds the request task in the target task queue, and congestion of the plurality of tasks can be avoided by queuing the request tasks issued by the plurality of hosts in a space layer.

In a possible implementation manner, a plurality of task queues preset in the task management module can be set to be a plurality of priorities, and each priority corresponds to a plurality of task queues; for example, 4 priorities may be set, i.e., priority i, priority ii, priority iii, and priority iv, where the number of task queues corresponding to each priority may be the same or different, e.g., 2 queues may be set under each priority, 3 task queues may be set under priority i, 2 task queues are set under priority ii, 2 task queues are set under priority iii, and 1 task queue is set under priority iv.

The number of the priorities and the number of the task queues under each priority can be set in a self-defined manner according to the condition of the request tasks in the practical application, for example, when the number of the request tasks corresponding to the priority I is large, more task queues can be set for the priority I.

When the task management module receives a request task issued by any host in a plurality of hosts, namely, a CXL.IO command issued by any host in the task management module through a doorbell register, firstly determining a target priority corresponding to the request task, and then determining a target task queue corresponding to the request task in a plurality of task queues corresponding to the target priority.

Referring to fig. 2, a flowchart illustrating steps of a method for determining a target priority of a request task according to an embodiment of the present application is shown, where the task management module may determine, according to a type of the request task, a target priority corresponding to the request task, and different types of request tasks preset corresponding priorities, and specifically includes the following steps:

a1: and determining a type coefficient of the request task according to the type of the request task, and determining a priority coefficient corresponding to the request task according to the type coefficient.

Specifically, the type coefficients corresponding to the different types of request tasks can be predefined, and the priority coefficient is larger as the type coefficients are larger, so that the type coefficients corresponding to the different types of request tasks can be defined according to the importance and timely response requirements of the different types of request tasks in practical application.

For example, in practical application, the timeliness requirement of data interaction between the host and the Cache (Cache memory or Cache) is high, so that a large type coefficient, such as 10, is set for a request task of reading data or writing data interacted with the Cache; compared with Cache interaction, the timeliness requirement is lower for the request task of the common memory read-write type, and therefore the type coefficient can be set to be 7 for the common memory read-write type; the timeliness of the request tasks of the types such as virtual page replacement and memory release is low, and the request tasks can be executed when memory application or memory read-write is not performed, so that the type coefficient of the request tasks of the types such as virtual page replacement and memory release can be set to 2.

The type coefficients of different types of request tasks can be customized according to the requirements in the actual implementation process.

The type coefficient of the requested task may then be directly used as the priority coefficient.

A2: and determining the target priority corresponding to the request task according to the priority coefficient corresponding to the request task and the threshold range corresponding to each of the priorities.

The threshold ranges corresponding to the priorities can be set in a self-defined manner according to the requirements of practical applications, and when the priorities I, II, III and IV are set, for example, the threshold range corresponding to the priority I is 9-10, the threshold range corresponding to the priority II is 7-8, the threshold range corresponding to the priority III is 4-6, the threshold range corresponding to the priority IV is 1-3, and when a task management module receives a request task for reading data or writing data interacted with a Cache, the priority coefficient of the request task is determined to be 10, and the priority corresponding to the request task is determined to be the priority I.

Referring to fig. 3, a flowchart illustrating steps of a method for determining a target priority of a request task according to an embodiment of the present application is shown, where the task management module may further determine, according to a type and a data length of the request task, the target priority corresponding to the request task, and specifically includes the following steps:

B1: and determining the type coefficient of the request task according to the type of the request task.

The type coefficients corresponding to the different types of request tasks can be defined according to the importance and timely response requirements of the different types of request tasks in practical application, and the type coefficients are in direct proportion to the priority coefficients.

By way of example, the type factor of the requested task for the type of data interaction between the host and the Cache (Cache or Cache) may be set to 10; the type coefficient of the request task of the common memory read-write type is 7; the type coefficient of the request task of the memory release type may be set to 2.

B2: and determining the length coefficient of the request task according to the data length of the request task.

Generally, the longer the data length of the request task is, the longer the execution time is, so the higher priority is set for the request task with the longer data length, i.e. the length coefficient is proportional to the priority coefficient.

In the actual implementation process, the data length of the request task can be obtained, the data length is scaled to a numerical value between 1 and 10, 10 data length ranges can be set, the length coefficient corresponding to the minimum data length range is 1 according to the sequence of the data length from small to large, the length coefficient corresponding to the maximum data length range is 10, and the length coefficient corresponding to the request task can be determined according to the data length range of the data length of the request task.

B3: and determining a priority coefficient corresponding to the request task according to the type coefficient and the length coefficient.

In practical implementation, the type coefficient and the length coefficient may be directly summed to obtain a priority coefficient, or priority weights corresponding to the type coefficient and the length coefficient may be set, and the type coefficient and the length coefficient may be weighted and summed according to the priority weights corresponding to the type coefficient and the length coefficient to obtain the priority coefficient, where the priority weight of the type coefficient is 0.6 and the priority weight of the length coefficient is 0.4, for example.

B4: and determining the target priority corresponding to the request task according to the priority coefficient corresponding to the request task and the threshold range corresponding to each of the priorities.

According to different calculation modes of obtaining the priority coefficient according to the type coefficient and the length coefficient, a plurality of threshold ranges corresponding to the priorities can be correspondingly set.

For example, if the range of the type coefficient is 1-10, the range of the length coefficient is also 1-10, when the type coefficient and the length coefficient are directly summed to obtain the priority coefficient, the range of the priority coefficient is 2-20, and the priority I, the priority II, the priority III and the priority IV are set, the threshold range corresponding to the priority I is 16-20, the threshold range corresponding to the priority II is 10-15, the threshold range corresponding to the priority III is 6-9, and the threshold range corresponding to the priority IV is 2-5.

If the range of the type coefficient is 1-10, the range of the length coefficient is also 1-10, the priority weight of the type coefficient is 0.6, the priority weight of the length coefficient is 0.4, when the type coefficient and the length coefficient are weighted and summed according to the priority weights corresponding to the type coefficient and the length coefficient to obtain the priority coefficient, the range of the priority coefficient is 1-10, and when the priority I, the priority II, the priority III and the priority IV are arranged, the threshold range corresponding to the priority I can be 9-10, the threshold range corresponding to the priority II is 7-8, the threshold range corresponding to the priority III is 4-6, and the threshold range corresponding to the priority IV is 1-3.

And comparing the priority coefficient corresponding to the request task with a threshold range corresponding to each priority, and determining the target priority corresponding to the request task.

Referring to fig. 4, a flowchart illustrating steps of a method for determining a target priority of a requested task according to an embodiment of the present application is shown, where the task management module may determine, according to a type and a data length of the requested task and a request frequency of a host that issues the requested task, the target priority corresponding to the requested task, and specifically includes the following steps:

c1: and determining the type coefficient of the request task according to the type of the request task.

According to the importance of different types of request tasks in practical application and timely response requirements, defining type coefficients corresponding to the different types of request tasks, wherein the type coefficients are in direct proportion to the priority coefficients, and the type coefficients of the request tasks of the data interaction type between a host and a Cache can be set to be 10; the type coefficient of the request task of the common memory read-write type is 7; the type coefficient of the request task of the memory release type may be set to 2.

C2: and determining the length coefficient of the request task according to the data length of the request task.

In the actual implementation process, the data length of the request task can be scaled to a value between 1 and 10 according to the data length; or setting 10 data length ranges, wherein the minimum data length range corresponds to a length coefficient of 1, the maximum data length range corresponds to a length coefficient of 10 according to the sequence of the data length from small to large, and determining the length coefficient corresponding to the request task according to the data length range to which the data length of the request task belongs.

And C3: acquiring the request frequency of a host machine for issuing the request task, and determining a frequency coefficient corresponding to the request task according to the request frequency.

For any host, if the request frequency of issuing the request task is higher, the priority of the host can be reduced, so that the problem of higher task request time delay of other hosts caused by too frequent requests of the host is avoided.

Therefore, the task management module may record the request frequency of each host in the calibration time, for example, the request frequency in one day or one week, determine the frequency coefficient corresponding to the request task according to the request frequency, and the higher the request frequency is, the lower the frequency coefficient is, for example, the range of the frequency coefficient may be set in the range of 1-10.

And C4: and determining a priority coefficient corresponding to the request task according to the type coefficient, the length coefficient and the frequency coefficient.

Specifically, the sum of the type coefficient, the length coefficient and the frequency coefficient can be used as a priority coefficient corresponding to the request task; the type coefficient, the length coefficient and the frequency coefficient may also be weighted and summed according to their corresponding priority weights to obtain a priority coefficient, where the priority weight of the type coefficient is 0.5, the priority weight of the length coefficient is 0.3 and the priority weight of the frequency coefficient is 0.2, for example.

It is contemplated that the priority of a requested task may be reduced while a host requests too frequently, but to avoid excessive request latency for the host, the priority weight of the frequency coefficients may be set to be the lowest.

C5: and determining the target priority corresponding to the request task according to the priority coefficient corresponding to the request task and the threshold range corresponding to each of the priorities.

According to different calculation modes of obtaining the priority coefficient according to the type coefficient, the length coefficient and the frequency coefficient, a plurality of threshold ranges corresponding to the priorities can be correspondingly set.

For example, if the range of the type coefficient is 1-10, the range of the length coefficient is 1-10, the range of the frequency coefficient is also 1-10, the priority weight of the type coefficient is 0.5, the priority weight of the length coefficient is 0.3, the priority weight of the frequency coefficient is 0.2, when the priority coefficient is obtained by weighting and summing the type coefficient, the length coefficient and the frequency coefficient according to the priority weights corresponding to the type coefficient, the length coefficient and the frequency coefficient, the range of the priority coefficient is 1-10, and when the priority I, the priority II, the priority III and the priority IV are provided, the threshold range corresponding to the priority I can be 9-10, the threshold range corresponding to the priority II is 7-8, the threshold range corresponding to the priority III is 4-6, and the threshold range corresponding to the priority IV is 1-3.

In this embodiment, the type coefficient, the length coefficient, the frequency coefficient, the priority coefficient, and the numerical value setting of the threshold range of each priority are merely examples, and specific numerical value setting can be adjusted in a self-defined manner according to the actual application requirement, which is not limited in this embodiment.

After determining the target priority of the request task, the task management module further determines the task queue to which the request task belongs under the target priority, namely, determines the target task queue corresponding to the request task.

Specifically, considering that if the allocation of the requested tasks in the plurality of task queues is uneven, the waiting time of the requested tasks in the task queues with excessive number of the requested tasks increases, so that in order to avoid longer time delay of part of the requested tasks, when determining the target task queues of the requested tasks, the task management module may obtain respective total time length to be executed of the plurality of task queues under the target priority corresponding to the requested tasks, and take the task queue with the minimum total time length to be executed as the target task queue corresponding to the requested task, where the respective total time length to be executed of the plurality of task queues is the sum of execution time lengths corresponding to all the requested tasks included in the plurality of task queues.

In an actual implementation process, each task queue in the preset plurality of task queues is provided with a counter, the counter is used for indicating total duration to be executed of the task queue, and after a request task is added into the target task queue, the task management module obtains execution duration of the request task and updates the counter of the target task queue according to the execution duration of the request task.

When the latest request task is added in the target task queue, the request task is positioned at the tail of the target task queue, and when the request task needing to be started to be executed or processed is acquired from the task queue, the request task is acquired from the head of the task queue.

The execution duration of a request task can be estimated according to the data length of the request task, and the task management module can determine the execution duration corresponding to the request task according to the execution duration corresponding to the data length corresponding to the request task and the preset unit data length.

For example, assuming that the data length of one minimum request task operation is 64B, the unit data length may be set to 64B, then the execution duration corresponding to the unit data length is T0, and if the data length K of the request task a is the data length K, the execution duration corresponding to the request task may be calculated to be k×t0/64.

The value T of the counter of each task queue is the total duration to be executed of the task queue, when a request task with the execution duration of T1 is added in the task queue, t=t+t1, and when a request task with the execution duration of T2 in the task queue is executed, the request task is cleared from the task queue, and t=t-T2 of the task queue.

When determining the target task queue corresponding to the request task A, the target priority corresponding to the request task A has 3 task queues: the method comprises the steps of comparing T values corresponding to the 3 task queues, namely, a task queue 1, a task queue 2 and a task queue 3, wherein the total duration to be executed of the task queue 2 is minimum, the total duration to be executed is used as a target task queue of a request task A, after the request task A is added into the task queue 2, a counter of the task queue 2 is updated according to the execution duration of the request task A, namely, T=T+K×T0/64 of the task queue 2.

The request tasks issued by the hosts can be managed in space through the task queues in the task management module, and when each request task is distributed to the task queue under the corresponding priority, the request task is added to the task queue with the minimum total duration to be executed according to the total duration to be executed of the task queue under the priority, so that the request task is managed in the time dimension, and the problem that the request task issued by the hosts is congested is avoided.

In another possible implementation manner, after receiving the request task issued by any host, the task management module may further detect a length of a target memory address corresponding to the request task when the type of the request task is a read data operation or a write data operation, split the request task into a plurality of sub-request tasks when the length of the target memory address is greater than a length threshold, and determine target task queues corresponding to the plurality of sub-request tasks respectively; in practical application, the length threshold value can be set according to the requirement of practical application.

Because the read-write operation of the large-block memory address may block the access of other hosts to the memory module where the memory address is located, and the read-write operation of the large-block memory address consumes longer time, which results in longer waiting time of other request tasks, in order to reduce the time consumption of the whole request task, the request task corresponding to the target memory address greater than the length threshold can be split into a plurality of sub request tasks, each sub request task is equivalent to an independent request task, and the target task queues corresponding to the sub request tasks are respectively determined.

For example, one request task is to read 2M data from a start address, and the request task may be decomposed into two or more small sub-tasks, where splitting the request task into two sub-request tasks is taken as an example, where the first sub-request task is to read M data from the start address, and the second sub-request task is to read M data from the start address+m, and then determine target task queues corresponding to the first sub-request task and the second sub-request task respectively, so that a request task with an excessively long execution duration does not occupy a read-write operation of a memory module for a long time.

When the task management module obtains the to-be-executed request task from the task queues, the to-be-executed request task can be obtained from the plurality of task queues according to a preset rule, and a corresponding processing strategy is executed according to the type of the to-be-executed request task, so that the plurality of hosts can share the plurality of memory modules.

In a possible implementation manner, the preset rule may be that the task management module obtains the requested task to be executed in parallel in a plurality of task queues corresponding to the same priority according to the order of the priority from high to low, and executes the corresponding processing policy according to the type of the requested task to be executed.

By way of example, 3 task queues are set under the priority I, 2 task queues are set under the priority II, 2 task queues are set under the priority III, 1 task queue is set under the priority IV, the request task to be executed can be obtained in parallel from the 3 task queues with the highest priority I for processing, and when the 3 task queues with the priority I are empty, the processing can be converted into the processing of the request task to be executed, which is obtained in parallel from the 2 task queues with the priority II.

Or, when the task queue of the current priority is processed, detecting the waiting time of the request task at the head of the queue in the 2 task queues of the priority II, wherein the waiting time can be the difference value between the time of issuing the request task and the current time, and if the waiting time exceeds the waiting time threshold, the processing can be switched to the parallel acquisition of the request task to be executed from the 2 task queues of the priority II after the request task of the current priority is processed normally, and the process is circularly executed according to the order of the priority from high to low.

In another possible implementation manner, the task management module may further obtain a request task to be executed in parallel in the preset multiple task queues, and execute a corresponding processing policy according to a type of the request task to be executed.

The request task to be executed can be obtained in parallel from all the task queues for processing no matter the priority.

The method has the advantages that the request tasks to be executed are obtained in parallel according to the priority order, or the request tasks to be executed are obtained in parallel from all the task queues, so that a plurality of request tasks can be synchronously processed, the number of the request tasks synchronously processed can be controlled according to the number of the task queues, and the problem that when too many request tasks are synchronously executed, a plurality of request tasks for performing read-write operation simultaneously aim at the same memory module to cause congestion of the request tasks is avoided.

When the type of the request task to be executed is a data reading operation or a data writing operation, the task management module determines that the request task to be executed corresponds to a target memory module, and sends the request task to be executed to the target memory module so as to perform the reading operation or the writing operation of a target memory address corresponding to the request task to be executed in the target memory module.

Although the number of the request tasks to be executed can be controlled to be synchronous according to the number of the task queues, congestion of the request tasks caused by that a plurality of request tasks for performing read-write operations are simultaneously directed against the same memory module is reduced to a certain extent, in the case of obtaining the request tasks to be executed in parallel, there may be a case that a plurality of request tasks to be executed perform read operations or write operations against the same target memory module.

Therefore, in order to avoid that a plurality of to-be-executed request tasks perform read operation or write operation on the same target memory module, a congestion buffer queue can be further set in the task management module, and when the target memory module is in another data reading operation or data writing operation, the task management module adds the to-be-executed request tasks into the congestion buffer queue; and when the target memory module finishes another data reading operation or data writing operation, the task management module is used for sending the request task to be executed in the congestion buffer queue to the target memory module.

The task management module is used for managing the request tasks issued by the multiple hosts, and a memory record table is maintained in the task management module, wherein the memory record table records the use states of the multiple memory modules, and the use states comprise the respective memory block marks, the memory block sizes, the occupation states of the memory blocks, the host marks of the memory blocks and the sharing states of the memory blocks.

The memory record table is shown in table 1, for example.

Table 1 memory record table

The memory module has a larger storage range, so that one memory module is often divided into a plurality of memory blocks, for example, the size of each memory block can be 128M, and different standards for dividing the memory block size can be adopted for each memory module according to the actual application requirement, which is not limited in the embodiment; and each memory block is correspondingly provided with a unique identifier as a memory block label; the occupied state of the memory block comprises occupied and unoccupied, and can be represented by 1 and unoccupied by 0; if any memory block is in the occupied state, the memory block also corresponds to the host identifier of the memory block, for example, #2 memory block is occupied, and the corresponding host identifier is host 1 and is not shared, so that the sharing state is 0; the #5 memory block is occupied, and the corresponding host identities are host 1 and host 3, which means that the #5 memory block is shared by both hosts, and thus the sharing state is 1.

The use condition of each memory module including the occupation condition and the sharing condition can be clearly managed through the memory record table maintained in the task management module, and the memory application can be more reasonably distributed and the memory release can be timely recorded based on the memory record table, and meanwhile, the host can also conveniently inquire and monitor the memory state.

Specifically, when the task management module receives that the type of the request task issued by any host is memory state reading, the task management module may directly obtain the memory record table without adding the request task to a task queue, generate a memory state result according to a memory state reading object of the request task, and return the memory state result to the host corresponding to the request task.

For example, any host may set all the memories occupied by itself or designate the memories of any memory block as memory state reading objects, so that the entries and data in the memory record table of the memory state reading objects are returned to the host as memory state results.

When the type of the request task to be executed is memory release, the task management module is configured to change the occupied state of the memory block corresponding to the target release memory address into unoccupied state in the memory record table according to the target release memory address corresponding to the request task to be executed.

When the memory is released, the memory module can be entered to delete old data stored in the target released memory address, the occupied state of the memory block corresponding to the target released memory address is changed into unoccupied through the memory record table, when any host issues a request task of a memory application, the target released memory address can be directly reassigned, and the writing operation of any host to the section of memory can directly enable new data to cover the old data, so that the processing cost is saved.

When the type of the request task to be executed is a memory application, the task management module is configured to determine a target memory address with the application memory length in the memory record table according to the application memory length corresponding to the request task to be executed, change the occupied state of a memory block corresponding to the target memory address to occupied, and configure a host identifier corresponding to the request task to be executed for the target memory address.

After determining the target memory address, the target memory address can be returned to the host sending the memory application to inform the host of the address of the memory applied by the host, when the host subsequently performs read-write operation on the memory address, the target memory address is carried in a request task of the read-write operation type issued by the host, and when executing the processing strategy of the request task, the request task is sent to the target memory address through the cache consistency interconnection protocol to perform read-write operation on the target memory address.

In the system, the memory module can be additionally arranged, so that the memory space can be further expanded, or the existing memory module can be deleted according to the requirement.

When a memory module is newly added in the system, the task management module responds to the operation of the newly added memory module, and newly adds an item of the newly added memory module in the memory record table, wherein the item of the newly added memory module comprises a memory block label, a memory block size, an occupied state of the memory block, a host identification of the memory block and a shared state of the memory block of the newly added memory module.

When a memory module is deleted in the system, the task management module responds to the operation of the memory module to be deleted, and deletes the table entry of the memory module to be deleted in the memory record table, wherein the table entry of the memory module to be deleted comprises the memory block label, the memory block size, the occupied state of the memory block, the host identification of the memory block and the sharing state of the memory block of the memory module to be deleted.

In a possible implementation manner, the task management module not only can receive a cxl.io command issued by any host as a request task, but also can receive the request task issued by the host for the host connected based on the PCIE protocol, which is the host connected to the high-speed serial computer expansion bus standard, and the task management module is provided with a high-speed serial task queue, and adds the request task to the high-speed serial task queue when receiving the request task issued by any host connected to the high-speed serial computer expansion bus standard, so that the host connected based on the PCIE protocol can access the memory module.

Referring to fig. 5, a flowchart illustrating steps of a memory access method according to an embodiment of the present application is shown, where the method is applied to a multi-host shared memory system described in the embodiment, and the method includes:

s101: any one of the plurality of hosts issues a requested task.

Any host computer issues CXL.IO command as request task through doorbell register, and sends to task management module.

S102: the task management module receives the request task issued by any host, determines a target task queue corresponding to the request task from a plurality of preset task queues, and adds the request task into the target task queue.

The task queues preset in the task management module can be set to be a plurality of priorities, and each priority corresponds to a plurality of task queues.

And when the task management module receives a request task of a memory state reading type, acquiring the memory record table, generating a memory state result according to a memory state reading object of the request task, and returning the memory state result to a host corresponding to the request task.

If a request task of a non-memory state read type is received, for example, it is: when a memory release type request task, a memory application type request task, a read data operation or a write data operation type request task is performed, firstly determining a target priority corresponding to the request task, and then determining a target task queue corresponding to the request task in a plurality of task queues corresponding to the target priority.

S103: the task management module acquires the request task to be executed from the plurality of task queues according to a preset rule, and executes a corresponding processing strategy according to the type of the request task to be executed so as to realize the sharing of the plurality of memory modules by the plurality of hosts.

For example, the request tasks to be executed may be obtained in parallel from a plurality of task queues corresponding to the same priority according to the order of the priority from high to low, and the corresponding processing strategies are executed according to the types of the request tasks to be executed; or the request task to be executed is obtained in parallel in the preset plurality of task queues, and a corresponding processing strategy is executed according to the type of the request task to be executed, and in the actual implementation process, the mode of obtaining the request task to be executed in parallel can be selected according to the requirement of the actual application.

Referring to fig. 6, a flowchart illustrating an execution of a memory access method provided in an embodiment of the present application is shown, including the following steps:

s0: any one of the plurality of hosts issues a requested task.

S1: and judging whether the type of the request task is memory state reading.

If the request task is of the memory state reading type, executing the step S2;

if the request task is of a non-memory state reading type, executing step S4;

s2: and reading the memory record table to generate a memory state result.

S3: and returning the memory state result to the host.

S4: a target task queue of the requested task is determined and the requested task is added to the target task queue.

S5: and acquiring the request tasks to be executed in parallel from a plurality of task queues corresponding to the same priority according to the order of the priority from high to low, or acquiring the request tasks to be executed in parallel from all the task queues.

S6: and judging the type of the request task.

If the type of the request task is memory release, executing step S7;

if the type of the request task is the memory application, executing step S8;

if the type of the requested task is a read data operation or a write data operation, step S10 is executed.

S7: and changing the occupied state of the memory block corresponding to the target release memory address into unoccupied memory in the memory record table.

S8: and determining a target memory address with the application memory length in the memory record table, changing the occupied state into occupied state, and adding a host identifier.

S9: and returning an application completion response to the host.

S10: and entering a target memory module to perform read operation or write operation.

And if the data is read, returning the read data to the host.

Referring to fig. 7, a flowchart illustrating steps of a memory access method according to an embodiment of the present application is applied to a task management module, where the method includes:

s201: and acquiring a request task issued by any one of the plurality of hosts.

Any host can issue CXL.IO command as request task through doorbell register, and send to task management module.

S202: and determining a target task queue corresponding to the request task in a plurality of preset task queues, and adding the request task into the target task queue.

The task management module comprises a plurality of preset task queues, the task queues can be set to be a plurality of priorities, and each priority corresponds to the task queues.

If the task management module receives a request task of a memory state reading type, acquiring the memory record table, generating a memory state result according to a memory state reading object of the request task, and returning the memory state result to a host corresponding to the request task.

If the task management module receives a request task of a non-memory state reading type, for example, the task management module is: when a memory release type request task, a memory application type request task, a read data operation or write data operation type request task is performed, firstly determining a target priority corresponding to the request task, and then determining a target task queue corresponding to the request task.

Through a plurality of task queues in the task management module, the request tasks issued by a plurality of hosts can be managed in space, and meanwhile, when each request task is distributed to the task queue under the corresponding priority, the request task is added to the task queue with the minimum total duration to be executed according to the size of the total duration to be executed of the task queue under the priority, so that the request task is managed in the time dimension, and the problem that the request task issued by the plurality of hosts is congested is avoided.

S203: and acquiring the request task to be executed from the plurality of task queues according to a preset rule, and executing a corresponding processing strategy according to the type of the request task to be executed, wherein the processing strategy is used for realizing the access of the corresponding request task to the memory module.

The method comprises the steps that request tasks to be executed can be obtained in parallel in a plurality of task queues corresponding to the same priority according to the order of the priority from high to low, and corresponding processing strategies are executed according to the types of the request tasks to be executed; or the request task to be executed is obtained in parallel in a plurality of preset task queues, the corresponding processing strategy is executed according to the type of the request task to be executed, and in the actual implementation process, the mode of obtaining the request task to be executed in parallel can be selected according to the requirement of the actual application.

The processing policy is used for implementing access of the corresponding request task to the memory module, for example, for a request task of a memory release type, the task management module changes the occupied state of a memory block corresponding to a target release memory address into unoccupied state in the memory record table according to the target release memory address corresponding to the request task.

When the type of the request task of the memory application type is memory application, the task management module determines a target memory address with the application memory length in the memory record table according to the application memory length corresponding to the request task, changes the occupied state of a memory block corresponding to the target memory address into occupied state, and configures a host identity corresponding to the request task for the target memory address.

For a request task of a read data operation or write data operation type, a task management module determines a target memory module corresponding to the request task, and sends the request task to the target memory module so as to perform read operation or write operation of a target memory address corresponding to the request task to be executed in the target memory module.

Referring to fig. 8, a schematic diagram of a computing processing device provided in an embodiment of the present application is shown, including: one or more processors 710 and a memory 720, the memory 720 having computer readable code stored therein; when executed by the one or more processors 710, the computing processing device performs the memory access method of the embodiments.

Referring to fig. 9, there is shown a schematic diagram of a nonvolatile readable storage medium provided in an embodiment of the present application, where the nonvolatile readable storage medium 801 stores a computer program 810, and the computer program 810 performs a memory access method according to an embodiment when executed by a processor.

In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.

It will be apparent to those skilled in the art that embodiments of the present application may be provided as a method, apparatus, or computer program product. Accordingly, the present embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While preferred embodiments of the present embodiments have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the present application.

Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.

The principles and embodiments of the present application are described herein with specific examples, the above examples being provided only to assist in understanding the methods of the present application and their core ideas; meanwhile, as those skilled in the art will have modifications in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.

Claims

1. A multi-host shared memory system, the system comprising a plurality of hosts, a task management module, and a plurality of memory modules, the task management module coupled to the plurality of memory modules via a cache coherence interconnect protocol, wherein:

any one of the plurality of hosts is used for issuing a request task;

2. The system of claim 1, wherein the predetermined plurality of task queues are divided into a plurality of priorities, each priority corresponding to a plurality of task queues;

3. The system of claim 2, wherein the system further comprises a controller configured to control the controller,

the task management module is used for determining the target priority corresponding to the request task according to the type of the request task, and corresponding priorities are preset for different types of the request task.

4. A system according to claim 3, wherein the task management module is configured to:

determining a type coefficient of the request task according to the type of the request task, and determining a priority coefficient corresponding to the request task according to the type coefficient;

5. The system of claim 2, wherein the system further comprises a controller configured to control the controller,

the task management module is used for determining the target priority corresponding to the request task according to the type and the data length of the request task.

6. The system of claim 5, wherein the task management module is configured to:

determining a type coefficient of the request task according to the type of the request task;

7. The system of claim 2, wherein the system further comprises a controller configured to control the controller,

the task management module is used for determining the target priority corresponding to the request task according to the type and the data length of the request task and the request frequency of a host computer which issues the request task.

8. The system of claim 7, wherein the task management module is configured to:

9. The system of any of claims 2-8, wherein the task management module is configured to:

10. The system of claim 9, wherein each task queue of the preset plurality of task queues is provided with a counter, and the counter is used for indicating the total duration to be executed of the task queue;

11. The system of claim 10, wherein the task management module is configured to determine an execution duration corresponding to the requested task according to an execution duration corresponding to the data length corresponding to the requested task and a preset unit data length.

12. The system of claim 1, wherein the task management module is configured to detect, after receiving the request task issued by any host, a length of a target memory address corresponding to the request task when the type of the request task is a read data operation or a write data operation;

13. The system of claim 1, wherein the task management module maintains a memory record table, and wherein the memory record table records usage states of the plurality of memory modules, the usage states including respective memory block numbers, memory block sizes, occupancy states of memory blocks, host identifiers of memory blocks, and sharing states of memory blocks of the plurality of memory modules.

14. The system of claim 13, wherein the system further comprises a controller configured to control the controller,

when the task management module receives that the type of the request task issued by any host is memory state reading, the task management module is used for acquiring the memory record table, generating a memory state result according to a memory state reading object of the request task, and returning the memory state result to the host corresponding to the request task.

15. The system of claim 13, wherein the task management module is configured to obtain, in parallel, a requested task to be executed in the preset plurality of task queues, and execute a corresponding processing policy according to a type of the requested task to be executed.

16. The system of claim 13, wherein the task management module is configured to obtain, in parallel, a requested task to be executed in a plurality of task queues corresponding to the same priority in order of priority from high to low, and execute a corresponding processing policy according to a type of the requested task to be executed.

17. The system of claim 15 or 16, wherein the system comprises a plurality of sensors,

18. The system of claim 15 or 16, wherein the system comprises a plurality of sensors,

19. The system of claim 15 or 16, wherein the system comprises a plurality of sensors,

when the type of the request task to be executed is a data reading operation or a data writing operation, the task management module is used for determining that the request task to be executed corresponds to a target memory module, and sending the request task to be executed to the target memory module so as to perform the reading operation or the writing operation of a target memory address corresponding to the request task to be executed in the target memory module.

20. The system of claim 19, wherein the system further comprises a controller configured to control the controller,

when the target memory module is in another data reading operation or data writing operation, the task management module adds the request task to be executed into a congestion buffer queue;

21. The system of claim 13, wherein when a memory module is newly added in the system, the task management module is configured to respond to an operation of the newly added memory module by newly adding an entry of the newly added memory module in the memory record table, where the entry of the newly added memory module includes a memory block number, a memory block size, an occupied state of a memory block, a host identifier of the memory block, and a shared state of the memory block of the newly added memory module.

22. The system of claim 13, wherein when a memory module is deleted in the system, the task management module is configured to delete an entry of the memory module to be deleted in the memory record table in response to an operation of the memory module to be deleted, the entry of the memory module to be deleted including a memory block number, a memory block size, an occupied state of the memory block, a host identification of the memory block, and a shared state of the memory block of the memory module to be deleted.

23. The system of claim 1, wherein the preset plurality of task queues further comprises a high-speed serial task queue, and the task management module is configured to add the request task to the high-speed serial task queue when any host issuing the request task through the high-speed serial computer expansion bus standard is received.

24. A memory access method, wherein the method is applied to a multi-host shared memory system as claimed in any one of claims 1-23, the method comprising:

any one of the plurality of hosts issues a request task;

25. A memory access method, applied to a task management module, comprising:

acquiring a request task issued by any one of a plurality of hosts;

26. A computing processing device, comprising:

a memory having computer readable code stored therein; one or more processors, the computing processing device performing the memory access method of claim 24 or performing the memory access method of claim 25 when the computer readable code is executed by the one or more processors.

27. A non-transitory readable storage medium storing a computer program, wherein the computer program when executed by a processor performs the memory access method of claim 24 or performs the memory access method of claim 25.