CN117795477A - 预测技术 - Google Patents

预测技术 Download PDF

Info

Publication number
CN117795477A
CN117795477A CN202280053705.2A CN202280053705A CN117795477A CN 117795477 A CN117795477 A CN 117795477A CN 202280053705 A CN202280053705 A CN 202280053705A CN 117795477 A CN117795477 A CN 117795477A
Authority
CN
China
Prior art keywords
prediction
data value
vector
source
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202280053705.2A
Other languages
English (en)
Chinese (zh)
Inventor
亚利阳德罗·马丁内兹·文森特
奈杰尔·约翰·斯蒂芬斯
伊莲娜·米兰诺维奇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd filed Critical ARM Ltd
Publication of CN117795477A publication Critical patent/CN117795477A/zh
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
CN202280053705.2A 2021-07-21 2022-06-22 预测技术 Pending CN117795477A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB2110500.2A GB2612010B (en) 2021-07-21 2021-07-21 Predication techniques
GB2110500.2 2021-07-21
PCT/GB2022/051586 WO2023002147A1 (en) 2021-07-21 2022-06-22 Predication techniques

Publications (1)

Publication Number Publication Date
CN117795477A true CN117795477A (zh) 2024-03-29

Family

ID=77443517

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202280053705.2A Pending CN117795477A (zh) 2021-07-21 2022-06-22 预测技术

Country Status (8)

Country Link
US (1) US12705053B2 (cg-RX-API-DMAC7.html)
EP (1) EP4374250B1 (cg-RX-API-DMAC7.html)
JP (1) JP2024525798A (cg-RX-API-DMAC7.html)
KR (1) KR20240027144A (cg-RX-API-DMAC7.html)
CN (1) CN117795477A (cg-RX-API-DMAC7.html)
GB (1) GB2612010B (cg-RX-API-DMAC7.html)
IL (1) IL310119A (cg-RX-API-DMAC7.html)
WO (1) WO2023002147A1 (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20260119182A1 (en) * 2024-10-29 2026-04-30 Microsoft Technology Licensing, Llc System and Method for Single Instruction, Multiple Data (SIMD) Enhancements of ARM64 Processors

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7428631B2 (en) * 2003-07-31 2008-09-23 Intel Corporation Apparatus and method using different size rename registers for partial-bit and bulk-bit writes
US20080016320A1 (en) * 2006-06-27 2008-01-17 Amitabh Menon Vector Predicates for Sub-Word Parallel Operations
US7676647B2 (en) * 2006-08-18 2010-03-09 Qualcomm Incorporated System and method of processing data using scalar/vector instructions
US9703558B2 (en) 2011-12-23 2017-07-11 Intel Corporation Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate
CN104040489B (zh) 2011-12-23 2016-11-23 英特尔公司 多寄存器收集指令
CN104137059B (zh) 2011-12-23 2018-10-09 英特尔公司 多寄存器分散指令
US9606803B2 (en) * 2013-07-15 2017-03-28 Texas Instruments Incorporated Highly integrated scalable, flexible DSP megamodule architecture
US20150089189A1 (en) * 2013-09-24 2015-03-26 Apple Inc. Predicate Vector Pack and Unpack Instructions
US9400651B2 (en) * 2013-09-24 2016-07-26 Apple Inc. Early issue of null-predicated operations
GB2548908B (en) * 2016-04-01 2019-01-30 Advanced Risc Mach Ltd Complex multiply instruction

Also Published As

Publication number Publication date
EP4374250C0 (en) 2026-03-25
GB2612010A (en) 2023-04-26
EP4374250B1 (en) 2026-03-25
US20240329996A1 (en) 2024-10-03
JP2024525798A (ja) 2024-07-12
IL310119A (en) 2024-03-01
TW202307653A (zh) 2023-02-16
KR20240027144A (ko) 2024-02-29
GB2612010B (en) 2023-11-08
GB202110500D0 (en) 2021-09-01
WO2023002147A1 (en) 2023-01-26
US12705053B2 (en) 2026-08-11
EP4374250A1 (en) 2024-05-29

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