CN117793010A

CN117793010A - Flow control method and device

Info

Publication number: CN117793010A
Application number: CN202211143837.2A
Authority: CN
Inventors: 叶秋红; 何子键; 林云
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2022-09-20
Filing date: 2022-09-20
Publication date: 2024-03-29
Also published as: WO2024060730A1

Abstract

The embodiment of the application discloses a flow control method and a flow control device, which relate to the technical field of communication and can avoid network congestion of a network on chip. Firstly, receiving a data packet to be transmitted through an external interface; then determining destination information according to the data packet; and then determining whether to forward the data packet according to the destination information, the preset routing table and forwarding state information of at least one routing node in the plurality of routing nodes. Wherein the forwarding-state information is used to indicate whether a switching path between the routing node and at least one of its neighboring routing nodes is available.

Description

Flow control method and device

Technical Field

The embodiment of the application relates to the technical field of communication, in particular to a flow control method and a flow control device.

Background

Network-on-Chip (NoC) is a new communication method of system-on-Chip (Soc). It is a major component of multi-core technology. With the rapid development of very large scale integrated circuit technology, the scale of processor chips is also increasing. The NoC method, which is a brand new communication method on chip, has significantly better performance than a conventional bus system (bus) and is therefore used to provide data transmission services between processor cores instead of buses, because multiple processor cores are integrated within a single chip.

The network-on-chip is also a network in nature, and there are cases where multiple nodes send data packets to one node at the same time, in which case the node receiving the data packet may face a traffic burst, resulting in network-on-chip congestion. Therefore, how to avoid network congestion of the network on chip is one of the problems that need to be solved by those skilled in the art.

Disclosure of Invention

The embodiment of the application provides a flow control method and a flow control device, which can avoid network congestion of a network on chip. In order to achieve the above purpose, the embodiment of the application adopts the following technical scheme:

in a first aspect, an embodiment of the present application provides a flow control method, which is applied to a network on chip, where the network on chip includes a plurality of routing nodes, where the plurality of routing nodes includes a plurality of first nodes configured with external interfaces, and the first nodes: firstly, receiving a data packet to be transmitted through the external interface; then determining destination information according to the data packet; determining whether to forward the data packet according to the destination information, a preset routing table and forwarding state information of at least one routing node in the plurality of routing nodes; wherein the forwarding-state information is used to indicate whether a switching path between the routing node and at least one of its neighboring routing nodes is available.

It can be seen that in the flow control method provided in the embodiment of the present application, when a first node receives a data packet to be sent, whether to forward the packet is determined according to the state of the switching path of the routing node, so that network congestion of the network on chip caused by sending the data packet when the state of the switching path of the routing node is poor (such as congestion of the switching path and insufficient available bandwidth of the switching path) can be avoided.

In one possible implementation, the forwarding-state information is used to indicate whether a switching path between at least one first node of the plurality of first nodes and at least one neighboring routing node thereof is available.

It can be seen that, when the first node receives the data packet to be sent, it can determine whether to forward the packet according to the state of the switching path between the first node and its neighboring routing node, so that it can be avoided that the network congestion occurs in the network on chip when the state of the switching path between the first node and its neighboring routing node is poor (such as congestion of the switching path and insufficient bandwidth of the switching path).

In another possible implementation manner, the forwarding-state information is used to indicate whether a switching path between a preset routing node and at least one adjacent routing node of the plurality of routing nodes is available.

It can be seen that in the flow control method provided in the embodiment of the present application, when the first node receives a data packet to be sent, whether to forward the packet is determined according to the state of the switching path of the preset routing node, so that network congestion of the network on chip caused by sending the data packet when the state of the switching path of the preset routing node is poor (such as congestion of the switching path and insufficient available bandwidth of the switching path) can be avoided.

In one possible implementation manner, the first node determines a switching path of the data packet according to the destination information and a preset routing table. The first node determines whether the switch path is available based on forwarding state information of at least one of the plurality of routing nodes. The first node forwards the data packet if the switching path is available. The first node does not forward the data packet if the switched path is not available.

It can be seen that the first node can determine the switching path of the data packet through the destination information and the preset routing table, and according to the forwarding state information of the routing node, it can determine whether the preset routing node through which the switching path of the data packet passes is available, and thus determine whether the switching path of the data packet is available, and then forward the data packet under the condition that the switching path of the data packet is available, so that it can be avoided that the first node sends the data packet when the state of the switching path between the preset routing node through which the switching path of the data packet passes and the adjacent routing node is poor (such as congestion of the switching path and insufficient available bandwidth of the switching path), thereby causing network congestion on the network.

In one possible implementation, the method further includes: the first node broadcasts first information to other first nodes of the plurality of first nodes, the first information being used to indicate forwarding state information of at least one routing node of the plurality of routing nodes.

For example, the first node may broadcast first information to other first nodes in the plurality of first nodes in the case that forwarding state information of the first node changes, where the first information is used to indicate forwarding state information of at least one routing node in the plurality of routing nodes.

In the flow control method provided by the embodiment of the invention, the first node can send the forwarding state information of the routing node of the network on chip to other first nodes in the plurality of first nodes of the network on chip by broadcasting the first information, so that the other first nodes in the plurality of first nodes forward the received data packet according to the obtained forwarding state information of the routing node, thereby avoiding network congestion of the network on chip.

Alternatively, the first information may be information of an ethernet protocol or an internet protocol (Internet Protocol, IP).

In one possible implementation, the method further includes: the first node updates forwarding state information of at least one routing node of the plurality of routing nodes according to the received first information, where the first information is used to indicate forwarding state information of at least one routing node of the plurality of routing nodes.

In the flow control method provided by the embodiment of the application, the first node can send the forwarding state information of the routing node of the network-on-chip to other first nodes of the network-on-chip by broadcasting the first information, so that the other first nodes forward the received data packet according to the obtained forwarding state information of the routing node, and network congestion of the network-on-chip is avoided.

In one possible implementation, the method further includes: and the first node determines forwarding state information of the routing node according to the target information of the routing node.

In the flow control method provided by the embodiment of the application, the first node can receive the first information to determine the forwarding state information of the routing node of the on-chip network, and then forward the received data packet according to the forwarding state information of the routing node of the on-chip network, so that network congestion of the on-chip network is avoided.

In a possible implementation, the forwarding-state information is used to indicate whether the number of available bytes sent and/or the number of available packets sent of the switching path between the routing node and at least one of its neighboring routing nodes is less than a predetermined threshold.

Illustratively, the forwarding-state information is used to indicate that the number of bytes available for transmission of the switching path between the routing node and at least one of its neighboring routing nodes is less than a predetermined threshold.

Further exemplary, the forwarding-state information is used to indicate whether an available messaging amount of a switching path between the routing node and at least one of its neighboring routing nodes is less than a predetermined threshold.

Further exemplary, the forwarding-state information is used to indicate whether an available number of bytes sent and an available amount of messaging sent of a switching path between the routing node and at least one of its neighboring routing nodes is less than a predetermined threshold.

It can be understood that when there is enough available byte number transmission amount and available message transmission amount in the switching path, the transmission of the data packet through the switching path will not cause congestion of the switching path, so that the first node in the flow control method provided in the embodiment of the present application can determine the forwarding state information of the routing node of the on-chip network by using the available byte number transmission amount and/or the available message transmission amount of the routing node.

In a second aspect, an embodiment of the present application provides a flow control device applied to a first node of a network on chip, where the network on chip includes a plurality of routing nodes, and the plurality of routing nodes includes a plurality of first nodes configured with external interfaces, where the device includes: a receiving and transmitting unit and a processing unit. The receiving and transmitting unit is used for receiving the data packet to be transmitted through the external interface. And the processing unit is used for determining the destination information according to the data packet. The processing unit is further configured to determine whether to control the transceiver unit to forward the data packet according to destination information, a preset routing table, and forwarding state information of at least one routing node of the plurality of routing nodes. Wherein the forwarding-state information is used to indicate whether a switching path between the routing node and at least one of its neighboring routing nodes is available.

Specifically, the flow control device may be the first node or a chip or a functional module in the first node.

In a possible implementation manner, the processing unit is specifically configured to: determining the switching path of the data packet according to the destination information and a preset routing table; determining whether the switching path is available according to forwarding state information of at least one routing node of the plurality of routing nodes; and controlling the transceiver unit to forward the data packet when the switching path is available.

In a possible implementation manner, the transceiver unit is further configured to: first information is broadcast to other first nodes in the plurality of first nodes, wherein the first information is used for indicating the forwarding state information.

In a possible implementation, the processing unit is further configured to: and updating the forwarding state information according to the received first information.

In a third aspect, embodiments of the present application further provide a flow control device, including: at least one processor, when executing program code or instructions, implements the method described in the first aspect or any possible implementation thereof.

Optionally, the flow control device may further comprise at least one memory for storing the program code or instructions.

In a fourth aspect, embodiments of the present application further provide a chip, including: an input interface, an output interface, at least one processor. Optionally, the chip further comprises a memory. The at least one processor is configured to execute code in the memory, which when executed by the at least one processor, implements the method described in the first aspect or any possible implementation thereof.

Alternatively, the chip may be an integrated circuit.

In a fifth aspect, embodiments of the present application further provide a computer readable storage medium storing a computer program comprising instructions for implementing the method described in the first aspect or any possible implementation thereof.

In a sixth aspect, embodiments of the present application also provide a computer program product comprising instructions which, when run on a computer, cause the computer to implement the method as described in the first aspect or any possible implementation thereof.

The flow control device, the computer storage medium, the computer program product and the chip provided in this embodiment are used to perform the above-provided method, so that the advantages achieved by the flow control device, the computer storage medium, the computer program product and the chip can refer to the advantages in the above-provided method, and are not described herein.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a network on chip according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of another network on chip according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of yet another network on chip according to an embodiment of the present application;

Fig. 4 is a schematic flow chart of a flow control method according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of a flow control device according to an embodiment of the present disclosure;

fig. 6 is a schematic structural diagram of a chip according to an embodiment of the present application;

fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the embodiments of the present application, are within the scope of the embodiments of the present application.

The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone.

The terms "first" and "second" and the like in the description of embodiments of the present application and in the drawings are used for distinguishing between different objects or between different processes of the same object and not for describing a particular order of objects.

Furthermore, references to the terms "comprising" and "having" and any variations thereof in the description of embodiments of the present application are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed but may optionally include other steps or elements not listed or inherent to such process, method, article, or apparatus.

It should be noted that in the description of the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.

In the description of the embodiments of the present application, unless otherwise indicated, the meaning of "a plurality" means two or more.

Some terms related to the embodiments of the present application will be explained first.

Token Bucket (Token Bucket): the principle of the token bucket algorithm is that the system will put tokens into the bucket at a constant rate, and if the request needs to be processed, it will need to first fetch a token from the bucket, and refuse service when no token is desirable in the bucket. When the bucket is full, the newly added tokens are discarded or rejected.

The token bucket algorithm is a bucket that holds fixed capacity tokens (token) and adds tokens to the bucket at a fixed rate. The token bucket algorithm can be basically described in terms of the following concepts:

tokens will be placed into the token bucket at a fixed rate. Such as 10 per second.

A maximum of b tokens are held in the bucket, and when the bucket is full, the newly added tokens are discarded or rejected.

When an n-byte size packet arrives, n tokens are removed from the bucket and the packet is sent onto the network.

If there are fewer than n tokens in the bucket, then no tokens will be deleted and the packet will be throttled (either discarded or buffer waiting).

Push-Pull mixed mode (POP); the sending end allows a small amount of uncontrolled messages to be sent to the destination end in a pushing mode; meanwhile, the uncontrolled messages bear the request information of Pull, and the destination terminal pulls data from the sending node according to the export capability after receiving the request information.

Push (Push); indicating that the sending node is not controlled and directly pushing the message into the network.

Pull (Pull): representing the transmitting node, fully controlled; the sending node transmits the sending request to the destination node, and the destination node pulls the message from the sending node according to the capability of the destination node to exit.

Network-on-chip is a new communication method for system-on-chip. It is a major component of multi-core technology. With the rapid development of very large scale integrated circuit technology, the scale of processor chips is also increasing. The NoC method is a brand new communication method on a chip, which is significantly better than the performance of the traditional bus system, and is used for providing data transmission service between processor cores instead of buses.

The network-on-chip is also a network in nature, and there are cases where multiple nodes send data packets to one node at the same time, in which case the node receiving the data packet may face a traffic burst, resulting in network-on-chip congestion.

Therefore, the embodiment of the application provides a flow control method, which can avoid network congestion of a network on chip. The flow control method is applicable to a network on chip, one possible existence of which is shown in fig. 1. The network on chip comprises a plurality of routing nodes as shown in fig. 1. The plurality of routing nodes comprise a plurality of first nodes, and the first nodes are routing nodes provided with external ports in the plurality of routing nodes.

In one possible implementation manner, the first node may be a routing node, which is provided with an external port in the plurality of routing nodes and is connected to a resource node external to the routing node through the external port.

It will be appreciated that in one scenario, the routing nodes are different in structure, and only the routing node connected to the external resource node is configured with the external port, so that it can be determined that the routing node with the external port among the plurality of routing nodes is the first node. In another scenario, the routing nodes have the same structure and are all provided with external ports, so that whether the routing node is the first node cannot be determined only by whether the routing node has an external port or not, but whether the routing node is the first node is determined by whether the routing node is connected with an external resource node or not.

The routing nodes may include external ports and internal ports through which the routing nodes may communicate with other routing nodes. The routing node may communicate with the resource node through an external port.

The resource nodes may include a computing node and a storage node.

The computing nodes may include various types of intellectual property cores (Intellectual Property, IP), i.e., processor cores, such as may include a central processor (central processing unit, CPU) core, an application processor (application processor, AP) core, a modem processor core, a graphics processor (graphics processing unit, GPU) core, an image signal processor (image signal processor, ISP) core, a video codec core, a digital signal processor (digital signal processor, DSP) core, a baseband processor core, and/or a neural-network processor (neural-network processing unit, NPU) core, etc.

The storage nodes may include various types of storage units. Such as Read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), dynamic random access Memory (Dynamic Random Access Memory, DRAM), and synchronous dynamic random access Memory (synchronous dynamic random-access Memory, SDRAM).

It should be noted that, the above-mentioned resource node is a resource node outside the routing node, and each processor core and each storage unit inside the routing node do not belong to the resource node.

The constituent structures shown in fig. 1 do not constitute a limitation of the network-on-chip, and the network-on-chip may include more or less components than those shown in fig. 1, or may combine some components, or may be arranged differently, in addition to the components shown in fig. 1.

As shown in fig. 2, the network on chip may include a plurality of routing nodes and a plurality of processor cores, which may be connected through the network on chip. The first node may be connected to the processor core through an external port, and may receive a data packet sent by the processor core through the external port.

The plurality of processor cores may include a central processor (central processing unit, CPU) core, an application processor (application processor, AP) core, a modem processor core, a graphics processor (graphics processing unit, GPU) core, an image signal processor (image signal processor, ISP) core, a video codec core, a digital signal processor (digital signal processor, DSP) core, a baseband processor core, and/or a neural-network processing unit, NPU core, etc.

As shown in fig. 3, the network on chip may include a plurality of routing nodes, a plurality of processor cores, and a plurality of memory units, which may be connected through the network on chip. The first node may be connected to the processor core or the memory unit through an external port, and may receive a data packet sent by the processor core or the memory unit through the external port.

The plurality of Memory cells may include Read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), dynamic random access Memory (Dynamic Random Access Memory, DRAM), and synchronous dynamic random access Memory (synchronous dynamic random-access Memory, SDRAM).

Fig. 4 is a schematic diagram of a flow control method according to an embodiment of the present application, where the method may be applied to the network on chip described above. The method comprises the following steps as shown in fig. 4:

s401, the first node receives a data packet to be sent through an external interface.

Illustratively, the first node may receive the data packet to be transmitted from the processor core to which it is connected through an external port.

Also illustratively, the first node may receive the data packet to be transmitted from a storage unit coupled thereto via an external port.

S402, the first node determines destination information according to the data packet.

Illustratively, the first node may determine the destination information from a five-tuple of the data packet.

S403, the first node determines whether to forward the data packet according to the destination information, the preset routing table and forwarding state information of at least one routing node in the plurality of routing nodes.

The forwarding state information is used to indicate whether a switching path between the routing node and at least one adjacent routing node (hereinafter referred to as a switching path of the routing node) is available.

In another possible implementation manner, the forwarding-state information is used to indicate whether a switching path between a preset routing node and at least one neighboring routing node of the plurality of routing nodes is available.

In one possible implementation manner, the first node may determine the switching path of the data packet according to the destination information of the data packet and a preset routing table. And then determining whether a switching path of the data packet is available according to forwarding state information of at least one routing node in the plurality of routing nodes. And then forwarding the data packet to a destination node of the data packet when a switching path of the data packet is available. In case the switching path of the data packet is not available, the data packet is not forwarded.

In one possible implementation, the first node may discard or store the data packet in the buffer of the first node in the event that the switch path of the data packet is unavailable or the data packet is not forwarded.

In one possible implementation manner, the first node may determine whether a switching path of each routing node through which the switching path passes is available, and determine whether a switching path of the data packet is available if the switching path of each preset routing node through which the switching path passes is available.

It should be noted that, in the flow control method provided in the embodiment of the present application, only the state of the switching path related to the preset routing node (e.g., the first node) where congestion is easy to occur in part may be monitored, and the states of the switching paths related to the other routing nodes are not monitored, so that resource consumption required for monitoring the states of the switching paths of the nodes in the network on chip is reduced.

The specific method for determining forwarding-state information of at least one routing node of the plurality of routing nodes may be processed by any method that can be considered by those skilled in the art, and embodiments of the present application are not specifically limited thereto.

In a possible implementation manner, the forwarding-state information is used to indicate whether an available number of bytes and/or an available amount of packets of a switching path between the routing node and at least one adjacent routing node thereof is less than a predetermined threshold.

Further exemplary, the forwarding-state information is used to indicate whether an available packet transmission amount of a switching path between the routing node and at least one neighboring routing node thereof is less than a predetermined threshold.

Further exemplary, the forwarding-state information indicates whether an available number of bytes and an available amount of packets transmitted by a switching path between the routing node and at least one of its neighboring routing nodes are less than a predetermined threshold.

In one possible implementation, a Token socket may be set for the switching path of the routing node, and then the switching path state of the routing node is determined through the level of the switching path of the routing node corresponding to the Token socket.

For example, in a case where the level of the switch path corresponding to the Token socket of the routing node is greater than a preset level, it is determined that the switch path is available in the switch path state of the routing node.

And under the condition that the grade of the switching path corresponding to the Token socket of the routing node is smaller than a preset grade, determining that the switching path is unavailable in the switching path state of the routing node.

In one possible implementation, the number of bytes available for transmission of the switch path may be used to determine (update) the Token Bucket class of the switch path for the routing node.

For example, in a case where the number of available bytes of the switch path of the routing node is greater than the first threshold, it may be determined (updated) that the switch path corresponds to the Token Bucket as the first level, that is, it is determined (updated) that the switch path is available in the switch path state of the routing node. Wherein the first level is greater than the predetermined level.

For another example, in the case where the number of available bytes of the switching path of the routing node is less than the second threshold, it may be determined (updated) that the switching path corresponds to the Token Bucket as the second level, that is, it is determined (updated) that the switching path is unavailable in the switching path state of the routing node. Wherein the second level is less than the predetermined level.

Wherein the first threshold is greater than or equal to the second threshold.

Optionally, one or more levels may be included between the first level and the second level.

For example, a third level, a fourth level, and a fifth level may be included between the first level and the second level.

In another possible implementation, the Token Bucket level of the switch path may be determined (updated) with the available messaging traffic of the switch path.

For example, if the available packet transmission amount of the switching path of the routing node is greater than the third threshold, it may be determined (updated) that the switching path corresponds to the Token socket as the first level, that is, it is determined (updated) that the switching path is available in the switching path state of the routing node.

For another example, if the available packet transmission amount of the switching path of the routing node is smaller than the fourth threshold, it may be determined (updated) that the switching path corresponds to the Token Bucket as the second level, that is, it is determined (updated) that the switching path is unavailable in the switching path state of the routing node.

Wherein the third threshold is greater than or equal to the fourth threshold.

In yet another possible implementation, the number of available bytes sent and the number of available messages sent of the switching path of the routing node may be used to determine (update) the rank of the Token Bucket of the switching path of the routing node.

For example, in a case where the available byte count transmission amount of the switching path of the routing node is greater than the first threshold value and the available message transmission amount is greater than the third threshold value, it may be determined (updated) that the switching path is available in the switching path state of the routing node.

For another example, in a case where the available byte count transmission amount of the switching path of the routing node is smaller than the second threshold value or the available packet transmission amount of the switching path is smaller than the fourth threshold value, it may be determined (updated) that the switching path is unavailable in the switching path state of the routing node.

In one possible implementation, the routing node may update the available byte count transmission of the switching path of the routing node after transmitting the data packet.

For example, the routing node may update the available byte count transmission amount of the switching path of the updated routing node to the current available byte count transmission amount PktLen after transmitting the data packet. Wherein PktLen is the size of a data packet sent by the switching path of the routing node.

It should be noted that, the initial available byte number of the switching path of the routing node may be the maximum available byte number of the switching path of the routing node, and the maximum available byte number of the switching path of the routing node may be determined by the switching capability of the routing node.

In another possible implementation, the routing node may update the available packet transmission amount of the switching path of the routing node after transmitting the data packet.

For example, the routing node may update the available messaging traffic of the switch path of the routing node to the current available messaging traffic-MN after sending the data packet. The MN is the number of messages sent by the switching path of the routing node.

It should be noted that, the initial available packet transmission amount of the switching path of the routing node may be the maximum available packet transmission amount of the switching path of the routing node, and the maximum available packet transmission amount of the switching path of the routing node may be determined by the switching capability of the routing node.

In one possible implementation, each routing node may store forwarding state information of other routing nodes (e.g., the first node and a preset routing node) in the plurality of routing nodes of the network-on-chip or a Token Bucket class of a switching path of the other routing nodes in the network-on-chip.

For example, each first node may store forwarding state information of other first nodes in the plurality of first nodes or preset routing nodes in the plurality of routing nodes of the network on chip.

For another example, each first node may store a rank of Token Bucket of a switching path of a preset routing node in other first nodes in the plurality of first nodes or the plurality of routing nodes of the network on chip.

In one possible implementation, the routing node may periodically increase the number of bytes available for transmission of the switching path of the routing node.

For example, the routing node may periodically increase the number of available bytes sent by the switching path of the routing node according to the Token Bucket class of the switching path of the routing node and the Token Bucket classes of the switching paths of other routing nodes stored by the routing node.

Alternatively, the transmission amount of the number of available bytes increased per cycle of the switching path of the routing node may be the maximum transmission amount of the number of available bytes of the switching path of the routing node (the Token Bucket class of the switching path of the routing node/the sum of Token Bucket classes of switching paths of other routing nodes stored by the routing node).

For example, the maximum available byte number transmission amount of the switching path of the first node 1 is 1000G, the first node 1 stores Token Bucket levels of the switching paths of the first node 1, the first node 2, the first node 3 and the first node 4, and the Token Bucket levels of the switching paths of the first node 1, the first node 2, the first node 3 and the first node 4 are all 1, so that the available byte number transmission amount increased per cycle of the switching path of the first node 1 is 1000 x (1/4) =250g.

In one possible implementation, the routing node may adjust the current available byte count transmission amount of the switching path to the maximum available byte count transmission amount of the switching path when the available byte count transmission amount of the switching path of the routing node is greater than the maximum available byte count transmission amount of the switching path of the routing node.

In one possible implementation, the routing node may periodically increase the amount of available messaging for the switching path of the routing node.

Alternatively, the amount of available packets sent by each cycle of the switching path of the routing node may be equal to the maximum amount of available packets sent by the switching path of the routing node (the Token Bucket class of the switching path of the routing node/the sum of Token Bucket classes of switching paths of other routing nodes stored by the routing node).

For example, the maximum available packet transmission amount of the switching paths of the first node 1 is 600, the first node 1 stores Token Bucket levels of the switching paths of the first node 1, the first node 2, the first node 3 and the first node 4, the Token Bucket levels of the switching paths of the first node 1, the first node 2 and the first node 3 are all 1, the Token Bucket level of the switching path of the first node 4 is 0, and the available byte number transmission amount increased by each cycle of the switching path of the first node 1 is 600×1/3=200.

In one possible implementation, the routing node may adjust the current available packet transmission amount of the switching path to the maximum available packet transmission amount of the switching path when the available packet transmission amount of the switching path of the routing node is greater than the maximum available packet transmission amount of the switching path of the routing node.

Optionally, the method may further include:

s404, the first node broadcasts the first information to other first nodes of the plurality of first nodes of the network-on-chip.

The first information is used for indicating forwarding state information of at least one routing node in the plurality of routing nodes.

In one possible implementation, the first node may broadcast the first information to other first nodes of the plurality of first nodes of the network-on-chip when a state of a switching path of the first node changes.

Illustratively, the network-on-chip includes a first node 1, a first node 2, a first node 3, and a first node 4. After the state of the switching path 1 of the first node 1 is updated from available to unavailable, the first node 1 may broadcast first information to the first node 2, the first node 3 and the first node 4 to inform the first node 2, the first node 3 and the first node 4 that the state of the switching path of the first node 1 is unavailable. Accordingly, after the first node 2, the first node 3 and the first node 4 receive the first information, the state of the switch path 1 in the stored forwarding state information of the first node 1 can be updated from available to unavailable according to the first information.

Optionally, the first information is used to indicate a forwarding path level of at least one routing node of the plurality of routing nodes.

In one possible implementation, the first node may broadcast the first information to other first nodes of the plurality of first nodes of the network-on-chip when the switching path level of the first node changes.

Illustratively, the network-on-chip includes a first node 1, a first node 2, a first node 3, and a first node 4. After the path level of the switching path 1 of the first node 1 is changed from the first level to the second level, the first node 1 may broadcast first information to the first node 2, the first node 3 and the first node 4 to inform the first node 2, the first node 3 and the first node 4 that the level of the switching path of the first node 1 is changed from the first level to the second level, and after the first node 2, the first node 3 and the first node 4 receive the first information, the path level of the switching path 1 in the stored forwarding state information of the first node 1 may be updated from the first level to the second level according to the first information.

Alternatively, the first information may be information of an ethernet protocol or an IP protocol.

S405, the first node updates forwarding state information of at least one routing node in the plurality of routing nodes according to the received first information.

Illustratively, the network on chip comprises a first node 1 and a first node 2. After receiving the first information sent by the first node 2 and used for indicating that the state of the switching path 5 of the first node 2 is updated from available to unavailable, the first node 1 may update the state of the switching path 1 in the stored forwarding state information of the first node 2 from available to unavailable according to the information.

In one possible implementation, POP scheduling may be performed between the first nodes.

A flow control device for performing the above-described flow control method will be described below with reference to fig. 5.

It will be appreciated that the flow control device, in order to achieve the above-described functions, includes corresponding hardware and/or software modules that perform the respective functions. The steps of an algorithm for each example described in connection with the embodiments disclosed herein may be embodied in hardware or a combination of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Those skilled in the art may implement the described functionality using different approaches for each particular application in conjunction with the embodiments, but such implementation is not to be considered as beyond the scope of the embodiments of the present application.

The embodiment of the present application may divide the flow control device into functional modules according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated modules described above may be implemented in hardware. It should be noted that, in this embodiment, the division of the modules is schematic, only one logic function is divided, and another division manner may be implemented in actual implementation.

In the case of dividing the respective functional modules with the respective functions, fig. 5 shows a schematic diagram of one possible composition of the flow control device involved in the above-described embodiment, and as shown in fig. 5, the flow control device 500 may include: a transceiver unit 501 and a processing unit 502.

Specifically, the flow control device 500 may be the first node or a chip or a functional module in the first node.

The transceiver 501 is configured to receive a data packet to be sent through the external interface.

The processing unit 502 is configured to determine the destination information according to the data packet.

The processing unit 501 is further configured to determine whether to control the transceiver unit 501 to forward the data packet according to the destination information, a preset routing table, and forwarding state information of at least one routing node of the plurality of routing nodes.

Wherein the forwarding-state information is used to indicate whether a switching path between the routing node and at least one neighboring routing node thereof is available.

In one possible implementation manner, the processing unit 501 is specifically configured to: and determining the switching path of the data packet according to the destination information and a preset routing table. Determining whether the switching path is available according to forwarding state information of at least one routing node of the plurality of routing nodes. And controlling the transceiver unit to forward the data packet when the switching path is available.

In a possible implementation manner, the transceiver unit 501 is further configured to: and broadcasting first information to other first nodes in the plurality of first nodes, wherein the first information is used for indicating the forwarding state information.

In a possible implementation manner, the processing unit 502 is further configured to: and updating the forwarding state information according to the received first information.

In one possible implementation, the first information is information of an ethernet protocol or an internetworking protocol.

The embodiment of the application also provides a chip. The chip may be a switch chip, a router chip, a network element chip, a network card chip, or other chips.

Fig. 6 shows a schematic structure of a chip 600. Chip 600 includes one or more processors 601 and interface circuitry 602. Optionally, the chip 600 may further include a bus 603.

The processor 601 may be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the flow control method described above may be performed by integrated logic circuitry of hardware in the processor 601 or instructions in the form of software.

Alternatively, the processor 601 may be a general purpose processor, a digital signal processor (digital signal processing, DSP) processor, an integrated circuit (application specific integrated circuit, ASIC), a field-programmable gate array (field-programmable gate array, FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The methods and steps disclosed in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The interface circuit 602 may be used for transmitting or receiving data, instructions, or information, and the processor 601 may process using the data, instructions, or other information received by the interface circuit 602, and may transmit processing completion information through the interface circuit 602.

Optionally, the chip further comprises a memory, which may include read only memory and random access memory, and provides operating instructions and data to the processor. A portion of the memory may also include non-volatile random access memory (non-volatile random access memory, NVRAM).

Optionally, the memory stores executable software modules or data structures and the processor may perform corresponding operations by invoking operational instructions stored in the memory (which may be stored in an operating system).

Alternatively, a chip may be used in the flow control device according to the embodiment of the present application. Alternatively, the interface circuit 602 may be configured to output the execution result of the processor 601. The flow control method provided in one or more embodiments of the present application may refer to the foregoing embodiments, and will not be described herein.

It should be noted that, the functions corresponding to the processor 601 and the interface circuit 602 may be implemented by a hardware design, a software design, or a combination of hardware and software, which is not limited herein.

Fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application, where the electronic device 700 may be a flow control device or a chip or a functional module in the flow control device. As shown in fig. 7, the electronic device 700 includes a processor 701, a transceiver 702, and a communication line 703.

Wherein the processor 701 is configured to perform any of the steps of the method embodiments shown in fig. 1, and when the steps are performed, the transceiver 702 and the communication line 703 may be selectively invoked to complete the corresponding operations.

Further, the electronic device 700 may also include a memory 704. The processor 701, the memory 704, and the transceiver 702 may be connected by a communication line 703.

The processor 701 is a central processing unit (central processing unit, CPU), a general purpose processor, a network processor (network processor, NP), a digital signal processor (digital signal processing, DSP), a microprocessor, a microcontroller, a programmable logic device (programmable logic device, PLD), or any combination thereof. The processor 701 may also be any other device having processing functions, such as, without limitation, a circuit, a device, or a software module.

A transceiver 702 for communicating with other devices or other communication systems, which may be ethernet, radio access network (radio access network, RAN), wireless local area network (wireless local area networks, WLAN), etc. The transceiver 702 may be a module, circuitry, transceiver, or any device capable of communicating.

The transceiver 702 is mainly used for receiving and transmitting data, and may include a transmitter and a receiver for respectively transmitting and receiving signals; operations other than signal transmission and reception are realized by a processor, such as information processing, calculation, and the like.

Communication lines 703 for conveying information between components included in the electronic device 700.

In one design, the processor may be considered logic circuitry and the transceiver may be considered interface circuitry.

Memory 704 for storing instructions. Wherein the instructions may be computer programs.

The memory 704 may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. The volatile memory may be random access memory (random access memory, RAM) which acts as an external cache. By way of example, and not limitation, many forms of RAM are available, such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous DRAM (SLD RAM), and direct memory bus RAM (DR RAM). The memory 704 may also be a compact disk (CD-ROM) or other optical disk storage (including compact disk, laser disk, optical disk, digital versatile disk, blu-ray disk, etc.), magnetic disk storage media, or other magnetic storage device, etc. It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.

It should be noted that the memory 704 may exist separately from the processor 701 or may be integrated with the processor 701. Memory 704 may be used to store instructions or program code or some data, etc. The memory 704 may be located within the electronic device 700 or external to the electronic device 700, without limitation. A processor 701, configured to execute instructions stored in the memory 704, to implement a method provided in the foregoing embodiments of the present application.

In one example, processor 701 may include one or more processors, such as CPU0 and CPU1 in FIG. 7.

As an alternative implementation, electronic device 700 includes multiple processors, e.g., processor 707 in addition to processor 701 in fig. 7.

As an alternative implementation, electronic device 700 also includes an output device 705 and an input device 706. Illustratively, input device 706 is a keyboard, mouse, microphone, or joystick device, and output device 705 is a display screen, speaker (spaker), or the like.

It is noted that the electronic device 700 may be a system-on-chip or a device having a similar structure as in fig. 7. The chip system may be composed of a chip or may include a chip and other discrete devices. Acts, terms and the like referred to between embodiments of the present application may be referenced to each other without limitation. In the embodiment of the present application, the name of the message or the name of the parameter in the message, etc. interacted between the devices are only an example, and other names may also be adopted in the specific implementation, and are not limited. Further, the constituent structure shown in fig. 7 does not constitute a limitation of the electronic device 700, and the electronic device 700 may include more or less components than those shown in fig. 7, or may combine some components, or may be a different arrangement of components, in addition to those shown in fig. 7.

The processors and transceivers described herein may be implemented on integrated circuits (integrated circuit, ICs), analog ICs, radio frequency ICs, mixed signal ICs, application specific integrated circuits (application specific integrated circuit, ASIC), printed circuit boards (printed circuit board, PCB), electronic devices, and the like. The processor and transceiver may also be fabricated using a variety of IC process technologies such as complementary metal oxide semiconductor (complementary metal oxide semiconductor, CMOS), N-type metal oxide semiconductor (NMOS), P-type metal oxide semiconductor (positive channel metal oxide semiconductor, PMOS), bipolar junction transistor (Bipolar Junction Transistor, BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), etc.

The embodiment of the application also provides a flow control device, which comprises: at least one processor, when executing the program code or instructions, implements the relevant method steps to implement the flow control method of the above embodiments.

Optionally, the apparatus may further comprise at least one memory for storing the program code or instructions.

The present application also provides a computer storage medium having stored therein computer instructions which, when executed on a flow control device, cause the flow control device to perform the above-described related method steps to implement the flow control method in the above-described embodiments.

The present application also provides a computer program product which, when run on a computer, causes the computer to perform the above-described relevant steps to implement the flow control method in the above-described embodiments.

The embodiment of the application also provides a flow control device, which can be a chip, an integrated circuit, a component or a module. In particular, the apparatus may comprise a processor coupled to a memory for storing instructions, or the apparatus may comprise at least one processor for retrieving instructions from an external memory. When the device is running, the processor can execute instructions to cause the chip to perform the flow control method in the method embodiments described above.

It should be understood that, in various embodiments of the present application, the sequence numbers of the foregoing processes do not mean the order of execution, and the order of execution of the processes should be determined by the functions and internal logic thereof, and should not constitute any limitation on the implementation process of the embodiments of the present application.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.

In the several embodiments provided in the present application, it should be understood that the disclosed systems, apparatuses, and methods may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the above-described division of units is merely a logical function division, and there may be another division manner in actual implementation, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other forms.

The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.

The above functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or a part of the technical solution, or in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the above-described method of the various embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A flow control method applied to a network-on-chip, the network-on-chip comprising a plurality of routing nodes, the plurality of routing nodes comprising a plurality of first nodes configured with external interfaces, characterized in that the first nodes:

receiving a data packet to be transmitted through the external interface;

determining destination information according to the data packet;

determining whether to forward the data packet according to the destination information, a preset routing table and forwarding state information of at least one routing node in the plurality of routing nodes;

wherein the forwarding-state information is used to indicate whether a switching path between the routing node and at least one of its neighboring routing nodes is available.

2. The method of claim 1, wherein the forwarding-state information indicates whether a switching path between the routing node and at least one of its neighboring routing nodes is available, comprising:

The forwarding-state information is used to indicate whether a switching path between at least one first node of the plurality of first nodes and at least one neighboring routing node thereof is available.

3. The method of claim 1, wherein the forwarding-state information indicates whether a switching path between the routing node and at least one of its neighboring routing nodes is available, comprising:

the forwarding state information is used for indicating whether a switching path between a preset routing node and at least one adjacent routing node in the plurality of routing nodes is available.

4. The method of claim 3, wherein said determining whether to forward the data packet based on the destination information, a preset routing table, and forwarding state information of at least one of the plurality of routing nodes comprises:

determining the switching path of the data packet according to the destination information and a preset routing table;

determining whether the switching path is available according to forwarding state information of at least one routing node of the plurality of routing nodes;

forwarding the data packet if the switching path is available;

and in case the switching path is not available, not forwarding the data packet.

5. The method according to any one of claims 1 to 4, further comprising:

first information is broadcast to other first nodes in the plurality of first nodes, wherein the first information is used for indicating the forwarding state information.

6. The method of claim 5, wherein the method further comprises:

and updating the forwarding state information according to the received first information.

7. The method according to claim 5 or 6, wherein the first information is information of an ethernet protocol or an internet protocol.

8. The method according to any of claims 1 to 7, wherein the forwarding-state information indicating whether a switching path between the routing node and at least one of its neighboring routing nodes is available comprises:

the forwarding-state information is used to indicate whether the number of bytes sent and/or the number of messages sent available for the switching path between the routing node and at least one of its neighboring routing nodes is less than a predetermined threshold.

9. A flow control device for a first node of a network on chip, the network on chip comprising a plurality of routing nodes including a plurality of first nodes configured with external interfaces, the flow control device comprising: a transceiver unit and a processing unit;

The receiving and transmitting unit is used for receiving a data packet to be transmitted through the external interface;

the processing unit is used for determining the destination information according to the data packet;

the processing unit is further configured to determine whether to control the transceiver unit to forward the data packet according to destination information, a preset routing table, and forwarding state information of at least one routing node of the plurality of routing nodes;

10. The apparatus of claim 9, wherein the forwarding-state information indicates whether a switching path between the routing node and at least one of its neighboring routing nodes is available, comprising:

11. The apparatus of claim 9, wherein the forwarding-state information indicates whether a switching path between the routing node and at least one of its neighboring routing nodes is available, comprising:

12. The apparatus according to claim 11, wherein the processing unit is specifically configured to:

controlling the transceiver unit to forward the data packet when the switching path is available;

and controlling the transceiver unit not to forward the data packet under the condition that the switching path is not available.

13. The apparatus according to any one of claims 9 to 12, wherein the transceiver unit is further configured to:

14. The apparatus of claim 13, wherein the processing unit is further configured to:

15. The apparatus according to claim 13 or 14, wherein the first information is information of an ethernet protocol or an internet protocol.

16. The apparatus according to any of claims 9 to 15, wherein the forwarding-state information indicating whether a switching path between the routing node and at least one of its neighboring routing nodes is available comprises:

17. A flow control device comprising at least one processor and a memory, wherein the at least one processor executes programs or instructions stored in the memory to cause the flow control device to implement the method of any one of claims 1 to 8.

18. A computer readable storage medium storing a computer program, characterized in that the computer program, when run on a computer or a processor, causes the computer or the processor to implement the method of any one of the preceding claims 1 to 8.

19. A computer program product comprising instructions which, when run on a computer or processor, cause the computer or processor to carry out the method of any one of the preceding claims 1 to 8.