CN117792049A - Slope compensation circuit and DC-DC converter - Google Patents

Abstract

The application provides a slope compensation circuit and a direct current-direct current converter, and relates to the technical field of electronic circuits. The slope compensation circuit comprises a current mirror unit, a slope compensation current unit, a buffer, a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a first resistor and a voltage holding unit, wherein a second current end of the current mirror unit is used for outputting slope compensation current. According to the slope compensation circuit, the compensation slope is fixed, the slope compensation current is adaptively adjusted along with the change of the duty ratio, and the output slope compensation current can be zero when the conduction period of the switching power supply is finished, so that the load carrying capacity of the switching power supply is not affected.

Description

Slope compensation circuit and DC-DC converter

Technical Field

The present disclosure relates to the field of electronic circuits, and more particularly, to a slope compensation circuit and a dc-dc converter.

Background

In a switching power supply (Switching Mode Power Supply, SMPS for short), when the duty cycle of the switching power supply is greater than 50% and the inductor current undergoes a micro step, the inductor current error signal oscillates, and the subharmonic oscillation causes damage to the circuit and must be suppressed by effective measures.

In general, in order to suppress subharmonic oscillation, an additional slope compensation circuit needs to be added, and the inductor current in the switching power supply is suppressed by the slope compensation current output by the slope compensation circuit, so that the subharmonic oscillation is suppressed, but as the duty ratio in the switching power supply system increases, the slope compensation current required by the switching power supply loop also increases, and the load carrying capacity of the switching power supply is affected.

Disclosure of Invention

The present application provides a slope compensation circuit and a dc-dc converter for solving the problems in the prior art.

The technical scheme adopted by the embodiment of the application is as follows:

in a first aspect, embodiments of the present application provide a slope compensation circuit, including: the device comprises a current mirror unit, a slope compensation current unit, a buffer, a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a first resistor and a voltage holding unit;

the voltage end of the current mirror unit is connected with a preset power supply, a first current end of the current mirror unit is grounded through the first switch unit and the first resistor in sequence, a second current end of the current mirror unit is an output end of the slope compensation circuit and is used for outputting slope compensation current, a second current end of the current mirror unit is grounded through the slope compensation current unit, and a control end of the slope compensation current unit is used for being connected with the preset power supply;

the output end of the buffer is connected with the control end of the first switch unit, the control end of the first switch unit is grounded through the second switch unit, the positive input end of the buffer is connected with the first input end of the voltage holding unit through the third switch unit, the positive input end of the buffer is also connected with the second input end of the voltage holding unit, the output end of the voltage holding unit is grounded, and the negative input end of the buffer is connected with the output end of the first switch unit;

the first input end of the voltage holding unit is also connected with a voltage sampling point in the slope compensation current unit through the fourth switch unit;

the control ends of the second switch unit and the third switch unit are used for receiving a first clock signal, the control end of the fourth switch unit is used for receiving a second clock signal, and the first clock signal and the second clock signal are mutually opposite-phase clock signals.

In an embodiment, the slope compensation current unit includes: the second resistor, the first capacitor, the fifth switch unit, the sixth switch unit and the seventh switch unit;

the control end of the fifth switch unit is the control end of the slope compensation current unit, one end of the fifth switch unit is the input end of the slope compensation current unit, and the other end of the fifth switch unit is the voltage sampling point;

the control end of the fifth switch unit is grounded through the first capacitor, the control end of the fifth switch unit is grounded through the sixth switch unit and the seventh switch unit in turn, and the other end of the fifth switch unit is grounded through the second resistor; the control end of the sixth switch unit is used for receiving the first clock signal.

In an embodiment, the current mirror unit comprises: the first PMOS tube and the second PMOS tube;

the grid electrode of the first PMOS tube is connected with the grid electrode of the second PMOS tube, the source electrode of the first PMOS tube is connected with the source electrode of the second PMOS tube to serve as a voltage end of the current mirror unit and used for being connected with the preset power supply, the drain electrode of the first PMOS tube is a first current end of the current mirror unit, and the drain electrode of the second PMOS tube is a second current end of the current mirror unit.

In an embodiment, the voltage holding unit includes: the second capacitor and the third capacitor;

the first input end of the voltage holding unit is an upper polar plate of the second capacitor, the second input end of the voltage holding unit is an upper polar plate of the third capacitor, and the second capacitor and the lower polar plate of the third capacitor are connected to serve as output ends of the voltage holding unit.

In an embodiment, the slope compensation circuit further comprises: a current source;

the input end of the current source is used for being connected with the preset power supply, and the output end of the current source is connected with the control end of the slope compensation current unit.

In a second aspect, embodiments of the present application further provide a dc-dc converter, including: the slope compensation circuit, the voltage input end, the voltage output end, the feedback module, the logic control circuit, the on-time control circuit, the high-voltage signal control unit and the low-voltage signal control unit according to any of the embodiments;

the voltage input end is connected with the first input end of the slope compensation circuit, the second input end of the slope compensation circuit is connected with the first output end of the logic control circuit, and the third input end of the slope compensation circuit is connected with the second output end of the logic control circuit;

the output end of the slope compensation circuit is connected with the input end of the feedback module, and the output end of the feedback module is connected with the input end of the logic control circuit through the on-time control circuit;

the high-voltage signal control end of the logic control circuit is connected with the voltage output end through the high-voltage signal control unit, the low-voltage signal control end of the logic control circuit is grounded through the low-voltage signal control unit, and the voltage input end is grounded through the high-voltage signal control unit and the low-voltage signal control unit.

In an embodiment, the feedback module includes: the high-side current sampling circuit comprises an error amplifier, a comparator, a high-side current sampling circuit and a voltage dividing circuit;

one end of the voltage dividing circuit is connected with the voltage output end, and the other end of the voltage dividing circuit is grounded;

the first input end of the error amplifier is connected with a preset sampling point of the voltage dividing circuit and is used for receiving a voltage sampling signal fed back by the voltage dividing circuit, the second input end of the error amplifier is used for receiving a reference voltage, the output end of the error amplifier is connected with the first input end of the comparator, the second input end of the comparator is connected with the output end of the slope compensation circuit, and the output end of the comparator is connected with the input end of the conduction time control circuit;

the input end of the high-side current sampling circuit is connected with one end of the high-voltage signal control unit, and the output end of the high-side current sampling circuit is connected with the third input end of the comparator.

In an embodiment, the dc-dc converter further comprises an oscillator clock circuit;

the output end of the oscillator clock circuit is connected with the clock signal input end of the logic control circuit.

In an embodiment, the dc-dc converter further comprises: a resonance unit;

the high-voltage signal control end of the logic control circuit is connected with the voltage output end through the high-voltage signal control unit and the resonance unit in sequence.

In an embodiment, the dc-dc converter further comprises: a voltage stabilizer;

the input end of the voltage stabilizer is connected with the voltage input end, and the output end of the voltage stabilizer is connected with the first input end of the slope compensation circuit.

The beneficial effects of this application are: the application provides a slope compensation circuit and direct current-direct current converter, this slope compensation circuit includes current mirror unit, slope compensation current unit, buffer, first switch unit, second switch unit, third switch unit, fourth switch unit, first resistance, voltage holding unit, and wherein, the second current end of current mirror unit is used for exporting slope compensation current. The slope compensation circuit can realize the functions of fixed compensation slope, self-adaptive adjustment of slope compensation current along with the change of duty ratio, and the like, and the slope compensation current provided by the slope compensation circuit is zero when the conduction period of the switching power supply is ended, so that the load carrying capacity of the switching power supply is not influenced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered limiting the scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a slope compensation circuit according to an embodiment of the present disclosure;

FIG. 2 is a second schematic diagram of a slope compensation circuit according to an embodiment of the present disclosure;

FIG. 3 is a third schematic diagram of a slope compensation circuit according to an embodiment of the present disclosure;

FIG. 4 is a schematic diagram of a DC-DC converter according to an embodiment of the present disclosure;

fig. 5 is a second schematic diagram of a dc-dc converter according to an embodiment of the present disclosure.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments.

Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

In the description of the present application, it should be noted that, if the terms "upper", "lower", and the like indicate an azimuth or a positional relationship based on the azimuth or the positional relationship shown in the drawings, or an azimuth or the positional relationship that is commonly put when the product of the application is used, it is merely for convenience of description and simplification of the description, and does not indicate or imply that the apparatus or element to be referred to must have a specific azimuth, be configured and operated in a specific azimuth, and therefore should not be construed as limiting the present application.

Furthermore, the terms first, second and the like in the description and in the claims of the present application and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, integrally connected, directly connected, indirectly connected through an intermediary, or communicating between two elements. The specific meaning of the terms in the present application can be understood by those skilled in the art according to the specific circumstances.

It should be noted that, without conflict, features in embodiments of the present application may be combined with each other.

The switching power supply (Switching Mode Power Supply), also called a switching power supply or a switching converter, is a high-frequency power conversion device, and has the function of converting a standard voltage into a voltage or a current required by a user terminal through different forms of structures. For example, a dc-dc converter is a dc switching power supply that can be used to convert a dc source from one voltage level to another.

In general, in order to suppress subharmonic oscillation of a switching power supply, an additional slope compensation circuit needs to be added to the switching power supply, and the inductor current is suppressed by the slope compensation current output by the slope compensation circuit, so as to suppress subharmonic oscillation.

Therefore, the application provides the slope compensation circuit which can realize that the output slope compensation current is reduced to zero at the end of the conduction period of the switching power supply, and the load capacity of the switching power supply is not affected.

The slope compensation circuit provided in the present application is specifically illustrated by a plurality of examples with reference to the accompanying drawings.

Fig. 1 is a schematic diagram of a slope compensation circuit according to an embodiment of the present application, as shown in fig. 1, the slope compensation circuit includes a current mirror unit, a slope compensation current unit, a buffer, a first switch unit M1, a second switch unit M2, a third switch unit M3, a fourth switch unit M4, a first resistor R1, and a voltage holding unit.

The voltage end of the current mirror unit is connected with a preset power supply VDD, a first current end of the current mirror unit is grounded through the first switch unit M1 and the first resistor R1 in sequence, a second current end of the current mirror unit is an output end of the slope compensation circuit provided by the application, and the output end of the slope compensation circuit is used for outputting slope compensation current I _slope The second current end of the current mirror unit is grounded through a slope compensation current unit, and the control end of the slope compensation current unit is used for being connected with a preset power supply VDD.

The output end of the buffer is connected with the control end of the first switch unit M1, the control end of the first switch unit M1 is grounded through the second switch unit M2, the positive input end of the buffer is connected with the first input end of the voltage holding unit through the third switch unit M3, the positive input end of the buffer is also connected with the second input end of the voltage holding unit, the output end of the voltage holding unit is grounded, the negative input end of the buffer is connected with the output end of the first switch unit M1, and the buffer has the function of enabling the potential of the Vc point to be equal to the potential of the Vd point.

The first input end of the voltage holding unit is also connected with a voltage sampling point in the slope compensation current unit through a fourth switching unit M4. As shown in fig. 1, the potential of the first input terminal Vb of the voltage holding unit is equal to the voltage of the voltage sampling point in the slope compensation current unit, the first input terminal of the voltage holding unit is connected with one end of the M3, and is used for keeping the voltage of the Vb unchanged, and the second input terminal of the voltage holding unit is connected with the positive input terminal of the buffer, and is used for keeping the voltage of the Vc unchanged.

The control ends of the second switch unit M2 and the third switch unit M3 are configured to receive the first clock signal CLK, the control end of the fourth switch unit M4 is configured to receive the second clock signal C-L-K, the first clock signal CLK and the second clock signal C-L-K are mutually inverted clock signals, and the first clock signal and the second clock signal are configured to control on-off of each switch unit, so as to implement the function of the slope compensation circuit provided by the embodiment.

In the slope compensation circuit provided in this embodiment, the slope compensation current unit is used for generating the current I _N The current mirror unit is used for enabling the current flowing through the first resistor R1 to flow into the current I of the slope compensation current unit _M Proportional, slope compensation current I is known from kirchhoff's current law _slope ＝I _M -I _N Wherein I _M Is a parameter related to the duty cycle, therefore, the slope compensation circuit provided by the application can lead the compensation slope to be fixed and lead the slope compensation current I to be _slope The self-adaptive adjustment is carried out along with the change of the duty ratio, and the output slope compensation current is zero when the conduction period of the switching power supply is finished, so that the load carrying capacity of the switching power supply is not affected.

Fig. 2 is a second schematic diagram of a slope compensation circuit according to an embodiment of the present application, and a specific example of a slope compensation current unit, a current mirror unit, and a voltage holding unit in the slope compensation circuit is described below with reference to fig. 2.

As shown in fig. 2, the slope compensation current unit includes a second resistor R2, a first capacitor C1, a fifth switching unit M5, a sixth switching unit M6, and a seventh switching unit M7.

The control end of the fifth switch unit M5 is the control end of the slope compensation current unit in the foregoing embodiment, one end of the fifth switch unit M5 is the input end of the slope compensation current unit, the other end of the fifth switch unit M5 is a voltage sampling point in the slope compensation current unit, that is, va, the control end of the fifth switch unit M5 is grounded through the first capacitor C1, the control end of the fifth switch unit M5 is grounded through the sixth switch unit M6 and the seventh switch unit M7 sequentially, the other end of the fifth switch unit M5 is grounded through the second resistor R2, and the control end of the sixth switch unit M6 is used for receiving the first clock signal CLK.

The current mirror unit comprises a first PMOS tube M8 and a second PMOS tube M9, and the current mirror unit has the function of making the total voltage on the branch where the M8 and the M9 are located equal, namely, in the current mirror unit, if the current relation between the M8 and the M9 is 1: and N, the resistance relationship between the first resistor R1 and the second resistor R2 is as follows: r1=n×r2.

The grid electrode of the first PMOS tube M8 is connected with the grid electrode of the second PMOS tube M9, the source electrode of the first PMOS tube M8 is connected with the source electrode of the second PMOS tube M9 to serve as a voltage end of the current mirror unit and used for being connected with a preset power supply VDD, the drain electrode of the first PMOS tube M8 is a first current end of the current mirror unit, and the drain electrode of the second PMOS tube M9 is a second current end of the current mirror unit.

The voltage holding unit comprises a second capacitor C2 and a third capacitor C3, the first input end of the voltage holding unit is an upper polar plate of the second capacitor C2, the second input end of the voltage holding unit is an upper polar plate of the third capacitor C3, and the second capacitor C2 and a lower polar plate of the third capacitor C3 are connected and serve as output ends of the voltage holding unit.

That is, the positive input end of the buffer is grounded through the third switch unit M3 and the second capacitor C2 in sequence, and the positive input end of the buffer is also grounded through the third capacitor C3, and in the above embodiment, the first input end of the voltage holding unit is connected to the voltage sampling point in the slope compensation current unit through the fourth switch unit M4, which means that the upper polar plate Vb of C2 is connected to the voltage sampling point Va in the slope compensation current unit.

It should be noted that, in the slope compensation circuit provided in this embodiment, the first switch unit M1, the second switch unit M2, the third switch unit M3, the fourth switch unit M4, the fifth switch unit M5, the sixth switch unit M6, and the seventh switch unit M7 are all N-type MOS transistors, and only the first PMOS transistor M8 and the second PMOS transistor M9 are P-type MOS transistors.

The connection between the above components and the functional implementation of the slope compensation circuit provided in this embodiment are described in detail below with reference to fig. 2:

in the slope compensation circuit provided in this embodiment, the first current end of the current mirror unit, that is, the drain electrode of the first PMOS transistor M8 is grounded through the first switch unit M1 and the first resistor R1 in sequence; the second current end of the current mirror unit, namely the drain electrode of the second PMOS tube M9 is the output end of the slope compensation circuit for outputting the slope compensation current I _slope The method comprises the steps of carrying out a first treatment on the surface of the The second current end of the current mirror unit is grounded through the slope compensation current unit, which means that the drain electrode of the second PMOS tube M9 is grounded through the fifth switch unit M5 and the second resistor R2 in sequence; the control end of the slope compensation current unit is used for being connected with a preset power supply VDD, and the control end of the fifth switch unit M5 is used for being connected with the preset power supply VDD.

The control ends of the second switch unit M2, the third switch unit M3 and the sixth switch unit M6 are used for receiving the first clock signal CLK, the control end of the fourth switch unit M4 is used for receiving the second clock signal C-L-K, the first clock signal CLK and the second clock signal C-L-K are mutually opposite-phase clock signals, that is, when the first clock signal CLK is at a high level, the second clock signal C-L-K is at a low level, the switch receiving the first clock signal CLK is turned on, and the switch receiving the second clock signal C-L-K is turned off; when the first clock signal CLK is at a low level, the second clock signal C-L-K is at a high level, the switch receiving the first clock signal CLK is turned off, and the switch receiving the second clock signal C-L-K is turned on, wherein the first clock signal CLK and the second clock signal C-L-K are both provided by a logic control circuit in the switching power supply.

Because the switching power supply has a continuously circulating conduction period, the working principle of the slope compensation circuit in the embodiment is that the following two states are continuously circulated in the working process of the switching power supply where the slope compensation circuit is located:

1. when the first clock signal CLK is high and the second clock signal C-L-K is low, the switch M4 is turned off to cut off the path between Va and Vb, and the voltage of Vb is equal to the voltage V of the Va node before the switch M4 is turned off _slope.max -V _GS5 Switches M2 and M3 are on, the charge on C2 and C3 are equal, vc is equal to Vb equal to the voltage V of the Va node before switch M4 is turned off _slope.max -V _GS5 And, since M2 is turned on, the output end of the buffer is pulled down to ground, the control end of M1 receives low level, and M1 is turned off, vd is zero, so the current on the branch where M8 is located is zero, resulting in current I _M And also zero.

Switch M6 is turned on, current I _B Through the switches M6 and M7 to the ground, at this time, I _N ＝(V _GS7 -V _GS5 )/R2，I _N About zero, thus, I _M And I _N Zero, in the first state, when the first clock signal CLK is high and the second clock signal C-L-K is low, the slope compensation current I _slope At zero, the peak current of the switching power supply is completely determined by the loop of the switching power supply and is not affected by the slope compensation current I _slope The influence of (I) i.e. the slope compensation current I _slope The injection of (2) does not affect the chip carrying capacity of the switching power supply.

2. Then, the first clock signal CLK is switched to low level, the second clock signal C-L-K is switched to high level, at this time, the switches M2 and M3 are turned off, the voltage value of the first state is kept unchanged by the capacitor C3, the buffer starts to operate, vd=vc=v _slope.max -V _GS5 ，I _M ＝N(V _slope.max -V _GS5 ) R1; switch M4 on, va=vb, switch M6 off, current I _B No longer flows into M7, but into the capacitance C1, V _slope Start to rise with the increase of the on time of the switching power supply, I _N ＝(V _slope -V _GS5 )/R2＝(V _GS7 +I _B ×t/C1-V _GS5 ) R2, the current I is compensated by slope _slope ＝I _M -I _N ＝N(V _slope.max -V _GS5 )/R1-(V _GS7 +I _B ×t/C1-V _GS5 ) R2, compensation slope is dI _sople /dt＝I _B /R2×C1。

The current I is _B The current with fixed value is provided by the preset power supply VDD, the slope compensation circuit is continuously circulated in the two states when working, and the compensation slope dI described in the embodiment is realized when the slope compensation circuit reaches a steady state through the two states under a certain working condition of the switch power supply _sople /dt＝I _B R2×C1, slope compensation current I _slope ＝I _M -I _N ＝N(V _slope.max -V _GS5 )/R1-(V _GS7 +I _B ×t/C1-V _GS5 )/R2。

As can be seen from the above working principle, the slope compensation circuit provided by the present application compensates for the slope dI _sople Dt is only related to current I _B Is related to the magnitude of the resistor R2, the capacitance of the capacitor C1, and thus the compensation slope dI _sople Dt is a fixed value and is due to V _slope.max The slope compensation current provided by the slope compensation circuit is capable of adaptively adjusting as the duty cycle changes, in relation to the duty cycle.

Based on the description of the working principle, taking r1=r2 and n=1 as examples for illustration, it is assumed that the chip of the switching power supply works stably and the on time is T _on 。

When the first clock signal CLK is at a high level and the second clock signal C-L-K is at a low level, vb=vc=v _slope.max -V _GS5 ＝V _GS7 +I _B ×T _on /C1-V _GS5 。

When the first clock signal CLK is low and the second clock signal C-L-K is high _M ＝(V _GS7 +I _B ×T _on /C1-V _GS5 ) R2, then the slope compensation current I in the injection loop _slope ＝I _M -I _N ＝(V _GS7 +I _B ×T _on /C1-V _GS5 )/R2-(V _slope -V _GS5 )/R2＝(I _B /R2×C1)(T _on -t) compensation slope dI _sople /dt＝I _B R2 xC 1, the slope compensation circuit is always performing slope compensation on the loop of the switching power supply in the whole conduction period of the switching power supply, and the slope compensation current I is at the end of the conduction period of the switching power supply _slope The peak current of the switching power supply is thus determined entirely by the switching power supply loop, and is not affected by the slope compensation current, i.e., the injection of the slope compensation current does not affect the chip carrying capability of the switching power supply.

Through the arrangement of the components and the connection among the components, the slope compensation circuit provided by the embodiment can realize the self-adaptive adjustment of the compensation slope and the slope compensation current along with the change of the duty ratio, and the slope compensation current provided by the slope compensation circuit is zero when the conduction period of the switching power supply is ended, so that the load carrying capacity of the switching power supply is not affected.

Fig. 3 is a third schematic diagram of a slope compensation circuit according to an embodiment of the present application, as shown in fig. 3, the slope compensation circuit may further include a current source, an input terminal of the current source is connected to a preset power supply VDD, an output terminal of the current source is connected to a control terminal of the slope compensation current unit, i.e. a control terminal of M5, and the current source is used for outputting a current I _B Can control the current I on the branch _B Numerical values, which make it more stable. In actual operation, the output current of the current source is adjusted to be equal to the current provided by VDD, so that the current source can play a role in stabilizing the current on the branch where the current source is located.

In summary, in the slope compensation circuit of the present application, the first PMOS transistor M8, the second PMOS transistor M9, the first switch unit M1, and the first resistor R1 form a voltage-to-current unit; current source I _B The slope compensation current unit is formed by a fifth switch unit M5, a sixth switch unit M6, a seventh switch unit M7, a first capacitor C1 and a second resistor R2; the second switch unit M2, the third switch unit M3, the fourth switch unit M4, the second capacitor C2 and the third capacitor C3 form a sampling protection deviceAnd a holding circuit.

On the basis of the slope compensation circuit provided by the embodiment, the application also provides a direct current-direct current converter.

Fig. 4 is a schematic structural diagram of a dc-dc converter according to an embodiment of the present application, and as shown in fig. 4, the present application further provides a dc-dc converter, which includes a slope compensation circuit, a voltage input terminal VIN, a voltage output terminal VOUT, a feedback module, a logic control circuit, a conduction time control circuit, a high voltage signal control unit K1, and a low voltage signal control unit K2.

The voltage input terminal VIN is connected to the first input terminal of the slope compensation circuit for providing the voltage VDD and the current I to the slope compensation circuit according to the above embodiment _B The second input end of the slope compensation circuit is connected with the first output end of the logic control circuit, the slope compensation circuit receives the first clock signal CLK through the second input end, the third input end of the slope compensation circuit is connected with the second output end of the logic control circuit, the slope compensation circuit receives the second clock signal C-L-K through the third input end, the output end of the slope compensation circuit is connected with the input end of the feedback module, slope compensation current is output to the direct current-direct current converter loop, the conduction time control circuit is used for controlling the conduction time of the direct current-direct current converter, and the output end of the feedback module is connected with the input end of the logic control circuit through the conduction time control circuit.

The high-voltage signal control end of the logic control circuit is connected with the voltage output end VOUT through the high-voltage signal control unit K1, the low-voltage signal control end of the logic control circuit is grounded through the low-voltage signal control unit K2, and the voltage input end VIN is grounded through the high-voltage signal control unit K1 and the low-voltage signal control unit K2.

The high voltage signal control unit K1 and the low voltage signal control unit K2 are both high voltage devices, and when the logic control circuit outputs the DH signal, the high voltage signal control unit K1 is turned on, and when the logic control circuit outputs the DL signal, the low voltage signal control unit K2 is turned on.

Specifically, as shown in fig. 4, the feedback module includes an error amplifier, a PWM comparator, a high-side current sampling circuit, and a voltage dividing circuit.

The voltage dividing circuit comprises a resistor R3 and a resistor R4, wherein the resistor R3 and the resistor R4 are respectively an upper voltage dividing resistor and a lower voltage dividing resistor at the output end of the direct current-direct current converter, one end of the voltage dividing circuit is connected with the voltage output end, one end of the voltage dividing circuit is used for being connected with the voltage output end, the other end of the voltage dividing circuit is grounded, and one end of the resistor R4 is used for being grounded; a first input end of the error amplifier is connected with a preset sampling point of the voltage dividing circuit and is used for receiving a voltage sampling signal FB fed back by the voltage dividing circuit, and a second input end of the error amplifier is used for receiving a reference voltage V _REF The output end of the error amplifier is connected with the first input end of the comparator, the second input end of the comparator is connected with the output end of the slope compensation circuit, and the output end of the comparator is connected with the input end of the conduction time control circuit; the input end of the high-side current sampling circuit is connected with one end of the high-voltage signal control unit K1, and the output end of the high-side current sampling circuit is connected with the third input end of the comparator.

Wherein, the high-side current sampling circuit samples the inductance current information flowing through the switch K1 when the switch K1 is conducted, and samples the sampling result I _SEN Output to the PWM comparator.

The CLK signal output by the logic control circuit characterizes the switching frequency and duty ratio information of the DC-DC converter at the moment, and the CLK signal is input into the slope compensation circuit to control the slope compensation circuit to output the slope compensation current I _slope 。

Inductance current information I obtained by sampling high-side current sampling circuit _SEN Output EAO of error amplifier and slope compensation current I of slope compensation circuit output _slope The control signals are input to the PWM comparator together, the PWM comparator outputs the control signals to the on-time control circuit, and the on-time of the high-voltage signal control unit K1 is controlled through the on-time control circuit.

In the dc-dc converter provided in the present application, the voltage sampling signal FB fed back by the voltage dividing circuit is equal to the reference voltage V _REF The voltage sampling signal FB is equal to the reference when the feedback module of the DC-DC converter is stableVoltage V _REF The VOUT voltage is a fixed value, and the function of controlling the dc-dc converter to output a constant voltage value is realized.

With continued reference to fig. 4, the dc-dc converter further includes an oscillator clock circuit, an output of the oscillator clock circuit being coupled to a clock signal input of the logic control circuit for providing a clock signal to the logic control circuit.

The oscillator clock circuit generates an operating frequency clock for controlling the DC-DC converter, and the operating frequency clock and an output signal of the on-time control circuit are input into the logic control circuit together to control the on-off time of the switches K1 and K2.

The direct current-direct current converter still includes resonance unit, and resonance unit includes inductance L1, electric capacity C4, and electric capacity C4 is the output electric capacity of direct current-direct current converter, and logic control circuit's high voltage signal control end loops through high voltage signal control unit K1, resonance unit connection voltage output end VOUT, in the direct current-direct current converter that this application provided, resonance unit has played the filter effect.

Fig. 5 is a second schematic diagram of a dc-dc converter according to an embodiment of the present application, as shown in fig. 5, the dc-dc converter may further include a voltage stabilizer, an input terminal of the voltage stabilizer is connected to a voltage input terminal, an output terminal of the voltage stabilizer is connected to a first input terminal of the slope compensation circuit, and the voltage stabilizer is used to generate the high voltage VIN to supply power to an internal circuit of the dc-dc converter.

In summary, the slope compensation circuit of the dc-dc converter provided in the present application can realize that the compensation slope is fixed, and the slope compensation current is adaptively adjusted along with the change of the duty cycle, and when the conduction period of the dc-dc converter is ended, the slope compensation current provided by the slope compensation circuit is zero, so that the load carrying capability of the dc-dc converter is not affected, and the dc-dc converter can drive a larger load, thereby effectively expanding the application range of the dc-dc converter.

The foregoing is merely a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, and any changes or substitutions easily conceivable by those skilled in the art within the technical scope of the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A slope compensation circuit, comprising: the device comprises a current mirror unit, a slope compensation current unit, a buffer, a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a first resistor and a voltage holding unit;

the voltage end of the current mirror unit is connected with a preset power supply, a first current end of the current mirror unit is grounded through the first switch unit and the first resistor in sequence, a second current end of the current mirror unit is an output end of the slope compensation circuit and is used for outputting slope compensation current, a second current end of the current mirror unit is grounded through the slope compensation current unit, and a control end of the slope compensation current unit is used for being connected with the preset power supply;

the output end of the buffer is connected with the control end of the first switch unit, the control end of the first switch unit is grounded through the second switch unit, the positive input end of the buffer is connected with the first input end of the voltage holding unit through the third switch unit, the positive input end of the buffer is also connected with the second input end of the voltage holding unit, the output end of the voltage holding unit is grounded, and the negative input end of the buffer is connected with the output end of the first switch unit;

the first input end of the voltage holding unit is also connected with a voltage sampling point in the slope compensation current unit through the fourth switch unit;

the control ends of the second switch unit and the third switch unit are used for receiving a first clock signal, the control end of the fourth switch unit is used for receiving a second clock signal, and the first clock signal and the second clock signal are mutually opposite-phase clock signals.

2. The slope compensation circuit of claim 1, wherein the slope compensation current unit comprises: the second resistor, the first capacitor, the fifth switch unit, the sixth switch unit and the seventh switch unit;

the control end of the fifth switch unit is the control end of the slope compensation current unit, one end of the fifth switch unit is the input end of the slope compensation current unit, and the other end of the fifth switch unit is the voltage sampling point;

the control end of the fifth switch unit is grounded through the first capacitor, the control end of the fifth switch unit is grounded through the sixth switch unit and the seventh switch unit in turn, and the other end of the fifth switch unit is grounded through the second resistor; the control end of the sixth switch unit is used for receiving the first clock signal.

3. The slope compensation circuit of claim 1, wherein the current mirror unit comprises: the first PMOS tube and the second PMOS tube;

the grid electrode of the first PMOS tube is connected with the grid electrode of the second PMOS tube, the source electrode of the first PMOS tube is connected with the source electrode of the second PMOS tube to serve as a voltage end of the current mirror unit and used for being connected with the preset power supply, the drain electrode of the first PMOS tube is a first current end of the current mirror unit, and the drain electrode of the second PMOS tube is a second current end of the current mirror unit.

4. The slope compensation circuit of claim 1, wherein the voltage holding unit comprises: the second capacitor and the third capacitor;

the first input end of the voltage holding unit is an upper polar plate of the second capacitor, the second input end of the voltage holding unit is an upper polar plate of the third capacitor, and the second capacitor and the lower polar plate of the third capacitor are connected to serve as output ends of the voltage holding unit.

5. The slope compensation circuit of claim 1, wherein the slope compensation circuit further comprises: a current source;

the input end of the current source is used for being connected with the preset power supply, and the output end of the current source is connected with the control end of the slope compensation current unit.

6. A dc-dc converter, comprising: the slope compensation circuit, voltage input terminal, voltage output terminal, feedback module, logic control circuit, on-time control circuit, high voltage signal control unit, low voltage signal control unit according to any of claims 1-5;

the voltage input end is connected with the first input end of the slope compensation circuit, the second input end of the slope compensation circuit is connected with the first output end of the logic control circuit, and the third input end of the slope compensation circuit is connected with the second output end of the logic control circuit;

the output end of the slope compensation circuit is connected with the input end of the feedback module, and the output end of the feedback module is connected with the input end of the logic control circuit through the on-time control circuit;

the high-voltage signal control end of the logic control circuit is connected with the voltage output end through the high-voltage signal control unit, the low-voltage signal control end of the logic control circuit is grounded through the low-voltage signal control unit, and the voltage input end is grounded through the high-voltage signal control unit and the low-voltage signal control unit.

7. The dc-dc converter of claim 6, wherein the feedback module comprises: the high-side current sampling circuit comprises an error amplifier, a comparator, a high-side current sampling circuit and a voltage dividing circuit;

one end of the voltage dividing circuit is connected with the voltage output end, and the other end of the voltage dividing circuit is grounded;

the first input end of the error amplifier is connected with a preset sampling point of the voltage dividing circuit and is used for receiving a voltage sampling signal fed back by the voltage dividing circuit, the second input end of the error amplifier is used for receiving a reference voltage, the output end of the error amplifier is connected with the first input end of the comparator, the second input end of the comparator is connected with the output end of the slope compensation circuit, and the output end of the comparator is connected with the input end of the conduction time control circuit;

the input end of the high-side current sampling circuit is connected with one end of the high-voltage signal control unit, and the output end of the high-side current sampling circuit is connected with the third input end of the comparator.

8. The dc-dc converter of claim 6, further comprising an oscillator clock circuit;

the output end of the oscillator clock circuit is connected with the clock signal input end of the logic control circuit.

9. The dc-dc converter of claim 6, further comprising: a resonance unit;

the high-voltage signal control end of the logic control circuit is connected with the voltage output end through the high-voltage signal control unit and the resonance unit in sequence.

10. The dc-dc converter of claim 6, further comprising: a voltage stabilizer;

the input end of the voltage stabilizer is connected with the voltage input end, and the output end of the voltage stabilizer is connected with the first input end of the slope compensation circuit.