CN117791478A - System and method for suppressing differential bias - Google Patents

System and method for suppressing differential bias Download PDF

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Publication number
CN117791478A
CN117791478A CN202311271349.4A CN202311271349A CN117791478A CN 117791478 A CN117791478 A CN 117791478A CN 202311271349 A CN202311271349 A CN 202311271349A CN 117791478 A CN117791478 A CN 117791478A
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current
measurement
transformer
circuit
bias
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CN202311271349.4A
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Chinese (zh)
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I·D·扬
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Schneider Electric Australia Pty Ltd
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Schneider Electric Australia Pty Ltd
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Priority claimed from US18/046,730 external-priority patent/US20240106225A1/en
Application filed by Schneider Electric Australia Pty Ltd filed Critical Schneider Electric Australia Pty Ltd
Publication of CN117791478A publication Critical patent/CN117791478A/en
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Abstract

Examples of the present disclosure include a system for modifying a trip level of a circuit, the system including a protection device configured to activate in response to a differential current exceeding the trip level, a first current transformer coupled to an input of the circuit, a second current transformer coupled to an output of the circuit, at least one measurement circuit coupled to the first current transformer and the second current transformer, the at least one measurement circuit configured to obtain a first current measurement from the first current transformer, obtain a second current measurement from the second current transformer, determine a bias current based on the first current measurement and the second current measurement, and modify the trip level of the protection device based on the bias current.

Description

System and method for suppressing differential bias
Cross Reference to Related Applications
The present application claims priority from U.S. c. ≡119 (e) filed on day 28, 9, 2022, entitled "SYSTEM AND METHOD FOR RESTRAINING DIFFERENTIAL BIAS," U.S. provisional application serial No. 63/410,891, the entire contents of which are incorporated herein by reference FOR all purposes.
Technical Field
At least one embodiment of the present disclosure relates to a system and method for suppressing differential bias.
Background
Current transformers (current transformer) are commonly used to measure current in electrical systems. Protective relays may be used to detect fault conditions in an electrical circuit and activate fault protection measures, such as mitigating or eliminating faults by opening circuit breakers and/or other forms of blocking.
Disclosure of Invention
According to at least one aspect of the present disclosure, there is provided a system for modifying a trip level (trip level) of a circuit, the system comprising a protection device configured to activate in response to a differential current exceeding the trip level, a first current transformer coupled to an input of the circuit, a second current transformer coupled to an output of the circuit, at least one measurement circuit coupled to the first current transformer and the second current transformer, the at least one measurement circuit configured to obtain a first current measurement from the first current transformer, obtain a second current measurement from the second current transformer, determine a bias current based on the first current measurement and the second current measurement, and modify the trip level of the protection device based on the bias current.
In various examples, the at least one measurement circuit is further configured to modify a trip level in response to determining that a transformer (transformer) coupled to the circuit is saturated. In some examples, the at least one measurement circuit is further configured to determine transformer saturation based on the differential current. In at least one example, the differential current is based on a sum of the first current measurement and the second current measurement. In various examples, the at least one measurement circuit is further configured to determine transformer saturation based on the decrease in bias current. In some examples, modifying the trip level of the protection device includes adding a bias value to the trip level.
In at least one example, the bias value is determined based on a maximum of the differential current, a previously determined bias value, and a multiple of the change in the bias current. In various examples, the change in bias current is based on a previous bias current. In some examples, the bias value decays at an exponential rate based on a time constant that is greater than a system time constant. In at least one example, the at least one measurement circuit further includes a first measurement block coupled to the first current transformer and configured to measure and sample the first current, a frequency tracking circuit coupled to the first measurement block and configured to track a frequency of the first current, and a differential function circuit (differential function circuit) coupled to the first measurement block and configured to calculate one or more of a differential current, a bias current, and a bias value.
In various examples, the first measurement block further includes an anti-aliasing filter coupled to the first current transformer and configured to prevent quantization errors when the first current measurement is obtained, an analog-to-digital converter (ADC) coupled to the anti-aliasing filter and configured to sample and digitize the first current measurement, a digital filter coupled to the ADC and the frequency tracking circuit and configured to compensate at least a frequency response of the ADC, a tracking circuit coupled to the digital filter and the frequency tracking circuit and configured to sample a frequency of the first current measurement, and a fourier measurement circuit coupled to the tracking circuit and the differential function circuit and configured to calculate a fourier value based on the first current measurement. In some examples, the system includes a second measurement block coupled to the second current transformer, the frequency tracking circuit, and the differential function circuit.
According to at least one aspect of the present disclosure, there is provided a method of modifying a trip level of a circuit, comprising measuring an induced current from a current transformer to obtain an induced current measurement, converting the induced current measurement to a voltage, sampling the voltage to obtain a voltage sample, calculating one or more fourier values based on the voltage sample, calculating a bias current in response to calculating the one or more fourier values, calculating a differential current in response to calculating the one or more fourier values, determining whether the transformer is experiencing saturation in response to calculating the bias current and the differential current, and modifying the trip level of a protection device in response to determining that the transformer is experiencing saturation.
In some examples, the method includes determining that the transformer is experiencing saturation based on the bias current. In various examples, the method includes determining that the transformer is experiencing saturation based on the differential current. In at least one example, the method includes determining the bias value based on one or more of a bias current, a differential current, and an earlier bias value. In some examples, modifying the trip level of the protection device includes adding a bias value to the trip level. In various examples, the bias value added to the trip level decays at an exponential rate based on a time constant that is greater than the system time constant. In at least one example, the method includes providing voltage samples to an anti-aliasing filter to prevent quantization errors in response to converting the induced current measurement to a voltage. In some examples, determining the differential current and determining the bias current are based on fourier values.
According to at least one aspect of the present disclosure, a non-transitory computer-readable medium has stored thereon instructions configured to instruct at least one processor to measure an induced current from a current transformer to obtain an induced current measurement, convert the induced current measurement to a voltage, sample the voltage to obtain a voltage sample, calculate one or more fourier values based on the voltage sample, calculate a bias current in response to calculating the one or more fourier values, calculate a differential current in response to calculating the one or more fourier values, determine whether the transformer is experiencing saturation in response to calculating the bias current and the differential current, and modify a trip level of a protection device in response to determining that the transformer is experiencing saturation.
In some examples, the instructions further instruct the at least one processor to determine that the transformer is experiencing saturation based on the bias current. In various examples, the instructions further instruct the at least one processor to determine that the transformer is experiencing saturation based on the differential current. In at least one example, the instructions further instruct the at least one processor to determine the bias value based on one or more of the bias current, the differential current, and an earlier bias value. In some examples, the instructions further instruct the at least one processor to modify the trip level of the protection device by adding a bias value to the trip level. In various examples, the bias value added to the trip level decays at an exponential rate based on a time constant that is greater than the system time constant. In at least one example, the instructions further instruct the at least one processor to determine the differential current and the bias current based on one or more fourier values.
Drawings
Various aspects of at least one embodiment are discussed below with reference to the accompanying drawings, which are not intended to be drawn to scale. The accompanying drawings are included to provide a description and a further understanding of the various aspects and embodiments, and are incorporated in and constitute a part of this specification, but are not intended as a definition of the limits of any particular embodiment. The drawings together with the remainder of the specification serve to explain the principles and operation of the described and claimed aspects and embodiments. In the drawings, each identical or nearly identical component that is illustrated in various figures is represented by a like numeral. For purposes of clarity, not every component may be labeled in every drawing. In the drawings:
FIG. 1A illustrates a current transformer according to an example;
FIG. 1B illustrates a current transformer fault protection system according to an example;
FIG. 2 illustrates a current transformer fault protection system according to another example;
FIG. 3 illustrates a measurement block according to an example; and
fig. 4 illustrates a process for providing a saturation bias current to a differential element according to an example.
Detailed Description
Examples of methods and systems discussed herein are not limited in application to the details of construction and the arrangement of components set forth in the following description or illustrated in the drawings. The described methods and systems are capable of implementation in other embodiments and of being practiced or of being carried out in various ways. The examples of specific implementations provided herein are for illustrative purposes only and are not intended to be limiting. In particular, acts, components, elements, and features discussed in connection with any one or more examples are not intended to be excluded from a similar role in any other examples.
Also, the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting. Any reference herein to an example, embodiment, component, element, or act of a system and method in the singular can also encompass embodiments comprising a plurality, and any reference herein to any embodiment, component, element, or act in the plural can also encompass embodiments comprising only the singular. Singular or plural forms of reference are not intended to limit the presently disclosed systems or methods, their components, acts, or elements. The use of "including," "comprising," "having," "containing," "involving," and variations thereof herein, is meant to encompass the items listed thereafter and equivalents thereof as well as additional items.
Reference to "or" may be construed as inclusive such that any term described using "or" may indicate any one of a single, more than one, and all of the described terms. Furthermore, in the event that terminology usage between the present document and the documents incorporated by reference is inconsistent, the usage of terminology in the incorporated features is complementary to the present document; for irreconcilable differences, the term usage in this document controls.
Fig. 1A shows a current transformer 10 according to an example. The current transformer 10 includes a primary winding 12, a secondary winding 14, a core 16, and an optional circuit loop 18. The primary winding 12 can conduct a primary AC current I P . The secondary winding 14 and/or the circuit loop 18 may conduct a secondary AC current I S . Secondary current I S Can be made of primary current I P The current induced in the secondary winding 14.
The primary winding 12 may pass through the core 16 and may be electromagnetically coupled to the core 16 and the secondary winding 14. In some examples, the primary winding 12 may also be physically coupled to the secondary winding 14 and/or the core 16. Secondary winding 14 is coupled to core 16. In some examples, the secondary winding 14 may be wound around the core 16 and may have a large number of turns around the core 16, e.g., hundreds or thousands of turns. The secondary winding 14 may be coupled to a circuit loop 18. For example, a first end of the secondary winding 14 may be coupled to a first end of the circuit loop 18, and a second end of the secondary winding 14 may be coupled to a second end of the circuit loop 18. The secondary winding 14 may be wound around the entire circumference of the core 16 or around only a portion of the core 16. In fig. 1A, the secondary winding 14 is shown wound around only a portion of the circumference of the core 16.
Primary current I through primary winding 12 P A secondary current I can be induced on the secondary winding 14 S 。I S May pass through the secondary winding 14 and the circuit loop 18. In some examples, I S Depending on the material and electromagnetic properties of the core 16 and the turns ratio of the secondary winding 14 compared to the primary winding 12. The core 16 may comprise any of a variety of materials, such as materials having a strong magnetic field or susceptible to magnetization. In some examples, the core 16 may be made of ferromagnetic material. In some examples, the core 16 may be annular in shape having a hollow central portion through which the primary winding 12 may pass. In some examples, core 16 may be omitted.
For clarity, it may be assumed that the secondary windings referred to herein include cores, even though not mentioned or shown. However, the secondary windings described herein need not include a core.
Fig. 1B illustrates a current transformer fault protection system 100 according to an example. The system 100 includes a primary current I that can be conducted P A first Current Transformer (CT) 103a, a second CT 103b, a first secondary winding 104a, a second secondary winding 104b, a first current I can be conducted 1 Can conduct a second current I 2 A second circuit 106b, a first measurement circuit 108a, a second measurement circuit 108b, a protected object 110, and a load 112. The protected object 110 may be any type of circuit or electrical device and may include a motor, generator, bus, feeder, or other device. The load 112 may also be any type of electrical device.
The primary winding 102 may pass through the center of the secondary windings 104a, 104 b. The first CT 103a may include a combination of a primary winding 102 and a secondary winding 104 a. The second CT 103b may include a combination of a primary winding 102 and a second secondary winding 104 b. The primary winding 102 may be coupled to the protected object 110 and may provide power to the protected object 110. The primary winding 102 may be coupled to a load 112 and may provide electrical power to the load 112. In some examples, the primary winding 102 may beTo provide AC power to the protected object 110 and/or the load 112. The primary winding 102 may or may not be physically coupled to the secondary windings 104a, 104b, but will be electromagnetically coupled to the secondary windings 104a, 104b to induce a current in the secondary windings 104a, 104 b. The secondary windings 104a, 104b may have a given number of turns and are coupled to respective circuits 106a, 106b, wherein the circuits 106a, 106b are coupled to measurement circuits 108a, 108b. Measurement circuits (IEDs) 108a, 108b are configured to measure currents induced in secondary windings 104a, 104 b. In FIG. 1B, the induced current in the first secondary winding 104a is I 1 And the induced current in the second secondary winding 104b is I 2 。I 1 And I 2 Representing the current in the respective circuit 106a, 106 b.
The first secondary winding 104a is based on I P Providing an induced current I to the measurement circuit 108a 1 And the second secondary winding 104b provides an induced current I to the measurement circuit 108b 2 . In normal operation of the protected object 110, a current I is passed into the protected object 110 P May be equal to the current I passing out of the protected object 110 P . If the current I enters the protected object 110 P Equal to the current I flowing from the protected object 110 P And assuming for purposes of explanation that the secondary windings 104a, 104b are substantially identical, e.g., by having similar material properties and the same number of turns per winding, then during normal operation of the protected object 110, I 1 May be equal to or approximately equal to I 2
Load 112 may receive I from current transformer 103b P . The load 112 may include components capable of undergoing saturation, such as a transformer. The load 112 may experience faults (e.g., ground or ground faults, bolt shorts, arcing, three-phase faults, etc.) and/or surges (inrushes). During a fault, the primary winding 102 may see a short circuit or similar condition at the load 112. During a surge, primary winding 102 can see the surge from protected object 110 to load 112. In some examples, a surge at load 112 means that the transformer assembly of load 112 has become saturated, and thus, the secondary of the load 112 transformer does not output current 。
For example, when a system such as load 112 is turned on, a surge may occur. Activating all of the portion of the load 112 may result in a temporary high current I on the primary winding 102 P . In some examples, a temporary high current I P Will stabilize to a lower current I reflecting normal operating conditions P . The inrush current may be temporary and/or harmless, but may be difficult to distinguish from faults from the perspective of circuit protection devices such as fuses or circuit breakers.
Saturation refers to when the core of a transformer (e.g., the core of a current transformer 103a, 103b or a load 112 transformer) approaches and/or reaches the maximum flux that the core can experience. When saturation occurs, the secondary winding of the transformer no longer sees a change in the magnetic field of the core, and thus the secondary current (which may depend on the change in flux in the core) may drop to zero or a very low value.
The system 100 may compare the differential current to the bias current and adjust the trip level of the circuit protection device based on the comparison. The differential current may be I 1 And I 2 And measuring the sum or the difference. Can be relative to I 1 And I 2 A bias current is determined. The trip level (or trip threshold) of the system 100 may be a value at which one or more circuit protection devices (e.g., fuses, blockers, contactors, etc.) in the system 100 are activated.
In some examples, the differential current may be calculated as:
(1)I differential =|I 1 +I 2 |
as shown in FIG. 1B, current I 1 And I 2 With opposite directions and thus may be assigned opposite signs, as is conventional. Thus, due to I 1 And I 2 The differential current may be generally equal to zero, while no saturation is present in the system 100, such as saturation caused by a surge or fault condition.
In some examples, if the differential current rises above the trip level, the system 100 may activate the circuit protection device. For example, an (open) circuit breaker may be opened, or other portions of the system 100 may be blocked (as will be described in more detail with respect to fig. 2). The activated circuit protection device may be located on any portion of the system 100. For example, the circuit protection device may be positioned to protect the load 112, the protected object 110, the circuits 106a, 106b, or any other portion of the circuit.
However, because the differential current may rise when there is a fault or surge, as described above, the system 100 may take protective action whether or not the fault is actually occurring. However, it may not be desirable to take protective action and/or perform blocking during a surge or fault condition, as a surge is typical of switching on the load 112 and may be harmless, necessary and/or common, and other methods may be used to address external faults. The surge may be temporary in nature, typically lasting no more than a few milliseconds, and may not pose a substantial threat to the system 100. Thus, taking protective action and/or blocking components of the system 100 during a surge or fault condition may be inefficient and even detrimental to the system 100.
Fig. 2 illustrates a current transformer fault protection system 200 according to another example. The system 200 includes a first current transformer 202a, a second current transformer 202b, a first measurement block 204a, a second measurement block 204b, a differential function circuit 206, a frequency tracking circuit 208, a controller 210, a primary winding 212, a protected object 214, and a load 216. Each current transformer 202a, 202b may include a respective secondary winding 203a, 203b.
The first current transformer 202a is coupled to a first measurement block 204a and the second current transformer 202b is coupled to a second measurement block 204b. Each respective measurement block 204a, 204b is configured to measure the current induced on the respective current transformer 202a, 202 b. The measurement blocks 204a, 204b will be discussed in more detail with respect to fig. 3. Each measurement block 204a, 204b is coupled to a frequency tracking circuit 208 and a differential function circuit 206. The controller 210 may be coupled to the measurement blocks 204a, 204b, the differential function circuit 206, and/or the frequency tracking circuit 208. However, in some examples, the controller 210 may not be necessary, and the functions performed by the controller 210 may be distributed among the measurement blocks 204a, 204b, the differential function circuit 206, and/or the frequency tracking circuit 208. The primary winding 212 may be physically and/or electromagnetically coupled to the secondary windings 203a, 203b of the current transformers 202a, 202 b. The primary winding 212 may be coupled to a protected object 214 and a load 216.
The primary winding 212 passes through the center of the secondary windings 203a, 203b of the current transformers 202a, 202 b. The current in the primary winding 212 induces a current on the secondary windings 203a, 203b of each current transformer 202a, 202 b. The first current transformer 202a provides current to the first measurement block 204a based on the current into the protected object 214. The second current transformer 202b provides current to the second measurement block 204b based on the current flowing from the protected object 214. As with the current transformers 103a, 103b of fig. 1, the current induced by the primary winding 212 on the secondary winding 203a of the first current transformer 202a may be equal to the current induced by the primary winding 212 on the secondary winding 203b of the second current transformer 202b, provided that the number of turns on the windings of each transformer 202a, 202b and the other physical characteristics of the current transformers 202a, 202b are substantially equal.
The measurement blocks 204a, 204b digitize the respective currents received from the current transformers 102a, 102 b. In agreement with fig. 1, the current induced in the first current transformer 202a will be referred to as I 1 And the current induced in the second current transformer 202b will be referred to as I 2 . Thus, the first measurement block 204a digitizes I 1 And the second measurement block 204b digitizes I 2 . The measurement blocks 204a, 204b may digitize the current I using, for example, an analog-to-digital converter (ADC) or any other suitable method 1 And I 2 . The measurement blocks 204a, 204b may then compare I 1 And I 2 Is provided to other portions of the system 200. The measurement block will be discussed in more detail with respect to fig. 3.
Once the measurement blocks 204a, 204b have digitized the respective currents, the digitized currents are provided by the measurement blocks 204a, 204b to the frequency tracking circuit 208, and the frequency tracking circuit 208 measures the frequency of the digitized currents and can be used to accurately measure the currents and eliminate unwanted harmonics. The frequency tracking circuit 208 may provide samples of digitized current representing the fundamental frequency current to the measurement blocks 204a, 204 b. The sampling rate of the frequency tracking circuit 208 may be constant or variable.
The digitized current and/or a sample of the digitized current is also provided to the differential function circuitry 206. The differential function circuit 206 uses a differential algorithm to analyze the digitized current and determine whether the elements of the system 100 have been saturated. If the differential function circuit 206 determines that saturation has occurred or is occurring, the controller 210 may add a bias value to the trip level of the system 200, resulting in an increase in the trip level of the system 200. In some examples, the bias value is purely digital and may be added to trip level values stored in a storage device and/or memory (such as solid state memory, registers, etc.). By increasing the trip level by a bias value, the system 200 may not activate any circuit protection devices unless the differential current exceeds the increased trip level. Basic measurement of the measurement circuits 204a, 204b (i.e., induced current I 1 And I 2 Is not affected by the bias value) and the operation of the transformer (whether in the load 216 or the current transformers 202a, 202 b) is likewise not affected by the bias value.
In one example, the differential function circuit 206 may detect saturation based on a change in bias current. For example, the bias current may be calculated as:
(2)
in other examples, other calculations may be used to determine the bias current, such as max (I 1 ,I 2 ),Etc. For more than two current transformers, the bias current may be extended. For example, in the case of k current transformers on primary 212, the bias current may be calculated as:
(3)
the bias current may be changed by increasing or decreasing according to an equation for calculating it. The bias current may change when load drops, external fault clearing, or CT saturation occurs. For internal faults, the bias current may increase.
If I 1 And I 2 There is a difference between and the bias current is reduced using equations (2) or (3), CT saturation may or may not have occurred. Thus, if the controller 210 detects a drop in bias current and I 1 And I 2 If there is a difference, CT saturation may be occurring or may have occurred. To prevent the protective action and/or blocking of the measurement blocks 204a, 204b, the frequency tracking circuit 208, and/or the differential function circuit 206, the controller 210 may apply a bias value to the trip level of the system 200. In some examples, the bias value may be based on m times the maximum of the bias reduction or total differential current. In various examples, m may be any value, such as 1, 1.5, 3, 7, and the like. Using m=3 as an example, the bias value may be based on:
(4)max(3·ΔI bias ,I differential )
In some examples, the bias value may be calculated recursively based on a portion (period, half period, quarter period, etc.) of the system clock or other time period. For example, the bias (ΔI) may be calculated over different time periods (e.g., 10 milliseconds or some other value) bias ) Is a change in (c).
(5)I sat [n]=max(3·ΔI bias ,I differential ,I sat [n-1]·e t/satTC )
In equation (5), I sat Is a bias value, "n" indicates a current measurement, and "n-1" indicates a previous measurement. For example, "n" may indicate the current half-cycle or quarter-cycle, and "n-1" may indicate the previous half-cycle or quarter-cycle. The bias value may represent a missing current due to saturation. In some examples, the bias value is proportional to the level of saturation of a transformer in system 200 (e.g., the transformer of load 216). The bias value can be based on the saturation time constantThe "satTC" decays and the saturation time constant "satTC" may be set to be greater than the system time constant. In some examples, the bias value may decay exponentially. The bias value may be applied only to I P To ensure that other phases are not unnecessarily limited.
The controller 210 may control any of the functions described above, including but not limited to controlling sampling of the measurement blocks 204a, 204b, frequency tracking of the frequency tracking block 208, and differential function operation of the differential function block 206.
Fig. 3 shows a measurement block 300 according to an example. In some examples, the measurement blocks 204a, 204b may be implemented as the measurement block 300, and the measurement block 300 is suitable for use as the measurement block in fig. 2.
Measurement block 300 includes measurement CT/resistor 302 ("measurement resistor 302"), anti-aliasing filter 304, ADC 306, digital filter 308, tracking sample circuit 310, and Fourier measurement circuit 312. Also shown is a current transformer 301 that may be suitable for use as current transformers 202a, 202b in fig. 2, as well as frequency tracking circuit 208 and differential function circuit 206 of fig. 2. The differential function circuit 206 and the frequency tracking circuit 208 may be connected to more than one measurement block 300.
The current transformer 301 is coupled to a measurement resistor 302. The measurement resistor 302 is coupled to the current transformer 301 at a first connection and to the anti-aliasing filter 304 at a second connection. An anti-aliasing filter 304 is coupled to the measurement resistor 302 at a first connection and to the ADC 306 at a second connection. The ADC 306 is coupled to the anti-aliasing filter 304 at a first connection and to the digital filter 308 at a second connection. The digital filter 308 is coupled to the ADC 306 at a first connection, to the frequency tracking circuit 208 at a second connection, and to the tracking sample circuit 310 at a third connection. The tracking sample circuit 310 is coupled to the digital filter 308 at a first connection, to the frequency tracking circuit 308 at a second connection, and to the fourier measurement circuit 312 at a third connection. Fourier measurement circuitry 312 is coupled to trace sample circuitry 310 at a first connection and to differential function circuitry 206 at a second connection. Although not shown, the measurement block 300 may also be coupled to a controller, such as the controller 210.
The current transformer 301 may provide an induced current to the measurement resistor 302. The sense resistor 302 may convert the induced current into a voltage. For example, the current through the measurement resistor 302 will result in a voltage drop across the measurement resistor 302 that can be measured. In some examples, the secondary winding of current transformer 301 is coupled to the primary winding of a second current transformer that is part of measurement CT/resistor block 302. In this example, the secondary winding of the second current transformer is coupled to a measurement resistor of the measurement CT/resistor block 302. Both the current transformer 301 and the current transformer measuring the CT/resistor block 302 may be step-up transformers and thus may convert the current on their respective primary windings to a lower current with a higher voltage on their respective secondary windings. However, the measurement CT/resistor block 302 may have a resistor without a current transformer, or may not require a current transformer.
The voltage may be measured by a measurement resistor 302 and/or provided to an anti-aliasing filter 304. In some examples, the anti-aliasing filter 304 may be configured to directly determine the voltage. The anti-aliasing filter 304 may prevent quantization errors when the voltage is converted to digital form. The anti-aliasing filter 304 then provides the voltage to the ADC 306.
The ADC 306 converts the voltage from analog to digital form and provides the digitized voltage to the digital filter 308. The ADC 306 may be configured to sample the voltage at a fixed rate, a frequency tracking rate, or a variable rate. The frequency tracking rate is a rate associated with frequency, e.g., 48 samples/period. Thus, for higher frequencies (more cycles per second), more samples are acquired per second than for lower frequencies (fewer cycles per second), but for both higher and lower frequencies, the same number of samples are acquired per cycle. The ADC 306 may have a high resolution and may use analog multiplication to further increase the resolution range. The digital filter 308 may be configured to compensate for the frequency response of the sampling circuit (e.g., ADC 306).
The digital filter 308 then provides the voltage to the frequency tracking circuit 208 and the tracking sample circuit 310. The frequency tracking circuit 208 tracks the frequency of the sample voltage, such as the frequency of the sample of the voltage provided by the ADC 306. Fourier measurement circuit 312 may use the tracking frequency of the voltage samples to eliminate unwanted harmonics. If the ADC 306 is operating at a fixed sampling rate, the frequency tracking circuit 208 may also create a digitally generated sample stream of tracked samples, which may be used by the Fourier measurement circuit 312 to measure the amplitude of the fundamental frequency current, e.g., I P Or the amplitude of the fundamental frequency of another current.
The frequency tracking information provided by the frequency tracking circuit 208 and the voltage from the digital filter 308 are received by the tracking sample circuit 310. The trace sample circuit 310 may be any circuit suitable for storing information received by the trace sample circuit 310, such as registers, memory, other forms of storage, and the like. The trace sample circuit 310 provides trace samples to a fourier measurement circuit 312.
Fourier measurement circuit 312 calculates the magnitude of the fundamental frequency current based on the received samples, e.g., I P And/or the magnitude of the fundamental frequency of the induced current. Fourier measurement circuit 312 provides measurements to differential function circuit 206. Differential function circuit 206 applies the differential algorithm described above with respect to fig. 2 and below with respect to fig. 4 to determine whether CT saturation occurs and whether saturation bias current is required. In some examples, fourier measurement circuitry 312 may also determine and/or consider the phase of the measured current. For example, I 1 And I 2 May be out of phase with each other by some amount, such as 180 degrees. The fourier measurement circuit 312 may take into account the 180 degree phase difference between the two currents by appropriately modifying the sign of the current components. For example, if I 1 And I 2 180 degrees out of phase but otherwise equal, the signs of their components will be opposite, and I 1 And I 2 Will be zero. Thus, the fourier measurement circuit 312 may take into account the phase difference when other methods, such as Root Mean Square (RMS), do not take into account the phase difference.
Eliminating unwanted harmonics may not be necessary to identify saturation as described above, nor asAs described above, the trip level is modified by the bias value. However, it may be useful to eliminate unwanted harmonics in other respects, as unwanted harmonics may be generated as a result of current passing from one element of the circuit to another element, rather than representing the primary current I P . Thus, if unwanted harmonics are eliminated, the data collected by the measurement block 300 may be used for other purposes.
Fig. 4 illustrates a process 400 for modifying a trip level of a circuit by a bias value, according to an example. Process 400 may be performed by circuitry described herein.
At act 402, an induced current in one or more current transformers (e.g., current transformers 202a, 202 b) is measured. The induced current may be measured by a measurement circuit, such as measurement blocks 204a, 204b. In some examples, the measurement may be performed by providing an induced current to the resistor and measuring a voltage drop across the resistor. Process 400 may then continue to act 404.
At act 404, the induced current measurement is sampled. In some examples, the induced current measurement may be sampled by an ADC (e.g., ADC 306). The induced current measurement may be digitized and stored in a register, memory or other storage device. In some examples, digitizing may be performed by ADC 306 and digital filter 308, and the memory may be a register or memory that tracks sample circuit 308. Additional data relating to the frequency of the samples may also be collected, associated with the respective samples, and stored for use. The collection, association, and storage of the aforementioned data may be performed by measurement blocks (e.g., measurement blocks 204a, 204b, 300). The controller 210 may provide control signals to the measurement blocks 204a, 204b to manage the sampling process, including collecting, correlating, and storing samples, and using samples in any of the ways described herein. Process 400 may then continue to act 406.
At act 406, a fourier value is calculated. The calculation of the fourier value may be based on the sample values described in act 404. In some examples, the controller 210 may directly calculate the fourier value. In some examples, a fourier computation circuit (such as fourier measurement circuit 312) may compute fourier values and provide the fourier values to controller 210 or another circuit. Once the Fourier values are calculated, the process 400 may continue to act 408.
At act 408, a bias current is calculated. In some examples, the controller 210 calculates the bias current. In some examples, a particular circuit (e.g., differential function circuit 206) may perform the computation. The bias current may be calculated using the fourier values calculated in act 406. Process 400 then continues to act 410.
At act 410, a differential current is calculated. In some examples, the controller 210 calculates the differential current. In some examples, a particular circuit (e.g., differential function circuit 206) may perform the computation. The differential current may be calculated using the fourier values calculated in act 406. Process 400 then continues to act 412.
At act 412, it is determined whether an element of system 100 is experiencing saturation. A controller, such as controller 210, or a different circuit, such as differential function block 206, may determine whether saturation is occurring or has occurred. Whether saturation is present may be determined by determining that the bias current is decreasing and that the differential current is non-zero or above a threshold. If saturation does not exist (NO at 412), process 400 may return to act 402 and repeat acts 402-412 until saturation is detected. If saturation exists (Yes at 412), process 400 continues to act 414.
At act 414, a bias value is calculated. In some examples, the bias value may be determined using equations (4) and (5) discussed with respect to fig. 2. In some examples, the bias value may be based on a differential current, a change in bias current, a previous bias current, and/or a previous bias value. In some examples, the controller 210 calculates the bias value. In some examples, another circuit, such as the differential function circuit 206, calculates the bias value. Once the amount of bias value is determined, process 400 continues to act 416.
At act 416, a bias value is added to the trip level of the circuit executing process 400. In some examples, the controller 210 may perform the modification of the trip level by adding a bias value to the trip level. In some examples, other portions of the system 100, 200 (e.g., the differential function circuit 206) may modify the trip level by adding a bias value to the trip level. The bias value may change over time based on a saturation time constant and/or be provided for a limited amount of time. The saturation time constant may be greater than the system time constant. In some examples, the saturation and system time constant may be values that may be set by a user or may be values designed into the system.
In various examples, the use process 400 may not require blocking of the differencing elements (and/or include the measurement block 204a, the frequency tracking block 208, and/or the differencing function block 206, etc.). In various examples, process 400 need only use a single algorithm-i.e., an algorithm that compares differential current and bias current and calculates a bias value. Thus, process 400 requires less processing power and computation time than existing methods. In some examples, more and/or different algorithms may be combined with a single algorithm, if desired. The acts described with respect to process 400 may occur in any order and need not occur only in the order presented. For example, acts 408 and 410 may be performed in reverse order to the order presented or concurrently/in parallel, as acts 404 and 406 may. In some examples, the actions may be pipelined such that portions of each action of process 400 occur simultaneously. That is, act 404 may begin and continue, and act 406 may begin once enough samples have been taken to begin calculating fourier values in act 404. Acts 408 and 410 may begin calculating bias current and differential current when fourier values are calculated. In this manner, the actions of process 400 may occur in a pipelined fashion.
Various controllers, such as controller 210, may perform the various operations discussed above. Using data stored in an associated memory and/or storage device, the controller 210 also executes one or more instructions stored on one or more non-transitory computer-readable media, which the controller 210 may include and/or be coupled to, which may generate manipulated data. In some examples, the controller 210 may include one or more processors or other types of controllers. In one example, the controller 210 is or includes at least one processor. In another example, the controller 210 performs at least a portion of the operations described above using application specific integrated circuits that are customized to perform particular operations in addition to or in lieu of a general purpose processor. As these examples illustrate, examples according to the present disclosure may use many specific combinations of hardware and software to perform the operations described herein, and the present disclosure is not limited to any specific combination of hardware and software components. Examples of the present disclosure may include a computer program product configured to perform the methods, processes, and/or operations discussed above. The computer program product may be or include one or more controllers and/or processors configured to execute instructions to perform the methods, processes, and/or operations discussed above.
Having thus described several aspects of at least one embodiment, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and scope of the disclosure. Accordingly, the foregoing description and drawings are by way of example only.

Claims (27)

1. A system for modifying a trip level of a circuit, the system comprising:
a protection device configured to activate in response to the differential current exceeding the trip level;
a first current transformer coupled to an input of the circuit;
a second current transformer coupled to an output of the circuit;
at least one measurement circuit coupled to the first current transformer and the second current transformer, the at least one measurement circuit configured to:
a first current measurement is obtained from the first current transformer,
a second current measurement is obtained from the second current transformer,
determining a bias current based on the first current measurement and the second current measurement, an
Modifying the trip level of the protection device based on the bias current.
2. The system of claim 1, wherein the at least one measurement circuit is further configured to modify the trip level in response to determining that a transformer coupled to the circuit is saturated.
3. The system of claim 2, wherein the at least one measurement circuit is further configured to determine the transformer saturation based on the differential current.
4. The system of claim 3, wherein the differential current is based on a sum of the first current measurement and the second current measurement.
5. The system of claim 3, wherein the at least one measurement circuit is further configured to determine the transformer saturation based on the decrease in bias current.
6. The system of claim 1, wherein modifying the trip level of the protection device comprises adding a bias value to the trip level.
7. The system of claim 6, wherein the bias value is determined based on a maximum of the differential current, a previously determined bias value, and a multiple of the change in bias current.
8. The system of claim 7, wherein the change in bias current is based on a previous bias current.
9. The system of claim 6, wherein the bias value decays exponentially based on a time constant that is greater than a system time constant.
10. The system of claim 1, wherein the at least one measurement circuit further comprises:
A first measurement block coupled to the first current transformer and configured to measure and sample a first current;
a frequency tracking circuit coupled to the first measurement block and configured to track a frequency of the first current; and
a differential function circuit is coupled to the first measurement block and configured to calculate one or more of a differential current, the bias current, and a bias value.
11. The system of claim 10, wherein the first measurement block further comprises:
an anti-aliasing filter coupled to the first current transformer and configured to prevent quantization errors when the first current measurement is obtained;
an analog-to-digital converter (ADC) coupled to the anti-aliasing filter and configured to sample and digitize the first current measurement;
a digital filter coupled to the ADC and to the frequency tracking circuit and configured to compensate for at least a frequency response of the ADC;
tracking circuitry coupled to the digital filter and to the frequency tracking circuitry and configured to sample a frequency of the first current measurement; and
fourier measurement circuitry coupled to the tracking circuitry and the differential function circuitry and configured to calculate a fourier value based on the first current measurement.
12. The system of claim 10, further comprising a second measurement block coupled to the second current transformer, the frequency tracking circuit, and the differential function circuit.
13. A method of modifying a trip level of a circuit, the method comprising:
measuring the induced current from the current transformer to obtain an induced current measurement;
converting the induced current measurement to a voltage;
sampling the voltage to obtain a voltage sample;
calculating one or more fourier values based on the voltage samples;
calculating a bias current in response to calculating the one or more fourier values;
calculating a differential current in response to calculating the one or more fourier values;
determining whether the transformer is experiencing saturation in response to calculating the bias current and the differential current; and
in response to determining that the transformer is experiencing saturation, a trip level of the protection device is modified.
14. The method of claim 13, further comprising determining that the transformer is experiencing saturation based on the bias current.
15. The method of claim 13, further comprising determining that the transformer is experiencing saturation based on the differential current.
16. The method of claim 13, further comprising determining a bias value based on one or more of the bias current, the differential current, and an earlier bias value.
17. The method of claim 16, wherein modifying the trip level of the protection device comprises adding the bias value to the trip level.
18. The method of claim 17, wherein the bias value added to the trip level decays exponentially based on a time constant that is greater than a system time constant.
19. The method of claim 13, further comprising providing the voltage samples to an anti-aliasing filter to prevent quantization errors in response to converting the induced current measurement to the voltage.
20. The method of claim 13, wherein determining the differential current and determining the bias current are based on the fourier values.
21. A non-transitory computer-readable medium having instructions stored thereon configured to instruct at least one processor to:
measuring the induced current from the current transformer to obtain an induced current measurement;
converting the induced current measurement to a voltage;
Sampling the voltage to obtain a voltage sample;
calculating one or more fourier values based on the voltage samples;
calculating a bias current in response to calculating the one or more fourier values;
calculating a differential current in response to calculating the one or more fourier values;
determining whether the transformer is experiencing saturation in response to calculating the bias current and the differential current; and
in response to determining that the transformer is experiencing saturation, a trip level of the protection device is modified.
22. The non-transitory computer-readable medium of claim 21, the instructions further directing the at least one processor to determine that the transformer is experiencing saturation based on the bias current.
23. The non-transitory computer-readable medium of claim 21, the instructions further directing the at least one processor to determine that the transformer is experiencing saturation based on the differential current.
24. The non-transitory computer-readable medium of claim 21, the instructions further instruct the at least one processor to determine a bias value based on one or more of the bias current, the differential current, and an earlier bias value.
25. The non-transitory computer-readable medium of claim 24, the instructions further directing the at least one processor to modify the trip level of the protection device by adding the bias value to the trip level.
26. The non-transitory computer-readable medium of claim 25, wherein the bias value added to the trip level decays exponentially based on a time constant that is greater than a system time constant.
27. The non-transitory computer-readable medium of claim 21, the instructions further instruct the at least one processor to determine the differential current and the bias current based on the one or more fourier values.
CN202311271349.4A 2022-09-28 2023-09-27 System and method for suppressing differential bias Pending CN117791478A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US63/410,891 2022-09-28
US18/046,730 US20240106225A1 (en) 2022-09-28 2022-10-14 System and method for restraining differential bias
US18/046,730 2022-10-14

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