CN1177798A - Reproducer of preventing data from overflow and underflow, and method thereof - Google Patents

Reproducer of preventing data from overflow and underflow, and method thereof Download PDF

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Publication number
CN1177798A
CN1177798A CN 97118605 CN97118605A CN1177798A CN 1177798 A CN1177798 A CN 1177798A CN 97118605 CN97118605 CN 97118605 CN 97118605 A CN97118605 A CN 97118605A CN 1177798 A CN1177798 A CN 1177798A
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China
Prior art keywords
data
reference time
temporal information
circuit
demoder
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CN 97118605
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Chinese (zh)
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柳原尚史
堀口麻里
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Sony Corp
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Sony Corp
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Priority to CN 97118605 priority Critical patent/CN1177798A/en
Publication of CN1177798A publication Critical patent/CN1177798A/en
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Abstract

A reproducing apparatus is provided which can reproduce data for decoding without overflowing or underflowing the decoder. Time information contained in the reproduced data is extracted, compared to a reference time and, depending upon such comparison, the reproduction and temporary holding of such data is controlled. Timing of the writing and reading of a temporary storage device (e.g. a FIFO buffer) and timing of the decoder are resettable simultaneously if discontinuous data are reproduced.

Description

Prevent that data from overflowing reproducer and the method with underflow
The present invention relates to a kind of equipment and method, refer in particular to a kind of data that prevent and overflow or the equipment and the method for underflow from demoder from the recording medium reproducing data.
Recently, DVD (digital universal disc)-video (hereafter is DVD) is by standardization, and it is very universal to expect to become.Video data with MPEG (Motion Picture Experts Group) technique compresses is recorded on the DVD.DVD player is reproduced data from dish,, and it is outputed to TV shows this data decode in decoder section.
If televisor has decoding capability, then DVD player can be passed through audio-video (AV) bus and is connected with it, and DVD player outputs to televisor to the bit stream of decoding with decoding by the AV bus.
Yet, when data by when DVD player is sent to the televisor with decoding capability by the AV bus since from televisor do not overflow/underflow condition feeds back to DVD player, so the televisor demoder can produce according to the state of AV bus and overflow or underflow.
Therefore, one object of the present invention is to provide a kind of equipment that overcomes the said equipment shortcoming.
Another object of the present invention is to prevent that the decoding device such as the televisor with decoding capability from producing overflows and underflow.
According to the detailed description of back, various other purposes of the present invention, advantage and feature will become apparent, and will particularly point out its novelty in claims.
According to the present invention, transcriber is from the recording medium reproducing coded data, and memory storage is temporarily preserved the data of reproduction.Extraction apparatus extracts the temporal information that is included in the data of comparing with reference time.Controller is according to comparative result control store device and transcriber, and the data of being preserved by memory storage are provided for transmission line.
According to the present invention, this equipment comprises homing device, is used for to resetting reference time, correctly to reproduce discontinuous data.
Describe the present invention for example in detail below in conjunction with the accompanying drawing utilization, in the accompanying drawing:
Fig. 1 is the block diagram that expression reproducer of the present invention is applied to the example of AV system;
Fig. 2 is the block diagram of the DVD player configuration example of presentation graphs 1;
Fig. 3 is the block diagram of the DVD player drive part configuration example shown in the presentation graphs 2;
Fig. 4 is the block diagram of the variable bit rate control circuit configuration example shown in the presentation graphs 3;
Fig. 5 is the process flow diagram of FIFO operation in the key diagram 4;
Fig. 6 is the process flow diagram of pick-up operation in the key diagram 3;
Fig. 7 is the block diagram of the DVD player decoder section configuration example in the presentation graphs 2; With
Fig. 8 is the synoptic diagram of expression synchronous communication.
Fig. 1 represents to insert the configuration example of the AV system of reproducer of the present invention.In this example, DVD player is from the DVD playback video signal, and this vision signal is applied to simulated television 2 with analog form.A plurality of (is 3 televisors at present embodiment) digital television 3-1 is connected to DVD player 1 to 3-3 by AV bus 5.Each digital television 3-1 has built-in decoder section 4-1 respectively to 4-3 to 3-3, be used for decoding through the coded data that AV bus 5 transmits from DVD player 1, and decoded data offer each digital television 3-1 to 3-3 with demonstration.
AV bus 5 can be the digital interface such as IEEE (IEEE) 1394 High Performance Serial Bus (hereafter is 1394 agreements).
Fig. 2 represents the inner structure example of DVD player 1.DVD player 1 comprises driver portion 11, demultiplexer 12 and decoder section 13.Driver portion 11 is reproduced data from dish, and these data are outputed to demultiplexer 12, is broken down into voice data, video data and auxiliary image data in these data.Decoder section 13 comprises three built-in demoders, is used for decoding audio data, video data and auxiliary image data independently.Data by decoded portion 13 decodings are carried out the D/A conversion by D/A transducer (not shown), and are provided for simulated television 2 (Fig. 1).
Multiplexed output data from driver portion 11 is offered digital television 3-1,3-2 and 3-3 through bus 5.
Fig. 3 represents the configuration example of driver portion 11.Spindle drive motor 21 is with fixing speed driving-disc 22 (recording medium).Pick-up 23 is launched a laser beam to reproduce record data thereon to dish 22.Output from pick-up 23 is applied to RF circuit 24, and wherein the RF signal is exaggerated and is balanced to predetermined characteristic, and is provided for EFM+ circuit 25 and PLL circuit 26.PLL circuit 26 is from reproducing the extracting data clock-pulse component, and this clock-pulse component is outputed to EFM+ circuit 25, the data that provide from RF circuit 24 with demodulation.
The output of EFM+ circuit 25 is provided for Memory Management Unit (MMU) 27, so that be stored among the DRAM28 (dynamic RAM).In addition, MMU 27 carries out sampling out in error detection treatment for correcting (ECC processing) and the data from be stored in DRAM 28 and is the required information of system's control and treatment.
Be provided for VBR (variable bit rate) control circuit 29 of the sequential of control data from the data of MMU 27 outputs.It is 1394 transfer circuits 30 of 1394 forms that this time control data is sent to data conversion, and the data of conversion are sent to AV bus 5.
VBR control circuit 29 produces control signal with data volume that receives from MMU 27 and the difference that offers 1394 transfer circuits, 30 data volumes.VBR control circuit 29 offers system controller 31 to control signal, with the access of 23 pairs of dishes 22 of control pick-up.
Fig. 4 represents the configuration example of VBR control circuit 29.Offered 1394 transfer circuits 30 from the data of MMU 27 outputs by FIFO (first in first out) impact damper 41.Also be provided for system clock reference (SCR) extraction circuit 42 from the data of MMU 27 outputs, this circuit extraction is included in the system clock reference (SCR) in these data (temporal information).The SCR that extracts is provided for comparator circuit 43, and is offered counter 46 through switch 45.
Comparator circuit 43 relatively extracts the SCR that circuit 42 receives by the system clock (STC) (standard time) of counter 46 generations with from SCR, and comparative result is outputed to controller 44.
Controller 44 is controlled FIFO 41 according to the comparative result of being determined by comparator circuit 43, also detects the data volume in FIFO 41.Controller 44 offers driving governor 52 to the control signal corresponding to the detection data volume, next according to this control signal control pick-up 23 (Fig. 3).
Reset circuit 47 comprises STC calculations of offset circuit 48, subtracter 49 and switch 50.Video object-video-beginning-demonstration time (VOB-V-S-PTM) and video object-video-end-demonstration time (VOB-V-E-PTM) middle the calculate STC of STC calculations of offset circuit 48 from be included in the data search information-seamless-playback of information DSI-SML-PBI that is reproduced by DVD player (Fig. 3) setovers.STC calculations of offset circuit 48 offers the subtracter 49 that deducts the STC skew from the value of counter 46 to result of calculation, and the result who deducts is offered this counter through switch 50.If the STC skew is not zero, switch 50 can and be connected by 48 operations of STC off-centre circuit.
In case from DVD player/receive the instruction of reproduction dish 22, then spindle drive motor 21 rotates this dish at a predetermined velocity.The regulation session of pick-up 23 disc accessible 22 and reproduction record data wherein.This reproducing signal is provided for reproducing signal is amplified and balanced RF circuit 24; Signal after this RF circuit handle amplification and the equilibrium offers EFM+ circuit 25 and PLL circuit 26.PLL circuit 26 produces clock-pulse component from the signal that receives, and the clock-pulse component that produces is offered EFM+ circuit 25, and this circuit amplifies signal according to this clock-pulse component demodulation and be balanced.The data of being modulated are provided for MMU 27.
MMU 27 is stored in the demodulating data that receives from the EFM+ circuit the DRAM 28.MMU 27 also carries out correction process on the data in being stored in DRAM, and the result of correction process is stored among the FIFO 41 of VBR control circuit 29.
In VBR control circuit 29, SCR extracts circuit 42 at the extracting data SCR that receives from MMU 27.After dish 22 reproduction processes begin, be right after just to begin to carry out and preset processing, and switch 45 is switched on.The SCR that is extracted circuit 42 extractions by SCR is loaded into counter 46 through switch 45, and this counter is counted the system clock of 27MHz frequency.Counter produces STC as reference time, and STC is offered comparator circuit 43, and comparator circuit 43 compares STC that receives from this counter and the SCR that receives from this SCR extraction circuit.Comparative result is provided for controller 44.
In conjunction with the operation of the process flow diagram of Fig. 5 with description control device 44.In step S1, whether inquiry SCR equals STC.If determine to equal STC from the SCR that reproduces extracting data, then program enters step S2, and at this, controller 44 is read the packet with SCR from FIFO 41, and allows FIFO41 to provide packet data to 1394 transfer circuits 30.This 1394 transfer circuit becomes 1394 forms to the data conversion that receives from FIFO 41, and formative data pass through AV bus 5 offer each digital television 3-1 to each demoder 4-1 of 3-3 to 4-3.
The comparison process of step S1 is the delivery time of calculating in AV bus 5, and will deduct STC and the SCR of delivery time and compare.
The treatment step of representing in the process flow diagram of controller 44 according to the data volume execution graph 6 of FIFO 41.In step S11, whether the difference of the write pointer WP of inquiry expression FIFO 41 writing positions and the read pointer RP of this FIFO reading location of expression is equal to or greater than first reference value R L(for example value of determining by experience).If the difference of WP and RP is greater than R L, then FIFO 41 may overflow, and controller 44 is to driving governor 52 output control signals, temporarily to stop the access by 23 pairs of dishes 22 of pick-up, shown in step S12.So just prevented overflowing of FIFO 41.
If the difference of determining in step S11 is less than reference value R LIf " stopping access " of perhaps executed step S12 handled, then program enters step S13.At this, controller 44 determines whether the difference of WP and RP is equal to or less than the second reference value R S(the also value of determining) by experience.If the difference of WP and RP is equal to or less than the second reference value R S, then FIFO 41 may underflows and program enter step S14, at this, this controller is to driving governor 52 output control signals, resetting the accessing operation that has temporarily stopped in step S12, thereby prevented the underflow of FIFO 41.
If in step S13, the difference of determining WP and RP is greater than reference value R S, perhaps the resetting after the operation of completing steps S14, program turns back to step S11, and repeating step S11-S14.
Because controller 44 is carried out above-mentioned control operation preventing overflowing or underflow of FIFO 41, so the decoder section 4-1 of digital television 3-1,3-2 and 3-3,4-2 and 4-3 have also prevented from respectively to overflow and underflow.After data were sent to by AV bus 5, each decoder section 4-1,4-2 and 4-3 were at once to these data decode (access).
The STC calculations of offset circuit 48 of reset circuit 47 is calculated as so-called seamless-reproduced required STC skew.VOB-V-S-PTM is illustrated in displaying (demonstration) start time of first frame of video of a GOP (image sets) in the video object (VOB), and VOB-V-E-PTM is illustrated in displaying (demonstration) concluding time of the final video frame of last GOP among the VOB.If the STC of packet to be decoded is that the time is continuous, that is, the VOB-V-E-PTM of previous packet equals the VOB-V-S-PTM of a back packet, and poor (the STC skew) of two packets is zero so.On the other hand, if the STC of two packets to be decoded is not that the time is continuous, then the difference of two packets is not zero, unless and STC be reset, otherwise two packets will be decoded improperly.
STC calculations of offset circuit 48 offers subtraction circuit 49 to the STC skew that calculates, and this circuit deducts the STC skew that calculates from the count value (STC) of counter 46.If STC skew is not zero, then switch 50 is connected, and the subtraction result of subtraction circuit 49 is loaded into counter 46 through switch 50, thereby finishes reset processing.For example, from the image stream that comprises a plurality of images, selected, reproduced this image then, so just obtained the image of continuous (seamless) with different angles if after the image of regulation, have at any angle image.
Reset operation also carries out in decoder section 4-1,4-2 and 4-3 independently, and this will describe with reference to Fig. 7 below.The driver portion 11 of DVD player 1 is carried out reset operation simultaneously with decoder section 4-1,4-2 and 4-3.
Fig. 7 is the block diagram of decoder section 4-1, and its structure is identical with decoder section 4-2 and 4-3.For the sake of simplicity, at this decoder section 4-1 only is described.
Can from the data that receive by AV bus 5, remove packet header according to the receiving circuit 71 of the decoder section 4-1 of IEEE 1394 protocol operations, turn back to initial data layout with the data that will be received.Receiving circuit 71 offers demultiplexer 72 to the data of reformatting, and demultiplexer 72 becomes voice data, video data and auxiliary image data to this data decomposition.For example, demultiplexer 72 offers demoder 73 to this video data and SCR extracts circuit 74.SCR extracts circuit 74 and extract SCR from this video data, and this SCR is offered PLL circuit 75, and it is the clock signal of 27MHz that PLL circuit 75 produces for example frequency synchronous with importing SCR, and this clock signal is offered demoder 73.Demoder 73 is decoded to video data according to the clock signal that provides from PLL circuit 75.The video data of being decoded is by D/A conversion (not shown), after this is provided for the corresponding digital televisor CRT of (as, digital TV3-1).
But it should be understood that though Fig. 7 only is described the disposal system of video data, decoder section still comprises and is used for similar system that voice data and auxiliary image data are decoded.
Therefore, as can be seen, 1394 transfer circuits 30 of driver portion 11 (Fig. 3) are sent to data by AV bus 5 1394 receiving circuits 71 of decoder section 4-1; This 1394 receiving circuit is removed packet header, and its result data is offered demultiplexer 72.Demultiplexer 72 becomes voice data, video data and auxiliary image data to data decomposition; SCR extracts circuit 74 and extracts SCR from this video data, and provides it to PLL circuit 75, and PLL circuit 75 produces the clock signal synchronous with input SCR to demoder 73, and 73 pairs of these video datas of demoder are decoded.
In addition, PLL circuit 75 is offset in response to the STC that receives from STC calculations of offset circuit (not shown) and carries out reset operation, and this STC calculations of offset circuit is similar to the STC calculations of offset circuit 48 of Fig. 4.PLL circuit 75 and reset circuit 47 (Fig. 4) are carried out reset operation simultaneously.
1394 agreements are supported synchronous communication and asynchronous communication.Synchronous communication generally is used for information data, and asynchronous communication generally is used for control data.One of AV equipment that Fig. 8 schematically represents to be connected to bus 5 is selected for the synchronous communication of transmission.Each AV equipment of carrying out synchronous communication is dispensed on each cycle with 125 μ s cycles and begins specific time domain in the packet.For example, in the time domain of distributing, data are used as synchronous Ch1 or Ch2 transmission synchronously.As mentioned above, in synchronous communication, communication is carried out in certain time interval.
On the other hand, asynchronous communication is to carry out in the time domain of the separation of not carrying out synchronous communication.The cycle of asynchronous communication time domain does not need constant.
Although with reference to a preferred embodiment the present invention has been done detailed expression and explanation, what be readily appreciated that is can do various modification under the situation that does not deviate from the spirit and scope of the present invention.For example, program clock benchmark (PCR) can be used as temporal information rather than system clock reference S (CR).This temporal information it should be understood that any correlation time, information all can be utilized, as long as can be included in the data in the time interval of enough weak points.
Though at this DVD is described as recording medium, the present invention can adopt other recording medium; And the AV bus also need not be confined to IEEE 1394 agreements.

Claims (6)

1. one kind is used for from the recording medium reproducing coded data and will reproduces data being sent to the equipment of demoder with decoding, comprising:
Reconstructor is used for from described recording medium reproducing data, so that described reproduction data to be provided;
Extraction element is used for extracting the temporal information that is included in described reproduction data;
Reference time, generator was used to produce reference time;
Comparer is used for the temporal information and the described reference time of described extraction are compared, to produce comparative result;
Memory storage is used for the described reproduction data of temporary transient preservation before transmitting;
Controller is used for controlling described memory storage and described reconstructor according to described comparative result; With
Forwarder, the data that are used for being kept at described memory storage are sent to described demoder.
2. equipment as claimed in claim 1, wherein said temporal information are the system clock reference time.
3. equipment as claimed in claim 1, be system clock wherein said reference time.
4. equipment as claimed in claim 1 also comprises resetting means, is used for resetting described reference time.
5. equipment as claimed in claim 4, wherein said demoder comprise and are used to adopt the device that described temporal information decodes to the data that transmit from described memory device and are used for described temporal information is resetted with the device of decoding; With wherein said resetting means and resetting in described decoder apparatus to described temporal information simultaneously to resetting described reference time.
6. one kind is used for also will reproducing the method that data are sent to demoder from the recording medium reproducing coded data, comprises the steps:
From described recording medium reproducing data, so that the reproduction data to be provided;
Extraction is included in the temporal information in the described reproduction data;
Produce reference time;
The temporal information and the described reference time of described extraction are compared, to produce comparative result;
The described reproduction data of temporary transient preservation before transmitting;
Come the reproduction of control data and the preservation of data according to described comparative result; With
The data of temporarily preserving are sent to described demoder.
CN 97118605 1996-09-10 1997-09-10 Reproducer of preventing data from overflow and underflow, and method thereof Pending CN1177798A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 97118605 CN1177798A (en) 1996-09-10 1997-09-10 Reproducer of preventing data from overflow and underflow, and method thereof

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Application Number Priority Date Filing Date Title
JP238781/96 1996-09-10
CN 97118605 CN1177798A (en) 1996-09-10 1997-09-10 Reproducer of preventing data from overflow and underflow, and method thereof

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CN1177798A true CN1177798A (en) 1998-04-01

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100539543C (en) * 2003-12-26 2009-09-09 北京锐安科技有限公司 The method and apparatus of POS data filter distribution

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100539543C (en) * 2003-12-26 2009-09-09 北京锐安科技有限公司 The method and apparatus of POS data filter distribution

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