CN117762853A - An efficient SPI data transmission connection method for improving the frame rate of TFT display screens - Google Patents

Abstract

The invention discloses a high-efficiency SPI data transmission connection mode for improving the frame rate of a TFT display screen, which is used for efficiently connecting a Micro Control Unit (MCU), an external Flash memory and the TFT display screen through a single Serial Peripheral Interface (SPI), thereby realizing a simplified hardware architecture and obviously improving the frame rate of the TFT display screen. Because the SPI interface allows image data to be directly transmitted from the Flash memory to the TFT screen, the intermediate processing of the MCU is bypassed, so that the data transmission speed is increased, the workload of the MCU is reduced, the dependence on the performance of the MCU is reduced, the number of required MCU I/O pins is reduced, the memory requirement is reduced, and the total cost and the power consumption of the system are further reduced. The signal interference is reduced in a resistor series connection mode, the transmission stability is improved, the chip resource requirement can be reduced, and the screen brushing efficiency and effect are improved.

Description

An efficient SPI data transmission connection method for improving the frame rate of TFT display screens

Technical field

The present invention relates to the field of electronic communication technology, and more specifically, to an efficient SPI data transmission connection method for improving the frame rate of a TFT display screen.

Background technique

In modern electronic devices, thin film transistor (TFT) displays are widely used due to their excellent display characteristics. To drive these displays, microprocessor units (MCUs) need to process and transmit large amounts of image data. Usually, this process involves at least two high-speed serial peripheral interfaces (SPI): one is connected to the TFT screen and is responsible for sending out display data; the other is connected to the external Flash memory and is responsible for reading the stored image data. In order to optimize the display effect and reduce the number of data transmissions, the MCU also needs to embed a larger-capacity RAM to temporarily store data.

In the existing technology, driving a TFT display usually requires a microprocessor unit (MCU) to have two high-speed serial peripheral interfaces (SPI): one is connected to the TFT display to transmit display data, and the other is connected to an external Flash memory to read Get image data. In order to reduce the number of data transfers, the MCU also requires larger RAM resources. In this configuration, the MCU needs to first read data from the external Flash through SPI, then store it in the internal RAM, and then transmit the data to the TFT display through another SPI. Although this solution is feasible, it has many shortcomings, such as high MCU performance requirements, high chip pin losses, and low communication efficiency.

Therefore, in response to the above technical problems, it is necessary to provide an efficient SPI data transmission connection method for improving the frame rate of TFT display screens.

Contents of the invention

The purpose of the present invention is to provide an efficient SPI data transmission connection method for improving the frame rate of a TFT display screen, so as to solve the above problems.

In order to achieve the above object, the technical solution provided by an embodiment of the present invention is as follows:

An efficient SPI data transmission connection method for improving the frame rate of TFT displays, including:

Microcontroller unit (MCU);

The micro control unit (MCU) has a positive power input pin (VDD) and a ground pin (VSS), and the positive power input pin (VDD) of the micro control unit (MCU) is connected to the positive power voltage (VCC) , the ground pin (VSS) of the micro control unit (MCU) is connected to the ground (GND);

External Flash memory;

The external Flash memory is provided with multiple pins, the ground (GND) pin of the external Flash memory is connected to a common ground, and the power supply (VCC) pin of the external Flash memory is connected to the positive power supply voltage (VCC) , the data output (DO) pin of the external Flash memory is connected to the positive power supply voltage (VCC) through a pull-up resistor (R2), the resistance value of the pull-up resistor (R2) is 4.7 kΩ, and the external The chip select (CS#) pin of the flash memory is connected to the positive supply voltage (VCC) through a pull-up resistor (R3). The resistance value of the pull-up resistor (R3) is 4.7 kΩ. The resistance of the external flash memory The data input (DI) pin is connected to the data output (DO) pin of the external Flash memory through a current limiting resistor (R5), the resistance value of the current limiting resistor (R5) is 360 ohms;

TFT screen;

The TFT screen has pins 1 to 13, the 9th pin and the 10th pin are connected to the positive power supply voltage (VCC), the 8th pin, the 11th pin and the 13th pin The pins are all connected to ground (GND). The positive power supply voltage (VCC) and the 12th pin are connected through a resistor element (R1). The resistor element (R1) is 51 ohms (51R). The positive supply voltage (VCC) is connected to ground (GND) through a capacitive element (C1), which is 1 microfarad (1uF).

As a further improvement of the present invention, the micro control unit (MCU) is connected to the external Flash memory and TFT screen through a single serial peripheral interface (SPI).

As a further improvement of the present invention, the SPI clock line (SPI_SCK) of the micro control unit (MCU) is connected to the clock input (SCK) of the external Flash memory and the clock input (SCK) of the TFT screen.

As a further improvement of the present invention, the master output slave input line (SPI_MOSI) of the micro control unit (MCU) is connected to the master input slave output line (SPI_MISO), and is jointly connected to the master input slave output line (MISO) of the external Flash memory. ) and the master output slave input line (MOSI) of the TFT screen.

As a further improvement of the present invention, the chip select lines (CS) of the external Flash memory and the TFT screen are respectively connected to different I/O ports of the MCU.

As a further improvement of the present invention, the micro control unit (MCU) can enable the chip select line (CS) of the external Flash memory and simultaneously disable the chip select line (CS) of the TFT screen when communicating with the external Flash memory.

As a further improvement of the present invention, the micro control unit (MCU) can enable the chip select line (CS) of the TFT screen and simultaneously disable the chip select line (CS) of the external Flash memory when communicating with the TFT screen.

As a further improvement of the present invention, the micro control unit (MCU) can enable its SPI master input slave output line (SPI_MISO) and set the master output slave input line (SPI_MOSI) to input mode when receiving data.

As a further improvement of the present invention, the micro control unit (MCU) can enable its SPI master output slave input line (SPI_MOSI) and set the master input slave output line (SPI_MISO) to input mode when sending data.

As a further improvement of the present invention, when the micro control unit (MCU) needs to transparently transmit data from the external Flash memory to the TFT screen, it can use its SPI master output slave input line (SPI_MOSI) and master input slave output line (SPI_MISO ) is set to input mode and controls the SPI clock line (SPI_SCK) to send the clock signal.

Compared with the existing technology, the advantages of the present invention are:

This solution efficiently connects the microcontrol unit (MCU), external Flash memory and TFT display through a single serial peripheral interface (SPI), achieving a simplified hardware architecture, thereby significantly increasing the frame rate of the TFT display. Since the SPI interface allows image data to be transmitted directly from the Flash memory to the TFT screen, bypassing the intermediate processing of the MCU, this not only speeds up the data transmission, but also reduces the workload of the MCU and reduces the dependence on its performance. In addition, it reduces The number of MCU I/O pins required reduces memory requirements, further reducing the overall system cost and power consumption. The series connection of resistors reduces signal interference and improves transmission stability, which can reduce chip resource requirements and improve screen refresh efficiency and effect. It is suitable for applications with high requirements for high resolution and smooth display performance, providing cost-effectiveness and Optimized balance between performance.

Description of the drawings

Figure 1 is a schematic structural diagram of the present invention;

Figure 2 is a schematic diagram of pin function allocation of the microcontroller of the present invention;

Figure 3 is a detailed schematic diagram of the interface connection of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention; it is obvious that the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments, and all other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making creative work are within the scope of protection of the present invention.

Example 1:

Please refer to Figure 1 to Figure 3, an efficient SPI data transmission connection method for improving the frame rate of TFT display, including:

Microcontroller unit (MCU);

The micro control unit (MCU) has a positive power input pin (VDD) and a ground pin (VSS). The positive power input pin (VDD) of the micro control unit (MCU) is connected to the positive power supply voltage (VCC). The micro control unit The ground pin (VSS) of (MCU) is connected to ground (GND);

External Flash memory;

The external Flash memory is provided with multiple pins. The ground (GND) pin of the external Flash memory is connected to a common ground. The power supply (VCC) pin of the external Flash memory is connected to the positive power supply voltage (VCC). The data of the external Flash memory The output (DO) pin is connected to the positive supply voltage (VCC) through a pull-up resistor (R2) with a resistance of 4.7 kΩ and the chip select (CS#) pin of the external Flash memory. A pull-up resistor (R3) is connected to the positive supply voltage (VCC) with a resistance value of 4.7 kΩ. The data input (DI) pin of the external flash memory is connected through a current limiting resistor (R5). To the data output (DO) pin of the external Flash memory, the resistance value of the current limiting resistor (R5) is 360 ohms;

TFT screen;

The TFT screen has pins 1 to 13, the 9th pin and the 10th pin are connected to the positive power supply voltage (VCC), the 8th pin, the 11th pin and the 13th pin are connected to ground (GND), the positive supply voltage (VCC) and pin 12 are connected through a resistor element (R1), the resistor element (R1) is 51 ohms (51R), the positive supply voltage (VCC) is connected through a The capacitive element (C1) is connected to ground (GND) and the capacitive element (C1) is 1 microfarad (1uF).

Among them, the micro control unit (MCU) serves as the central processing unit and is responsible for data processing and command execution. The external Flash memory is used to store image data and is provided to the MCU for reading through SPI. The TFT screen is used to display image data sent by the MCU. The MCU is connected to the Flash memory and the TFT screen through a single SPI interface, reducing the complexity of hardware connections.

This design significantly improves data transmission efficiency, reduces the requirements for MCU performance, and reduces the complexity of hardware design. By reducing the intermediate transfer of data in the MCU and directly transferring it from Flash to TFT, the frame rate of image update is greatly improved, allowing the TFT display to display high-definition images and videos more smoothly, especially suitable for high-resolution and high-frame-rate displays. Display requirements, in addition, reduce the number of MCU pins and memory requirements, which can reduce chip resource requirements, improve screen refresh efficiency and effect, and help reduce overall system cost and power consumption.

The microcontroller unit (MCU) interfaces with the external Flash memory and TFT screen through a single serial peripheral interface (SPI).

The SPI clock line (SPI_SCK) of the micro control unit (MCU) is connected to the clock input (SCK) of the external Flash memory and the clock input (SCK) of the TFT screen.

Among them, the SPI clock line (SPI_SCK) of the MCU is connected to the clock input of the Flash memory and TFT screen. The sharing of the clock line ensures that data is transmitted synchronously on the SPI bus.

The master output slave input line (SPI_MOSI) of the micro control unit (MCU) is connected to the master input slave output line (SPI_MISO), and is jointly connected to the master input slave output line (MISO) of the external Flash memory and the master output slave input of the TFT screen line(MOSI).

Among them, the SPI master output slave input line (SPI_MOSI) of the MCU is connected to the master input slave output line (SPI_MISO). This design can simplify the data transmission path. These lines are simultaneously connected to the corresponding data lines of the Flash and TFT screens.

Among them, a resistor is connected in series between MISO and MOSI of the Flash memory, which may be to limit the current or reduce interference.

The chip select lines (CS) of the external Flash memory and TFT screen are connected to different I/O ports of the MCU respectively.

Among them, the MCU controls the chip select line (CS) of the Flash memory and TFT screen through different I/O ports, allowing the MCU to communicate with the Flash or TFT screen independently without interfering with each other.

When communicating with the external Flash memory, the micro control unit (MCU) can enable the chip select line (CS) of the external Flash memory and simultaneously disable the chip select line (CS) of the TFT screen.

Among them, the MCU enables the CS of the Flash when communicating with the Flash, and at the same time disables the CS of the TFT screen. This ensures that the TFT screen will not receive signals that should not be received when interacting with the Flash.

When communicating with the TFT screen, the micro control unit (MCU) can enable the chip select line (CS) of the TFT screen and simultaneously disable the chip select line (CS) of the external Flash memory.

Among them, the MCU enables the CS of the TFT when communicating with the TFT screen, and disables the CS of the Flash at the same time, ensuring that the Flash memory does not receive signals that should not be received when interacting with the TFT screen.

The micro control unit (MCU) can enable its SPI master input slave output line (SPI_MISO) and set the master output slave input line (SPI_MOSI) to input mode when receiving data.

Among them, when the MCU receives data, it will enable SPI_MISO and set SPI_MOSI to input mode so that the MCU can correctly receive data from the SPI bus.

The micro control unit (MCU) can enable its SPI master output slave input line (SPI_MOSI) and set the master input slave output line (SPI_MISO) to input mode when sending data.

Among them, when the MCU sends data, it will enable SPI_MOSI and set SPI_MISO to the input mode so that the MCU can correctly send data to the SPI bus.

When the micro control unit (MCU) needs to transparently transmit data from the external Flash memory to the TFT screen, it can set its SPI master output slave input line (SPI_MOSI) and master input slave output line (SPI_MISO) to input mode and control the SPI The clock line (SPI_SCK) sends the clock signal.

Among them, the MCU can set SPI_MOSI and SPI_MISO to input mode and control SPI_SCK to send the clock signal, thereby directly transparently transmitting data from Flash to TFT, and can directly transmit data from memory to display without involving the MCU intermediate processing. screen, improving data transmission efficiency.

working principle:

The MCU utilizes a single serial peripheral interface (SPI) to manage communication with external Flash memory and TFT screens. By sharing the SPI clock line (SPI_SCK), the MCU ensures that data can be transferred synchronously between the two peripherals. The MCU's SPI main data output line (SPI_MOSI) and main data input line (SPI_MISO) are directly connected to the external Flash and TFT screens. This configuration supports direct connection of data lines, allowing direct data transmission between Flash and TFT, reducing the MCU intermediate processing work. The control of the chip select line (CS) enables the MCU to selectively communicate with an external Flash or TFT screen, thereby avoiding potential data transmission conflicts. The MCU adapts to data sending and receiving needs by switching input/output modes. In addition, when data needs to be transmitted directly from Flash to the TFT screen, the MCU can set the SPI data line to input mode and realize transparent transmission of data only by controlling the SPI clock line. This method allows the data to be cached without buffering in the MCU. can be transmitted, improving efficiency and reducing resource usage.

It is obvious to those skilled in the art that the present invention is not limited to the details of the above-described exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, the embodiments should be regarded as illustrative and non-restrictive from any point of view, and the scope of the present invention is defined by the appended claims rather than the above description, and it is therefore intended that all claims falling within the claims All changes within the meaning and scope of equivalent elements are included in the present invention. Any reference signs in the claims shall not be construed as limiting the claim in question.

In addition, it should be understood that although this specification is described in terms of embodiments, not each embodiment only contains an independent technical solution. This description of the specification is only for the sake of clarity, and those skilled in the art should take the specification as a whole. , the technical solutions in each embodiment can also be appropriately combined to form other implementations that can be understood by those skilled in the art.

Claims (10)

1. A high-efficient SPI data transmission connected mode for improving TFT display screen frame rate, its characterized in that: comprising the following steps:

a Micro Control Unit (MCU);

the Micro Control Unit (MCU) has a positive power supply input pin (VDD) connected to a positive power supply Voltage (VCC) and a ground pin (VSS) connected to Ground (GND);

an external Flash memory;

the external Flash memory is provided with a plurality of pins, the Ground (GND) pin of the external Flash memory is connected to a common ground, the power supply (VCC) pin of the external Flash memory is connected to a positive power supply Voltage (VCC), the Data Output (DO) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R2), the resistance value of the pull-up resistor (R2) is 4.7 kiloohms, the chip select (CS#) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R3), the resistance value of the pull-up resistor (R3) is 4.7 kiloohms, the Data Input (DI) pin of the external Flash memory is connected to the Data Output (DO) pin of the external Flash memory through a current limiting resistor (R5), and the resistance value of the current limiting resistor (R5) is 360 ohms;

a TFT screen;

the TFT screen is provided with 1 st pin to 13 th pin, 9 th pin and 10 th pin are all connected with positive power supply Voltage (VCC), 8 th pin, 11 th pin and 13 th pin are all connected to Ground (GND), positive power supply Voltage (VCC) with connect through a resistance element (R1) between the 12 th pin, resistance element (R1) is 51 ohm (51R), positive power supply Voltage (VCC) is connected to Ground (GND) through a capacitive element (C1), capacitive element (C1) is 1 microfarad (1 uF).

2. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: and the Micro Control Unit (MCU) is connected with the external Flash memory and the TFT screen through a single Serial Peripheral Interface (SPI).

3. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the SPI clock line (SPI_SCK) of the Micro Control Unit (MCU) is connected to the clock input (SCK) of the external Flash memory and the clock input (SCK) of the TFT screen.

4. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: a master-output-slave input line (SPI_MOSI) of the Micro Control Unit (MCU) is connected to a master-input-slave output line (SPI_MISO) and is commonly connected to a master-input-slave output line (MISO) of an external Flash memory and a master-output-slave input line (MOSI) of a TFT screen.

5. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the external Flash memory and a chip select line (CS) of the TFT screen are respectively connected to different I/O ports of the MCU.

6. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) can enable a chip select line (CS) of the external Flash memory while disabling the chip select line (CS) of the TFT screen when communicating with the external Flash memory.

7. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) is capable of enabling a chip select line (CS) of the TFT screen while disabling the chip select line (CS) of the external Flash memory when communicating with the TFT screen.

8. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) can enable its SPI master-input-slave-output line (spi_miso) when receiving data, and set the master-output-slave-input line (spi_mosi) to an input mode.

9. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) can enable its SPI master output slave input line (spi_mosi) and set the master input slave output line (spi_miso) to an input mode when transmitting data.

10. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: when the data of the external Flash memory needs to be transmitted to the TFT screen, the Micro Control Unit (MCU) can set an SPI main output slave input line (SPI_MOSI) and a main input slave output line (SPI_MISO) into an input mode and control an SPI clock line (SPI_SCK) to send a clock signal.