CN117762853A - Efficient SPI data transmission connection mode for improving TFT display screen frame rate - Google Patents

Efficient SPI data transmission connection mode for improving TFT display screen frame rate Download PDF

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Publication number
CN117762853A
CN117762853A CN202311787732.5A CN202311787732A CN117762853A CN 117762853 A CN117762853 A CN 117762853A CN 202311787732 A CN202311787732 A CN 202311787732A CN 117762853 A CN117762853 A CN 117762853A
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spi
mcu
flash memory
pin
tft
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李卓晖
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Yixige Industry Shenzhen Co ltd
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Yixige Industry Shenzhen Co ltd
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Abstract

The invention discloses a high-efficiency SPI data transmission connection mode for improving the frame rate of a TFT display screen, which is used for efficiently connecting a Micro Control Unit (MCU), an external Flash memory and the TFT display screen through a single Serial Peripheral Interface (SPI), thereby realizing a simplified hardware architecture and obviously improving the frame rate of the TFT display screen. Because the SPI interface allows image data to be directly transmitted from the Flash memory to the TFT screen, the intermediate processing of the MCU is bypassed, so that the data transmission speed is increased, the workload of the MCU is reduced, the dependence on the performance of the MCU is reduced, the number of required MCU I/O pins is reduced, the memory requirement is reduced, and the total cost and the power consumption of the system are further reduced. The signal interference is reduced in a resistor series connection mode, the transmission stability is improved, the chip resource requirement can be reduced, and the screen brushing efficiency and effect are improved.

Description

Efficient SPI data transmission connection mode for improving TFT display screen frame rate
Technical Field
The invention relates to the technical field of electronic communication, in particular to a high-efficiency SPI data transmission connection mode for improving the frame rate of a TFT display screen.
Background
In modern electronic devices, thin Film Transistor (TFT) display screens are widely used for their excellent display characteristics. To drive these displays, a microprocessor unit (MCU) needs to process and transmit a large amount of image data. Typically, this process involves at least two high speed Serial Peripheral Interface (SPI): one path is connected with the TFT screen and is responsible for sending out display data; the other path is connected with an external Flash memory and is responsible for reading stored image data. In order to optimize the display effect and reduce the data transmission times, the MCU is also required to embed a RAM with larger capacity to temporarily store data.
In the prior art, driving TFT displays typically requires a microprocessor unit (MCU) with a two-way high speed Serial Peripheral Interface (SPI): one path is connected with the TFT display screen to transmit display data, and the other path is connected with an external Flash memory to read image data. To reduce the number of data transfers, the MCU also requires larger RAM resources. Under the configuration, the MCU needs to read data from the external Flash through the SPI, then store the data into the internal RAM, and then transmit the data to the TFT display screen through the other SPI. Although this scheme is feasible, there are a number of disadvantages, such as high performance requirements for the MCU, high chip pin loss, and low communication efficiency.
Therefore, in order to solve the above-mentioned technical problems, it is necessary to provide an efficient SPI data transmission connection method for improving the frame rate of the TFT display screen.
Disclosure of Invention
The invention aims to provide a high-efficiency SPI data transmission connection mode for improving the frame rate of a TFT display screen so as to solve the problems.
In order to achieve the above object, an embodiment of the present invention provides the following technical solution:
an efficient SPI data transfer connection for improving TFT display screen frame rates, comprising:
a Micro Control Unit (MCU);
the Micro Control Unit (MCU) has a positive power supply input pin (VDD) connected to a positive power supply Voltage (VCC) and a ground pin (VSS) connected to Ground (GND);
an external Flash memory;
the external Flash memory is provided with a plurality of pins, the Ground (GND) pin of the external Flash memory is connected to a common ground, the power supply (VCC) pin of the external Flash memory is connected to a positive power supply Voltage (VCC), the Data Output (DO) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R2), the resistance value of the pull-up resistor (R2) is 4.7 kiloohms, the chip select (CS#) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R3), the resistance value of the pull-up resistor (R3) is 4.7 kiloohms, the Data Input (DI) pin of the external Flash memory is connected to the Data Output (DO) pin of the external Flash memory through a current limiting resistor (R5), and the resistance value of the current limiting resistor (R5) is 360 ohms;
a TFT screen;
the TFT screen is provided with 1 st pin to 13 th pin, 9 th pin and 10 th pin are all connected with positive power supply Voltage (VCC), 8 th pin, 11 th pin and 13 th pin are all connected to Ground (GND), positive power supply Voltage (VCC) with connect through a resistance element (R1) between the 12 th pin, resistance element (R1) is 51 ohm (51R), positive power supply Voltage (VCC) is connected to Ground (GND) through a capacitive element (C1), capacitive element (C1) is 1 microfarad (1 uF).
As a further development of the invention, the Micro Control Unit (MCU) is connected to the external Flash memory and the TFT screen via a single Serial Peripheral Interface (SPI).
As a further development of the invention, the SPI clock line (spi_sck) of the Micro Control Unit (MCU) is connected to the clock input (SCK) of the external Flash memory and to the clock input (SCK) of the TFT screen.
As a further improvement of the present invention, the master-output-slave-input line (spi_mosi) of the Micro Control Unit (MCU) is connected to the master-input-slave-output line (spi_miso) and is commonly connected to the master-input-slave-output line (MISO) of the external Flash memory and the master-output-slave-input line (MOSI) of the TFT screen.
As a further improvement of the invention, the external Flash memory and the chip select line (CS) of the TFT screen are connected to different I/O ports of the MCU, respectively.
As a further improvement of the present invention, the Micro Control Unit (MCU) is capable of enabling the chip select line (CS) of the external Flash memory while disabling the chip select line (CS) of the TFT screen when communicating with the external Flash memory.
As a further improvement of the present invention, the Micro Control Unit (MCU) can enable the chip select line (CS) of the TFT screen while disabling the chip select line (CS) of the external Flash memory when communicating with the TFT screen.
As a further improvement of the present invention, the Micro Control Unit (MCU) can enable its SPI master-input-slave output line (spi_miso) when receiving data, and set the master-output-slave input line (spi_mosi) to an input mode.
As a further improvement of the present invention, the Micro Control Unit (MCU) can enable its SPI master output slave input line (spi_mosi) and set the master input slave output line (spi_miso) to an input mode when transmitting data.
As a further improvement of the present invention, the Micro Control Unit (MCU) can set its SPI master output slave input line (spi_mosi) and master input slave output line (spi_miso) to an input mode and control the SPI clock line (spi_sck) to transmit a clock signal when data of the external Flash memory needs to be transferred to the TFT screen.
Compared with the prior art, the invention has the advantages that:
according to the scheme, the Micro Control Unit (MCU), the external Flash memory and the TFT display screen are efficiently connected through the single Serial Peripheral Interface (SPI), so that a simplified hardware architecture is realized, and the frame rate of the TFT display screen is remarkably improved. Because the SPI interface allows image data to be directly transmitted from the Flash memory to the TFT screen, the intermediate processing of the MCU is bypassed, so that the data transmission speed is increased, the workload of the MCU is reduced, the dependence on the performance of the MCU is reduced, the number of required MCU I/O pins is reduced, the memory requirement is reduced, and the total cost and the power consumption of the system are further reduced. The signal interference is reduced by the resistor series connection mode, the transmission stability is improved, the chip resource requirement can be reduced, the screen brushing efficiency and effect are improved, the method is suitable for the application with high requirements on high resolution and smooth display performance, and the optimization balance between cost benefit and performance is provided.
Drawings
FIG. 1 is a schematic diagram of the structure of the present invention;
FIG. 2 is a schematic diagram of a microcontroller pin function assignment according to the present invention;
FIG. 3 is a schematic diagram of the interfacing details of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention; it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments, and that all other embodiments obtained by persons of ordinary skill in the art without making creative efforts based on the embodiments in the present invention are within the protection scope of the present invention.
Example 1:
referring to fig. 1 to 3, a high-efficiency SPI data transmission connection method for improving a TFT display screen frame rate includes:
a Micro Control Unit (MCU);
the Micro Control Unit (MCU) is provided with a positive power supply input pin (VDD) and a ground pin (VSS), the positive power supply input pin (VDD) of the Micro Control Unit (MCU) is connected to a positive power supply Voltage (VCC), and the ground pin (VSS) of the Micro Control Unit (MCU) is connected to the Ground (GND);
an external Flash memory;
the external Flash memory is provided with a plurality of pins, the Ground (GND) pin of the external Flash memory is connected to a common ground, the power supply (VCC) pin of the external Flash memory is connected to a positive power supply Voltage (VCC), the Data Output (DO) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R2), the resistance value of the pull-up resistor (R2) is 4.7 kiloohms, the chip select (CS#) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R3), the resistance value of the pull-up resistor (R3) is 4.7 kiloohms, the Data Input (DI) pin of the external Flash memory is connected to the Data Output (DO) pin of the external Flash memory through a current limiting resistor (R5), and the resistance value of the current limiting resistor (R5) is 360 ohms;
a TFT screen;
the TFT screen has 1 st pin to 13 th pin, 9 th pin and 10 th pin all are connected with positive power supply Voltage (VCC), 8 th pin, 11 th pin and 13 th pin all are connected to Ground (GND), connect through a resistance element (R1) between positive power supply Voltage (VCC) and the 12 th pin, resistance element (R1) is 51 ohm (51R), positive power supply Voltage (VCC) is connected to Ground (GND) through a capacitive element (C1), and capacitive element (C1) is 1 microfarad (1 uF).
Wherein, the Micro Control Unit (MCU) is used as a central processing unit and is responsible for data processing and command execution. The external Flash memory is used for storing image data and is provided for the MCU to read through the SPI. The TFT screen is used for displaying image data sent by the MCU, and the MCU is connected with the Flash memory and the TFT screen through a single SPI interface, so that the complexity of hardware connection is reduced.
The design remarkably improves the data transmission efficiency, reduces the requirement on MCU performance, and reduces the complexity of hardware design. Through reducing the middle handling of data in MCU, directly transmit TFT from Flash, improved the frame rate of image update greatly for TFT display screen can show high definition image and video more smoothly, is particularly useful for high resolution and high frame rate's display requirement, in addition, has reduced MCU's pin quantity and memory demand, can reduce the chip resource requirement, improves and brushes screen efficiency and effect, helps reducing overall system cost and consumption.
The Micro Control Unit (MCU) is connected with the external Flash memory and the TFT screen through a single Serial Peripheral Interface (SPI).
An SPI clock line (SPI_SCK) of the Micro Control Unit (MCU) is connected to a clock input (SCK) of the external Flash memory and a clock input (SCK) of the TFT screen.
The SPI clock line (SPI_SCK) of the MCU is connected to the clock inputs of the Flash memory and the TFT screen, and sharing of the clock line ensures synchronous transmission of data on the SPI bus.
The master-output-slave input line (spi_mosi) of the Micro Control Unit (MCU) is connected to the master-input-slave output line (spi_miso) and is commonly connected to the master-input-slave output line (MISO) of the external Flash memory and the master-output-slave input line (MOSI) of the TFT screen.
The SPI master output slave input line (SPI_MOSI) and the master input slave output line (SPI_MISO) of the MCU are connected, so that the design can simplify the data transmission path, and the lines are connected to corresponding data lines of the Flash and TFT screens at the same time.
In which a series connection is made between MISO and MOSI of the Flash memory, possibly for limiting the current or reducing the interference.
The external Flash memory and the chip select line (CS) of the TFT screen are connected to different I/O ports of the MCU, respectively.
Wherein the MCU controls the Flash memory and the chip select line (CS) of the TFT screen through different I/O ports, allowing the MCU to independently communicate with the Flash or TFT screen without interfering with each other.
A Micro Control Unit (MCU) can enable a chip select line (CS) of the external Flash memory while disabling the chip select line (CS) of the TFT screen when communicating with the external Flash memory.
Wherein the MCU enables CS of Flash while communicating with Flash while disabling CS of TFT screen, this ensures that TFT screen will not receive signal that should not be received while interacting with Flash.
A Micro Control Unit (MCU) can enable a chip select line (CS) of the TFT screen while disabling the chip select line (CS) of the external Flash memory when communicating with the TFT screen.
The MCU enables CS of the TFT when communicating with the TFT screen, and simultaneously disables CS of the Flash, so that the Flash memory does not receive signals which should not be received when interacting with the TFT screen.
The Micro Control Unit (MCU) can enable its SPI master-input-slave-output line (spi_miso) when receiving data, and set the master-output-slave-input line (spi_mosi) to an input mode.
When the MCU receives data, the SPI_MISO is enabled, and the SPI_MOSI is set to be in an input mode, so that the MCU can correctly receive the data from the SPI bus.
The Micro Control Unit (MCU) can enable its SPI master output slave input line (spi_mosi) when transmitting data, and set the master input slave output line (spi_miso) to an input mode.
When the MCU transmits data, the SPI_MOSI is enabled, and the SPI_MISO is set to be in an input mode, so that the MCU can correctly transmit the data to the SPI bus.
When the data of the external Flash memory needs to be transmitted to the TFT screen, the Micro Control Unit (MCU) can set an SPI main output slave input line (SPI_MOSI) and a main input slave output line (SPI_MISO) into an input mode and control an SPI clock line (SPI_SCK) to send a clock signal.
The MCU can set the SPI_MOSI and the SPI_MISO as input modes and control the SPI_SCK to send clock signals, so that data can be directly transmitted from Flash to the TFT, and the data can be directly transmitted from the memory to the display screen under the condition of not involving intermediate processing of the MCU, thereby improving the data transmission efficiency.
Working principle:
the MCU utilizes a single Serial Peripheral Interface (SPI) to manage communication with the external Flash memory and TFT screen. By sharing the SPI clock line (SPI_SCK), the MCU ensures that data can be transferred synchronously between the two peripherals. The SPI main data output line (SPI_MOSI) and the main data input line (SPI_MISO) of the MCU are directly connected to the external Flash and TFT screens, and the configuration supports the direct connection of the data lines, allows the direct data transmission between the Flash and the TFT, and reduces the intermediate processing work of the MCU. The control of the chip select line (CS) enables the MCU to selectively communicate with an external Flash or TFT screen, thereby avoiding potential data transmission conflicts. The MCU adapts the transmission and reception requirements of data by switching input/output modes. In addition, when data is required to be directly transmitted from Flash to a TFT screen, the MCU can set the SPI data line to be in an input mode, and the data transmission is realized only by controlling the SPI clock line, so that the data can be transmitted without buffering in the MCU, the efficiency is improved, and the resource occupation is reduced.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment contains only one independent technical solution, and that such description is provided for clarity only, and that the technical solutions of the embodiments may be appropriately combined to form other embodiments that will be understood by those skilled in the art.

Claims (10)

1. A high-efficient SPI data transmission connected mode for improving TFT display screen frame rate, its characterized in that: comprising the following steps:
a Micro Control Unit (MCU);
the Micro Control Unit (MCU) has a positive power supply input pin (VDD) connected to a positive power supply Voltage (VCC) and a ground pin (VSS) connected to Ground (GND);
an external Flash memory;
the external Flash memory is provided with a plurality of pins, the Ground (GND) pin of the external Flash memory is connected to a common ground, the power supply (VCC) pin of the external Flash memory is connected to a positive power supply Voltage (VCC), the Data Output (DO) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R2), the resistance value of the pull-up resistor (R2) is 4.7 kiloohms, the chip select (CS#) pin of the external Flash memory is connected to the positive power supply Voltage (VCC) through a pull-up resistor (R3), the resistance value of the pull-up resistor (R3) is 4.7 kiloohms, the Data Input (DI) pin of the external Flash memory is connected to the Data Output (DO) pin of the external Flash memory through a current limiting resistor (R5), and the resistance value of the current limiting resistor (R5) is 360 ohms;
a TFT screen;
the TFT screen is provided with 1 st pin to 13 th pin, 9 th pin and 10 th pin are all connected with positive power supply Voltage (VCC), 8 th pin, 11 th pin and 13 th pin are all connected to Ground (GND), positive power supply Voltage (VCC) with connect through a resistance element (R1) between the 12 th pin, resistance element (R1) is 51 ohm (51R), positive power supply Voltage (VCC) is connected to Ground (GND) through a capacitive element (C1), capacitive element (C1) is 1 microfarad (1 uF).
2. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: and the Micro Control Unit (MCU) is connected with the external Flash memory and the TFT screen through a single Serial Peripheral Interface (SPI).
3. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the SPI clock line (SPI_SCK) of the Micro Control Unit (MCU) is connected to the clock input (SCK) of the external Flash memory and the clock input (SCK) of the TFT screen.
4. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: a master-output-slave input line (SPI_MOSI) of the Micro Control Unit (MCU) is connected to a master-input-slave output line (SPI_MISO) and is commonly connected to a master-input-slave output line (MISO) of an external Flash memory and a master-output-slave input line (MOSI) of a TFT screen.
5. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the external Flash memory and a chip select line (CS) of the TFT screen are respectively connected to different I/O ports of the MCU.
6. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) can enable a chip select line (CS) of the external Flash memory while disabling the chip select line (CS) of the TFT screen when communicating with the external Flash memory.
7. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) is capable of enabling a chip select line (CS) of the TFT screen while disabling the chip select line (CS) of the external Flash memory when communicating with the TFT screen.
8. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) can enable its SPI master-input-slave-output line (spi_miso) when receiving data, and set the master-output-slave-input line (spi_mosi) to an input mode.
9. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: the Micro Control Unit (MCU) can enable its SPI master output slave input line (spi_mosi) and set the master input slave output line (spi_miso) to an input mode when transmitting data.
10. The efficient SPI data transmission connection scheme for improving the frame rate of a TFT display screen of claim 1, wherein: when the data of the external Flash memory needs to be transmitted to the TFT screen, the Micro Control Unit (MCU) can set an SPI main output slave input line (SPI_MOSI) and a main input slave output line (SPI_MISO) into an input mode and control an SPI clock line (SPI_SCK) to send a clock signal.
CN202311787732.5A 2023-12-25 2023-12-25 Efficient SPI data transmission connection mode for improving TFT display screen frame rate Pending CN117762853A (en)

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CN202311787732.5A CN117762853A (en) 2023-12-25 2023-12-25 Efficient SPI data transmission connection mode for improving TFT display screen frame rate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311787732.5A CN117762853A (en) 2023-12-25 2023-12-25 Efficient SPI data transmission connection mode for improving TFT display screen frame rate

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CN117762853A true CN117762853A (en) 2024-03-26

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