CN117761756A

CN117761756A - Fault detection method and device for detector, computer equipment and storage medium

Info

Publication number: CN117761756A
Application number: CN202311614921.2A
Authority: CN
Inventors: 胡艺嵩; 李可嘉; 张薇; 卢向晖; 胡友森; 曹建华; 王炜如; 冯英杰; 陈天铭; 蒙舒祺; 毛玉龙
Original assignee: China Nuclear Power Technology Research Institute Co Ltd; China Nuclear Power Engineering Co Ltd; CGN Power Co Ltd
Current assignee: China Nuclear Power Technology Research Institute Co Ltd; China Nuclear Power Engineering Co Ltd; CGN Power Co Ltd
Priority date: 2023-11-29
Filing date: 2023-11-29
Publication date: 2024-03-26

Abstract

The application relates to a fault detection method, a fault detection device, computer equipment and a storage medium of a detector, wherein the fault detection method comprises the following steps: judging the hardware state according to the feedback signal of the detector, and judging the detector corresponding to the hardware state which does not meet the condition of the first preset range as a first failure state; according to the electric signal judging circuit state of the detector, checking the detector corresponding to the circuit state which does not meet the second preset range condition, and judging the detector as a second failure state if the detector does not meet the second preset range condition; and recording the number of the detectors in the failure state, and triggering a shutdown signal if the number is larger than a preset threshold value. The hardware state and the circuit state of the detector are respectively judged, the judging result of the circuit state is further checked, and whether the reactor is shut down or not is judged through a preset threshold value, so that the high efficiency and the accuracy of detecting and processing the faults of the detector are improved, and the safe operation of the nuclear reactor is further ensured.

Description

Fault detection method and device for detector, computer equipment and storage medium

Technical Field

The present disclosure relates to the field of nuclear power information technologies, and in particular, to a fault detection method and apparatus for a detector, a computer device, and a storage medium.

Background

In the nuclear power field, neutron flux density is a key physical quantity for monitoring and controlling the running condition of a nuclear reactor, and in order to ensure the normal running of the nuclear reactor, a neutron detector is generally adopted to monitor the neutron flux in the nuclear reactor.

However, due to the lack of a comprehensive fault diagnosis method, it is difficult to efficiently and accurately detect faults of the neutron detector, so as to influence the reliability of detection results of the neutron detector and the stability of the operating condition of the nuclear reactor.

Disclosure of Invention

In view of the foregoing, it is desirable to provide a fault detection method, apparatus, computer device, and storage medium for a detector that can improve the efficiency and accuracy of fault detection for the detector.

In a first aspect, the present application provides a fault detection method of a detector, including:

judging the hardware state corresponding to each detector according to the feedback signal of each detector at the corresponding measuring point, and judging the detector corresponding to the hardware state which does not meet the condition of the first preset range as a first failure state; wherein the hardware state is used to characterize the condition of the hardware interface of the probe;

Judging the circuit state corresponding to each detector according to the electric signal of each detector at the corresponding measuring point, taking the detector corresponding to the circuit state which does not meet the second preset range condition as a candidate detector, acquiring a checking result corresponding to the candidate detector, and judging the candidate detector as a second failure state if the circuit state of the candidate detector is determined to not meet the second preset range condition based on the checking result; wherein the circuit state is used to characterize the operating condition of the detector's electronic circuit; the method comprises the steps of carrying out a first treatment on the surface of the

Recording the number of detectors in a target failure state, and triggering a shutdown signal if the number of detectors in the target failure state is greater than a preset threshold value; wherein the target failure state includes at least one of the first failure state and the second failure state.

In one embodiment, the determining, according to the feedback signal of each probe at the corresponding measurement point, the hardware state corresponding to each probe includes: determining the first preset range condition according to the reference signal of the detector, and if the feedback signal of the current detector at the corresponding measuring point does not meet the first preset range condition, determining that the hardware state of the current detector does not meet the first preset range condition; wherein the reference signal refers to a signal of the detector when a normal hardware state is known.

In one embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes: determining the second preset range condition according to the working current range of the detector, and if the current value of the current detector which is not in the first failure state at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition; wherein the operating current range refers to the current range of the detector when the normal circuit state is known.

In one embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes: and determining the second preset range condition according to the reconstructed core linear power density and the number of the current detectors in the target failure state, and if the linear power density of the current detector at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes: and determining the second preset range condition according to the reconstructed core linear power density and the linear power density average value corresponding to the detector which is not in the target failure state currently, and if the linear power value of the current detector at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes: and determining the second preset range condition according to the power deviation values corresponding to the pair of detectors which are symmetrical in center of the measuring point and are not in the first failure state, and if the power value corresponding to the current detector does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, before obtaining the checking result for the corresponding circuit state of the candidate detector, the method includes: triggering an alarm signal corresponding to the candidate detector, and triggering a checking result for the state of a circuit corresponding to the candidate detector according to the alarm signal.

In a second aspect, the present application further provides a fault detection device of a detector, including:

the first detection module is used for judging the hardware state corresponding to each detector according to the feedback signal of each detector at the corresponding measuring point, and judging the detector corresponding to the hardware state which does not meet the first preset range condition as a first failure state; wherein the hardware state is used to characterize the condition of the hardware interface of the probe;

The second detection module is used for judging the circuit state corresponding to each detector according to the electric signal of each detector at the corresponding measuring point, taking the detector corresponding to the circuit state which does not meet the second preset range condition as a candidate detector, acquiring a checking result corresponding to the candidate detector, and judging the candidate detector as a second failure state if the circuit state of the candidate detector is determined to not meet the second preset range condition based on the checking result; wherein the circuit state is used to characterize the operating condition of the detector's electronic circuit;

the analysis module is used for recording the number of the detectors in the target failure state, and triggering a shutdown signal if the number of the detectors in the target failure state is larger than a preset threshold value; wherein the target failure state includes at least one of the first failure state and the second failure state.

In a third aspect, the present application also provides a computer device comprising a memory and a processor, the memory storing a computer program, the processor implementing the following steps when executing the computer program:

Judging the circuit state corresponding to each detector according to the electric signal of each detector at the corresponding measuring point, taking the detector corresponding to the circuit state which does not meet the second preset range condition as a candidate detector, acquiring a checking result corresponding to the candidate detector, and judging the candidate detector as a second failure state if the circuit state of the candidate detector is determined to not meet the second preset range condition based on the checking result; wherein the circuit state is used to characterize the operating condition of the detector's electronic circuit; recording the number of detectors in a target failure state, and triggering a shutdown signal if the number of detectors in the target failure state is greater than a preset threshold value; wherein the target failure state includes at least one of the first failure state and the second failure state.

In a fourth aspect, the present application also provides a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:

According to the fault detection method, the fault detection device, the computer equipment and the storage medium of the detector, the hardware state and the circuit state of the detector are respectively and pertinently and comprehensively judged through the first preset range condition and the second preset range condition, the judgment result of the circuit state is further accurately checked, so that the possibility of misjudgment is reduced, whether a shutdown signal is triggered or not is accurately judged through the preset threshold value, the failure state of each detector is accurately identified, the high efficiency and the accuracy of detecting and processing the faults of the detector are improved, and the safe operation of a nuclear reactor is further ensured.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the embodiments or the related technical descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for a person having ordinary skill in the art.

FIG. 1 is a flow chart of a method of fault detection of a detector in one embodiment;

FIG. 2 is a flow chart of a fault detection method of a detector according to yet another embodiment;

FIG. 3 is a block diagram of a fault detection device of the detector in one embodiment;

fig. 4 is an internal structural diagram of a computer device in one embodiment.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.

In one embodiment, as shown in fig. 1, a fault detection method of a detector is provided, where the method is applied to a server for illustration, it is understood that the method may also be applied to a terminal, and may also be applied to a system including the terminal and the server, and implemented through interaction between the terminal and the server. In this embodiment, the method includes the following steps S102 to S106. Wherein:

Step S102, judging the hardware state corresponding to each detector according to the feedback signal of each detector at the corresponding measuring point, and judging the detector corresponding to the hardware state which does not meet the condition of the first preset range as a first failure state; wherein the hardware state is used to characterize the condition of the hardware interface of the probe.

The detector refers to a neutron detector for detecting neutron flux density of a nuclear reactor core, and can comprise a gas detector, a semiconductor detector, a scintillator detector and a self-powered detector. Illustratively, the self-powered detector has the characteristics of no need of externally applied bias voltage, simple structure, small volume, overall solidification, simple electronic equipment and the like, so that the self-powered detector has more advantages in the process of detecting the neutron flux density, and the method is applied to the self-powered detector in the embodiment for example.

Wherein, the feedback signal refers to a signal reflecting the state, performance or behavior of the hardware device; the feedback signal may be represented as a signal for detecting and reporting on the hardware status and performance of the probe itself, and may be generated from the hardware components of the probe. The hardware state refers to the current performance state of the hardware device; the hardware status may be expressed as hardware integrity of the probe, i.e., whether the probe has hardware level damage, including hardware interface damage, contact failure, etc. A hardware interface refers to a physical or electronic connection point for connecting or communicating between two or more hardware devices; the hardware interfaces may include a power interface for accessing power to the detector, a data interface for transmitting data from the detector, and a control interface for controlling the operating conditions of the detector.

Wherein, the conversion of the detector into the failure state means that the output signal of the detector is set to zero or set to a Non state; the first failure state may be represented as a state in which the corresponding detector is in when the output signal of the corresponding detector is set to zero due to the hardware state not conforming to the expectation.

The server receives feedback signals from each detector to obtain a hardware state corresponding to each detector, and meanwhile, a first preset range condition is set as a criterion for the hardware state, and if the hardware state corresponding to the current detector does not meet the first preset range condition, the current detector is judged to be in a first failure state.

Alternatively, the feedback signal may be represented as a signal indicating whether the power interface of the detector has failed, and correspondingly, the hardware state of the power interface is obtained; the feedback signal may also be represented as a signal indicating whether an error or a data loss has occurred during the data transmission through the data interface, and correspondingly, the hardware state of the data interface is obtained; the feedback signal may also be represented as a signal indicating whether an abnormality has occurred during the control of the operating condition of the probe through the control interface, and correspondingly the hardware state of the control interface.

Alternatively, the first preset range condition may be represented as an objective criterion for hardware status, which may be characterized as a condition for determining the stability of the power supply, and correspondingly determining the hardware status of the power supply interface; the first preset range condition may be characterized as a condition for determining the number of errors or the type of errors occurring in the data transmission process, and correspondingly determining the hardware state of the data interface; the first preset range condition may also be characterized as a condition for determining an abnormality occurring when controlling the operation condition of the probe, and correspondingly determining the hardware state of the control interface.

Step S104, judging the circuit state corresponding to each detector according to the electric signal of each detector at the corresponding measuring point, taking the detector corresponding to the circuit state which does not meet the second preset range condition as a candidate detector, obtaining a checking result corresponding to the candidate detector, and judging the candidate detector as a second failure state if the circuit state of the candidate detector is determined to not meet the second preset range condition based on the checking result; wherein the circuit state is used to characterize the operational condition of the detector's electronic circuit.

Wherein, the electric signal refers to a signal transmitted in the form of voltage, current or charge; the electrical signal may be represented as a signal detected by the detector at the corresponding measurement point and capable of reflecting information such as current, line power density, etc. of the corresponding measurement point. The circuit state refers to the operation state of each element in the electronic circuit and the whole circuit; the circuit state may be expressed as an operating condition of an electronic circuit inside the probe, i.e., a state of an electronic component, a sensor, a signal processing circuit, etc. inside the probe.

Wherein, converting the detector to a failure state refers to setting the output signal of the detector to zero; the second failure state may be represented as a state in which the corresponding detector is in when the output signal of the corresponding detector is set to zero due to the circuit state not conforming to the expectation.

The server receives an electrical signal from each detector to obtain a circuit state corresponding to each detector, and sets a second preset range condition as a criterion for the circuit state, if the circuit state corresponding to the current detector does not meet the second preset range condition, the circuit state corresponding to the current detector is checked, and a check result is obtained, and if it is determined that the circuit state of the current detector does not meet the second preset range condition based on the check result, the current detector is determined to be in a second failure state.

Optionally, the electrical signal may be represented as current information measured by the detector at a corresponding measurement point, and a circuit state describing the current information is correspondingly obtained; the electrical signal may also be represented as line power information measured by the detector at the corresponding measurement point, and a circuit state describing the line power information is correspondingly obtained.

Alternatively, the second preset range condition may be expressed as an objective criterion for the circuit state, which may be characterized as a condition for determining the current magnitude and its stability, and correspondingly determining the circuit state including the current information; the second preset range condition may also be characterized as a condition for determining the magnitude of the line power and its stability, and correspondingly determining the state of the circuit including the line power information.

Optionally, the checking result can be obtained by an artificial checking mode, so that the accuracy and the reliability of the checking result are improved; further, the automatic checking function can be realized by combining corresponding computer programs or algorithms, so that the checking efficiency is improved.

Step S106, recording the number of detectors in a target failure state, and triggering a shutdown signal if the number of detectors in the target failure state is greater than a preset threshold; wherein the target failure state comprises at least one of a first failure state and a second failure state.

The shutdown signal refers to a nuclear reaction stop signal of a nuclear reactor.

The number of detectors in a failure state is recorded by the server, and if the number is greater than a preset threshold, a shutdown signal is triggered to stop the nuclear reaction of the nuclear reactor.

Optionally, the type of failure state of the detector can be recorded, so that in a subsequent overhaul process, the detector in the first failure state is subjected to hardware-level overhaul, and the detector in the second failure state is subjected to circuit-level overhaul, so that overhaul efficiency is provided.

Optionally, the first preset range condition and the second preset range condition corresponding to different detectors have consistency, so that the hardware state and the circuit state of the different detectors have uniform evaluation standards.

In the fault detection method of the detector, the hardware state and the circuit state of the detector are respectively and pertinently and comprehensively judged by setting the first preset range condition and the second preset range condition, the judgment result of the circuit state is further accurately checked to reduce the possibility of misjudgment, and whether the shutdown signal is triggered or not is accurately judged by the preset threshold value, so that the failure state of each detector is accurately identified, the high efficiency and the accuracy of detecting and processing the fault of the detector are improved, and the safe operation of a nuclear reactor is further ensured.

In an exemplary embodiment, the determining the hardware state corresponding to each detector according to the feedback signal of each detector at the corresponding measurement point includes step S1021. Wherein:

step S1021, determining a first preset range condition according to the reference signal of the detector, and if the feedback signal of the current detector at the corresponding measuring point does not meet the first preset range condition, determining that the hardware state of the current detector does not meet the first preset range condition; where reference signal refers to the signal of the detector when normal hardware conditions are known.

Wherein, the reference signal refers to a signal used as a reference or standard in the measurement process; the reference signal may be represented as a signal describing the hardware state and performance of the probe itself during normal operating conditions, and may be generated from the hardware components of the probe.

The server obtains a first preset range condition according to the reference signal of the detector, and if the feedback signal of the current detector at the corresponding measuring point does not meet the first preset range condition, the hardware state of the current detector is determined not to meet the first preset range condition.

Alternatively, the reference signal may be represented as a known normal state, the reference signal may be compared with the feedback signal, and if the reference signal and the feedback signal are highly matched, the hardware state of the detector is normal; if the difference between the amplitude, frequency, waveform and the like of the reference signal and the feedback signal exceeds a preset threshold value, the hardware state of the detector is abnormal.

Alternatively, characteristic information such as amplitude, frequency component, time domain characteristic, frequency domain characteristic, waveform shape, etc. of the signal is first extracted from the reference signal; secondly, corresponding characteristic information is used for establishing a model to describe signal characteristics of the detector under normal working conditions, such as a statistical model, a machine learning model and the like; further, criteria for judging the feedback signal, such as a threshold, probability distribution, error range, etc., are determined based on the output of the model and the statistical information.

In this embodiment, the criterion for determining the feedback signal is obtained according to the reference signal, so as to obtain the criterion for determining the hardware state, thereby improving the accuracy and the efficiency of determining the hardware state of the detector.

In an exemplary embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes step S1041. Wherein:

step S1041, determining a second preset range condition according to the working current range of the detector, if the current value of the current detector which is not in the first failure state at the corresponding measuring point does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition; where the operating current range refers to the current range of the detector when the normal circuit state is known.

Illustratively, a second preset range condition is obtained from the operating current range of the detector, the second preset range condition being expressed as an objective rating criterion for the circuit state of the detector; for the detector which is not in the first failure state, if the current value of the detector at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the detector does not meet the second preset range condition; for a detector in the first failure state, the output signal of the detector is zero, so that it is not necessary to determine whether its current value satisfies the second preset range condition.

Optionally, when the working current range of the detector is 4 to 20mA, the circuit state corresponding to the detector with the current value lower than 3.7mA or higher than 20.3mA is judged to be not satisfied with the second preset range condition.

In this embodiment, a criterion for determining a current value is obtained according to a working current range, and then a criterion for determining a circuit state is obtained, so that accuracy and efficiency of determining a detector circuit state are improved.

In an exemplary embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes step S1042. Wherein:

step S1042, determining a second preset range condition according to the reconstructed core linear power density and the number of detectors currently in the target failure state, and if the linear power density of the current detector at the corresponding measuring point does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

The reconstruction refers to core power reconstruction, and can be expressed as reconstructing the power distribution state of the whole core in real time based on a power signal corresponding to a current signal measured by a detector which is not in a failure state at present. The power distribution may be expressed as a distribution of linear power density.

Illustratively, determining a shutdown threshold of the linear power density under the reconstructed core linear power density distribution condition, namely a second preset range condition, according to the number of detector failures; if the linear power density of the detector at the corresponding measuring point exceeds the shutdown threshold, judging that the circuit state of the detector does not meet the second preset range condition.

Optionally, the reconstructed power distribution condition is a full core power distribution condition, and even if the output signal of the detector in the first failure state is zero, the circuit state of the detector can be determined by the corresponding reconstructed linear power density.

Optionally, there is an association between the number of failures of the detectors and the shutdown threshold, for example, as the number of failures of the detectors increases, the shutdown threshold may be correspondingly adjusted downward, so as to ensure that the reactor can be shutdown rapidly in the case of more failed detectors, thereby ensuring the safety of the reactor.

Further, different shutdown thresholds are corresponding to the detectors in the failure state under different numbers; or, for the detectors in the failure state in different number intervals, different shutdown thresholds are corresponding, for example, when the failure number of the detectors is in the interval of 1 to 5, the corresponding linear power density shutdown threshold is 600w/cm; when the number of detector failures is in the interval of 6 to 10, the corresponding linear power density shutdown threshold is adjusted to be 500w/cm.

In this embodiment, according to the reconstructed core linear power density status and the number of detector failures, a criterion for determining the linear power density is obtained, and further a criterion for determining the circuit state is obtained, so that accuracy and efficiency of determining the detector circuit state are improved.

In an exemplary embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes step S1043. Wherein:

step S1043, determining a second preset range condition according to the reconstructed core linear power density and the linear power density average value corresponding to the detector which is not in the target failure state at present, and if the linear power value of the current detector at the corresponding measuring point does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

The method comprises the steps of obtaining linear power densities respectively corresponding to detectors which are not in a failure state at present, and carrying out summation average processing on the plurality of linear power densities to obtain a linear power density average value corresponding to the detectors which are not in the failure state at present; taking the linear power density average value as a reference value to determine an upper limit threshold value and a lower limit threshold value of the linear power density under the reconstructed core linear power density distribution condition, namely a second preset range condition; if the linear power density of the detector at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the detector does not meet the second preset range condition.

Alternatively, the line power density averages corresponding to the different numbers of detectors not in the failure state are approximately equal in value, so that the different line power density averages corresponding to the different numbers of detectors not in the failure state may correspond to the same upper limit threshold and lower limit threshold; or, based on the numerical difference between the different linear power density averages, correspondingly adjusting the upper limit threshold and the lower limit threshold corresponding to the different linear power density averages, for example, when the numerical difference between the current obtained linear power density average and the historical obtained linear power density average is too large, the upper limit threshold corresponding to the current obtained linear power density average is adjusted downwards, the corresponding lower limit threshold is adjusted upwards, and furthermore, the current obtained linear power density average and the linear power density average with the standard specification can be subjected to numerical comparison.

The historical linear power density average value refers to a set recorded at the historical moment and comprising different linear power density average values, and the standard linear power density average value refers to a standard linear power density average value corresponding to a reactor under a normal working condition.

In this embodiment, according to the average value of the linear power densities corresponding to the detector not in the failure state, a criterion for determining the linear power density is obtained, and further a criterion for determining the circuit state is obtained, so that accuracy and efficiency of determining the circuit state of the detector are improved.

In an exemplary embodiment, the determining the circuit state corresponding to each detector according to the electrical signal of each detector at the corresponding measurement point includes step S1044. Wherein:

step S1044, determining a second preset range condition according to the power deviation values corresponding to the pair of detectors with symmetrical measuring points and neither of which is in the first failure state, if the power value corresponding to the current detector does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

Wherein, the measuring points in the reactor core are arranged in a central symmetry mode; when the reactor core and the detectors are in a normal working state, the deviation value between the power values respectively measured by a pair of detectors with symmetrical measuring points is within the allowable maximum deviation range; in an ideal operating state, the deviation value is zero.

Illustratively, a second preset range condition is obtained according to an allowable maximum deviation range between power values measured by a pair of detectors with symmetrical measuring points; for the detectors which are not in the first failure state, respectively acquiring power values measured by the detectors corresponding to a pair of centrally symmetrical measuring points, and acquiring deviation values corresponding to the power values, and if the deviation values do not meet the allowable maximum deviation range condition, judging that the current circuit state corresponding to the pair of detectors does not meet the second preset range condition; for a detector in the first failure state, the output signal of the detector is zero, so that it is not necessary to determine whether the power value and the deviation value thereof meet the second preset range condition.

In this embodiment, according to the allowable maximum deviation range between the power values measured by a pair of detectors with symmetrical measuring points, a criterion for determining the power deviation value is obtained, and then a criterion for determining the circuit state is obtained, so that accuracy and efficiency of determining the circuit state of the detectors are improved.

In an exemplary embodiment, step S108 is included before obtaining the verification result for the corresponding circuit state of the candidate detector. Wherein:

step S108, triggering an alarm signal corresponding to the candidate detector, and triggering a checking result aiming at the state of a circuit corresponding to the candidate detector according to the alarm signal.

The alarm signal is an alarm signal sent out by a monitoring system or a safety system and is used for informing an operator of abnormal conditions. The alarm signal may take a corresponding form, such as sound, light, text, communication, etc., depending on the application scenario.

When the circuit state corresponding to the detector is judged to not meet the second preset range condition, the server triggers an alarm signal corresponding to the detector and sends the alarm signal to a terminal corresponding to an operator, the operator checks the judging result of the detector to obtain a checking result, and the checking result is sent to the server through the terminal.

In this embodiment, by triggering the alarm signal, the operator is notified to perform data checking, so that the possibility of data missing is reduced.

In an exemplary embodiment, as shown in fig. 2, a server acquires a feedback signal of a detector, determines a hardware state of the detector according to the feedback signal, and determines a detector corresponding to the hardware state that does not meet a first preset range condition as a first failure state. Wherein the upper and lower thresholds of the first preset range condition may be determined based on the reference signal of the detector.

The method comprises the steps of obtaining an electric signal of a detector by a server, and judging the circuit state of the detector according to the electric signal, wherein the judging method comprises at least one of the following steps:

the first method is that if the current value corresponding to the current detector is higher than the upper limit threshold or lower than the lower limit threshold, the circuit state of the current detector is judged not to meet the second preset range condition; wherein, the upper limit threshold and the lower limit threshold of the second preset range condition can be determined according to the working current range;

the second method is that if the deviation value between the power value measured by the current detector at the corresponding measuring point and the power value measured by the detector corresponding to the other measuring point with central symmetry is higher than a preset threshold value, the circuit state of the current detector is judged not to meet the second preset range condition;

The third method is that if the reconstructed line power density corresponding to the current detector is higher than a preset upper limit threshold value or lower than a preset lower limit threshold value, the circuit state of the current detector is judged not to meet a second preset range condition; wherein, the corresponding threshold value can be determined according to the number of the failure detectors;

the fourth method is that if the reconstructed line power density corresponding to the current detector is higher than a preset upper limit threshold value or lower than a preset lower limit threshold value, the circuit state of the current detector is judged not to meet a second preset range condition; wherein, can confirm corresponding threshold value according to the linear power density mean value of the detector that does not fail.

The third and fourth methods are applicable to both detectors in the first failure state and detectors not in the first failure state; the first and second methods are applicable only to detectors that are not in the first failure state.

When the circuit state of the detector is judged to not meet the second preset range condition, the server triggers an alarm signal and sends the alarm signal to a terminal corresponding to an operator, the operator checks the judging result and sends the checking result to the server through the terminal, and if the circuit state of the detector is judged to not meet the second preset range condition based on the checking result, the detector is judged to be in a second failure state.

And recording the number of detectors in the failure state by the server, and triggering a shutdown signal if the number of detectors in the failure state is greater than a preset shutdown threshold.

It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.

Based on the same inventive concept, the embodiment of the application also provides a fault detection device of the detector for realizing the fault detection method of the detector. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation in the embodiments of the fault detection device for one or more detectors provided below may be referred to the limitation of the fault detection method for the detector hereinabove, and will not be repeated herein.

In an exemplary embodiment, as shown in fig. 3, there is provided a fault detection device of a detector, including: a first detection module 302, a second detection module 304, and an analysis module 306, wherein:

the first detection module 302 is configured to determine, according to a feedback signal of each detector at a corresponding measurement point, a hardware state corresponding to each detector, and determine, as a first failure state, a detector corresponding to a hardware state that does not meet a first preset range condition; wherein the hardware state is used to characterize the condition of the hardware interface of the probe.

The second detection module 304 is configured to determine, according to an electrical signal of each detector at a corresponding measurement point, a circuit state corresponding to each detector, take a detector corresponding to a circuit state that does not meet a second preset range condition as a candidate detector, obtain a verification result corresponding to the candidate detector, and determine, if it is determined based on the verification result that the circuit state of the candidate detector does not meet the second preset range condition, the candidate detector as a second failure state; wherein the circuit state is used to characterize the operational condition of the detector's electronic circuit.

The analysis module 306 is configured to record the number of detectors in the target failure state, and trigger a shutdown signal if the number of detectors in the target failure state is greater than a preset threshold; wherein the target failure state comprises at least one of a first failure state and a second failure state.

In an exemplary embodiment, the first detection module 302 includes a hardware determination unit, where: the hardware judging unit is used for determining a first preset range condition according to the reference signal of the detector, and judging that the hardware state of the current detector does not meet the first preset range condition if the feedback signal of the current detector at the corresponding measuring point does not meet the first preset range condition; where reference signal refers to the signal of the detector when normal hardware conditions are known.

In an exemplary embodiment, the second detection module 304 includes a first circuit determination unit, wherein: the first circuit judging unit is used for determining a second preset range condition according to the working current range of the detector, and judging that the circuit state of the current detector does not meet the second preset range condition if the current value of the current detector which is not in the first failure state at the corresponding measuring point does not meet the second preset range condition; where the operating current range refers to the current range of the detector when the normal circuit state is known.

In an exemplary embodiment, the second detection module 304 includes a second circuit determination unit, wherein: and the second circuit judging unit is used for determining a second preset range condition according to the reconstructed core linear power density and the number of the current detectors in the target failure state, and judging that the circuit state of the current detector does not meet the second preset range condition if the linear power density of the current detector at the corresponding measuring point does not meet the second preset range condition.

In an exemplary embodiment, the second detection module 304 includes a third circuit determination unit, wherein: and the third circuit judging unit is used for determining a second preset range condition according to the reconstructed core linear power density and the linear power density average value corresponding to the detector which is not in the target failure state currently, and judging that the circuit state of the current detector does not meet the second preset range condition if the linear power value of the current detector at the corresponding measuring point does not meet the second preset range condition.

In an exemplary embodiment, the second detection module 304 includes a fourth circuit determination unit, wherein: and the fourth circuit judging unit is used for determining a second preset range condition according to the power deviation values corresponding to the pair of detectors which are symmetrical in center of the measuring point and are not in the first failure state, and judging that the circuit state of the current detector does not meet the second preset range condition if the power value corresponding to the current detector does not meet the second preset range condition.

In an exemplary embodiment, the second detection module 304 comprises an alarm unit, wherein: and the alarm unit is used for triggering an alarm signal corresponding to the candidate detector and triggering a checking result aiming at the state of the circuit corresponding to the candidate detector according to the alarm signal.

The respective modules in the fault detection device of the detector can be implemented in whole or in part by software, hardware and a combination thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one exemplary embodiment, a computer device is provided, which may be a server, and the internal structure thereof may be as shown in fig. Y. The computer device includes a processor, a memory, an Input/Output interface (I/O) and a communication interface. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface is connected to the system bus through the input/output interface. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database of the computer device is used for storing signal data of the detector. The input/output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements a method of fault detection for a detector.

Those skilled in the art will appreciate that the structures shown in FIG. 4 are block diagrams only and do not constitute a limitation of the computer device on which the present aspects apply, and that a particular computer device may include more or less components than those shown, or may combine some of the components, or have a different arrangement of components.

In one exemplary embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:

judging the circuit state corresponding to each detector according to the electric signal of each detector at the corresponding measuring point, taking the detector corresponding to the circuit state which does not meet the second preset range condition as a candidate detector, obtaining a checking result corresponding to the candidate detector, and judging the candidate detector as a second failure state if the circuit state of the candidate detector is determined to not meet the second preset range condition based on the checking result; wherein the circuit state is used to characterize the operational condition of the detector's electronic circuit; recording the number of detectors in a target failure state, and triggering a shutdown signal if the number of detectors in the target failure state is greater than a preset threshold value; wherein the target failure state comprises at least one of a first failure state and a second failure state.

In one embodiment, the processor when executing the computer program further performs the steps of: determining a first preset range condition according to the reference signal of the detector, and if the feedback signal of the current detector at the corresponding measuring point does not meet the first preset range condition, determining that the hardware state of the current detector does not meet the first preset range condition; where reference signal refers to the signal of the detector when normal hardware conditions are known.

In one embodiment, the processor when executing the computer program further performs the steps of: determining a second preset range condition according to the working current range of the detector, and if the current value of the current detector which is not in the first failure state at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition; where the operating current range refers to the current range of the detector when the normal circuit state is known.

In one embodiment, the processor when executing the computer program further performs the steps of: and determining a second preset range condition according to the reconstructed core linear power density and the number of the current detectors in the target failure state, and if the linear power density of the current detector at the corresponding measuring point does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the processor when executing the computer program further performs the steps of: and determining a second preset range condition according to the reconstructed core linear power density and the linear power density average value corresponding to the detector which is not in the target failure state currently, and if the linear power value of the current detector at the corresponding measuring point does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the processor when executing the computer program further performs the steps of: and determining a second preset range condition according to the power deviation values corresponding to the pair of detectors which are symmetrical in center of the measuring points and are not in the first failure state, and if the power value corresponding to the current detector does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the processor when executing the computer program further performs the steps of: triggering an alarm signal corresponding to the candidate detector, and triggering a checking result aiming at the state of a circuit corresponding to the candidate detector according to the alarm signal.

In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:

In one embodiment, the computer program when executed by the processor further performs the steps of: determining a first preset range condition according to the reference signal of the detector, and if the feedback signal of the current detector at the corresponding measuring point does not meet the first preset range condition, determining that the hardware state of the current detector does not meet the first preset range condition; where reference signal refers to the signal of the detector when normal hardware conditions are known.

In one embodiment, the computer program when executed by the processor further performs the steps of: determining a second preset range condition according to the working current range of the detector, and if the current value of the current detector which is not in the first failure state at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition; where the operating current range refers to the current range of the detector when the normal circuit state is known.

In one embodiment, the computer program when executed by the processor further performs the steps of: and determining a second preset range condition according to the reconstructed core linear power density and the number of the current detectors in the target failure state, and if the linear power density of the current detector at the corresponding measuring point does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the computer program when executed by the processor further performs the steps of: and determining a second preset range condition according to the reconstructed core linear power density and the linear power density average value corresponding to the detector which is not in the target failure state currently, and if the linear power value of the current detector at the corresponding measuring point does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the computer program when executed by the processor further performs the steps of: and determining a second preset range condition according to the power deviation values corresponding to the pair of detectors which are symmetrical in center of the measuring points and are not in the first failure state, and if the power value corresponding to the current detector does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

In one embodiment, the computer program when executed by the processor further performs the steps of: triggering an alarm signal corresponding to the candidate detector, and triggering a checking result aiming at the state of a circuit corresponding to the candidate detector according to the alarm signal.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the various embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magnetic random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (Phase Change Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), and the like. The databases referred to in the various embodiments provided herein may include at least one of relational databases and non-relational databases. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic units, quantum computing-based data processing logic units, etc., without being limited thereto.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.

Claims

1. A method of fault detection for a detector, the method comprising:

Judging the circuit state corresponding to each detector according to the electric signal of each detector at the corresponding measuring point, taking the detector corresponding to the circuit state which does not meet the second preset range condition as a candidate detector, acquiring a checking result corresponding to the candidate detector, and judging the candidate detector as a second failure state if the circuit state of the candidate detector is determined to not meet the second preset range condition based on the checking result; wherein the circuit state is used to characterize the operating condition of the detector's electronic circuit;

2. The method of claim 1, wherein determining the hardware state corresponding to each probe based on the feedback signal of each probe at the corresponding measurement point comprises:

determining the first preset range condition according to the reference signal of the detector, and if the feedback signal of the current detector at the corresponding measuring point does not meet the first preset range condition, determining that the hardware state of the current detector does not meet the first preset range condition; wherein the reference signal refers to a signal of the detector when a normal hardware state is known.

3. The method of claim 1, wherein determining the corresponding circuit state of each detector based on the electrical signal at the corresponding measurement point of each detector comprises:

determining the second preset range condition according to the working current range of the detector, and if the current value of the current detector which is not in the first failure state at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition; wherein the operating current range refers to the current range of the detector when the normal circuit state is known.

4. The method of claim 1, wherein determining the corresponding circuit state of each detector based on the electrical signal at the corresponding measurement point of each detector comprises:

and determining the second preset range condition according to the reconstructed core linear power density and the number of the current detectors in the target failure state, and if the linear power density of the current detector at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition.

5. The method of claim 1, wherein determining the corresponding circuit state of each detector based on the electrical signal at the corresponding measurement point of each detector comprises:

And determining the second preset range condition according to the reconstructed core linear power density and the linear power density average value corresponding to the detector which is not in the target failure state currently, and if the linear power value of the current detector at the corresponding measuring point does not meet the second preset range condition, judging that the circuit state of the current detector does not meet the second preset range condition.

6. The method of claim 1, wherein determining the corresponding circuit state of each detector based on the electrical signal at the corresponding measurement point of each detector comprises:

and determining the second preset range condition according to the power deviation values corresponding to the pair of detectors which are symmetrical in center of the measuring point and are not in the first failure state, and if the power value corresponding to the current detector does not meet the second preset range condition, determining that the circuit state of the current detector does not meet the second preset range condition.

7. The method according to claim 1, wherein before obtaining the check result for the candidate detector corresponding circuit state, comprising:

triggering an alarm signal corresponding to the candidate detector, and triggering a checking result for the state of a circuit corresponding to the candidate detector according to the alarm signal.

8. A fault detection device for a detector, the device comprising:

9. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1 to 7 when the computer program is executed.

10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 7.