CN117743217A - Storage system design and data access method based on hierarchical exchange - Google Patents
Storage system design and data access method based on hierarchical exchange Download PDFInfo
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Abstract
The invention belongs to the field of computing architecture and chip design, and particularly discloses a hierarchical exchange-based storage system design and a data access method. Aiming at the problems of high difficulty in realizing the back end, low cell utilization rate, overlong winding and the like when the traditional crossbar direct connection structure is applied to a multi-port large-bit-width storage system, the invention provides a data routing mode of layered exchange.
Description
Technical Field
The invention relates to the field of computing architecture and chip design, in particular to a hierarchical exchange-based storage system design and a data access method.
Background
With the high-speed development of artificial intelligence technology, the internal structure of various neural network acceleration chips is increasingly complex, and a large number of control units, operation units and communication units all need to exchange data through a core storage unit. Therefore, whether a multi-channel can be provided or not, a memory cell with a large bandwidth becomes a key of high or low performance of the chip. Because the memory unit needs to provide a plurality of access ports and a single port needs to provide a larger bandwidth, the traditional crossbar direct connection structure can cause a great problem for the realization of the back end of the chip, so the data routing mode of layered exchange is adopted in the process, the number of global wires in the unit can be effectively reduced, the problem of the wire arrangement of the back end of the chip is solved, and the area utilization rate of the chip is improved.
Disclosure of Invention
In order to solve at least one of the problems mentioned in the background art, the present invention proposes a storage system design and a data access method based on hierarchical exchange.
A storage system design and data access method based on hierarchical exchange includes the steps:
step S1, designing a data exchange network according to a hierarchical routing structure, and specifically comprising the steps of:
step S101, dividing the data switching network into L switching layers according to the number of ports, specifically, each divided switching layer contains X small-scale crossbar switching units, and the following quantitative relationship is satisfied:
the number of crossbar switching units in the (i+1) th switching layer is equal to the number of output ports of a single crossbar switching unit in the (i) th switching layer;
the number of input ports of each crossbar switching unit in the i+1 switching layer is equal to the number of output ports of the crossbar switching units in the i switching layer;
relation 3, the output port of the crossbar switch unit in the first layer of switch layer is connected with the inlet of the data switch network, and is marked as an access port, and the mark symbol is P j J e [0+ ], j represents the number of the access port;
relation 4, the output port of the crossbar switch unit in the last layer of switch layer is connected with the outlet of the data switch network, the outlet of the data switch network is connected with a memory, and the symbol B is used for the connection of the data switch network k K is [0+ ], k represents the number of the memory;
relation 5, each output port of each crossbar switching unit in the i-th layer switching layer is cross-connected with the input port of each crossbar switching unit in the i+1-th layer switching layer;
step S102, the number of modules and data wires between modules in the data exchange network after the division of the exchange layer is completed is calculated, and a specific calculation formula is as follows:
Num＝N+M+(L-1)*K
K∈(N,M)
in the formula, num represents the number of modules in a data exchange network and data wires between the modules, N represents a value when the number of access wide ports is the same as the number of wires of a crossbar exchange unit, M represents a value when the number of wires of the crossbar exchange unit of the last layer is the same as the number of wires of a memory, and K represents the number of ports between two exchange layers;
step S103, evaluating the divided data exchange network according to the calculated number of the modules and the data wires between the modules.
The traditional crossbar structure is to directly connect each input interface with each output interface, so that an access port can be simply regarded as input for an access memory system, a physical memory can be regarded as output, and for a multi-port large-bit-width memory system, if the crossbar direct connection structure is adopted for design, the difficulty of rear end implementation is great, the cell utilization rate is low, and in addition, the problems of overlong winding and the like in the system also exist.
In order to reduce the number of global wires and reduce the difficulty of back-end wiring, the invention provides a hierarchical routing structure for optimizing a data exchange network.
Step S2, the data completes all data routing in the design data exchange network, and the method specifically comprises the steps of:
step S201, the access port sends an access request to an input port of a crossbar switching unit in a first layer of switching layer, specifically, the information of the access request contains the number of a memory;
step S202, a crossbar exchange unit in a first layer of exchange layers receives an access request of an access port, forwards the access request to an output port of a corresponding number of the crossbar exchange unit according to a judging rule I, specifically, the judging rule I judges by intercepting a right two bits after the memory number is converted into binary codes, calculates a result after the binary codes of the right two bits are converted into decimal codes, and selects the output port of the corresponding number according to the obtained decimal codes;
step S203, after the output port of the crossbar switching unit receives the access request, connecting the next crossbar switching unit corresponding to the number according to the number of the output port, arbitrating four input port request information on the crossbar switching unit by using a polling mode, and outputting the access request to the input port corresponding to the number according to the arbitration result;
step S204, the input port of the corresponding number of the next-stage crossbar switching unit receives the access request, forwards the access request to the output port of the corresponding number of the crossbar switching unit according to a judging rule II, wherein the judging rule II specifically judges by intercepting the left front three bits after the memory number is converted into the binary code, calculates the result after the binary code of the left front three bits is converted into the decimal code, and selects the corresponding number of the memory according to the obtained decimal code;
step S205, after the output port of the crossbar exchange unit receives the access request, the output port is connected with the memory corresponding to the number according to the number of the output port, the request information of the input port on the memory is arbitrated by using a polling mode, and the access request is output to the input port corresponding to the number according to the arbitrated result.
The invention provides a storage system design and data access method based on hierarchical exchange, which has the following beneficial effects compared with the prior art:
the data routing mode of layered exchange is adopted in the method, so that the number of global wires in a chip unit can be obviously reduced, the problem of wire routing at the back end of the chip is solved, and the area utilization rate of the chip is improved.
Drawings
FIG. 1 is a schematic flow chart of the present invention;
FIG. 2 is a hierarchical routing fabric connection schematic diagram of an embodiment of the present invention;
FIG. 3 is a schematic diagram of a conventional crossbar interconnect connection according to an embodiment of the present invention.
Detailed Description
In order to make the objects and features of the present invention more comprehensible, the present invention is described in detail below by way of examples and with reference to the accompanying drawings.
As shown in fig. 1, a storage system design and data access method based on hierarchical exchange includes the steps of:
step S1, designing a data exchange network according to a hierarchical routing structure, and specifically comprising the steps of:
in step S101, the data switching network is divided into L switching layers according to the number of ports, and preferably, the value range of L is 2 to 16.
Specifically, each divided exchange layer contains X small-scale crossbar exchange units, and preferably, the value range of X is 2 to 16.
The divided exchange layer satisfies the following quantitative relationship:
the number of crossbar switch units in the i+1-th switch layer is equal to the number of output ports of a single crossbar switch unit in the i-th switch layer in relation 1.
The number of input ports of each crossbar switch unit in the i+1 switch layer is equal to the number of output ports of the crossbar switch unit in the i switch layer in relation 2.
Relation 3, the output port of the crossbar switch unit in the first layer of switch layer is connected with the inlet of the data switch network, and is marked as an access port, and the mark symbol is P j J E [0 ] ++ infinity a) of the above-mentioned components, j represents the number of the access port.
Relation 4, the output port of the crossbar switch unit in the last layer of switch layer is connected with the outlet of the data switch network, the outlet of the data switch network is connected with a memory, and the symbol B is used for the connection of the data switch network k K is E [0 ] ++ infinity a) of the above-mentioned components, k represents the number of the memory.
Relation 5, each output port of each crossbar switch unit in the i-th layer switch layer is cross-connected with the input port of each crossbar switch unit in the i+1-th layer switch layer.
Step S102, the number of modules and data wires between modules in the data exchange network after the division of the exchange layer is completed is calculated, and a specific calculation formula is as follows:
Num＝N+M+(L-1)*K
K∈(N,M)
in the formula, num represents the number of modules in the data exchange network and data wires between the modules, N represents a value when the number of access wide ports is the same as the number of wires of the crossbar exchange unit, M represents a value when the number of wires of the crossbar exchange unit of the last layer is the same as the number of wires of the memory, and K represents the number of ports between the two exchange layers.
As shown in fig. 3, in the conventional crossbar structure, each input interface is directly connected with each output interface, so that an access port can be simply regarded as input for an access memory system, a physical memory can be regarded as output, and if a crossbar direct connection structure is adopted for designing a multi-port large-bit-width memory system, the difficulty in realizing a rear end is great, so that the cell utilization rate is low, and the problems of overlong winding and the like exist.
In order to reduce the number of global wires and reduce the difficulty of back-end wiring, the invention provides a hierarchical routing structure for optimizing a data exchange network.
Step S2, the data completes all data routing in the design data exchange network, in particular each crossbar exchange unit in each exchange layer in the data exchange network, the data forwarding is carried out according to the number of the memory in the received routing request, and the request data is finally forwarded to the target memory after a plurality of rounds of data forwarding, as shown in FIG. 2, the forwarding process comprises the steps of:
in step S201, the access port sends an access request to the input port of the crossbar switch unit in the first layer of switch layer, specifically, the information of the access request includes the number of the memory.
Step S202, a crossbar switch unit in a first layer of switch layer receives an access request of an access port, and forwards the access request to an output port of a corresponding number of the crossbar switch unit according to a first judgment rule, wherein the first judgment rule is to judge by intercepting a right two bits after the memory number is converted into binary code, calculate a result after the binary code of the right two bits is converted into decimal code, and select the output port of the corresponding number according to the obtained decimal code.
Step S203, after the output port of the crossbar switch unit receives the access request, the crossbar switch unit of the next stage corresponding to the number is connected according to the number of the output port, and four input port request information on the crossbar switch unit is arbitrated by using a polling mode, and the access request is output to the input port of the corresponding number according to the arbitrated result.
Step S204, the input port of the corresponding number of the next-stage crossbar switch unit receives the access request, forwards the access request to the output port of the corresponding number of the crossbar switch unit according to a judging rule II, wherein the judging rule II specifically is to intercept the first left three bits after the memory number is converted into the binary code for judgment, calculate the result after the binary code of the first left three bits is converted into the decimal code, and select the corresponding number of the memory according to the obtained decimal code.
Step S205, after the output port of the crossbar exchange unit receives the access request, the output port is connected with the memory corresponding to the number according to the number of the output port, the request information of the input port on the memory is arbitrated by using a polling mode, and the access request is output to the input port corresponding to the number according to the arbitrated result.
Alternatively, the routing request forwarding process in which the access port P5 needs to access the memory B7 with the number 7 in the implementation process is indicated by the bold arrow in fig. 2 according to the above-mentioned step flow.
The working process of the invention has been carried out once according to the method disclosed herein.
While the invention has been described in detail in this specification with reference to the general description and the specific embodiments thereof, it will be apparent to one skilled in the art that modifications and improvements can be made thereto. Accordingly, such modifications or improvements may be made without departing from the spirit of the invention and are intended to be within the scope of the invention as claimed.
Claims (8)
1. A storage system design and data access method based on hierarchical exchange includes the steps:
step S1, designing a data exchange network according to a hierarchical routing structure;
step S2, the data completes all data routing in the design data exchange network.
2. The method for designing and accessing data of a memory system based on hierarchical exchange according to claim 1, wherein the step S1 comprises the steps of:
step S101, dividing a data exchange network into L exchange layers according to the number of ports;
step S102, calculating the number of modules and data wires between modules in the data exchange network after the exchange layer division is completed;
step S102, evaluating the divided data exchange network according to the calculated number of the modules and the data wires between the modules.
3. The method for designing and accessing data of a hierarchical exchange based storage system according to claim 2, wherein in step S101, the data exchange network is divided into L exchange layers, and specifically, each of the divided exchange layers includes X small-scale crossbar exchange units, and the following quantitative relationship is satisfied:
the number of crossbar switching units in the (i+1) th switching layer is equal to the number of output ports of a single crossbar switching unit in the (i) th switching layer;
the number of input ports of each crossbar switching unit in the i+1 switching layer is equal to the number of output ports of the crossbar switching units in the i switching layer;
relation 3, output port of crossbar switch unit in first layer switch layer is connected with inlet of data switch networkThe connection is marked as an access port, and the mark symbol is P j J e [0+ ], j represents the number of the access port;
relation 4, the output port of the crossbar switch unit in the last layer of switch layer is connected with the outlet of the data switch network, the outlet of the data switch network is connected with a memory, and the symbol B is used for the connection of the data switch network k K is [0+ ], k represents the number of the memory;
relation 5, each output port of each crossbar switch unit in the i-th layer switch layer is cross-connected with the input port of each crossbar switch unit in the i+1-th layer switch layer.
4. The method for designing and accessing data of a storage system based on hierarchical exchange according to claim 2, wherein the calculating in step S102 is performed by calculating the number of modules and data wires between modules in the data exchange network after the division of the exchange layer, and the specific calculation formula is as follows:
Num＝N+M+(L-1)*K
K∈(N,M)
in the formula, num represents the number of modules in the data exchange network and data wires between the modules, N represents a value when the number of access wide ports is the same as the number of wires of the crossbar exchange unit, M represents a value when the number of wires of the crossbar exchange unit of the last layer is the same as the number of wires of the memory, and K represents the number of ports between the two exchange layers.
5. The method for designing and accessing data of a memory system based on hierarchical exchange according to claim 2, wherein the step S2 comprises the steps of:
step S201, an access port sends an access request to an input port of a crossbar switching unit in a first layer of switching layer;
step S202, a crossbar switching unit in a first layer of switching layers receives an access request of an access port and forwards the access request to an output port of the crossbar switching unit with a corresponding number according to a judgment rule;
step S203, after the output port of the crossbar switching unit receives the access request, connecting the next crossbar switching unit corresponding to the number according to the number of the output port, arbitrating four input port request information on the crossbar switching unit by using a polling mode, and outputting the access request to the input port corresponding to the number according to the arbitration result;
step S204, the input port of the corresponding number of the next-stage crossbar switching unit receives the access request, and forwards the access request to the output port of the corresponding number of the crossbar switching unit according to the judgment rule;
step S205, after the output port of the crossbar exchange unit receives the access request, the output port is connected with the memory corresponding to the number according to the number of the output port, the request information of the input port on the memory is arbitrated by using a polling mode, and the access request is output to the input port corresponding to the number according to the arbitrated result.
6. The method for designing and accessing data in a memory system according to claim 5, wherein the access request in step S201 includes the number of the memory.
7. The method for designing and accessing data of a memory system according to claim 5, wherein the determining rule in step S202 is specifically to intercept the right two bits after the memory number is converted into the binary code, determine, calculate the result after the binary code of the right two bits is converted into the decimal code, and select the output port with the corresponding number according to the obtained decimal code.
8. The method for designing and accessing data of a memory system according to claim 5, wherein the determining rule in step S204 is specifically to intercept the first three left digits after the conversion of the memory number into binary codes, determine, calculate the result after the conversion of the binary codes of the first three left digits into decimal codes, and select the corresponding number of the memory according to the obtained decimal codes.
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