CN117728531A - Circuit for charging and method for controlling charging - Google Patents

Abstract

The application relates to the technical field of consumer electronics, and discloses a circuit for charging, which comprises: the charging circuit comprises a power end and a charging end, wherein the charging end is connected with equipment to be charged and is used for charging the equipment to be charged; the main control unit is electrically connected with the charging circuit and is used for controlling the charging circuit to charge the equipment to be charged by the second charging current and enter a dormant state under the condition that the charging circuit charges the equipment to be charged by the first charging current to reach a preset condition; wherein the second charging current is less than the first charging current. In the embodiment of the disclosure, the main control unit may control the charging circuit to charge the device to be charged with the second charging current and enter the sleep state when a preset condition is reached. Before the charging is finished, the main control unit is not always in a working state, but can enter a dormant state in advance after reaching a preset condition so as to reduce the power consumption of the main control unit in the charging process. The application also discloses a method for controlling charging.

Description

Circuit for charging and method for controlling charging

Technical Field

The present application relates to the field of consumer electronics technology, for example to a circuit for charging and a method for controlling charging.

Background

TWS (True Wireless Stereo), true wireless stereo headphones may be divided into a wireless Bluetooth headphone and a charging bin. The bin charges for the earphone when the earphone is put into, and every TWS earphone charges the interface and is connected with the bin that charges through two earphones, and two earphones charge the interface and regard as power end and ground connection respectively in order to realize the function of charging of bin to the earphone. The Bluetooth TWS earphone generally realizes battery charging by a linear charging mode, and ensures that the output voltage of a power supply end in an earphone charging interface is higher than the voltage of a battery cell of the earphone to be charged through a set feedback circuit. But in the charging process of the charging bin to the earphone, when the electric quantity of the earphone is close to the full electric quantity, the main control unit of the charging bin can be controlled to enter a sleep mode so as to reduce the power consumption of the charging bin.

In the related art, a high-precision sampling resistor is connected in series to a headset charging circuit, and a voltage value caused by the sampling resistor is converted into a current value by using an MCU/PMIC (Microcontroller Unit/Power Management IC, a micro control unit/power management integrated circuit) with an AD function. When the earphone is fully charged, the charging current collected by the MCU/PMIC can be reduced, so that the charging state of the earphone can be judged. In the whole process, the MCU/PMIC master control is required to work all the time, AD acquisition current is used for judging, charging is closed when the current is smaller than a set threshold value, and the master control enters a dormant state.

In the process of implementing the embodiments of the present disclosure, it is found that at least the following problems exist in the related art:

in the related art, the MCU/PMIC master control with the AD function is required to accurately sample the charging current, and the MCU/PMIC master control is required to be in a working state all the time before the charging is finished, so that larger power consumption can be generated.

It should be noted that the information disclosed in the foregoing background section is only for enhancing understanding of the background of the present application and thus may include information that does not form the prior art that is already known to those of ordinary skill in the art.

Disclosure of Invention

The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview, and is intended to neither identify key/critical elements nor delineate the scope of such embodiments, but is intended as a prelude to the more detailed description that follows.

Embodiments of the present disclosure provide a circuit for charging and a method for controlling charging to reduce power consumption during charging.

In some embodiments, the circuit for charging includes a charging circuit and a master control unit; the charging circuit comprises a power end and a charging end, and the charging end is connected with the equipment to be charged and is used for charging the equipment to be charged; the main control unit is electrically connected with the charging circuit and is used for controlling the charging circuit to charge the equipment to be charged by the second charging current and enter a dormant state under the condition that the charging circuit charges the equipment to be charged by the first charging current to reach a preset condition; wherein the second charging current is less than the first charging current.

Optionally, the charging circuit comprises a first charging branch and a second charging branch which are connected in parallel with the power supply end and the charging end; the first charging branch is provided with a switch, and the second charging branch is provided with a first resistor and a second resistor which are connected in series; under the condition that a switch is closed, the first charging branch is short-circuited, and the charging circuit charges equipment to be charged by the first charging branch; under the condition that a switch is opened, the first charging branch circuit is opened, and the charging circuit charges equipment to be charged by the second charging branch circuit.

Optionally, the charging circuit further comprises: the first detection circuit comprises a first PMOS tube and a first protection resistor, and the grid electrode of the first PMOS tube is connected between the first resistor and the second resistor of the second charging branch circuit; the source electrode of the first PMOS tube is connected with the power end of the charging circuit; the drain electrode of the first PMOS tube is connected with one end of the first protection resistor; the other end of the first protection resistor is grounded; the second detection circuit comprises a second PMOS tube and a second protection resistor, and the grid electrode of the second PMOS tube is connected with the drain electrode of the first PMOS tube; the source electrode of the second PMOS tube is connected with the power end of the charging circuit; the drain electrode of the second PMOS tube is connected with the signal receiving end of the main control unit; one end of the second protection resistor is connected with the drain electrode of the second PMOS tube; the other end of the second protection resistor is grounded; the drain electrode of the second PMOS tube outputs a second detection signal according to the first detection signal received by the grid electrode of the second PMOS tube; the main control unit controls the charging circuit to charge the equipment to be charged by the first charging current or the second charging current according to the received second detection signal.

Optionally, the charging circuit further comprises: the first detection circuit comprises a first PMOS tube and a first protection resistor, and the grid electrode of the first PMOS tube is connected between the first resistor and the second resistor of the second charging branch circuit; the source electrode of the first PMOS tube is connected with the power end of the charging circuit; the drain electrode of the first PMOS tube is connected with the signal receiving end of the main control unit; one end of the first protection resistor is connected with the drain electrode of the first PMOS tube; the other end of the first protection resistor is grounded; the drain electrode of the first PMOS tube outputs a first detection signal; the main control unit controls the charging circuit to charge the equipment to be charged with the first charging current or the second charging current according to the received first detection signal.

In some embodiments, the method for controlling charging is applied to a circuit for charging as described above, the method comprising: the main control unit controls the charging circuit to charge the equipment to be charged by the first charging current; under the condition that the charging circuit charges the equipment to be charged by the first charging current to reach a preset condition, the main control unit controls the charging circuit to charge the equipment to be charged by the second charging current; the main control unit enters a dormant state.

Optionally, the charging circuit charges the device to be charged with the first charging current to reach a preset condition, including: the charging circuit charges the equipment to be charged by the first charging current for a first preset time length or a second preset time length; the first preset time period is smaller than the second preset time period.

Optionally, the main control unit enters a sleep state, including: under the condition that the charging circuit takes the first charging current as the charging time of the equipment to be charged to reach the first preset time, if the second charging current is smaller than the preset current, the main control unit enters a dormant state; or under the condition that the charging time of the charging circuit for charging the equipment to be charged by the first charging current reaches the second preset time, the main control unit directly enters the dormant state.

Optionally, when the duration of charging the device to be charged by the charging circuit with the first charging current reaches the first preset duration, the method further includes: if the second charging current is greater than or equal to the preset current, the main control unit controls the charging circuit to charge the equipment to be charged by the first charging current.

Optionally, after the main control unit enters the sleep state, the method further includes: and under the condition that the second charging current is greater than or equal to the preset current, the main control unit is awakened, and the charging circuit is controlled to charge the equipment to be charged by the first charging current.

Optionally, in the case that the charging circuit charges the device to be charged with the first charging current, the method further comprises: detecting the voltage of the drain electrode of the second PMOS tube; and under the condition that the voltage of the drain electrode of the second PMOS tube is low level, performing error reporting processing.

The circuit for charging and the method for controlling charging provided by the embodiment of the disclosure can realize the following technical effects:

in the embodiment of the disclosure, the main control unit may control a charging current of the charging circuit, and when the charging circuit charges the device to be charged with the first charging current to reach a preset condition, the device to be charged already has a higher electric quantity. At this time, the main control unit controls the charging circuit to charge the device to be charged with a second charging current smaller than the first charging current, and enters a sleep state. Before the charging is finished, the main control unit is not always in a working state, but can enter a dormant state in advance after reaching a preset condition. Therefore, the power consumption of the main control unit in the charging process can be reduced.

The foregoing general description and the following description are exemplary and explanatory only and are not restrictive of the application.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which like reference numerals refer to similar elements, and in which:

fig. 1 is a schematic structural diagram of a bluetooth headset charging bin provided in an embodiment of the disclosure;

FIG. 2 is a circuit diagram of a circuit for charging provided by an embodiment of the present disclosure;

FIG. 3 is a circuit diagram of another circuit for charging provided by embodiments of the present disclosure;

FIG. 4 is a schematic diagram of a method for controlling charging provided by an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of another method for controlling charging provided by embodiments of the present disclosure;

fig. 6 is a schematic diagram of another method for controlling charging provided by an embodiment of the present disclosure.

Detailed Description

So that the manner in which the features and techniques of the disclosed embodiments can be understood in more detail, a more particular description of the embodiments of the disclosure, briefly summarized below, may be had by reference to the appended drawings, which are not intended to be limiting of the embodiments of the disclosure. In the following description of the technology, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the disclosed embodiments. However, one or more embodiments may still be practiced without these details. In other instances, well-known structures and devices may be shown simplified in order to simplify the drawing.

The terms first, second and the like in the description and in the claims of the embodiments of the disclosure and in the above-described figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate in order to describe embodiments of the present disclosure. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion.

The term "plurality" means two or more, unless otherwise indicated.

In the embodiment of the present disclosure, the character "/" indicates that the front and rear objects are an or relationship. For example, A/B represents: a or B.

The term "corresponding" may refer to an association or binding relationship, and the correspondence between a and B refers to an association or binding relationship between a and B.

Referring to fig. 1, the bluetooth headset charging bin 10 includes a main control unit K, a charging circuit L, and a headset charging interface J. The main control unit K can be set as an MCU/PMIC main control unit, and comprises a chip with an MCU and a PMIC integrated together, and a single MCU and a single PMIC form a whole functional module. The positive voltage output end of the main control unit K is connected with a high-potential interface of the earphone charging interface J through the charging circuit L, and a low-potential interface of the earphone charging interface J is connected with the grounding end of the main control unit K to form a closed loop, so that the Bluetooth earphone 20 is charged. The bluetooth headset 20 comprises a bluetooth TWS headset, which is typically charged by its own battery in a linear charging manner, during which the voltage at the headset charging interface J is clamped to be higher than the voltage of the battery to be charged.

As shown in connection with fig. 2, an embodiment of the present disclosure provides a circuit for charging, including a main control unit K and a charging circuit L.

The charging circuit comprises a power end A and a charging end C, wherein the charging end C is connected with the equipment DC to be charged and is used for charging the equipment DC to be charged. The main control unit K is electrically connected with the charging circuit L and is used for controlling the charging circuit L to charge the equipment DC to be charged by the second charging current and enter a dormant state under the condition that the charging circuit L charges the equipment DC to be charged by the first charging current to reach a preset condition. Wherein the second charging current is less than the first charging current.

The circuit for charging provided by the embodiment of the disclosure can switch the charging current of the charging circuit L between the first charging current and the second charging current. When the first charging current is used for charging the equipment DC to be charged, the current of the first charging current is larger, and at the moment, the charging speed of the equipment DC to be charged is higher, so that the equipment DC to be charged can be charged rapidly. After reaching the preset condition, the main control unit K may control the charging circuit L to switch to the second charging current to charge the device DC to be charged. The second charging current is smaller, when the electric quantity of the equipment DC to be charged is higher, the main control unit K can enter a dormant state, and the second charging current with smaller current is used for charging the equipment DC to be charged, so that the working time of the main control unit K is shortened, and the power consumption of the main control unit K is reduced.

Optionally, as shown in connection with fig. 2, the charging circuit L includes a first charging branch and a second charging branch connected in parallel to the power source terminal a and the charging terminal C. The first charging branch is provided with a switch K1, and the second charging branch is provided with a first resistor R1 and a second resistor R2 which are connected in series. Under the condition that the switch K1 is closed, the first charging branch is short-circuited, the charging circuit L charges the equipment DC to be charged by taking the first charging branch as the first charging current. Under the condition that the switch K1 is opened, the first charging branch circuit is opened, the charging circuit uses the second charging branch circuit to charge the equipment DC to be charged, and the charging current at the moment is the second charging current.

The main control unit K may control the on/off of the switch K1 on the first charging branch through the signal OUTPUT end OUTPUT, so as to control the charging circuit L to charge the device to be charged DC with the first charging current on the first charging branch or the second charging current on the second charging branch. There is only one switch KI on the first charging branch, while two resistors are provided on the second charging branch, so that the first charging current is greater than the second charging current. The first charging current is adopted to rapidly charge the equipment DC to be charged, when the electric quantity of the equipment DC to be charged is high, the equipment DC to be charged is switched to the second charging current to continue charging, meanwhile, the main control unit K can enter a dormant state, and the main control unit K is closed after the equipment DC to be charged is fully charged.

Optionally, as shown in connection with fig. 2, the charging circuit further comprises a first detection circuit and a second electrical measurement circuit. The first detection circuit comprises a first PMOS tube Q1 and a first protection resistor R3. The grid electrode of the first PMOS tube Q1 is connected between the first resistor and the second resistor of the second charging branch circuit; the source electrode of the first PMOS tube Q1 is connected with the power end A of the charging circuit; the drain electrode of the first PMOS tube Q1 is connected with one end of the first protection resistor R3. The other end of the first protection resistor R3 is grounded. The second detection circuit comprises a second PMOS tube Q2 and a second protection resistor R4. The grid electrode of the second PMOS tube Q2 is connected with the drain electrode of the first PMOS tube Q1; the source electrode of the second PMOS tube Q2 is connected to the power end A of the charging circuit; the drain electrode of the second PMOS tube Q2 is connected with the signal receiving end INT of the main control unit K. One end of the second protection resistor R4 is connected with the drain electrode of the second PMOS tube Q2; the other end of the second protection resistor R4 is grounded. And according to the first detection signal received by the grid electrode of the second PMOS tube Q2, the drain electrode of the second PMOS tube Q2 outputs a second detection signal. The main control unit K controls the charging circuit L to charge the device DC to be charged with the first charging current or the second charging current according to the received second detection signal.

In the second charging branch, the first resistor R1 and the second resistor R2 connected in series divide the voltage of the power supply terminal a and the charging terminal C, so that the voltage is generated at the serial end of the first resistor R1 and the second resistor R2 and acts on the gate of the first PMOS transistor Q1. The source electrode of the first PMOS tube Q1 is connected with the power end A. According to the voltage difference between the gate and the source of the first PMOS transistor Q1 and the on threshold of the first PMOS transistor Q1, the first PMOS transistor Q1 is turned on or turned off, so as to output a high level or a low level at the drain as the first detection signal.

The grid electrode of the second PMOS tube Q2 is connected with the drain electrode of the first PMOS tube Q1, and can receive the voltage signal of the drain electrode of the first PMOS tube Q1, and the source electrode of the second PMOS tube Q2 is connected with the power end A. Therefore, when the drain electrode of the first PMOS transistor Q1 outputs a high level, the voltage difference between the source electrode and the gate electrode of the second PMOS transistor Q2 is greater than the on threshold value of the second PMOS transistor Q2, the second PMOS transistor Q2 is turned off, and the drain electrode of the second PMOS transistor Q2 outputs a low level. When the drain electrode of the first PMOS transistor Q1 outputs a low level, the voltage difference between the source electrode and the gate electrode of the second PMOS transistor Q2 is smaller than the turn-on threshold of the second PMOS transistor Q2, the second PMOS transistor Q2 is turned on, and the drain electrode of the second PMOS transistor Q2 outputs a high level. Therefore, the second PMOS transistor Q2 can invert the first detection signal of the first PMOS transistor Q1 as the second detection signal, invert the low level to the high level or invert the high level to the low level, and send the second detection signal to the main control unit K. The main control unit K controls the charging circuit L to charge the equipment DC to be charged with the first charging current or the second charging current according to the second detection signal received by the signal receiving end.

Optionally, as shown in connection with fig. 3, the charging circuit L further comprises a first detection circuit. The first detection circuit comprises a first PMOS tube Q1 and a first protection resistor R3. The grid electrode of the first PMOS tube Q1 is connected between the first resistor and the second resistor of the second charging branch circuit; the source electrode of the first PMOS tube Q1 is connected with the power end A of the charging circuit; the drain electrode of the first PMOS tube Q1 is connected with the signal receiving end INT of the main control unit K. One end of the first protection resistor R3 is connected with the drain electrode of the first PMOS tube Q1; the other end of the first protection resistor R3 is grounded. The drain electrode of the first PMOS transistor Q1 outputs a first detection signal. The main control unit K controls the charging circuit L to charge the device DC to be charged with the first charging current or the second charging current according to the received first detection signal.

In some embodiments, the drain electrode of the first PMOS transistor Q1 may be directly connected to the signal receiving end INT of the main control unit K. The main control unit K controls the charging circuit L to charge the device to be charged DC with the first charging current or the second charging current according to the first detection signal received by the signal receiving terminal INT.

In combination with the above circuit for charging, the embodiment of the disclosure further provides a method for controlling charging, as shown in fig. 4, the method includes:

s001, the main control unit controls the charging circuit to charge the equipment to be charged by the first charging current.

S002, when the charging circuit charges the equipment to be charged with the first charging current to reach the preset condition, the main control unit controls the charging circuit to charge the equipment to be charged with the second charging current.

S003, the master control unit enters a dormant state.

Under the condition that the equipment to be charged DC is connected with the charging circuit L, if the electric quantity of the equipment to be charged DC is low, the switch K1 can be closed at the moment, and the first charging current is used for fast charging the equipment to be charged DC. Under the condition that the preset condition is reached, the to-be-charged device DC has a higher electric quantity, at this time, the main control unit K turns off the switch K1, controls the charging circuit L to charge the to-be-charged device DC by using the second charging current, and enters a dormant state. So as to reduce the power consumption generated by the main control unit K in the process of charging the device DC to be charged by the second charging current.

Optionally, the case that the charging circuit L charges the device to be charged DC with the first charging current to reach the preset condition includes: the charging circuit L takes the first charging current as the time for DC charging of the equipment to be charged to reach the first preset time or the second preset time; the first preset time period is smaller than the second preset time period.

By setting the first preset time period or the second preset time period, the main control unit K controls the charging circuit L to charge the device to be charged DC with the second charging current when the charging circuit L charges the device to be charged DC with the first charging current for the preset time period.

Optionally, the main control unit K enters a sleep state, including: under the condition that the charging circuit L takes the first charging current as the duration of DC charging of the equipment to be charged to reach the first preset duration, if the second charging current is smaller than the preset current, the main control unit K enters a dormant state; or, when the charging circuit L charges the device to be charged DC with the first charging current for a second preset period of time, the main control unit K directly enters the sleep state.

When the duration of the charging circuit L for charging the device to be charged DC by the first charging current reaches the first preset duration, the switch K1 is turned on first, and the charging circuit L is controlled to charge the device to be charged DC by taking the second charging current as the charging current. If the DC power of the device to be charged is higher, the voltage at the charging end C of the charging circuit L is also higher, the second charging current at the second charging branch is lower, and a higher voltage is generated at the gate of the first PMOS transistor Q1 after the voltage is divided by the first resistor R1 and the second resistor R2. Under the condition that the second charging current is smaller than the preset current, the voltage difference between the grid electrode and the source electrode of the first PMOS tube Q1 is larger than the conduction threshold value, so that the first PMOS tube Q1 is turned off, the low level is output at the drain electrode, the second PMOS tube Q2 is turned on, and finally the high level is output at the drain electrode of the second PMOS tube Q2. At this time, the signal receiving terminal INT of the main control unit K receives a high level signal, which indicates that the DC power of the device to be charged is high, and the second charging current can be continuously used to charge the DC of the device to be charged, and the main control unit K enters the sleep state.

Optionally, the first preset duration T1 has a value ranging from [20s,40s ]. More specifically, t1=25s, 30s or 35s.

When the charging circuit L charges the device to be charged DC with the first charging current for a second preset period of time, the main control unit K may be directly put into the sleep state. The second preset duration may be set according to specific circuit parameters of the charging bin and an initial amount of power of the charging device DC. By reasonably setting the second preset duration, it can be considered that the electric quantity of the device to be charged DC is already in a higher state when the duration of charging the device to be charged DC by the charging circuit L with the first charging current reaches the second preset duration. At this time, the main control unit K may directly disconnect the switch K1 and enter a sleep state, and charge the device DC to be charged with the second charging current until full charge.

Optionally, the second preset duration T2 has a value ranging from [30min to 60min ]. More specifically, t2=35 min,45min or 55min.

Optionally, when the duration of the charging circuit L for charging the device to be charged DC with the first charging current reaches the first preset duration, the main control unit K controls the charging circuit L to charge the device to be charged DC with the second charging current, and further includes: if the second charging current is greater than or equal to the preset current, the main control unit K controls the charging circuit L to charge the equipment DC to be charged with the first charging current.

Under the condition that the charging circuit L takes the first charging current as the duration of charging the equipment DC to be charged to reach the first preset duration, if the electric quantity of the equipment DC to be charged is low, the voltage at the charging end C of the charging circuit L is also low, and the second charging current at the second charging branch is also high. Under the condition that the second charging current is greater than or equal to the preset current, the voltage difference between the grid electrode and the source electrode of the first PMOS tube Q1 is smaller than the conduction threshold value, so that the first PMOS tube Q1 is conducted, a high level is output at the drain electrode, and the second PMOS tube Q2 is turned off. The signal receiving end INT of the main control unit K receives the low level signal, which indicates that the electric quantity of the to-be-charged device DC is low, and the to-be-charged device DC still needs to be charged by the first charging current. The main control unit K outputs a control signal, the switch K1 is closed, and the first charging current is used for charging the equipment DC to be charged.

Optionally, after the master control unit K enters the sleep state, the method further includes: and under the condition that the second charging current is greater than or equal to the preset current, the main control unit K is awakened, and the charging circuit L is controlled to charge the equipment DC to be charged by the first charging current.

As shown in connection with fig. 5, an embodiment of the present disclosure provides another method for controlling charging, comprising:

s101, the main control unit controls the charging circuit to charge the equipment to be charged with the first charging current.

S102, under the condition that the charging circuit charges the equipment to be charged by the first charging current to reach a preset condition, the main control unit controls the charging circuit to charge the equipment to be charged by the second charging current.

S103, the master control unit enters a dormant state.

And S104, when the second charging current is greater than or equal to the preset current, the main control unit is awakened, and the charging circuit is controlled to charge the equipment to be charged by the first charging current.

In the case that the main control unit K enters a sleep state or is turned off, the device DC to be charged may be powered down, so that the voltage of the charging terminal C of the charging circuit L may be reduced. Thus, as the device to be charged DC continues to power down, the second charging current will continue to rise. Under the condition that the second charging current is greater than or equal to the preset current, the first PMOS tube Q1 is turned on, and the second PMOS tube Q2 is turned off. The signal receiving end INT of the main control unit K receives a low-level signal, so that the main control unit K is awakened, a control signal is output, the switch K1 is closed, and the first charging current is used for charging the equipment DC to be charged.

Optionally, in case the charging circuit L charges the device to be charged DC with the first charging current, the method further comprises: detecting the voltage of the drain electrode of the second PMOS tube Q2; and under the condition that the voltage of the drain electrode of the second PMOS tube Q2 is low level, performing error reporting processing.

As shown in connection with fig. 6, an embodiment of the present disclosure provides another method for controlling charging, comprising:

s201, the main control unit turns off the switch and is in a dormant state.

S202, the main control unit is awakened under the condition that the signal receiving end of the main control unit receives a low-level signal.

S203, the main control unit judges whether PMIC boosting error occurs, if yes, S204 and S201 are executed, and if no, S205 is executed.

S204, the main control unit performs PMIC error reporting processing.

S205, the main control unit closes the switch, and charges the equipment to be charged with the first charging current.

And S206, after the charging time length reaches the first preset time length, the main control unit turns off the switch, and the equipment to be charged is charged by the second charging current.

S207, the main control unit judges whether the signal receiving end receives a high level signal, if yes, S208 is executed, and if not, S205 is executed.

S208, the master control unit enters a sleep mode.

S209, in the case that the signal receiving end of the main control unit receives the low level signal, the main control unit is awakened, and S203 is performed.

In practical applications, the master control unit K may appear that the MCU can work normally and the PMIC cannot realize normal boosting. At this time, the voltage at the power supply terminal a of the charging circuit L is low. The circuit for charging provided by the embodiment of the disclosure can realize detection of a boosting error under the condition that the charging circuit L charges the device to be charged DC by using the first charging current. When a voltage boosting error occurs, the voltage of the power supply end A of the charging circuit L is lower, and the voltages of the source electrode of the first PMOS tube Q1 and the source electrode of the second PMOS tube Q2 are equal to the voltage of the power supply end A. In the charging circuit L, since the first charging branch is shorted and the second charging branch is equalized everywhere, the gate and source voltages of the first PMOS transistor Q1 are equal, the first PMOS transistor Q1 is turned off, and a low level is output at the drain. However, under the condition of a boost error, the source voltage of the second PMOS transistor Q2 will be lower, the voltage difference between the gate and the source of the second PMOS transistor Q2 will still be greater than the on threshold of the second PMOS transistor Q2, the second PMOS transistor Q2 is turned off, and the drain of the second PMOS transistor Q2 outputs a low level. While the drain of the second PNOS tube Q2 should be high under normal PMIC boosting conditions. Therefore, when the main control unit K receives the signal that needs to change the charging current through the drain electrode of the second PMOS transistor Q2, the charging circuit L may be set to charge the device DC to be charged with the first charging current, to detect the voltage of the drain electrode of the second PMOS transistor Q2, and when the voltage of the drain electrode of the second PMOS transistor Q2 is at a low level, it is determined that a boost error may occur in the PMIC. At this time, the MCU needs to read the PMIC related register or read the related function pin to confirm whether the boost fault reporting occurs, and perform the fault reporting process.

The method provided by the embodiments of the present disclosure is described below in terms of a specific example.

Setting a first resistor R1=400Ω, a second resistor R2=100deg.Ω, and a voltage VOUT=5V at a power supply end A of the charging circuit L, wherein the conduction threshold of the first PMOS tube Q1 and the second PMOS tube Q2 is-0.7V. In the case of a headset just connected to the charging interface, taking the headset battery voltage as 3.5V as an example, the switch K1 is turned off at this time, and vc=3.6v and va=5v due to the nature of linear charging. From the resistive voltage division, vb=3.88V can be calculated. Because Vb-va= -1.12V is smaller than the on threshold of the first PMOS transistor Q1, the first PMOS transistor Q1 is turned on, the drain electrode of the first PMOS transistor Q1 outputs 5V, the second PMOS transistor Q2 is turned off at this time, the drain electrode of the second PMOS transistor Q2 outputs 0V, the signal receiving end INT of the main control unit K receives the low level signal, and the main control unit K is awakened and starts the charging process.

After judging that the low-level signal is not caused by the boost fault, the main control unit K controls the switch K1 to be closed, and at the moment, vc=Va=5V, the earphone is charged by using a first charging current of 50 mA.

After the charging time period reaches the first preset time period, the switch K1 is turned off, and if the earphone battery voltage is charged to 3.9V at this time, vc=4.0V can be obtained, and vb=4.2V, and Vb-Va= -0.8V can be obtained. The first PMOS transistor Q1 is still turned on, and the signal receiving end INT of the main control unit K receives a low level signal, and controls the switch K1 to be turned on to charge the earphone with the first charging current.

If the switch K1 is turned off after the charging duration reaches the first preset duration for multiple times, and the earphone battery voltage is charged to 4.1V at this time, vc=4.2V, so that vb=4.36V and Vb-va= -0.64V can be obtained, which is greater than the conduction threshold of the first PMOS transistor Q1. The first PMOS transistor Q1 is turned off, and a low level is output at the drain of the first PMOS transistor Q1, and at this time, the second PMOS transistor Q2 is turned on, so that a high level of 5V is output at the drain of the second PMOS transistor Q2. After receiving the high-level signal, the main control unit K determines that the battery power of the earphone reaches the set power at this time, and needs to control the charging circuit L to charge the earphone continuously with the second charging current.

When the main control unit K needs to control the charging circuit L to charge the earphone with the second charging current, the main control unit K controls the switch K1 to be turned off and enters the sleep state.

With the use of the earphone or the power failure generated by the battery performance, if the battery capacity of the earphone drops to 4V, vc=4.1v, and vb=4.28v and Vb-va= -0.72V can be obtained. At this time, the first PMOS transistor Q1 is turned on, the second PMOS transistor Q2 is turned off, and the signal receiving terminal INT of the master control unit K receives the low level signal. After determining that the low level signal is not caused by a boost error, the main control unit K wakes up and charges the earphone with the first charging current.

The above description and the drawings illustrate embodiments of the disclosure sufficiently to enable those skilled in the art to practice them. Other embodiments may involve structural, logical, electrical, process, and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in, or substituted for, those of others. Moreover, the terminology used in the present application is for the purpose of describing embodiments only and is not intended to limit the claims. As used in the description of the embodiments and the claims, the singular forms "a," "an," and "the" (the) are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and/or" as used in this application is meant to encompass any and all possible combinations of one or more of the associated listed. Furthermore, when used in this application, the terms "comprises," "comprising," and/or "includes," and variations thereof, mean that the stated features, integers, steps, operations, elements, and/or components are present, but that the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof is not precluded. Without further limitation, an element defined by the phrase "comprising one …" does not exclude the presence of other like elements in a process, method or apparatus comprising such elements. In this context, each embodiment may be described with emphasis on the differences from the other embodiments, and the same similar parts between the various embodiments may be referred to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method sections disclosed in the embodiments, the description of the method sections may be referred to for relevance.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. In the description corresponding to the flowcharts and block diagrams in the figures, operations or steps corresponding to different blocks may also occur in different orders than that disclosed in the description, and sometimes no specific order exists between different operations or steps. For example, two consecutive operations or steps may actually be performed substantially in parallel, they may sometimes be performed in reverse order, which may be dependent on the functions involved. Each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Claims (10)

1. A circuit for charging, comprising:

the charging circuit comprises a power end and a charging end, wherein the charging end is connected with equipment to be charged and is used for charging the equipment to be charged;

the main control unit is electrically connected with the charging circuit and is used for controlling the charging circuit to charge the equipment to be charged by the second charging current and enter a dormant state under the condition that the charging circuit charges the equipment to be charged by the first charging current to reach a preset condition;

wherein the second charging current is less than the first charging current.

2. The circuit for charging of claim 1, wherein the charging circuit comprises a first charging leg and a second charging leg connected in parallel at the power supply terminal and the charging terminal; the first charging branch is provided with a switch, and the second charging branch is provided with a first resistor and a second resistor which are connected in series; under the condition that a switch is closed, the first charging branch is short-circuited, and the charging circuit charges equipment to be charged by the first charging branch; under the condition that a switch is opened, the first charging branch circuit is opened, and the charging circuit charges equipment to be charged by the second charging branch circuit.

3. The circuit for charging of claim 2, wherein the charging circuit further comprises:

the first detection circuit comprises a first PMOS tube and a first protection resistor, and the grid electrode of the first PMOS tube is connected between the first resistor and the second resistor of the second charging branch circuit; the source electrode of the first PMOS tube is connected with the power end of the charging circuit; the drain electrode of the first PMOS tube is connected with one end of the first protection resistor; the other end of the first protection resistor is grounded;

the second detection circuit comprises a second PMOS tube and a second protection resistor, and the grid electrode of the second PMOS tube is connected with the drain electrode of the first PMOS tube; the source electrode of the second PMOS tube is connected with the power end of the charging circuit; the drain electrode of the second PMOS tube is connected with the signal receiving end of the main control unit; one end of the second protection resistor is connected with the drain electrode of the second PMOS tube; the other end of the second protection resistor is grounded;

the drain electrode of the second PMOS tube outputs a second detection signal according to the first detection signal received by the grid electrode of the second PMOS tube; the main control unit controls the charging circuit to charge the equipment to be charged by the first charging current or the second charging current according to the received second detection signal.

4. The circuit for charging of claim 2, wherein the charging circuit further comprises:

the first detection circuit comprises a first PMOS tube and a first protection resistor, and the grid electrode of the first PMOS tube is connected between the first resistor and the second resistor of the second charging branch circuit; the source electrode of the first PMOS tube is connected with the power end of the charging circuit; the drain electrode of the first PMOS tube is connected with the signal receiving end of the main control unit; one end of the first protection resistor is connected with the drain electrode of the first PMOS tube; the other end of the first protection resistor is grounded;

the drain electrode of the first PMOS tube outputs a first detection signal; the main control unit controls the charging circuit to charge the equipment to be charged with the first charging current or the second charging current according to the received first detection signal.

5. A method for controlling charging, characterized by being applied to the circuit for charging according to any one of claims 1 to 4, the method comprising:

the main control unit controls the charging circuit to charge the equipment to be charged by the first charging current;

under the condition that the charging circuit charges the equipment to be charged by the first charging current to reach a preset condition, the main control unit controls the charging circuit to charge the equipment to be charged by the second charging current;

the main control unit enters a dormant state.

6. The method of claim 5, wherein the charging circuit charges the device to be charged with the first charging current to a predetermined condition, comprising:

the charging circuit charges the equipment to be charged by the first charging current for a first preset time length or a second preset time length;

the first preset time period is smaller than the second preset time period.

7. The method of claim 6, wherein the master unit entering a sleep state comprises:

under the condition that the charging circuit takes the first charging current as the charging time of the equipment to be charged to reach the first preset time, if the second charging current is smaller than the preset current, the main control unit enters a dormant state; or alternatively, the first and second heat exchangers may be,

and under the condition that the charging time of the charging circuit for charging the equipment to be charged by the first charging current reaches the second preset time, the main control unit directly enters the dormant state.

8. The method of claim 7, further comprising, in the case where the duration of the charging circuit charging the device to be charged with the first charging current reaches a first preset duration:

if the second charging current is greater than or equal to the preset current, the main control unit controls the charging circuit to charge the equipment to be charged by the first charging current.

9. The method according to any one of claims 5 to 8, further comprising, after the master unit enters the sleep state:

and under the condition that the second charging current is greater than or equal to the preset current, the main control unit is awakened, and the charging circuit is controlled to charge the equipment to be charged by the first charging current.

10. The method according to any one of claims 5 to 8, wherein the circuit for charging comprises a charging circuit, a master control unit, a first detection circuit and a second detection circuit; the charging circuit comprises a first charging branch and a second charging branch which are connected in parallel with the power end and the charging end, wherein the first charging branch is provided with a switch, and the second charging branch is provided with a first resistor and a second resistor which are connected in series; the first detection circuit comprises a first PMOS tube, the grid electrode of the first PMOS tube is connected between the first resistor and the second resistor of the second charging branch, and the source electrode of the first PMOS tube is connected with the power end of the charging circuit; the second detection circuit comprises a second PMOS tube, the grid electrode of the second PMOS tube is connected with the drain electrode of the first PMOS tube, and the source electrode of the second PMOS tube is connected with the power supply end of the charging circuit; in the case that the charging circuit charges the device to be charged with the first charging current, the method further includes:

detecting the voltage of the drain electrode of the second PMOS tube;

and under the condition that the voltage of the drain electrode of the second PMOS tube is low level, performing error reporting processing.