CN117688884A - Quantitative simulation modeling method for integrated circuit conduction immunity prediction - Google Patents
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Abstract
The invention relates to the technical field of integrated circuit immunity prediction models, in particular to a quantitative simulation modeling method for integrated circuit conduction immunity prediction; the method comprises the following steps: s1, determining a multi-element complex function of tested equipment, and associating an input spectrum component and an output spectrum component of the tested equipment; s2, small signal disturbance is applied to a large signal working point of tested equipment to form a multi-harmonic distortion nonlinear model; s3, extracting frequency domain multi-harmonic distortion nonlinear parameters of the tested equipment, and carrying the parameters into the multi-harmonic distortion nonlinear model established in the step S2 to form a multi-harmonic distortion nonlinear model of the tested equipment; the black box model for rapidly characterizing sensitivity in a frequency domain is provided, the model can characterize quantized full-amplitude information of a corresponding output waveform under the condition of injecting specific frequency and power interference, a sensitive section can be obtained through sensitive criteria, the immunity prediction of an integrated circuit is realized, the sensitive parameterization simulation is realized, and the reduction of the electromagnetic compatibility design workload of circuit personnel is realized.
Description
Technical Field
The invention relates to the technical field of integrated circuit immunity prediction models, in particular to a quantitative simulation modeling method for integrated circuit conduction immunity prediction.
Background
The immunity of the integrated circuit is related to electromagnetic safety of electronic equipment, in DPI test, tiny circuit topological structure change can improve the immunity of the integrated circuit by several orders of magnitude, so that whether the chip can pass sensitivity test or not can be predicted before chip manufacture is significant for reducing cost, however, a chip manufacturer usually does not provide immunity information of the chip, so that a chip behavior model, called a black box model, is required to be obtained through a certain test means, the extraction process of the model does not need to know internal physical details of a device, but obtains an abstract mathematical expression to describe the relation between a recorded input signal and an output signal through the mapping relation of an input signal and an output signal, and when the black box model and a tested piece are stimulated by the same input signal, the output of the black box model is required to be as close to the actual response of the tested piece as possible.
The behavior model comprises a time domain behavior model such as an artificial neural network, a Volterra series, an envelope domain model, a nonlinear impulse response model, a dual-path memory model and the like, and the time domain sensitivity behavior model of the device is constructed to describe the output behavior effect of the device, however, the time domain model usually needs a large number of time domain tests and characterization to generate an accurate model in a certain frequency range, and the time domain behavior model can only be used for highlighting IC faults in the time domain, so that mismatch and higher harmonic problems among ports are difficult to analyze, and the requirement of broadband electromagnetic compatibility application cannot be met, so that the frequency domain model is more suitable for simulating distributed elements on bandwidth.
In recent years, an ICIM-CI model has been proven to be capable of predicting the immunity of a chip, and can approximate and replace an accurate chip or circuit simulation by a lookup table and a power distribution network method, and use the model in a frequency domain, but when modeling is performed by using the ICIM-CI model, an IB netlist needs to be acquired, and the IB netlist is still based on a measurement method of a time domain, which means that different frequency points need to be tested to obtain the IB model at different frequency points, however, when a bandwidth multi-frequency point is involved, a test work becomes complicated and time-consuming. In order to improve this problem, researchers try to improve the model so that it can be used in the frequency domain and optimize the modeling time, however, the model needs to make linear assumptions, and thus the nonlinear characteristics of the device when disturbed cannot be accurately described, so that the model has a large difference from the actual measurement result, meanwhile, the IB model needs to determine the sensitivity criteria of the chip in advance, which means that a given model is only valid for a specific fault standard, that is, the model can only perform binary judgment, and cannot perform parameterization simulation, and when the sensitivity criteria change, measurement and model establishment need to be performed again, so that if the ICIM-CI model is used in consideration of redundancy design, a plurality of models need to be generated, and the workload will be great.
Therefore, compared with the prior art, a black box model for rapidly characterizing sensitivity of frequency domain is provided, the full-amplitude information of each frequency spectrum component can be characterized by the model, parametric simulation is realized, and the redundant design workload of circuit personnel is reduced.
Disclosure of Invention
The invention solves the technical problems existing in the prior art, and provides a quantitative simulation modeling method for predicting the conduction immunity of an integrated circuit.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
a quantitative simulation modeling method for integrated circuit conduction immunity prediction, comprising the steps of:
s1, determining a multi-element complex function of tested equipment, and associating an input spectrum component and an output spectrum component of the tested equipment;
s2, small signal disturbance is applied to a large signal working point of tested equipment to form a multi-harmonic distortion nonlinear model, wherein the multi-harmonic distortion nonlinear model is shown as follows:
in the above-mentioned method, the step of,representing a frequency domain multi-harmonic distortion nonlinear parameter describing the effect of a large signal operating point,/a>Representing a frequency domain multi-harmonic distortion nonlinear parameter describing co-frequency disturbances due to small signals incident on a port of a device under test,/>Representing a frequency domain multi-harmonic distortion nonlinear parameter describing cross-frequency disturbances due to small signals incident on ports of a device under test, LSOP in Excitation section representing large signal operating point, refLSOP in Representing the reference excitation corresponding to the large signal operating point, P k Representing the phasor per unit length at harmonic k, P k-1 Representing the phasors per unit length at harmonic k-l, P k+1 Representing the unit length phasors at harmonic k+l; q and p represent port numbers of incident waves, and the range is 1-the number of signal ports; k. l represents the harmonic index of the scattered wave, ranging from 1 to the highest harmonic index; a is that ql Represents the incident wave at port number q, harmonic l, +.>Representation A ql Conjugate of B pk Representing scattered waves at port number q, harmonic l;
s3, extracting frequency domain multi-harmonic distortion nonlinear parameters of the tested equipment, and carrying the parameters into the multi-harmonic distortion nonlinear model established in the step S2 to form the multi-harmonic distortion nonlinear model of the tested equipment.
Further, the large signal operating point is represented by the following formula:
in the above, DCS (LSOP) DC excitation representing large signal operating point, RFS (LSOP) Radio frequency excitation representing large signal operating point, DCS q Representing a large signal DC offset stimulus representing q-port, A 11 Representing the incident wave at signal port 1, harmonic index 1, DCR (LSOP) Indicating the dc response of the large signal operating point,frequency domain multi-harmonic distortion nonlinear parameter element representing DC voltage offset excitation part>Representing a frequency domain multi-harmonic distortion nonlinear parameter describing the effect of a large signal operating point,/a>Representing the system response at the large signal operating point.
Further, the large signal operating point in S2 is set as the incident wave at port 1 and harmonic 1, and the small signal point in S2 is the incident wave at the other ports except the large signal operating point.
Further, the multiple functions described in step S1 are as follows:
B pk ＝F pk (A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K ，…，A N1 ，A N2 ，…，A NK )
when considering the dc bias excitation, the expression of the multiple complex function is as follows:
B pk ＝F pk (DC 1 ，…，DC N ，A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K ，…，A N1 ，A N2 ，…，A NK )
in the above, B pk Representing scattered waves of the device under test at a signal port p and a harmonic K, p representing the signal port number, K representing the harmonic index, N representing the total number of ports of the device under test, K representing the highest harmonic index of the device under test, A NK Representing the incident wave of the device under test at the signal port N and the harmonic K, A 11 A is the incident wave of the tested equipment at the signal port 1 and the harmonic wave 1 12 A is the incident wave of the tested equipment at the signal port 1 and the harmonic wave 2 1K A is the incident wave of the tested equipment at the signal port 1 and the harmonic wave K 21 A is the incident wave of the tested equipment at the signal port 2 and the harmonic wave 1 22 A is the incident wave of the tested equipment at the signal port 2 and the harmonic wave 2 2K A is the incident wave of the tested equipment at the signal port 2 and the harmonic wave K N1 For the incident wave of the tested equipment at the signal port N and harmonic wave 1, A N2 DC for incident wave of the tested device at signal port N, harmonic 2 N Representing the DC bias stimulus at signal port N, DC 1 Representing the DC bias stimulus at signal port 1, F pk Representing the scattered wave of the device under test at the signal port p and the harmonic k as a nonlinear function of the excitation or incident wave.
Further, the incident wave and the scattered wave are specifically expressed by the following formulas:
in the above, A p Representing incident waves at port p, B p Representing scattered waves at port p, V p Representing the voltage at port p, I p Representing the current at port p, Z o Representing the characteristic impedance.
Further, in step S1, discrete tone signals exist in the incident wave and the scattered wave, and the discrete tone signals are limited to be periodic or narrow-band modulation signals with harmonics.
Further, the method for extracting the nonlinear parameters of the intermediate frequency multi-harmonic distortion in the step S3 specifically comprises the following steps:
s301, setting test parameters of a nonlinear vector network analyzer: measuring a start frequency, a stop frequency, a measurement point number, a maximum harmonic number, a maximum input interference power value and an intermediate frequency bandwidth;
s302, setting calibration power and attenuation amplitude of a built-in receiver of a nonlinear vector network analyzer;
s303, setting forward power and backward power of small signals in a nonlinear vector network analyzer;
s304, SOLT/TRL dual-port calibration, power calibration and phase calibration of the nonlinear vector network analyzer are completed;
s305, starting to measure the nonlinear parameters of the frequency domain multi-harmonic distortion of the tested equipment, and measuring fundamental waves and harmonic components of corresponding signals by the nonlinear vector network analyzer through a built-in signal source or an external signal source and a receiver.
Compared with the prior art, the invention has the beneficial effects that:
(1) When the sensitivity criterion is changed, the model can accurately predict the sensitivity phenomenon of the tested equipment, the sensitivity phenomenon is judged by the sensitivity criterion, and the sensitivity curve is predicted without re-measurement and modeling, so that the modeling and testing time is greatly saved, a black box model for rapidly representing the sensitivity of a frequency domain can be provided, the full-amplitude information of each frequency spectrum component can be represented by the model, parameterization simulation is realized, and the reduction of the redundant design workload of circuit personnel is realized.
Drawings
Fig. 1 is a flow chart of the method of the present invention.
Fig. 2 is a schematic diagram of an apparatus used for extracting nonlinear parameters of frequency domain multi-harmonic distortion in step S3 of the present invention.
Fig. 3 is a schematic diagram of the result of the equivalent simulation circuit of the operational amplifier and the output voltage of the multi-harmonic distortion nonlinear model thereof in the time domain when the injection disturbance is 4dBm in the embodiment 1 of the present invention.
Fig. 4 is a schematic diagram of the result of the equivalent simulation circuit of the operational amplifier and the output voltage of the multi-harmonic distortion nonlinear model thereof in the frequency domain when the injection disturbance is 4dBm in the embodiment 1 of the present invention.
Fig. 5 is a schematic diagram of the result of the equivalent simulation circuit of the operational amplifier and the output voltage of the multi-harmonic distortion nonlinear model thereof in the time domain when the injection disturbance is 0dBm in embodiment 1 of the present invention.
Fig. 6 is a schematic diagram of the result of the equivalent simulation circuit of the operational amplifier and the output voltage of the multi-harmonic distortion nonlinear model thereof in the frequency domain when the injection disturbance is 0dBm in embodiment 1 of the present invention.
Detailed Description
The technical solutions of the present invention will be clearly described below with reference to the accompanying drawings, and it is obvious that the described embodiments are not all embodiments of the present invention, and all other embodiments obtained by a person skilled in the art without making any inventive effort are within the scope of protection of the present invention.
The modeling technique used in the invention is a black box frequency domain modeling technique. Black boxes refer to the fact that knowledge about the DUT (device under test) internal circuitry is not used nor required. All the information required for the model generated by the method of the present invention is obtained by externally exciting the signal port of the DUT and measuring the response signal. The frequency domain means that the method models distributed high frequencies and is applicable to both measurement techniques and modeling methods.
As shown in fig. 1, the present invention provides a quantitative simulation modeling method for predicting the conduction immunity of an integrated circuit, comprising the following steps:
s1, discrete tone signals (multi-sine waves) are set in the incident wave a and the scattered wave B, and the discrete tone signals are limited to be periodic or narrow-band modulation signals with harmonics, by which each carrier frequency can be easily represented by using a harmonic index, which is 0 for the direct current component, 1 for the fundamental frequency, and 2 for the second harmonic. For a given device under test, determining its multiple complex function, correlating the input spectral component with the output spectral component of the device under test, so that the expression of the multiple complex function is as follows:
B pk ＝F pk (A 11 ，A 12 ，…，A 1K ,A 21 ，A 22 ，…，A 2K ，…，A N1 ，A N2 ，…，A NK )
the expression of the multiple complex function when considering the DC bias excitation is as follows:
B pk ＝F pk (DC 1 ，…，DC N ，A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K ，…，A N1 ，A N2 ，…，A NK )
in the above, B pk Representing scattered waves of the device under test at a signal port p and a harmonic K, p representing the signal port number, K representing the harmonic index, N representing the total number of ports of the device under test, K representing the highest harmonic index of the device under test, A NK Representing the incident wave (a 11 A is the incident wave of the tested equipment at the signal port 1 and the harmonic wave 1 12 、A 1K 、A 21 、A 22 、A 2K 、A N1 、A N2 Meaning can be deduced from the above expression), DC N Representing the DC bias stimulus at signal port N, DC 1 Representing the DC bias stimulus at signal port 1, F pk Representing the scattered wave of the device under test at the signal port p and the harmonic k as a nonlinear function of the excitation or incident wave.
Further, for a device under test of any port number p, there are n×k complex functions, each function having n×k complex amplitudes, representing the amplitudes of the spectral components of each port.
Further, for a two-port device, the multiple complex function expression is:
B 1K ＝F 1K (A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K )
B 2K ＝F 2K (A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K )
for a three-port device, the multiple complex function expression is:
B 1K ＝F 1K (A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K ，A 31 ，A 32 ，…，A 3K )
B 2K ＝F 2k (A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K ，A 31 ，A 32 ，…，A 3K )
B 3K ＝F 3K (A 11 ，A 12 ，…，A 1K ，A 21 ，A 22 ，…，A 2K ，A 31 ，A 32 ，…，A 3K )
further, the expression of the incident wave a and the scattered wave B is as follows:
in the above, A p Representing incident waves at port p, B p Representing scattered waves at port p, V p Representing the voltage at port p, I p Representing the current at port p, Z o Representing the characteristic impedance.
S2, small signal disturbance is applied to a large signal working point to form a multi-harmonic distortion nonlinear model, namely an X model, and A is set 11 For a large signal working point, the incident waves at other remaining ports are small signals, which is specifically expressed by the following formula:
in the above-mentioned method, the step of,representing a frequency domain multi-harmonic distortion nonlinear parameter describing the effect of a large signal operating point,/a>Representing a frequency domain multi-harmonic distortion nonlinear parameter describing co-frequency disturbances due to small signals incident on a port of a device under test,/>Representing a frequency domain multi-harmonic distortion nonlinear parameter describing cross-frequency disturbances due to small signals incident on ports of a device under test, LSOP in Excitation section representing large signal operating point, refLSOP in Representing the reference excitation corresponding to the large signal operating point, P k Representing the phasor per unit length at harmonic k, P k-1 Representing the phasors per unit length at harmonic k-l, P k+l Representing the unit length phasors at harmonic k+l; q and p represent port numbers of incident waves, and the range is 1-the number of signal ports; k. l represents the harmonic index of the scattered wave, ranging from 1 to the highest harmonic index; a is that ql Represents the incident wave at port number q, harmonic l, +.>Representation A q1 Is a conjugate of (c).
Further, in the further course of this,the common-frequency and cross-frequency disturbance caused by the incidence of small signals on the port of the device to be tested is described, and the sensitivity degree of the device to the last harmonic mismatch of the port is determined.
Further, the unit length phasor P is calculated by the following formula:
where e represents a natural constant, about 2.71828, j represents an imaginary unit,representing the complex argument.
Further, the large signal operating point is also a large signal steady state, including all large signal excitations and large signal responses, often abbreviated as LSOP, expressed as follows:
in the above, DCS (LSOP) DC excitation representing large signal operating point, RFS (LSOP) Radio frequency excitation representing large signal operating point, DCS q Representing a large signal DC offset stimulus representing q-port, A 11 Representing the incident wave at signal port 1, harmonic index 1, DCR (LSOP) Indicating the dc response of the large signal operating point,frequency domain multi-harmonic distortion nonlinear parameter element representing DC voltage offset excitation part>Representing a frequency domain multi-harmonic distortion nonlinear parameter describing the effect of a large signal operating point,/a>Representing the system response at the large signal operating point.
Further, the frequency domain multi-harmonic distortion nonlinear parameter is a parameter used for representing nonlinear characteristics of devices and systems, and the frequency domain multi-harmonic distortion nonlinear parameter is a superset of the S parameter, so that the frequency domain multi-harmonic distortion nonlinear parameter contains both the S parameter and nonlinear spectrum mapping relation among ports when large signals are excited.
S3, extracting frequency domain multi-harmonic distortion nonlinear parameters of the tested equipment to form a multi-harmonic distortion nonlinear model corresponding to the tested equipment. The specific method comprises the following steps:
s301, setting test parameters of a nonlinear vector network analyzer: measuring a start frequency, a stop frequency, a measurement point number, a maximum harmonic number, a maximum input interference power value and an intermediate frequency bandwidth;
s302, setting calibration power and attenuation amplitude of a built-in receiver of a nonlinear vector network analyzer;
s303, setting forward power and backward power of small signals in a nonlinear vector network analyzer;
s304, performing calibration according to an instruction manual of the nonlinear vector network analyzer, and completing SOLT/TRL dual-port calibration, power calibration and phase calibration;
s305, starting to measure the nonlinear parameters of the frequency domain multi-harmonic distortion of the tested equipment, and measuring fundamental waves and harmonic components of corresponding signals by the nonlinear vector network analyzer through a built-in signal source or other external signal sources and receivers.
Further, as shown in fig. 2, the device to be tested for extracting the nonlinear parameter of the frequency domain multi-harmonic distortion comprises a nonlinear vector network analyzer, two phase measuring instruments and a power divider, wherein the nonlinear vector network analyzer is communicated with the device to be tested, the nonlinear vector network analyzer is also communicated with a phase tester, and one end, far away from the nonlinear vector network analyzer, of the phase tester is communicated with the power divider; the power divider is provided with three connecting ends, one connecting end is communicated with a phase tester connected with the nonlinear vector network analyzer, the second connecting end is communicated with the other phase tester, the last connecting end is connected with the nonlinear vector network analyzer, a 10MHz sinusoidal reference signal is connected between the power divider and the nonlinear vector network analyzer, the sinusoidal reference signal is a reference signal of the nonlinear vector network analyzer standard, and the sinusoidal reference signal can also be generated by using a signal source independently and is used for converting signals between the power divider and the nonlinear vector network analyzer.
Furthermore, the feasibility of the formed multi-harmonic distortion nonlinear model is verified while the multi-harmonic distortion nonlinear parameters of the tested device frequency domain are extracted, and the method is specifically described in detail through the following embodiments:
example 1
In this embodiment, an equivalent simulation circuit of the operational amplifier is selected, the multi-harmonic distortion nonlinear model is built by using the method of S1-S3, and feasibility verification of the multi-harmonic distortion nonlinear model is performed by taking the interference injection frequency as an example at 100kHz, and as a result, as shown in fig. 3, 4, 5 and 6, when the interference is injected by 0dBm and 4dBm, the built multi-harmonic distortion nonlinear model can provide accurate output response in both time domain and frequency domain.
Example 2
In the embodiment, an operational amplifier chip is selected, a multi-harmonic distortion nonlinear model is built by using the S1-S3 method, feasibility verification of the multi-harmonic distortion nonlinear model is carried out by taking the interference injection frequency at 100kHz as an example and using a DPI test method, and the built multi-harmonic distortion nonlinear model can provide accurate output response in both time domain and frequency domain when the interference is 0 dBm.
Further, the DPI test method is performed by the existing method.
After verification is carried out by the two embodiments, the multi-harmonic distortion nonlinear model established by the invention has feasibility, waveforms of chips after being subjected to different interferences can be accurately output, compared with an ICIM-CI model, the method can accurately predict the sensitivity phenomenon of tested equipment in use, and the sensitivity phenomenon is judged by the sensitivity criterion, so that a sensitivity curve is predicted without re-measurement and modeling, thus the time for modeling and testing is greatly saved, namely, the invention can provide a black box model for rapid frequency domain representation sensitivity, the model can represent full-amplitude information of each frequency spectrum component, parametric simulation is realized, and the reduction of the redundancy design workload of circuit personnel is realized.
Finally, it should be noted that the above description is only for illustrating the technical solution of the present invention, and not for limiting the scope of the present invention, and that the simple modification and equivalent substitution of the technical solution of the present invention can be made by those skilled in the art without departing from the spirit and scope of the technical solution of the present invention.
Claims (7)
1. A quantitative simulation modeling method for integrated circuit conduction immunity prediction, comprising the steps of:
s1, determining a multi-element complex function of tested equipment, and associating an input spectrum component and an output spectrum component of the tested equipment;
s2, small signal disturbance is applied to a large signal working point of tested equipment to form a multi-harmonic distortion nonlinear model, wherein the multi-harmonic distortion nonlinear model is shown as follows:
in the above-mentioned method, the step of,representing a frequency domain multi-harmonic distortion nonlinear parameter describing the effect of a large signal operating point,/a>Representing a frequency domain multi-harmonic distortion nonlinear parameter describing co-frequency disturbances due to small signals incident on ports of the device under test,representing a frequency domain multi-harmonic distortion nonlinear parameter describing cross-frequency disturbances due to small signals incident on ports of a device under test, LSOP in Excitation section representing large signal operating point, refLSOP in Representing the reference excitation corresponding to the large signal operating point, P k Representing the phasor per unit length at harmonic k, P k-l Representing the phasors per unit length at harmonic k-l, P k+l Representing the unit length phasors at harmonic k+l; q and p represent port numbers of incident waves, and the range is 1-the number of signal ports; k. l represents the harmonic index of the scattered wave, ranging from 1 to the highest harmonic index; a is that ql Represents the incident wave at port number q, harmonic l, +.>Representation A ql Conjugate of B pk Representing scattered waves at port number q, harmonic l;
s3, extracting frequency domain multi-harmonic distortion nonlinear parameters of the tested equipment, and carrying the parameters into the multi-harmonic distortion nonlinear model established in the step S2 to form the multi-harmonic distortion nonlinear model of the tested equipment.
2. The quantitative simulation modeling method for integrated circuit conduction immunity prediction of claim 1, wherein the large signal operating point is represented by the following formula:
in the above, DCS (LSOP) DC excitation representing large signal operating point, RFS (LSOP) Radio frequency excitation representing large signal operating point, DCS q Representing a large signal DC offset stimulus representing q-port, A 11 Representing the incident wave at signal port 1, harmonic index 1, DCR (LSOP) Indicating the dc response of the large signal operating point,frequency domain multi-harmonic distortion nonlinear parameter element representing DC voltage offset excitation part>The representation describes the frequency domain multi-harmonic distortion nonlinear parameters of the large signal operating point effect,representing the system response at the large signal operating point.
3. The method of claim 2, wherein the large signal operating point in S2 is set as an incident wave at port 1 and harmonic 1, and the small signal point in S2 is an incident wave at a port other than the large signal operating point.
4. The method of quantitative simulation modeling for integrated circuit conduction immunity prediction according to claim 1, wherein the multiple functions in step S1 are as follows:
B pk ＝F pk (A 11 ,A 12 ,…,A 1K ,A 21 ,A 22 ,…,A 2K ,…,A N1 ,A N2 ,…,A NK )
when considering the dc bias excitation, the expression of the multiple complex function is as follows:
B pk ＝F pk (DC 1 ,…,DC N ,A 11 ,A 12 ,…,A 1K ,A 21 ,A 22 ,…,A 2K ,…,A N1 ,A N2 ,…,A NK )
in the above, B pk Representing scattered waves of the device under test at a signal port p and a harmonic K, p representing the signal port number, K representing the harmonic index, N representing the total number of ports of the device under test, K representing the highest harmonic index of the device under test, A NK Representing the incident wave of the device under test at the signal port N and the harmonic K, A 11 A is the incident wave of the tested equipment at the signal port 1 and the harmonic wave 1 12 A is the incident wave of the tested equipment at the signal port 1 and the harmonic wave 2 1K A is the incident wave of the tested equipment at the signal port 1 and the harmonic wave K 21 A is the incident wave of the tested equipment at the signal port 2 and the harmonic wave 1 22 A is the incident wave of the tested equipment at the signal port 2 and the harmonic wave 2 2K A is the incident wave of the tested equipment at the signal port 2 and the harmonic wave K N1 For the incident wave of the tested equipment at the signal port N and harmonic wave 1, A N2 DC for incident wave of the tested device at signal port N, harmonic 2 N Representing the DC bias stimulus at signal port N, DC 1 Representing the DC bias stimulus at signal port 1, F pk Representing the scattered wave of the device under test at the signal port p and the harmonic k as a nonlinear function of the excitation or incident wave.
5. The quantitative simulation modeling method for predicting the conduction immunity of an integrated circuit according to claim 4, wherein the incident wave and the scattered wave are specifically represented by the following formulas:
in the above, A p Representing incident waves at port p, B p Representing scattered waves at port p, V p Representing the voltage at port p, I p Representing the current at port p, Z o Representing the characteristic impedance.
6. The method of claim 5, wherein in step S1, discrete tone signals are further defined as being present in the incident and scattered waves, and the discrete tone signals are limited to be periodic or narrow-band modulated signals with harmonics.
7. The method for quantitatively simulating and modeling the conduction immunity prediction of the integrated circuit according to claim 1, wherein the method for extracting the nonlinear parameters of the frequency band multi-harmonic distortion in the step S3 is specifically as follows:
s301, setting test parameters of a nonlinear vector network analyzer: measuring a start frequency, a stop frequency, a measurement point number, a maximum harmonic number, a maximum input interference power value and an intermediate frequency bandwidth;
s302, setting calibration power and attenuation amplitude of a built-in receiver of a nonlinear vector network analyzer;
s303, setting forward power and backward power of small signals in a nonlinear vector network analyzer;
s304, SOLT/TRL dual-port calibration, power calibration and phase calibration of the nonlinear vector network analyzer are completed;
s305, starting to measure the nonlinear parameters of the frequency domain multi-harmonic distortion of the tested equipment, and measuring fundamental waves and harmonic components of corresponding signals by the nonlinear vector network analyzer through a built-in signal source or an external signal source and a receiver.
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