US20110238383A1 - One-Port De-embedding Using Time Domain Substitution - Google Patents

One-Port De-embedding Using Time Domain Substitution Download PDF

Info

Publication number
US20110238383A1
US20110238383A1 US13/048,008 US201113048008A US2011238383A1 US 20110238383 A1 US20110238383 A1 US 20110238383A1 US 201113048008 A US201113048008 A US 201113048008A US 2011238383 A1 US2011238383 A1 US 2011238383A1
Authority
US
United States
Prior art keywords
dut
parameter
parameter measurement
domain
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/048,008
Inventor
Donald W. Metzger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Constant Wave Inc
Original Assignee
Constant Wave Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Constant Wave Inc filed Critical Constant Wave Inc
Priority to US13/048,008 priority Critical patent/US20110238383A1/en
Assigned to Constant Wave, Inc. reassignment Constant Wave, Inc. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: METZGER, DONALD W.
Publication of US20110238383A1 publication Critical patent/US20110238383A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/005Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/04Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant in circuits having distributed constants, e.g. having very long conductors or involving high frequencies

Definitions

  • This invention relates generally to the use of vector network analyzers (VNAs), and more particularly, to de-embedding the response of the device under test (DUT) from the measurements that include the intervening physical components between the VNA and the DUT.
  • VNAs vector network analyzers
  • VNAs are radio frequency (RF) measurement systems used to determine the scattering parameters (commonly referred to as “S-parameters”) of a device under test (DUT).
  • a VNA generates a single frequency, continuous wave (CW) stimulus signal. This signal is sent through cables to a DUT. The stimulus and the DUT response signals are measured by the VNA. A new stimulus signal is then generated at a different frequency. The response of the DUT is similarly determined for this new frequency. This process continues over a range of frequencies. The result is the response of the DUT at multiple frequencies. These results are termed frequency domain responses, because the measured data is a function of the stimulus frequency.
  • CW continuous wave
  • a common VNA measurement problem involves making one port, S 11 measurements of a device where there is intervening circuitry between the measurement point and the device.
  • a signal flow graph of this measurement is shown in FIG. 3 . It is desired to measure the transfer function D (for DUT). However, there are intervening physical elements between the measurement points at a 1 and b 1 and the device location at D. Those intervening elements are modeled as the L, a two port network, and P, a transmission line. This is a very general model which can fit many actual measurement scenarios.
  • the parameter D is desired, but the intervening circuitry introduces complexity into the equation which involves all of the terms in the model. Solving for D requires knowing L 11 , L 12 , L 21 , L 22 , and P. In the language of VNAs, the problem of extracting D from the measured value of S11 is known as de-embedding. Where the measurement involves only one port, the problem is known more fully as one-port de-embedding.
  • calibration standards various known devices
  • Measurements with these known standards can be used to characterize the intervening circuitry between the VNA and the DUT. This process is called calibration.
  • This approach requires that multiple calibration standards be inserted and measured, a time consuming process.
  • the creation of those multiple standards can be a difficult task.
  • At least three calibration standards need to be inserted and measured. Using the results of this calibration to remove the effects of the intervening circuitry is called correction.
  • a novel method is provided for de-embedding the S-parameter response of an electrical DUT embedded in an electrical network.
  • the method relies on a combination of key insights.
  • the first insight is that a signal fed by a VNA to a DUT produces multiple reflections, each corresponding to a different propagation path for the signal, spaced apart in time. These reflections can be isolated by transforming the S-parameter response to the time domain, applying a gate to select a portion of the response corresponding to a particular path, and transforming the gated response back into the frequency domain.
  • the third insight is that by substituting a single known impedance condition at the location of the DUT, and making an otherwise identical measurement, inverse transformation, gating, and forward transformation, the S-parameter response of the DUT can be solved as a function of the two measurements and the known impedance condition.
  • the method comprises making first and second S-parameter measurements in the frequency domain at a port or measurement reference plane to the network containing the DUT.
  • a known impedance condition is created at the embedded location of the DUT.
  • the first and second measurements are transformed to the time domain, and then gated to select portions of the time-domain-transformed responses that correspond to paths that include the DUT and known impedance condition, respectively.
  • the gated time domain responses are then transformed back into the frequency domain, yielding first and second selected S-parameter measurement responses M1 and M2, respectively.
  • a reflection S-parameter for the DUT is then determined as a function of the first and second selected S-parameter measurement responses and the known impedance condition.
  • FIG. 1 illustrates one embodiment of a common test configuration for a device under test.
  • FIG. 2 illustrates one embodiment of an electrical network model for a device under test.
  • FIG. 3 illustrates one embodiment of a signal flow graph for modeling the measurement of a one-port device.
  • FIG. 4 illustrates a first impulse response through the signal flow graph of FIG. 3 .
  • FIG. 5 illustrates a second impulse response through the signal flow graph of FIG. 3 .
  • FIG. 6 illustrates the substitution of a known impedance condition or device K at the location of the DUT in the signal flow graph of FIG. 3 .
  • FIG. 7 is a flow chart of one embodiment of a method of de-embedding the scattering response of an electrical device under test embedded in an electrical network.
  • FIG. 1 illustrates one embodiment of a common test configuration 10 for a device under test (DUT).
  • the DUT 18 is embedded in an evaluation board 14 with radially-extending coaxial cable connectors for transferring signals to and from each of the pins of the DUT 18 .
  • a vector network analyzer (VNA) 12 is connected, via a coaxial cable, to one of the coaxial inputs 16 of the evaluation board 14 .
  • VNA vector network analyzer
  • the VNA will be calibrated at the cable ends, to correct scattering parameter measurements for errors introduced by the coaxial cable 11 and the VNA 12 . But as illustrated in FIGS. 1 and 2 , there is frequently additional circuitry (e.g., wire) between the measurement point—also referred to as the reference plane 15 —and the DUT 18 .
  • additional circuitry e.g., wire
  • FIG. 2 illustrates one embodiment of an electrical network model that is applicable to any test configuration in which the measurement reference plane 15 is remote from the DUT 18 .
  • the test configuration is modeled as a VNA 12 connected to an electrical network 20 containing the DUT 18 .
  • Signals transmitted between the reference plane 15 and the DUT 18 pass through intervening physical elements 22 with inherent electrical properties (e.g., capacitance, inductance, resistance).
  • the challenge is to de-embed the scattering response of the DUT from the measured scattering response at the reference plane.
  • the present invention approaches de-embedding through a novel process referred to herein as time domain substitution.
  • a key insight of this novel process is the recognition that a signal fed by a VNA to a DUT produces multiple reflections, spaced apart in time. Each reflection corresponds to a different propagation path for the signal. The reflections are spaced apart in time because propagation through different paths takes different amounts of time.
  • FIG. 3 is a general signal flow model of the intervening physical elements between the measurement points at a1 and b1 (known as the “reference plane”) and the DUT location at D.
  • the intervening elements are modeled as L, a two port network, and P, a transmission line. This general model fits many actual measurement scenarios.
  • FIG. 4 illustrates that the first impulse response in time arises from the L 11 path.
  • the equation for S11 of the path shown in FIG. 4 is:
  • This first impulse response does not include the device D and, while it characterizes one aspect of the intervening circuitry, does not help with the measurement of the device.
  • FIG. 5 illustrates that the second impulse response in time arises from a path which includes the device D.
  • the equation of S 11 for the path shown in FIG. 5 is:
  • equation (3) is relatively simple compared with equation (1).
  • Isolating the S-parameter response to the second impulse response involves a series of steps.
  • the VNA tests the DUT with several regularly spaced frequencies in order to facilitate a transform to the time domain.
  • the frequency domain responses measured by the VNA are transformed, using inverse Fourier transforms, into time domain responses.
  • This step in the context of VNAs, is known as “Time Domain Processing.”
  • the form of the inverse Fourier transform used can be a Discrete Fourier Transform, a Fast Fourier Transform or a Chirp-Z Transform.
  • windowing functions can be applied to the frequency domain data before it is transformed, in order to control certain behaviors of the resulting time domain responses. These behaviors include sidelobe level, sidelobe roll-off rate and time domain resolution.
  • the part of the time domain response corresponding to the propagation path that includes D is gated and forward transformed back to the frequency domain.
  • This processing step is known as “Frequency Gated By Time,” and yields a frequency domain response—for example, the S 11 of equation (3)—that represents only the selected part of the time domain response.
  • Various methods for performing this forward Fourier transform may be used.
  • the frequency domain responses measured by a VNA are more generally known as transfer functions.
  • the time domain responses computed from these transfer functions are more generally known as impulse response functions.
  • the frequency gated by time responses computed by selecting a portion of the impulse response functions and transforming back to the frequency domain are, again, transfer functions.
  • these transfer functions are based on only a portion of the total impulse response of the DUT.
  • Another key aspect of the present invention is to substitute a known device K for D, as shown in FIG. 6 , and make another measurement.
  • the equation of S 11 for the path shown in FIG. 6 is
  • equations 3 and 4 can be rewritten as equations 5 and 6, respectively:
  • Equation 7 now contains two values, M1 and M2, which are both determined by measurements.
  • the value K is assumed to be known.
  • the value for D has been determined by two measurements, one with device D in place, and one with a single known device K in place. Because this method involves time domain processing and the substitution of K for D, this method is herein given the name of “Time Domain Substitution.”
  • the unknown device D can be replaced with a known device K simply by short circuiting the input to the device D.
  • a known device K is a short circuit of the input to device D.
  • Another possibility for the known device K is an open circuit.
  • Another aspect of the present invention is the recognition that the signal flow graph shown in FIG. 3 need not precisely represent the actual measurement scenario. No matter which path is chosen, the path equations will always be defined as strings of products. For example, a later reflection that involves two or more passes through the location of D could be used to compare D and K. If the path includes the DUT location twice, the value D can be found from
  • FIG. 7 is a flow chart of one embodiment of a method of de-embedding the S-parameter response of an electrical DUT embedded in an electrical network.
  • a VNA is used to perform a first S-parameter measurement S 11 , in the frequency domain, at a port to the network containing the DUT.
  • the first S-parameter measurement is transformed into the time domain using a DFT, FFT, or Chirp-Z transform.
  • time domain processing is applied to select a particular part of the time-domain-transformed first S-parameter measurement response that corresponds to a path that includes the DUT.
  • the impulse response representing the DUT in the time domain trace is selected as in normal Frequency Gated by Time processing.
  • the selected part of the time-domain transformed first S-parameter measurement response is transformed back to the frequency domain, using a suitable transform such as DFT, FFT, or Chirp-Z, to yield a first selected or isolated S-parameter measurement response.
  • This frequency domain trace is denoted as M1.
  • a known impedance condition is created at the embedded location of the DUT. This may be done by applying a short at the location of the DUT, or by replacing the DUT with a known device having a S 11 as a function of frequency denoted by K.
  • the VNA is used to make a second S-parameter measurement S 11 , in the frequency domain, at the same network port referenced in function block 72 .
  • the second S-parameter measurement is transformed into the time domain using a DFT, FFT, or Chirp-Z transform.
  • time domain processing is applied to select a particular part of the time-domain-transformed second S-parameter measurement response that corresponds to a path that includes the known impedance condition.
  • function block 88 the selected part of the time-domain transformed second S-parameter measurement response is transformed back to the frequency domain, again using a suitable transform such as DFT, FFT, or Chirp-Z, to yield a second selected or isolated S-parameter measurement response.
  • This frequency domain trace is denoted M2.
  • a reflection S-parameter for the DUT is determined as a function of the first and second selected S-parameter measurement responses M1 and M2. Equations 8 and 9 are each representative of such a function.
  • the processing used to generate responses in the time domain, select a part of the time domain and transform back to the frequency domain may be a Frequency Gated By Time processing, such as that available in the time domain processing of a VNA.
  • this processing may be based on spectrographic processing.
  • the impulse response selected by gating could be the first, second, third or any impulse response in the time domain.
  • the known impedance condition or known device could be a short circuit or an open circuit.
  • the DUT could be a one-port device, or merely one port of a multi-port device.
  • the VNA making measurements could be either uncalibrated or calibrated using a previous calibration process.

Abstract

A method is provided for de-embedding the S-parameter response of an electrical DUT embedded in an electrical network. The method comprises making first and second S-parameter measurements in the frequency domain at a port or measurement reference plane to the network containing the DUT. For the second measurement, a known impedance condition is created at the embedded location of the DUT. The first and second measurements are transformed to the time domain, and then gated to select portions of the time-domain-transformed responses that correspond to paths that include the DUT and known impedance condition, respectively. The gated time domain responses are then transformed back into the frequency domain, yielding first and second selected S-parameter measurement responses M1 and M2, respectively. A reflection S-parameter for the DUT is then determined as a function of the first and second selected S-parameter measurement responses and the known impedance condition.

Description

    RELATED APPLICATIONS
  • This application claims priority to and herein incorporates by reference U.S. Provisional Patent Application No. 61/316,731, filed on Mar. 23, 2010, entitled “One Port Device De-embedding for Network Analyzers Using Time Domain Processing.”
  • FIELD OF THE INVENTION
  • This invention relates generally to the use of vector network analyzers (VNAs), and more particularly, to de-embedding the response of the device under test (DUT) from the measurements that include the intervening physical components between the VNA and the DUT.
  • BACKGROUND
  • Vector Network Analyzers (VNAs) are radio frequency (RF) measurement systems used to determine the scattering parameters (commonly referred to as “S-parameters”) of a device under test (DUT). A VNA generates a single frequency, continuous wave (CW) stimulus signal. This signal is sent through cables to a DUT. The stimulus and the DUT response signals are measured by the VNA. A new stimulus signal is then generated at a different frequency. The response of the DUT is similarly determined for this new frequency. This process continues over a range of frequencies. The result is the response of the DUT at multiple frequencies. These results are termed frequency domain responses, because the measured data is a function of the stimulus frequency.
  • The foregoing measured responses, however, are distorted by the intrinsic electrical characteristics (e.g., capacitance, inductance, resistance) of the physical components (e.g., VNA cables and printed circuit board) between the VNA and the DUT. Errors caused by the VNA cables can be removed from these measured signals through a relatively easy process called correction. But, as explained below, the conventional process for removing errors caused by other elements, such as an intervening printed circuit board, is much more tedious and difficult. Often, calibration kits are not available for such elements. Consequently, users often fail to perform the needed corrections.
  • A common VNA measurement problem involves making one port, S11 measurements of a device where there is intervening circuitry between the measurement point and the device. A signal flow graph of this measurement is shown in FIG. 3. It is desired to measure the transfer function D (for DUT). However, there are intervening physical elements between the measurement points at a1 and b1 and the device location at D. Those intervening elements are modeled as the L, a two port network, and P, a transmission line. This is a very general model which can fit many actual measurement scenarios.
  • When a network analyzer measures the S11 of this network, it measures:
  • S 11 = b 1 a 1 = L 11 + L 12 L 21 P 2 D 1 - L 22 P 2 D ( 1 )
  • The parameter D is desired, but the intervening circuitry introduces complexity into the equation which involves all of the terms in the model. Solving for D requires knowing L11, L12, L21, L22, and P. In the language of VNAs, the problem of extracting D from the measured value of S11 is known as de-embedding. Where the measurement involves only one port, the problem is known more fully as one-port de-embedding.
  • One current approach to this problem involves the insertion of various known devices (calibration standards) at the location D. Measurements with these known standards can be used to characterize the intervening circuitry between the VNA and the DUT. This process is called calibration. This approach requires that multiple calibration standards be inserted and measured, a time consuming process. In addition, the creation of those multiple standards can be a difficult task. At least three calibration standards need to be inserted and measured. Using the results of this calibration to remove the effects of the intervening circuitry is called correction.
  • SUMMARY
  • A novel method is provided for de-embedding the S-parameter response of an electrical DUT embedded in an electrical network. The method relies on a combination of key insights.
  • The first insight is that a signal fed by a VNA to a DUT produces multiple reflections, each corresponding to a different propagation path for the signal, spaced apart in time. These reflections can be isolated by transforming the S-parameter response to the time domain, applying a gate to select a portion of the response corresponding to a particular path, and transforming the gated response back into the frequency domain.
  • The second insight is that no matter which individual path is chosen, the path equations characterizing the signals through that path will always be defined as a string of products, which is more readily and easily solved than equation (1).
  • The third insight is that by substituting a single known impedance condition at the location of the DUT, and making an otherwise identical measurement, inverse transformation, gating, and forward transformation, the S-parameter response of the DUT can be solved as a function of the two measurements and the known impedance condition.
  • Accordingly, the method comprises making first and second S-parameter measurements in the frequency domain at a port or measurement reference plane to the network containing the DUT. For the second measurement, a known impedance condition is created at the embedded location of the DUT. The first and second measurements are transformed to the time domain, and then gated to select portions of the time-domain-transformed responses that correspond to paths that include the DUT and known impedance condition, respectively. The gated time domain responses are then transformed back into the frequency domain, yielding first and second selected S-parameter measurement responses M1 and M2, respectively. A reflection S-parameter for the DUT is then determined as a function of the first and second selected S-parameter measurement responses and the known impedance condition.
  • These and other aspects, features, and advantages of the present invention will be readily apparent to those skilled in the art from the following detailed description taken in conjunction with the annexed sheets of drawings, which illustrate the invention. The invention, however, is not limited by systems with any particular combination of the described features, aspects, and advantages, except and to the extent specifically so limited by the claims.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 illustrates one embodiment of a common test configuration for a device under test.
  • FIG. 2 illustrates one embodiment of an electrical network model for a device under test.
  • FIG. 3 illustrates one embodiment of a signal flow graph for modeling the measurement of a one-port device.
  • FIG. 4 illustrates a first impulse response through the signal flow graph of FIG. 3.
  • FIG. 5 illustrates a second impulse response through the signal flow graph of FIG. 3.
  • FIG. 6 illustrates the substitution of a known impedance condition or device K at the location of the DUT in the signal flow graph of FIG. 3.
  • FIG. 7 is a flow chart of one embodiment of a method of de-embedding the scattering response of an electrical device under test embedded in an electrical network.
  • DETAILED DESCRIPTION
  • FIG. 1 illustrates one embodiment of a common test configuration 10 for a device under test (DUT). The DUT 18 is embedded in an evaluation board 14 with radially-extending coaxial cable connectors for transferring signals to and from each of the pins of the DUT 18. A vector network analyzer (VNA) 12 is connected, via a coaxial cable, to one of the coaxial inputs 16 of the evaluation board 14.
  • Typically, the VNA will be calibrated at the cable ends, to correct scattering parameter measurements for errors introduced by the coaxial cable 11 and the VNA 12. But as illustrated in FIGS. 1 and 2, there is frequently additional circuitry (e.g., wire) between the measurement point—also referred to as the reference plane 15—and the DUT 18.
  • FIG. 2 illustrates one embodiment of an electrical network model that is applicable to any test configuration in which the measurement reference plane 15 is remote from the DUT 18. The test configuration is modeled as a VNA 12 connected to an electrical network 20 containing the DUT 18. Signals transmitted between the reference plane 15 and the DUT 18 pass through intervening physical elements 22 with inherent electrical properties (e.g., capacitance, inductance, resistance). The challenge is to de-embed the scattering response of the DUT from the measured scattering response at the reference plane.
  • The present invention approaches de-embedding through a novel process referred to herein as time domain substitution. A key insight of this novel process is the recognition that a signal fed by a VNA to a DUT produces multiple reflections, spaced apart in time. Each reflection corresponds to a different propagation path for the signal. The reflections are spaced apart in time because propagation through different paths takes different amounts of time.
  • FIG. 3 is a general signal flow model of the intervening physical elements between the measurement points at a1 and b1 (known as the “reference plane”) and the DUT location at D. The intervening elements are modeled as L, a two port network, and P, a transmission line. This general model fits many actual measurement scenarios.
  • FIG. 4 illustrates that the first impulse response in time arises from the L11 path. The equation for S11 of the path shown in FIG. 4 is:
  • S 11 = b 1 a 1 = L 11 ( 2 )
  • This first impulse response does not include the device D and, while it characterizes one aspect of the intervening circuitry, does not help with the measurement of the device.
  • FIG. 5 illustrates that the second impulse response in time arises from a path which includes the device D. The equation of S11 for the path shown in FIG. 5 is:
  • S 11 = b 1 a 1 = L 12 L 21 P 2 D ( 3 )
  • Notably, equation (3) is relatively simple compared with equation (1).
  • Isolating the S-parameter response to the second impulse response involves a series of steps. First, the VNA tests the DUT with several regularly spaced frequencies in order to facilitate a transform to the time domain.
  • Second, the frequency domain responses measured by the VNA are transformed, using inverse Fourier transforms, into time domain responses. This step, in the context of VNAs, is known as “Time Domain Processing.” The form of the inverse Fourier transform used can be a Discrete Fourier Transform, a Fast Fourier Transform or a Chirp-Z Transform. Various shapes of windowing functions can be applied to the frequency domain data before it is transformed, in order to control certain behaviors of the resulting time domain responses. These behaviors include sidelobe level, sidelobe roll-off rate and time domain resolution.
  • Third, the part of the time domain response corresponding to the propagation path that includes D is gated and forward transformed back to the frequency domain. This processing step is known as “Frequency Gated By Time,” and yields a frequency domain response—for example, the S11 of equation (3)—that represents only the selected part of the time domain response. Various methods for performing this forward Fourier transform may be used.
  • The frequency domain responses measured by a VNA are more generally known as transfer functions. The time domain responses computed from these transfer functions are more generally known as impulse response functions. The frequency gated by time responses computed by selecting a portion of the impulse response functions and transforming back to the frequency domain are, again, transfer functions. However, these transfer functions are based on only a portion of the total impulse response of the DUT. By careful selection of which parts of the impulse response are used in the computation of the transfer function, the transfer function for different propagation paths within the device under test can be determined.
  • The application of time domain processing as set forth above selects one path from the network and, therefore, simplifies the mathematical equivalent for the measurement (see equation (3)). The relative simplicity of this equation facilitates a more straightforward determination of the transfer function for the device D.
  • Another key aspect of the present invention is to substitute a known device K for D, as shown in FIG. 6, and make another measurement. The equation of S11 for the path shown in FIG. 6 is
  • S 11 = b 1 a 1 = L 12 L 21 P 2 K ( 4 )
  • In order to avoid confusion, the S11 measured when D is in place will hereinafter be referred to as M1. Also, the S11 measured when K is in place will hereinafter be referred to as M2. Thus, equations 3 and 4 can be rewritten as equations 5 and 6, respectively:

  • M1=L 12 L 21 P 2 D  (5)

  • M2=L 12 L 21 P 2 K  (6)
  • Dividing equation 5 by equation 6 yields
  • M 1 M 2 = D K ( 7 )
  • Notably, the parts in common for the two measurements cancel. Equation 7 now contains two values, M1 and M2, which are both determined by measurements. The value K is assumed to be known. Thus, equation 7 can be solved for D as
  • D = M 1 M 2 K ( 8 )
  • Thus, the value for D has been determined by two measurements, one with device D in place, and one with a single known device K in place. Because this method involves time domain processing and the substitution of K for D, this method is herein given the name of “Time Domain Substitution.”
  • In many practical situations, the unknown device D can be replaced with a known device K simply by short circuiting the input to the device D. Thus, one suitable known device K is a short circuit of the input to device D. Another possibility for the known device K is an open circuit.
  • Another aspect of the present invention is the recognition that the signal flow graph shown in FIG. 3 need not precisely represent the actual measurement scenario. No matter which path is chosen, the path equations will always be defined as strings of products. For example, a later reflection that involves two or more passes through the location of D could be used to compare D and K. If the path includes the DUT location twice, the value D can be found from
  • D 2 = M 1 M 2 K 2 ( 9 )
  • Paths with even more passes past the location of the DUT will result in higher powers of D and K, but can still be solved by extension of this approach. In short, all that is required is the equivalent representation be correct as to the power of D and K.
  • FIG. 7 is a flow chart of one embodiment of a method of de-embedding the S-parameter response of an electrical DUT embedded in an electrical network. In function block 72, a VNA is used to perform a first S-parameter measurement S11, in the frequency domain, at a port to the network containing the DUT. In function block 74, the first S-parameter measurement is transformed into the time domain using a DFT, FFT, or Chirp-Z transform. In function block 76, time domain processing is applied to select a particular part of the time-domain-transformed first S-parameter measurement response that corresponds to a path that includes the DUT. The impulse response representing the DUT in the time domain trace is selected as in normal Frequency Gated by Time processing. In function block 78, the selected part of the time-domain transformed first S-parameter measurement response is transformed back to the frequency domain, using a suitable transform such as DFT, FFT, or Chirp-Z, to yield a first selected or isolated S-parameter measurement response. This frequency domain trace is denoted as M1.
  • In function block 80, a known impedance condition is created at the embedded location of the DUT. This may be done by applying a short at the location of the DUT, or by replacing the DUT with a known device having a S11 as a function of frequency denoted by K. In function block 82, the VNA is used to make a second S-parameter measurement S11, in the frequency domain, at the same network port referenced in function block 72. In function block 84, the second S-parameter measurement is transformed into the time domain using a DFT, FFT, or Chirp-Z transform. In function block 86, time domain processing is applied to select a particular part of the time-domain-transformed second S-parameter measurement response that corresponds to a path that includes the known impedance condition. In function block 88, the selected part of the time-domain transformed second S-parameter measurement response is transformed back to the frequency domain, again using a suitable transform such as DFT, FFT, or Chirp-Z, to yield a second selected or isolated S-parameter measurement response. This frequency domain trace is denoted M2.
  • In function block 90, a reflection S-parameter for the DUT, denoted as D, is determined as a function of the first and second selected S-parameter measurement responses M1 and M2. Equations 8 and 9 are each representative of such a function.
  • It will be understood that several variations can be applied to the process without departing from the spirit and scope of the invention. For example, the processing used to generate responses in the time domain, select a part of the time domain and transform back to the frequency domain, may be a Frequency Gated By Time processing, such as that available in the time domain processing of a VNA. Alternatively, this processing may be based on spectrographic processing. The impulse response selected by gating could be the first, second, third or any impulse response in the time domain. The known impedance condition or known device could be a short circuit or an open circuit. The DUT could be a one-port device, or merely one port of a multi-port device. The VNA making measurements could be either uncalibrated or calibrated using a previous calibration process.
  • Although the foregoing specific details describe various embodiments of this invention, persons reasonably skilled in the art will recognize that various changes may be made in the details of the method and apparatus of this invention without departing from the spirit and scope of the invention as defined in the appended claims. Therefore, it should be understood that, unless otherwise specified, this invention is not to be limited to the specific details shown and described herein.

Claims (14)

1. A method of de-embedding the scattering parameter (S-parameter) response of an electrical device under test (DUT) embedded in an electrical network, the method comprising:
making a first S-parameter measurement in the frequency domain at a port to the network containing the DUT;
transforming the first S-parameter measurement into the time domain;
applying time domain processing to select a particular part of the time-domain-transformed first S-parameter measurement response that corresponds to a path that includes the DUT;
transforming the selected part of the time-domain-transformed first S-parameter measurement response back to the frequency domain to yield a first selected S-parameter measurement response;
creating a known impedance condition at the embedded location of the DUT;
making a second S-parameter measurement at the port to the network having a known impedance condition at the location of the DUT;
transforming the second S-parameter measurement into the time domain;
applying time domain processing to select a particular part of the time-domain-transformed second S-parameter measurement response that corresponds to the path that includes the known impedance condition;
transforming the selected part of the time-domain-transformed second S-parameter measurement response back to the frequency domain to yield a second selected S-parameter measurement response; and
determining a reflection S-parameter for the DUT as a function of the first and second selected S-parameter measurement responses.
2. The method of claim 1, wherein the electrical network comprises a one-port network.
3. The method of claim 1, wherein the electrical network comprises a multi-port network.
4. The method of claim 1, wherein the electrical network comprises a transmission line.
5. The method of claim 1, wherein the reflection S-parameter is a function of a ratio between the first and second selected S-parameter measurement responses.
6. The method of claim 5, wherein the reflection S-parameter is a function of a ratio of the first selected S-parameter measurement response over the second selected S-parameter measurement response.
7. The method of claim 1, wherein the known impedance condition is a short.
8. The method of claim 1, wherein the known impedance condition is an open circuit.
9. The method of claim 1, further comprising reviewing a time domain trace of the time-domain-transformed first S-parameter measurement response to identify distinct propagation paths for the response.
10. The method of claim 1, wherein vector network analyzer (VNA) time domain processing is applied to gate a time domain portion of the time-domain-transformed first S-parameter measurement response corresponding to one of a plurality of identifiable propagation paths for the measurement response.
11. The method of claim 1, further comprising using spectrographic processing to select the particular part of the time-domain-transformed first S-parameter measurement response that corresponds to a path that includes the DUT.
12. The method of claim 1, wherein a calibrated vector network analyzer (VNA) is connected to the port of the electrical network in which the DUT is embedded and using the VNA to make the first and second S-parameter measurements.
13. The method of claim 1, wherein an uncalibrated vector network analyzer (VNA) is connected to the port of the electrical network in which the DUT is embedded and using the VNA to make the first and second S-parameter measurements.
14. A method of de-embedding the scattering parameter (S-parameter) response of an electrical device under test (DUT) embedded in a two-port electrical network, the method comprising:
making a first S-parameter measurement in the frequency domain at a port to the network containing the DUT;
transforming the first S-parameter measurement into the time domain;
applying time domain processing to select a particular part of the time-domain transform of the first S-parameter measurement that correspond to a path that includes the DUT;
transforming the selected part of the time-domain transform of the first S-parameter measurement back to the frequency domain to yield a selected S-parameter measurement response M1;
creating a known impedance condition at the embedded location of the DUT;
making a second S-parameter measurement at the port to the network having a known impedance condition at the location of the DUT;
transforming the second S-parameter measurement into the time domain;
applying time domain processing to select a particular part of the time-domain transform of the second S-parameter measurement that corresponds to a path that includes the known impedance condition;
transforming the selected part of the time-domain transform of the second S-parameter measurement back to the frequency domain to yield a selected S-parameter measurement response M2; and
determining a reflection S-parameter D for the DUT by the relationship:

D=K*M1/M2
wherein D is the reflection S-parameter and K is a known one-port standard.
US13/048,008 2010-03-23 2011-03-15 One-Port De-embedding Using Time Domain Substitution Abandoned US20110238383A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/048,008 US20110238383A1 (en) 2010-03-23 2011-03-15 One-Port De-embedding Using Time Domain Substitution

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US31673110P 2010-03-23 2010-03-23
US13/048,008 US20110238383A1 (en) 2010-03-23 2011-03-15 One-Port De-embedding Using Time Domain Substitution

Publications (1)

Publication Number Publication Date
US20110238383A1 true US20110238383A1 (en) 2011-09-29

Family

ID=44657367

Family Applications (1)

Application Number Title Priority Date Filing Date
US13/048,008 Abandoned US20110238383A1 (en) 2010-03-23 2011-03-15 One-Port De-embedding Using Time Domain Substitution

Country Status (1)

Country Link
US (1) US20110238383A1 (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110151596A1 (en) * 2009-12-17 2011-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Cascaded-Based De-embedding Methodology
US20120166129A1 (en) * 2010-12-23 2012-06-28 Electronics And Telecommunications Research Institute Calibration method using a vector network analyzer and delay time measurement using the same
CN102866881A (en) * 2012-07-20 2013-01-09 中国电子科技集团公司第四十一研究所 Implementation method for generalization and parallelization of data conversion of vector network analyzer
US20140081586A1 (en) * 2012-09-20 2014-03-20 The Government Of The United States Of America, As Represented By The Secretary Of The Navy Noise Temperature Extraction Procedure for Characterization of On-Wafer Devices
US9000776B1 (en) * 2010-12-09 2015-04-07 The United States Of America As Represented By The Secretary Of The Navy Structure characteristic impedance estimator using current probe
CN104515907A (en) * 2013-09-30 2015-04-15 上海霍莱沃电子系统技术有限公司 Scattering parameter testing system and implementation method thereof
US9638750B2 (en) * 2015-05-26 2017-05-02 International Business Machines Corporation Frequency-domain high-speed bus signal integrity compliance model
US9673941B2 (en) * 2015-05-26 2017-06-06 International Business Machines Corporation Frequency-domain high-speed bus signal integrity compliance model
CN107305229A (en) * 2016-04-22 2017-10-31 迈普通信技术股份有限公司 Assess the method and device of passive link quality
CN110967573A (en) * 2018-09-29 2020-04-07 是德科技股份有限公司 Integrated vector network analyzer
GB2598810A (en) * 2020-04-30 2022-03-16 Keysight Technologies Inc Removing effects of instabilities of measurement system
US11353536B2 (en) 2018-09-29 2022-06-07 Keysight Technologies, Inc. Integrated vector network analyzer

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3812423A (en) * 1973-07-16 1974-05-21 Sperry Rand Corp Network time domain measurement system
US4669051A (en) * 1984-01-09 1987-05-26 Hewlett-Packard Company Vector network analyzer with integral processor
US4703433A (en) * 1984-01-09 1987-10-27 Hewlett-Packard Company Vector network analyzer with integral processor
US4995006A (en) * 1988-03-31 1991-02-19 Wiltron Company Apparatus and method for low-pass equivalent processing
US5376888A (en) * 1993-06-09 1994-12-27 Hook; William R. Timing markers in time domain reflectometry systems
US6137293A (en) * 1997-12-19 2000-10-24 Hon Hai Precision Ind. Co., Ltd. Measuring method for equivalent circuitry
US20010004729A1 (en) * 1999-10-13 2001-06-21 Metzger Donald M. S-parameter measurement system for wideband non-linear networks
US20020053898A1 (en) * 2000-09-18 2002-05-09 Vahe Ademian Multiport automatic calibration device for a multiport test system
US20040193382A1 (en) * 2000-09-18 2004-09-30 Adamian Vahe' A. Method and apparatus for calibrating a multiport test system for measurement of a DUT
US20050194981A1 (en) * 2004-03-02 2005-09-08 Cole J. B. Method and system of characterizing a device under test
US20110234239A1 (en) * 2010-03-23 2011-09-29 Constant Wave, Inc. Two-Port De-Embedding Using Time Domain Substitution

Patent Citations (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3812423A (en) * 1973-07-16 1974-05-21 Sperry Rand Corp Network time domain measurement system
US4669051A (en) * 1984-01-09 1987-05-26 Hewlett-Packard Company Vector network analyzer with integral processor
US4703433A (en) * 1984-01-09 1987-10-27 Hewlett-Packard Company Vector network analyzer with integral processor
US4995006A (en) * 1988-03-31 1991-02-19 Wiltron Company Apparatus and method for low-pass equivalent processing
US5376888A (en) * 1993-06-09 1994-12-27 Hook; William R. Timing markers in time domain reflectometry systems
US5726578A (en) * 1993-06-09 1998-03-10 Precision Moisture Instruments, Inc. Apparatus and methods for time domain reflectometry
US6104200A (en) * 1993-06-09 2000-08-15 Precision Moisture Instruments, Inc. Apparatus and methods for generating unambiguous large amplitude timing makers in time domain reflectometry systems for measuring propagation velocities of RF pulses to determine material liquid contents moisture
US6137293A (en) * 1997-12-19 2000-10-24 Hon Hai Precision Ind. Co., Ltd. Measuring method for equivalent circuitry
US20010004729A1 (en) * 1999-10-13 2001-06-21 Metzger Donald M. S-parameter measurement system for wideband non-linear networks
US6594604B2 (en) * 1999-10-13 2003-07-15 Credence Systems Corporation S-parameter measurement system for wideband non-linear networks
US20020053899A1 (en) * 2000-09-18 2002-05-09 Vahe Adamian Method and apparatus for linear characterization of multi-terminal single-ended or balanced devices
US20020053898A1 (en) * 2000-09-18 2002-05-09 Vahe Ademian Multiport automatic calibration device for a multiport test system
US6614237B2 (en) * 2000-09-18 2003-09-02 Agilent Technologies, Inc. Multiport automatic calibration device for a multiport test system
US20030173978A1 (en) * 2000-09-18 2003-09-18 Adamian Vahe?Apos; A. Method and apparatus for calibrating a multiport test system for measurement of a dut
US6653848B2 (en) * 2000-09-18 2003-11-25 Agilent Technologies, Inc. Method and apparatus for linear characterization of multi-terminal single-ended or balanced devices
US20040193382A1 (en) * 2000-09-18 2004-09-30 Adamian Vahe' A. Method and apparatus for calibrating a multiport test system for measurement of a DUT
US6826506B2 (en) * 2000-09-18 2004-11-30 Agilent Technologies, Inc. Method and apparatus for calibrating a multiport test system for measurement of a DUT
US6920407B2 (en) * 2000-09-18 2005-07-19 Agilent Technologies, Inc. Method and apparatus for calibrating a multiport test system for measurement of a DUT
US20050194981A1 (en) * 2004-03-02 2005-09-08 Cole J. B. Method and system of characterizing a device under test
US7098670B2 (en) * 2004-03-02 2006-08-29 Cole J Bradford Method and system of characterizing a device under test
US20060226854A1 (en) * 2004-03-02 2006-10-12 Cole J B Method and system of characterizing a device under test
US20110234239A1 (en) * 2010-03-23 2011-09-29 Constant Wave, Inc. Two-Port De-Embedding Using Time Domain Substitution

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110151596A1 (en) * 2009-12-17 2011-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Cascaded-Based De-embedding Methodology
US8436626B2 (en) * 2009-12-17 2013-05-07 Taiwan Semiconductor Manfacturing Company, Ltd. Cascaded-based de-embedding methodology
US9000776B1 (en) * 2010-12-09 2015-04-07 The United States Of America As Represented By The Secretary Of The Navy Structure characteristic impedance estimator using current probe
US20120166129A1 (en) * 2010-12-23 2012-06-28 Electronics And Telecommunications Research Institute Calibration method using a vector network analyzer and delay time measurement using the same
CN102866881A (en) * 2012-07-20 2013-01-09 中国电子科技集团公司第四十一研究所 Implementation method for generalization and parallelization of data conversion of vector network analyzer
US20140081586A1 (en) * 2012-09-20 2014-03-20 The Government Of The United States Of America, As Represented By The Secretary Of The Navy Noise Temperature Extraction Procedure for Characterization of On-Wafer Devices
US9500688B2 (en) * 2012-09-20 2016-11-22 The United States Of America, As Represented By The Secretary Of The Navy Noise temperature extraction procedure for characterization of on-wafer devices
CN104515907A (en) * 2013-09-30 2015-04-15 上海霍莱沃电子系统技术有限公司 Scattering parameter testing system and implementation method thereof
US9638750B2 (en) * 2015-05-26 2017-05-02 International Business Machines Corporation Frequency-domain high-speed bus signal integrity compliance model
US9673941B2 (en) * 2015-05-26 2017-06-06 International Business Machines Corporation Frequency-domain high-speed bus signal integrity compliance model
US9686053B2 (en) * 2015-05-26 2017-06-20 International Business Machines Corporation Frequency-domain high-speed bus signal integrity compliance model
US9733305B2 (en) * 2015-05-26 2017-08-15 International Business Machines Corporation Frequency-domain high-speed bus signal integrity compliance model
CN107305229A (en) * 2016-04-22 2017-10-31 迈普通信技术股份有限公司 Assess the method and device of passive link quality
CN110967573A (en) * 2018-09-29 2020-04-07 是德科技股份有限公司 Integrated vector network analyzer
US10969421B2 (en) * 2018-09-29 2021-04-06 Keysight Technologies, Inc. Integrated vector network analyzer
US11353536B2 (en) 2018-09-29 2022-06-07 Keysight Technologies, Inc. Integrated vector network analyzer
US11927661B2 (en) 2018-09-29 2024-03-12 Keysight Technologies, Inc. Integrated vector network analyzer
GB2598810A (en) * 2020-04-30 2022-03-16 Keysight Technologies Inc Removing effects of instabilities of measurement system

Similar Documents

Publication Publication Date Title
US20110238383A1 (en) One-Port De-embedding Using Time Domain Substitution
KR102054874B1 (en) Method for calibrating a test rig
US20070073499A1 (en) Method and apparatus for determining one or more s-parameters associated with a device under test (DUT)
US20140343883A1 (en) User Interface for Signal Integrity Network Analyzer
US9194930B2 (en) Method for de-embedding in network analysis
US7865319B1 (en) Fixture de-embedding method and system for removing test fixture characteristics when calibrating measurement systems
US20110286506A1 (en) User Interface for Signal Integrity Network Analyzer
US10042029B2 (en) Calibration of test instrument over extended operating range
US20120326737A1 (en) Method of measuring scattering parameters of device under test
US8504315B2 (en) Method for the secondary error correction of a multi-port network analyzer
US10396907B2 (en) Time domain reflectometry step to S-parameter conversion
US10145874B2 (en) S-parameter measurements using real-time oscilloscopes
US7640477B2 (en) Calibration system that can be utilized with a plurality of test system topologies
EP2853911A1 (en) Two port vector network analyzer using de-embed probes
US6802046B2 (en) Time domain measurement systems and methods
US20080195344A1 (en) Method for determining measurement errors in scattering parameter measurements
US20110234239A1 (en) Two-Port De-Embedding Using Time Domain Substitution
CN105980878A (en) Time domain measuring method with calibration in the frequency range
US8271220B2 (en) Evaluating high frequency time domain in embedded device probing
US10509064B2 (en) Impedance measurement through waveform monitoring
US11598805B2 (en) Low frequency S-parameter measurement
JP2005526965A (en) Method for measuring effective directivity and / or effective source port integrity of system calibrated vector network analyzer
US10788529B1 (en) Method for network extraction based on phase localization
Mubarak et al. Residual error analysis of a calibrated vector network analyzer
JP6389354B2 (en) Total network characteristic measuring method and apparatus

Legal Events

Date Code Title Description
AS Assignment

Owner name: CONSTANT WAVE, INC., COLORADO

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:METZGER, DONALD W.;REEL/FRAME:025960/0571

Effective date: 20110315

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION