CN117669474B

CN117669474B - Layout generation method for multiple exposure, electronic equipment and storage medium

Info

Publication number: CN117669474B
Application number: CN202410132504.2A
Authority: CN
Inventors: 请求不公布姓名
Original assignee: All Smart Core Shanghai Technology Co ltd
Current assignee: All Smart Core Shanghai Technology Co ltd
Priority date: 2024-01-30
Filing date: 2024-01-30
Publication date: 2024-05-14
Anticipated expiration: 2044-01-30
Also published as: CN117669474A

Abstract

The present disclosure relates to a layout generation method for multiple exposure, an electronic device, and a storage medium. The layout generation method for multiple exposure comprises the following steps: generating an undirected graph parameter based on design parameters of the layout, wherein the undirected graph parameter is used for defining an undirected graph; generating an undirected graph based on undirected graph parameters, the undirected graph including nodes and links connecting the nodes; determining whether a conflict exists in the undirected graph; in response to the existence of the conflict in the undirected graph, correcting the undirected graph until a conflict-free undirected graph is generated; and generating an optimized layout based on the collision-free undirected graph. The method of the embodiment of the disclosure can improve the efficiency of conflict detection in the layout, reduce the probability of generating defects in the subsequent chip manufacturing process, and improve the chip performance.

Description

Layout generation method for multiple exposure, electronic equipment and storage medium

Technical Field

Embodiments of the present disclosure relate generally to semiconductor technology and, more particularly, to a layout generation method for multiple exposure, an electronic device, and a storage medium.

Background

With the development of semiconductor processes, multiple exposure techniques are widely used in the chip design stage in order to achieve higher integration and better performance. Multiple exposure is a method of forming chip structures using different levels of lithographic patterns. To ensure successful implementation of multiple exposures and avoid potential conflicts, conventional schemes typically use layout detection tools to optimize chip layout at design time or design rule checking (design rule check, abbreviated DRC) tools to check the consistency of design and manufacturing process rules to reduce the risk of conflicts during multiple exposures.

Conventional multiple exposure detection techniques still have certain limitations in terms of accuracy and reliability. Particularly, for complex exposure schemes and manufacturing processes, the conventional scheme cannot completely capture all conflict problems by creating a test layout for algorithm detection, and has the defects of missing report, false report, low efficiency and the like.

Disclosure of Invention

In accordance with example embodiments of the present disclosure, a layout generation scheme for multiple exposures is provided to at least partially overcome the above-described or other potential drawbacks.

In a first aspect of the present disclosure, a layout generation method for multiple exposures is provided. The method comprises the following steps: generating an undirected graph parameter based on design parameters of the layout, wherein the undirected graph parameter is used for defining an undirected graph; generating an undirected graph based on undirected graph parameters, the undirected graph including nodes and links connecting the nodes; determining whether a conflict exists in the undirected graph; in response to the existence of the conflict in the undirected graph, correcting the undirected graph until a conflict-free undirected graph is generated; and generating an optimized layout based on the collision-free undirected graph. According to the embodiment of the disclosure, the conflict in the layout design can be reliably eliminated by generating the conflict-free undirected graph and converting the conflict-free undirected graph into the layout, the conflict detection efficiency in the layout design is improved, the probability of generating defects in the subsequent chip manufacturing process is reduced, and therefore the chip performance is improved.

In a second aspect of the present disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor, the memory having instructions stored therein that, when executed by the processor, cause the device to perform actions. The actions include: generating an undirected graph parameter based on design parameters of the layout, wherein the undirected graph parameter is used for defining an undirected graph; generating an undirected graph based on undirected graph parameters, the undirected graph including nodes and links connecting the nodes; determining whether a conflict exists in the undirected graph; in response to the existence of the conflict in the undirected graph, correcting the undirected graph until a conflict-free undirected graph is generated; and generating an optimized layout based on the collision-free undirected graph.

In some embodiments, the undirected graph parameters include: the number of nodes; the number of links; and the definition of the priority of the links.

In some embodiments, generating the undirected graph parameters based on the design parameters of the layout includes: determining the number of nodes based on the number of patterns specified in the design parameters; determining a number of links based on links between the graphics; and determining a range of priorities of the priority definitions based on the design rules. Generally, a designer has logic relationships among some devices when designing functions, and has link relationships when specifically split, but does not determine specific placement positions. The link relation is to indicate that the device needs to be placed in different layers when splitting. For example, in some cases the placement location may be smaller than the process, in which case a high priority may need to be defined to split it into different layers. This is further described below.

In some embodiments, generating the undirected graph based on the undirected graph parameters includes: an undirected graph is generated based on the number of nodes, the number of links, the range of priorities, and the size of standard cells specified in the design parameters.

In some embodiments, determining whether a conflict exists in the undirected graph includes: determining a complete KN subgraph in the undirected graph, wherein the complete KN subgraph represents an undirected graph formed by N nodes, wherein any two nodes are connected, N is less than or equal to N, and N is the total number of the nodes; and determining a KN sub-graph having n greater than the number of exposures corresponding to the number of layers as an undirected graph having a conflict.

In some embodiments, determining whether a conflict exists in the undirected graph includes: comparing the undirected graph with the reference undirected graph with the conflict in the conflict undirected graph library; and determining that the conflict exists in the undirected graph based on the existence of the reference undirected graph of the type corresponding to the undirected graph in the conflict undirected graph library.

In some embodiments, in response to a conflict in the undirected graph, modifying the undirected graph until a conflict-free undirected graph is generated includes: the priority of the links at the positions of the conflicts in the undirected graph is modified based on the conflict processing rules, so that two adjacent nodes connected by the modified links can be split into the same layer, wherein the priority indicates the degree of necessity that the graphics corresponding to the two adjacent nodes connected by the links need to be split into different layers.

In some embodiments, generating an optimized layout based on the collision-free undirected graph includes: based on the corresponding relation between the distance and the priority of the graphics in the layout, converting the priority of the links connecting two adjacent nodes in the collision-free undirected graph into the distance between the two adjacent graphics in the layout; and arranging two adjacent nodes according to the distance, wherein the nodes are represented by default graphs; and replacing the default graph with the custom node graph.

In some embodiments, replacing the default graphic with the custom graphic comprises: determining parameter configuration of the node graph based on design parameters of the layout; generating a custom graph based on the parameter configuration; and setting custom graphics at positions corresponding to the default graphics in the layout respectively to replace the default graphics.

In some embodiments, the parameter configuration of the node graph includes: the type of chip design layer; and the orientation of the graphic.

In a third aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon a computer program which when executed by a processor implements a method according to the first aspect of the present disclosure.

According to the scheme of the embodiment of the disclosure, the conflict in the layout design can be reliably eliminated, the efficiency of conflict detection in the layout design is improved, the probability of defects in the subsequent chip manufacturing process is reduced, and the chip performance is improved.

It should be understood that what is described in this summary is not intended to limit the critical or essential features of the embodiments of the disclosure nor to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The above and other features, advantages and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, wherein like or similar reference numerals designate like or similar elements, and wherein:

FIG. 1 is a schematic diagram illustrating an example environment in which embodiments of the present disclosure may be implemented;

FIG. 2 illustrates a flow chart of a layout generation method for multiple exposures, according to some embodiments of the present disclosure;

FIG. 3 illustrates a flow chart of a layout generation method for multiple exposures according to further embodiments of the present disclosure;

FIG. 4 illustrates a schematic diagram of undirected graph conversion to a layout according to some embodiments of the present disclosure;

FIG. 5 illustrates an example of a layout of a via layer according to some embodiments of the present disclosure;

FIG. 6 illustrates an example of a layout of a metal layer according to further embodiments of the present disclosure;

FIG. 7 illustrates an example of a layout diagram configured along a first direction according to some embodiments of the present disclosure;

Fig. 8 illustrates an example of a layout diagram configured in a second direction according to some embodiments of the present disclosure;

FIG. 9 illustrates an example of a layout diagram of custom generation types that can implement some embodiments of the present disclosure; and

FIG. 10 illustrates a block diagram of a computing device capable of implementing various embodiments of the present disclosure.

Detailed Description

Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure have been shown in the accompanying drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustration purposes only and are not intended to limit the scope of the present disclosure.

In describing embodiments of the present disclosure, the term "comprising" and its like should be taken to be open-ended, i.e., including, but not limited to. The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first," "second," and the like, may refer to different or the same object. Other explicit and implicit definitions are also possible below.

As mentioned previously, to ensure successful implementation of multiple exposures and avoid potential conflicts, conventional schemes typically use layout detection tools to optimize chip layout at design time or DRC tools to check consistency of design and manufacturing process rules to reduce the risk of conflicts during multiple exposures. Conventional multiple exposure detection techniques have certain limitations in terms of accuracy and reliability, particularly with respect to complex exposure schemes and manufacturing processes. Since multiple exposure detection is a computationally intensive task, a significant amount of computational and memory resources are required. For large-scale and complex chip designs, the detection process is inefficient, resulting in a long chip design iteration period. Furthermore, conventional schemes do not fully capture all conflict issues by creating a test layout for algorithmic detection.

In view of this, embodiments of the present disclosure provide improved solutions. According to some embodiments of the present disclosure, a layout generation method for multiple exposures is provided. The method comprises the following steps: generating an undirected graph parameter based on design parameters of the layout, wherein the undirected graph parameter is used for defining the undirected graph, wherein the design parameters of the layout can be provided by a user, wherein relevant information of the layout is specified. Generating an undirected graph based on undirected graph parameters, wherein the undirected graph comprises nodes and links for connecting the nodes, and the undirected graph parameters provided by a user can be converted into undirected graph parameters. And determining whether a conflict exists in the undirected graph, wherein the conflict indicates that graphs corresponding to adjacent nodes where the conflict occurs cannot be split into different layers. And correcting the undirected graph until the undirected graph without conflict is generated under the condition that the undirected graph is determined to have conflict. Under the condition that no conflict exists in the undirected graph, the undirected graph without conflict can be directly utilized to generate the layout, and the generated layout is also free from conflict. Thereafter, an optimized layout may be generated based on the collision-free undirected graph, the generated optimized layout being a layout in which no collisions exist. The method of the embodiment of the disclosure can improve the efficiency of conflict detection in the layout, can effectively eliminate the conflict, reduce the probability of generating defects in the subsequent chip manufacturing process, and improve the chip performance.

Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Referring initially to FIG. 1, FIG. 1 illustrates a schematic diagram of an example environment 100 in which various embodiments of the present disclosure may be implemented. As shown in fig. 1, an example environment 100 includes a computing device 110 and a client 120.

In some embodiments, computing device 110 may interact with client 120. For example, computing device 110 may receive an input message from client 120 and output a feedback message to client 120. In some embodiments, the input message from the client 120 may be a layout design parameter. The computing device 110 may obtain the undirected graph parameters based on the layout design parameters, and may generate an undirected graph, and further perform conflict detection and conflict processing on the undirected graph, thereby generating a conflict-free optimized layout, and output the corresponding optimized layout to the client 120.

In some embodiments, computing device 110 may include, but is not limited to, personal computers, server computers, hand-held or laptop devices, mobile devices (such as mobile phones, personal digital assistants PDAs, media players, etc.), consumer electronics, minicomputers, mainframe computers, cloud computing resources, and the like.

It should be understood that the description of the structure and functionality of the example environment 100 is for illustrative purposes only and is not intended to limit the scope of the subject matter described herein. The subject matter described herein may be implemented in different structures and/or functions.

The technical solutions described above are only for example and not limiting the present disclosure. It should be appreciated that the example environment 100 may also have other various implementations. In order to more clearly explain the principles of the disclosed solution, a more detailed description will be made below with reference to fig. 2.

FIG. 2 illustrates a flow chart of a layout generation method for multiple exposures, according to some embodiments of the present disclosure. For example, the method 200 may be implemented by the computing device 110 as shown in fig. 1. It should be understood that method 200 may also include additional blocks not shown and/or that certain blocks shown may be omitted. The scope of the present disclosure is not limited in this respect.

At block 202, an undirected graph parameter may be generated based on the design parameters of the layout, wherein the undirected graph parameter is used to define an undirected graph. In some embodiments, the design parameters of the layout may be provided by a user, and embodiments of the present disclosure are not limited thereto, as the design parameters of the layout may also be provided by other principals. The design parameters of the layout may include information about the layout design, such as how many transistors, how many resistors, how many capacitors are needed, and the layout, connection relationships, etc. of these devices. Thus, undirected graph parameters can be derived based on layout design parameters. In addition, the exposure mode, such as two, three, four, etc., may be determined based on design parameters provided by the user (e.g., how many nanometers of process). In addition, the design parameters of the user may specify how many nanometer of processing is required to perform the multi-layer exposure. Aspects of some embodiments of the present disclosure may generate a conflict-free layout according to design parameters of a user, as described further below.

In some embodiments, the undirected graph parameters may include: the number of nodes; the number of links; and the definition of the priority of the links. An undirected graph can be generated based on undirected graph parameters. Generating the undirected graph parameters based on the layout design parameters may include: the number of nodes is determined based on the number of patterns specified in the design parameters, wherein the number of patterns may be determined by the number of devices, and each device may include one pattern or a plurality of patterns. The number of links is determined based on the number of links between the figures specified by the parameter "link count" in the design parameters of the layout. The parameter "number of links" is typically defined by the user, e.g., the number of user-defined links is 4, 6, etc. The more links, the greater the density of graphics in the representation layout. The range of priorities of the priority definitions may be determined based on the design rules. The priority may be used to specify how far the two nodes to which the link is connected are split into different layers. The priority definition may be defined by a user, who may customize the number of priorities, the range of each priority. For example, a plurality of priorities may be set, and the priorities may be represented by predetermined numerical values. For example, the first priority may have a value of 1, which requires that the two nodes must be split into different layers. The value of the second priority may be 2, which may require that the two nodes be split into different layers as much as possible, but is not required. The third priority may have a value of 3, which may specify that two nodes are split into different layers to the extent necessary, lower than the second priority. It should be understood that the numerical values recited herein are exemplary only and that embodiments of the present disclosure are not limited thereto. It can be seen that in the above example, the first priority is the highest priority among them, and the third priority is the lowest priority. The highest priority needs to be met preferentially in the splitting process, and then the lower priority needs to be met are considered. For each priority, a range thereof, i.e., the range of the aforementioned priority, needs to be defined. The range of each priority, which may also be referred to as an interval range, is used to determine the splitting distance (in nm, for example) for each priority. As an example, for the first priority, the interval range thereof may be determined to be, for example, 50 or more nm and less than 100nm, that is, the resolution distance corresponding thereto is between 50nm and 100nm. The second priority may be determined to have a range of greater than 100nm and less than or equal to 200 nm, i.e., a split distance of greater than 100nm and less than or equal to 200 nm. By properly setting the number of priorities and the range of priorities, different patterns can be properly distributed to the same layer or different layers, and in this way, the uniformity of the density of each pattern on the layout can be improved while solving the conflict problem.

The undirected graph is described below with reference to fig. 4. Fig. 4 illustrates a schematic diagram of undirected graph conversion to a layout 400 of some embodiments of the disclosure. The left undirected graph as shown in fig. 4 is an undirected graph formed by configuration parameter abstraction, which is an imaging of the undirected graph data structure. By means of the given nodes, links, priorities in the parameter configuration, an undirected graph data structure can be formed as shown on the left side in fig. 4. Four nodes are included in the undirected graph, represented by 402, 404, 406, and 408, respectively. The nodes are connected together through corresponding links. The individual links may be prioritized, such as priority 1, priority 2, etc., as described further below.

At block 204, an undirected graph is generated based on undirected graph parameters, the undirected graph including nodes and links connecting the nodes. As is well known, an undirected graph is a data structure. In some embodiments of the present disclosure, an undirected graph is generated based on undirected graph parameters such that collision detection may be performed on the undirected graph based on its characteristics, as further described below.

In some embodiments, generating the undirected graph based on the undirected graph parameters includes: an undirected graph is generated based on the number of nodes, the number of links, the definition of priorities, and the size of standard cells specified in the design parameters. The number of nodes corresponds to the number of graphics. The number of links represents the density of the graph, and the more links represents the greater density.

In some embodiments, various permutations and combinations of the undirected graph parameters may be performed, and the undirected graph may be randomly generated within a predetermined range. One undirected graph can be arbitrarily selected from the randomly generated undirected graphs. The undirected graph obtained in this way has universality and can be used for subsequent conflict detection and layout generation. It should be understood that embodiments of the present disclosure are not limited thereto, but rather that undirected graphs may be obtained in other ways as desired.

At block 206, a determination is made as to whether there is a conflict in the undirected graph, where the conflict indicates that the graph corresponding to the neighboring node where the conflict occurred cannot be split into different layers. For example, as the requirements of the process increase and the complexity of the current structure increases, more devices need to be split into different layers, which increases the splitting difficulty and may lead to failure to split into the desired layers, thereby causing collisions. As mentioned before, an undirected graph is a data structure such that collision risk present in a layout design can be found by detecting data collisions present therein. Compared with the traditional mode of directly carrying out conflict detection on the layout, the conflict detection efficiency can be greatly improved through the mode of detecting the undirected graph in the embodiment of the disclosure.

In some embodiments, whether there is a conflict in the undirected graph may be determined in the following manner. In particular, the corresponding KN subgraph can be found after determining the pattern of multiple exposures based on the idea of complete KN subgraph in graph theory. The exposure mode refers to the need to employ several or several exposures. In some embodiments, a complete KN subgraph of the undirected graph is determined, the KN subgraph having n greater than the number of exposures is determined as the number of nodes of the KN subgraph where n is the number of nodes of the KN subgraph, the number of exposures corresponding to the number of layers. The complete KN subgraph represents an undirected graph formed by N nodes, wherein any two nodes are connected, N is less than or equal to N, and N is the total number of the nodes. For example, a full K5 sub-pattern cannot be applied to a 4-shot exposure. The full K4 sub-pattern cannot be applied to 3 re-exposures. In particular, for example, a complete K4 subgraph, it means that one subgraph is made up of 4 points and is connected two by two. If there is a complete K4 sub-plot in the 3-fold exposure, then it cannot be completely split.

In some embodiments, whether there is a conflict in the undirected graph may be determined in the following manner. Specifically, comparing the undirected graph with various types of reference undirected graphs with conflicts in a conflict undirected graph library; and determining that the conflict exists in the undirected graph based on the existence of the reference undirected graph of the type corresponding to the undirected graph in the conflict undirected graph library. Wherein the conflict undirected graph library is a conflict undirected graph converted from the conflict layout. Therefore, whether conflict exists in the layout corresponding to the undirected graph can be found through comparison of the undirected graph.

Two ways of determining conflicts in undirected graphs are illustrated in some of the embodiments described above, it being understood that embodiments of the present disclosure are not so limited, but may employ other ways of detecting conflicts in undirected graphs as desired.

At block 208, in response to a conflict in the undirected graph, the undirected graph is modified until a conflict-free undirected graph is generated. In some embodiments, when a conflict exists in the undirected graph, the undirected graph is corrected, specifically, the priority of the link where the conflict exists in the undirected graph is modified based on a conflict processing rule, so that two adjacent nodes connected by the modified link can be split into the same layer, wherein the priority indicates the degree of necessity that graphics corresponding to the two adjacent nodes connected by the link need to be split into different layers. In other words, by lowering the priority of the links, two nodes that would otherwise require splitting into different layers but cannot perform splitting can remain in the same layer. For example, as mentioned previously, if there is a complete K4 sub-pattern in the 3-shot, then it cannot be completely split. Can be solved by adjusting the corresponding links. For example, the corresponding links may be adjusted in traversal order, such as adjusting the middle one to eliminate conflicts.

In this way, conflicts present in the undirected graph can be eliminated.

Furthermore, if a collision inevitably exists due to the complexity of the circuit or the like, the collision may be placed at a worst position, i.e., the placement at that position minimizes the adverse effects caused. Further, the size of the priority may be associated with the distance between the graphics or the process dimension. For example, the priority may specify a critical spacing. For example, the higher the priority, the shorter the distance.

At block 210, an optimized layout is generated based on the collision-free undirected graph. In some embodiments, generating an optimized layout based on the collision-free undirected graph may include: based on the corresponding relation between the distance and the priority of the graphics in the layout, the priority of the links connecting the two adjacent nodes in the collision-free undirected graph is converted into the distance between the two adjacent graphics in the layout. For example, the higher the priority, the shorter the corresponding distance, and the higher the necessity for the corresponding node to be split into different layers. The value of the priority is typically initially set by the user. Since there is a conflict, it needs to be modified to eliminate the conflict. Furthermore, two neighboring nodes are arranged at the converted distance, wherein the nodes are represented by a default graph, e.g. by circles, squares, etc. Finally, the default graph may be replaced with a custom node graph.

In some embodiments, replacing the default graphic with the custom graphic may include: determining parameter configuration of the node graph based on design parameters of the layout; generating a custom graph based on the parameter configuration; and setting custom graphics at positions corresponding to the default graphics in the layout respectively to replace the default graphics.

In some embodiments, the parameter configuration of the node graph may include: types of chip design layers, such as metal layers, via layers; the orientation of the graphics may also be included, such as horizontal or vertical.

Further description of layout generation methods for multiple exposures in accordance with other embodiments of the present disclosure is provided below with reference to FIG. 3. FIG. 3 illustrates a flow chart of a layout generation method 300 for multiple exposures according to further embodiments of the present disclosure.

As shown in fig. 3, at block 302, chip pattern parameters are configured. The chip pattern parameter configuration may include determining the number of nodes in the undirected graph, i.e., the number of nodes required may be specified. The number of links in the undirected graph is determined, i.e., the number of links required can be specified. The range of link priorities is determined for generating the undirected graph pattern. The priority may specify how much the corresponding node is necessary to be split into different layers. For example, a first priority may require that two nodes must be split into different layers. The second priority may then require, but need not necessarily, splitting the two nodes into different layers as much as possible. For example, the priority may specify a critical spacing.

The chip pattern parameter configuration may include determining the type of chip design layer, such as a metal layer or a via layer, etc., and may fill (or be referred to as generating) different patterns according to different types. The chip pattern parameter configuration may also set a pattern direction, and if a metal layer, a pattern with a direction, such as a horizontal direction or a vertical direction, may be generated according to the configuration orientation.

The split mode may include, for example, double exposure/triple exposure/quadruple exposure. Embodiments of the present disclosure are not limited thereto, but may be other exposure modes.

At block 304, the chip pattern parameter configuration is converted to an undirected graph parameter configuration. As described in detail above, it is not described in detail herein.

At block 306, an undirected graph data structure, i.e., an undirected graph, is constructed based on the undirected graph parameters.

At block 308, collision detection is performed on the undirected graph. If a conflict is detected, proceed to block 310. If no conflict is detected, proceed to block 312.

At block 310, the undirected graph is revised, such as the links. In particular, the priority of the link may be modified, such as by lowering the priority, to allow two nodes to coexist in the same layer.

At block 312, the link priority process node correspondence is converted to an inter-pattern distance. In other words, the nodes are arranged based on the distances to which the priorities correspond.

At block 314, a corresponding pattern is generated according to the layer type in the configuration. For example, a metal layer pattern is generated according to a metal layer type specified in the configuration, and a via pattern is generated according to a specified via type.

At block 316, the pattern graph is customized at the node based on the custom configuration parameters. For example, the shape of the graphic to be generated may be customized based on configuration parameters among design parameters.

The description is made below with reference to fig. 4 again. In some embodiments, an undirected graph data structure as shown in FIG. 4 may be formed by the nodes, links, and priorities given in the parameter configuration. The undirected graph may be customized based on usage requirements, a data-based collision-free undirected graph may be generated according to design rule definitions and collision handling rules, and then a layout of the design graph may be generated based on the undirected graph data and the defined patterns. For example, it is known that the undirected graph requires processing of double exposure, triple exposure, or quadruple exposure by the node and split modes. According to the splitting mode, the undirected graph can be subjected to conflict processing through a conflict processing algorithm, and the conflicting nodes are subjected to link correction, so that the outputted undirected graph is collision-free, and the splitting of configuration requirements is met.

As shown in fig. 4, the undirected graph on the left side can be converted into a chip design layout on the right side, i.e., a chip layout. Node 402 transforms into graph 402', node 404 transforms into graph 404', node 406 transforms into graph 406', and node 408 transforms into graph 408'. The layout on the right side shown in the figures is illustrative only and a variety of different shapes of layout diagrams may be generated based on custom shapes.

Fig. 5 illustrates an example of a layout 500 of a via layer according to some embodiments of the present disclosure. Depending on the data structure of the undirected graph and the scope of priority, spatial layout may be performed and the type of chip design layer may be specified. As shown in fig. 5, four generated graphs are shown, denoted by 502, 504, 506, and 508, respectively. Where P1 and P2 represent the priorities of the links in the corresponding undirected graph. Fig. 5 is a layout diagram of the resulting via layer.

Fig. 6 illustrates an example of a layout 600 of metal layers according to further embodiments of the present disclosure. As mentioned previously, the spatial layout may be made according to the data structure of the undirected graph and the scope of priority, and the type of chip design layer may be specified. Fig. 6 is a layout diagram of the metal layer produced. As shown in fig. 6, five generated graphs are shown, represented by 602, 604, 606, 608, and 610, respectively. Where P1 and P2 represent the priorities of the links in the corresponding undirected graph.

Fig. 7 illustrates an example of a layout 700 configured along a first direction according to some embodiments of the present disclosure. Fig. 8 illustrates an example of a layout 800 configured in a second direction according to some embodiments of the present disclosure. The layout direction may be configured according to the parameter "dimension". As shown in fig. 7, five generated graphs are shown, represented by 702, 704, 706, 708, and 710, respectively. Wherein the rectangular shaped pattern 710 is arranged along a horizontal direction. As shown in fig. 8, five generated graphs are shown, denoted by 802, 804, 806, 808, and 810, respectively. The rectangular shaped pattern 810 is arranged along the vertical direction. Fig. 7 and 8 show layout diagrams arranged along the first direction and the second direction. It should be understood that embodiments of the present disclosure are not limited thereto, but may be arranged in other directions as desired. In addition, the shape of the generated graphic may be variously changed.

FIG. 9 illustrates an example of a layout 900 of custom generation types that can implement some embodiments of the present disclosure. In some embodiments, the type of layout to be generated may be customized according to design requirements. For example, the shape of the device to be created may be customized, such as square, rectangle, trapezoid, circle, or a combination of various basic patterns, etc. As shown in fig. 9, five generated graphs are shown, denoted by 902, 904, 906, 908, and 910, respectively. The graph may be generated based on the same undirected graph as the layout shown in fig. 7, except that the custom graph is different, and a different layout is generated. Graphics of various shapes can be generated as desired.

The present disclosure proposes a multiple exposure map generation scheme. The scheme is suitable for double exposure, triple exposure or quadruple exposure, and the generated graph is based on a conflict-free undirected graph, and can be used for customizing pattern types and connection priority, and the generated graph is more similar to a design graph. In other words, the optimized layout graph can be obtained through the scheme of the embodiment of the disclosure.

In some embodiments of the present disclosure, collision-free undirected graphs can be quickly generated based on the provided parameter configuration, the generation efficiency is improved, and the generated undirected graphs are converted into chip design layout graphs. And generating a pattern according to the self-defined parameters, and timely detecting potential conflict through the provided recommended layout of multiple exposure in the chip design stage, so that redesign or repair caused in the subsequent manufacturing stage is avoided, and the density and performance of the chip function are improved.

Aspects of embodiments of the present disclosure are described above with reference to the accompanying drawings. Embodiments of the present disclosure are not limited thereto. It should be understood that the embodiments shown in the drawings are merely for purposes of illustrating schematically the aspects of some embodiments of the disclosure and are not intended to limit the disclosure. Embodiments of the present disclosure may also have various other forms.

An electronic device is also disclosed in the embodiments of the present disclosure. The electronic device includes: a processor; and a memory coupled to the processor, the memory having instructions stored therein that, when executed by the processor, cause the device to perform actions comprising: generating an undirected graph parameter based on design parameters of the layout, wherein the undirected graph parameter is used for defining an undirected graph; generating an undirected graph based on undirected graph parameters, the undirected graph including nodes and links connecting the nodes; determining whether a conflict exists in the undirected graph; in response to the existence of the conflict in the undirected graph, correcting the undirected graph until a conflict-free undirected graph is generated; and generating an optimized layout based on the collision-free undirected graph.

Also disclosed in embodiments of the present disclosure is a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a layout generation method for multiple exposures according to embodiments of the present disclosure.

The scheme of the embodiment of the disclosure can improve the efficiency of conflict detection in the layout, effectively eliminate the conflict therein, reduce the probability of generating defects in the subsequent chip manufacturing process and improve the chip performance.

Fig. 10 shows a schematic block diagram of an example device 1000 that may be used to implement embodiments of the present disclosure. For example, the computing device 110 shown in fig. 1 may be implemented by the apparatus 1000. As shown, the device 1000 includes a Central Processing Unit (CPU) 1001 that can perform various suitable actions and processes in accordance with computer program instructions stored in a Read Only Memory (ROM) 1002 or loaded from a storage unit 1008 into a Random Access Memory (RAM) 1003. In the RAM 1003, various programs and data required for the operation of the device 1000 can also be stored. The CPU 1001, ROM 1002, and RAM 1003 are connected to each other by a bus 1004. An input/output (I/O) interface 1005 is also connected to bus 1004.

Various components in device 1000 are connected to I/O interface 1005, including: an input unit 1006 such as a keyboard, a mouse, and the like; an output unit 1007 such as various types of displays, speakers, and the like; a storage unit 1008 such as a magnetic disk, an optical disk, or the like; and communication unit 1009 such as a network card, modem, wireless communication transceiver, etc. Communication unit 1009 allows device 1000 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunications networks.

The processing unit 1001 performs the various methods and processes described above, such as method 200. For example, in some embodiments, the method 200 may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as the storage unit 1008. In some embodiments, part or all of the computer program may be loaded and/or installed onto device 1000 via ROM 1002 and/or communication unit 1009. When a computer program is loaded into RAM 1003 and executed by CPU 1001, one or more steps of method 200 described above may be performed. Alternatively, in other embodiments, CPU 1001 may be configured to perform method 200 in any other suitable manner (e.g., by means of firmware).

The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a load programmable logic device (CPLD), etc.

Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

Moreover, although operations are depicted in a particular order, this should be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the present disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination.

Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.

Claims

1. A layout generation method for multiple exposures, comprising:

generating an undirected graph parameter based on design parameters of a layout, wherein the undirected graph parameter is used for defining an undirected graph, and the undirected graph parameter comprises the number of nodes and the number of links;

generating the undirected graph based on the undirected graph parameters, the undirected graph including nodes and links connecting the nodes;

determining whether a conflict exists in the undirected graph, wherein the conflict indicates that graphs corresponding to the nodes adjacent to the conflict place cannot be split into different layers;

responding to the conflict in the undirected graph, and correcting the undirected graph until a conflict-free undirected graph is generated; and

Generating an optimized layout based on the collision-free undirected graph;

wherein determining whether a conflict exists in the undirected graph comprises:

Determining a complete KN subgraph in the undirected graph, wherein the complete KN subgraph represents an undirected graph formed by N nodes connected with any two nodes, N is less than or equal to N, and N is the total number of the nodes; and

A KN sub-graph with n greater than the number of exposures corresponding to the number of layers is determined as an undirected graph with conflicts.

2. The method of claim 1, wherein the undirected graph parameters further include:

And defining the priority of the link, wherein the priority indicates the degree of necessity that the graphics corresponding to two adjacent nodes connected by the link need to be split into different layers.

3. The method of claim 2, wherein generating undirected graph parameters based on design parameters of a layout comprises:

determining the number of nodes based on the number of graphics specified in the design parameters;

determining the number of links based on the links between the graphics; and

The range of the priorities of the priority definitions is determined based on design rules.

4. The method of claim 2, wherein generating the undirected graph based on the undirected graph parameters comprises:

The undirected graph is generated based on the number of nodes, the number of links, the range of priorities, and the size of standard cells specified in the design parameters.

5. The method of claim 1, wherein in response to a conflict in the undirected graph, modifying the undirected graph until a conflict-free undirected graph is generated comprises:

And modifying the priority of the link at the position of the conflict in the undirected graph based on a conflict processing rule so that two adjacent nodes connected by the modified link can be split into the same layer, wherein the priority indicates the degree of necessity that the graphics corresponding to the two adjacent nodes connected by the link need to be split into different layers.

6. The method of any of claims 2 to 5, wherein generating an optimized layout based on the collision-free undirected graph comprises:

Based on the corresponding relation between the distance between the graphs in the layout and the priority, converting the priority of the link connecting two adjacent nodes in the collision-free undirected graph into the distance between the two adjacent graphs in the layout; and

Arranging two adjacent nodes according to the distance, wherein the nodes are represented by default graphs; and

And replacing the default graph with the custom node graph.

7. The method of claim 6, wherein replacing the default graphic with a custom graphic comprises:

determining parameter configuration of the node graph based on design parameters of the layout;

Generating the custom graph based on the parameter configuration; and

And setting the custom graphics at positions respectively corresponding to the default graphics in the layout to replace the default graphics.

8. The method of claim 7, wherein the parameter configuration of the node graph comprises:

The type of chip design layer; and

The direction of the pattern.

9. A layout generation method for multiple exposures, comprising:

Generating an optimized layout based on the collision-free undirected graph;

Comparing the undirected graph with conflicting reference undirected graphs in a conflict undirected graph library; and

And determining that the conflict exists in the undirected graph based on the reference undirected graph of the type corresponding to the undirected graph exists in the conflict undirected graph library.

10. The method of claim 9, wherein the undirected graph parameters further include:

11. The method of claim 10, wherein generating undirected graph parameters based on design parameters of a layout comprises:

determining the number of links based on the links between the graphics; and

12. The method of claim 10, wherein generating the undirected graph based on the undirected graph parameters comprises:

13. The method of claim 9, wherein in response to a conflict in the undirected graph, modifying the undirected graph until a conflict-free undirected graph is generated comprises:

14. The method of any of claims 10 to 13, wherein generating an optimized layout based on the collision-free undirected graph comprises:

And replacing the default graph with the custom node graph.

15. The method of claim 14, wherein replacing the default graphic with a custom graphic comprises:

Generating the custom graph based on the parameter configuration; and

16. The method of claim 15, wherein the parameter configuration of the node graph comprises:

The type of chip design layer; and

The direction of the pattern.

17. An electronic device, comprising:

A processor; and

A memory coupled to the processor, the memory having instructions stored therein, which when executed by the processor, cause the device to perform actions comprising:

Generating an optimized layout based on the collision-free undirected graph;

18. An electronic device, comprising:

A processor; and

Generating an optimized layout based on the collision-free undirected graph;

19. The electronic device of claim 18, wherein the undirected graph parameters further include:

20. A computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method according to any of claims 1-16.